A 3D stacked chip with embedded microchannel cooling structure

By etching microchannels on the substrate of the 3D stacking chip and using manifold and annular fin structures, the heat exchange efficiency of the coolant is improved, and the problem that traditional cooling methods cannot effectively solve the heat of the 3D stacking chip is solved.

CN115763405BActive Publication Date: 2025-05-13ZHEJIANG LAB
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Patent Information

Application Number
CN202211421037.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-15
Publication Date
2025-05-13
Estimated Expiration
2042-11-15

AI Technical Summary

Technical Problem

Traditional surface cooling cannot effectively solve the heat problem of the intermediate layer chip of 3D stacked chips, especially in stacked chips with through-silicon holes, the cooling liquid heat exchange efficiency is low.

Method used

Using an embedded microchannel cooling structure, by etching the microchannel on the substrate, the coolant flows through the microchannel to take away the chip heat, and uses a manifold structure and annular fin structure to increase the heat exchange area and efficiency of the coolant.

Benefits of technology

A more uniform coolant distribution is achieved, heat exchange efficiency is improved, chip temperature is reduced, and traditional cooling methods cannot effectively solve the heat of 3D stacked chips.

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Abstract

The present invention belongs to the field of semiconductor technology, and discloses a 3D stacked chip with an embedded microchannel cooling structure, including a substrate, a shell on the substrate, a coolant inlet and a coolant outlet on the shell, a chipset in the shell, and the chipset is stacked by multiple chips. The coolant enters from the coolant inlet and flows out from the coolant outlet after passing through the chipset. The present invention adopts a parallel manifold structure to make the coolant distribution on the chip more uniform; through holes are used to form an annular fin structure, without the need to additionally design a heat exchange channel and increase the chip height; the through holes penetrate the chip, and the inside can be filled with conductive metal to achieve circuit connection of the stacked chips. The present invention arranges microchannels based on the structure of silicon through vias to maximize the number of microchannels; the manifold structure is used to evenly distribute the coolant to achieve efficient heat exchange.
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Description

Technical Field

[0001] The invention belongs to the field of semiconductor technology, and in particular relates to a 3D stacked chip with an embedded microchannel cooling structure. Background Art

[0002] As computing power requirements increase, the market demand for multi-chip stacking packaging technology to achieve high computing power density for devices of the same size is also growing. At the same time, the increase in computing power density inevitably leads to an increase in heat flux density, resulting in serious chip heating problems. Traditional surface cooling cannot solve the heat of the middle layer chip, so chip embedded microchannel cooling technology came into being.

[0003] Embedded microchannel cooling technology is to etch microchannels on the back of the semiconductor substrate. The coolant flows through the microchannels to remove the heat from the chip. It has the characteristics of high heat exchange efficiency, low manufacturing cost and long service life. However, for stacked chips with through-silicon vias, the semiconductor substrate cannot be etched with microchannels on the entire surface, and the heat exchange efficiency of the coolant is greatly limited. Summary of the invention

[0004] The present invention aims to provide a 3D stacked chip with an embedded microchannel cooling structure to solve the above-mentioned technical problems.

[0005] In order to solve the above technical problems, the specific technical solution of a 3D stacked chip with an embedded microchannel cooling structure of the present invention is as follows:

[0006] A 3D stacked chip with an embedded microchannel cooling structure comprises a substrate, a shell is provided on the substrate, a coolant inlet and a coolant outlet are provided on the shell, a chipset is provided in the shell, and the chipset is formed by stacking a plurality of chips. The coolant enters from the coolant inlet and flows out from the coolant outlet after passing through the chipset.

[0007] Furthermore, each of the chips includes a microfluidic substrate and a manifold substrate, the microfluidic substrate and the manifold substrate adopt a flat plate structure, the microfluidic substrate and the manifold substrate are bonded to each other, the microfluidic substrate has a plurality of annular fins arranged in an array, the annular fins are hollow cylinders protruding upward from the bottom surface of the microfluidic substrate, and the inner ring forms a first through hole; the manifold substrate has a plurality of second through holes running through it from top to bottom, the second through holes of the manifold substrate are aligned one by one with the first through holes of the microfluidic substrate, and the manifold substrate has a plurality of parallel cooling liquid inlet and outlet channels.

[0008] Furthermore, the lower surface of the microfluidic substrate of the bottommost chip is fixedly connected to the substrate, and the substrate 1 is a circuit board.

[0009] Furthermore, microchannels are formed between adjacent annular fins.

[0010] Furthermore, the manifold substrate is a serpentine baffle structure, and coolant inlet and outlet channels that are alternately arranged on the left and right sides are formed between the baffles, which are respectively a left channel and a right channel. The left channel is open on the left side, and the right channel is open on the right side. The left channel and the right channel are used to provide coolant inlet and outlet.

[0011] Furthermore, the first through hole and the second through hole are filled with conductive metal to achieve circuit connectivity.

[0012] Furthermore, the second through hole and the coolant inlet and outlet channel on the manifold substrate are both etched on the manifold substrate by using laser etching and plasma dry etching processes.

[0013] Furthermore, the coolant enters the microchannel from the manifold substrate.

[0014] Furthermore, after a plurality of chips are stacked, multiple layers of cooling liquid inlet and outlet channels are formed, the left channel of each layer is connected to the cooling liquid outlet on the shell, and the right channel of each layer is connected to the cooling liquid inlet on the shell.

[0015] Furthermore, the coolant enters from the coolant inlet and enters the manifold substrate from the coolant inlet and outlet channel on one side of the manifold substrate; thereafter, the coolant enters the microchannel of the microfluidic substrate, exchanges heat with the outer surface of the annular fin and the upper surface of the microfluidic substrate, and finally, the coolant flows out from the coolant outlet through the coolant inlet and outlet channel on the other side of the manifold substrate.

[0016] The 3D stacked chip with embedded microchannel cooling structure of the present invention has the following advantages: the present invention adopts a parallel manifold structure to make the coolant on the chip more evenly distributed; the through-hole is used to form an annular fin structure, and there is no need to design additional heat exchange channels and increase the chip height; the through-hole runs through the chip, and the inside can be filled with conductive metal to achieve circuit connection of the stacked chip. The present invention arranges microchannels based on the structure of silicon through-hole vias to maximize the number of microchannels; the manifold structure is used to evenly distribute the coolant to achieve high-efficiency heat exchange. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of the overall structure of a 3D stacked chip with an embedded microchannel cooling structure of the present invention;

[0018] Figure 2 A front cross-sectional view of a 3D stacked chip with an embedded microchannel cooling structure of the present invention;

[0019] Figure 3 It is a cross-sectional view of the local structure of the chip of the present invention;

[0020] Figure 4 It is a schematic diagram of the chip structure of the present invention;

[0021] Figure 5 It is a schematic diagram of the structure of the microfluidic substrate of the present invention;

[0022] Figure 6 It is a schematic diagram of the structure of the manifold substrate of the present invention;

[0023] Figure 7 It is a cross-sectional view of the chip of the present invention.

[0024] Explanation of markings in the figure: 1. substrate; 2. chipset; 21. chip; 211. microfluidic substrate; 212. manifold substrate; 2111. annular fin; 21111. first through hole; 2122. second through hole; 2121. coolant inlet and outlet channel; 21211. left channel; 21212. right channel; 2112. microchannel; 3. shell; 31. coolant inlet; 32. coolant outlet. DETAILED DESCRIPTION

[0025] In order to better understand the purpose, structure and function of the present invention, the following is a further detailed description of a 3D stacked chip with an embedded microchannel cooling structure of the present invention in conjunction with the accompanying drawings.

[0026] like Figure 1 , Figure 2 As shown, a 3D stacked chip with an embedded microchannel cooling structure of the present invention includes a substrate 1, which is a circuit board. The substrate 1 has a shell 3, which is welded and fixed to the substrate 1. The shell 3 has a coolant inlet 31 and a coolant outlet 32. The shell 3 has a chipset 2 in it. The chipset 2 and the substrate 1 are mounted by soldering, and the chipset 2 and the shell 3 are fixed by bonding. The chipset 2 is formed by stacking a plurality of chips 21.

[0027] like Figure 3 , Figure 4 As shown, each chip 21 includes a microfluidic substrate 211 and a manifold substrate 212. The microfluidic substrate 211 and the manifold substrate 212 are of flat structure, and the materials are circuit boards, ceramics, silicon and other materials. Semiconductor materials such as silicon, silicon carbide, gallium nitride, and gallium oxide can be selected, and the two are bonded to each other. The microfluidic substrate 211 is at the bottom, and the manifold substrate 212 is at the top. The lower surface of the microfluidic substrate 211 of the bottom chip 21 is mounted on the substrate 1 by soldering.

[0028] like Figure 5As shown, the microfluidic substrate 211 has a plurality of annular fins 2111 arranged in an array, and the annular fins 2111 are hollow cylinders protruding upward from the bottom surface of the microfluidic substrate 211, and the inner ring forms a first through hole 21111. Microchannels 2112 are formed between adjacent annular fins 2111. The annular fins 2111 and the first through holes 21111 are etched on the back of a chip based on semiconductor materials such as silicon, silicon carbide, gallium nitride, and gallium oxide, and are processed by etching processes such as laser etching and plasma dry etching.

[0029] like Figure 6 As shown, the manifold substrate 212 is a serpentine baffle structure, and the baffles form cooling liquid inlet and outlet channels 2121 that are alternately arranged on the left and right, respectively, a left channel 21211 and a right channel 21212. The left channel 21211 is open on the left, and the right channel 21212 is open on the right. The left channel 21211 and the right channel 21212 are used to provide the inlet and outlet of the cooling liquid. The serpentine baffle of the manifold substrate 212 has a plurality of second through holes 2122 that penetrate up and down. When the manifold substrate 212 is bonded to the microfluidic substrate 211, the second through holes 2122 of the manifold substrate 212 are aligned one by one with the first through holes 21111 of the microfluidic substrate 1, and the cooling liquid inlet and outlet channels 2121 of the manifold substrate 212 are connected to the microchannels 2112 of the microfluidic substrate 211. The first through holes 21111 and the second through holes 2122 are filled with conductive metal aluminum to achieve circuit connectivity.

[0030] The second through hole 2122 and the coolant inlet and outlet channel 2121 on the manifold substrate 212 are both etched on the manifold substrate 212 by using an etching process such as laser etching and plasma dry etching.

[0031] After multiple chips 21 are stacked, multiple layers of cooling liquid inlet and outlet channels 2121 are formed. The left channel 21211 of each layer is connected to the cooling liquid outlet 32 ​​on the shell 3, and the right channel 21212 of each layer is connected to the cooling liquid inlet 31 on the shell 3.

[0032] During operation, after the external coolant (the coolant is an electronic fluorinated liquid) enters the shell 3 from the coolant inlet 31, the coolant enters the multiple manifold substrates 212 in the chipset 2. Due to the blocking and guidance of the serpentine baffle, the coolant further enters the microfluidic substrate 211, flows between the annular fins 2111, and exchanges heat with the outer surface of the annular fins 2111 and the upper surface of the microfluidic substrate 211 to reduce the temperature of the active devices on the lower surface of the microfluidic substrate 211; finally, the coolant that has completed the heat exchange flows back to the manifold substrate 212, flows out of the chipset 2 under the blocking and guidance of the serpentine baffle, and finally flows out of the shell 3 from the coolant outlet 32.

[0033] It is to be understood that the present invention is described by some embodiments, and it is known to those skilled in the art that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the teachings of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the scope of protection of the present invention.

Claims

1. A 3D stacked chip with an embedded microchannel cooling structure, characterized in that: The invention comprises a substrate (1), the substrate (1) having a shell (3), the shell (3) having a cooling liquid inlet (31) and a cooling liquid outlet (32), the shell (3) having a chipset (2) in the inside, the chipset (2) being formed by stacking a plurality of chips (21), the cooling liquid entering through the cooling liquid inlet (31), passing through the chipset (2) and then flowing out from the cooling liquid outlet (32); each of the chips (21) comprises a microfluidic substrate (211) and a manifold substrate (212), the microfluidic substrate (211) and the manifold substrate (212) being of a flat plate structure, the microfluidic substrate (211) and the manifold substrate (212) being bonded to each other, the microfluidic substrate (211) having a plurality of annular fins (2111) arranged in an array, the annular fins (2111) in the inside (2111) is an internally hollow cylinder protruding upward from the bottom surface of the microfluidic substrate (211), and its inner ring forms a first through hole (21111); the manifold substrate (212) has a plurality of second through holes (2122) penetrating from top to bottom, the second through holes (2122) of the manifold substrate (212) are aligned one by one with the first through holes (21111) of the microfluidic substrate (211), and the manifold substrate (212) has a plurality of parallel cooling liquid inlet and outlet channels (2121); microchannels (2112) are formed between adjacent annular fins (2111); the manifold substrate (212) is a serpentine baffle structure; the first through holes (21111) and the second through holes (2122) are filled with conductive metal to achieve circuit connectivity.

2. The 3D stacked chip with embedded microchannel cooling structure according to claim 1, characterized in that: The lower surface of the microfluidic substrate (211) of the bottommost chip (21) is fixedly connected to the substrate (1), and the substrate (1) is a circuit board.

3. The 3D stacked chip with embedded microchannel cooling structure according to claim 1, characterized in that: Cooling liquid inlet and outlet channels (2121) are formed between the baffles and are alternately arranged on the left and right sides, namely a left channel (21211) and a right channel (21212). The left channel (21211) is open on the left side, and the right channel (21212) is open on the right side. The left channel (21211) and the right channel (21212) are used to provide the inlet and outlet of the cooling liquid.

4. The 3D stacked chip with embedded microchannel cooling structure according to claim 1, characterized in that: The second through hole (2122) and the cooling liquid inlet and outlet channel (2121) on the manifold substrate (212) are both engraved on the manifold substrate (212) using laser etching and plasma dry etching processes.

5. The 3D stacked chip with embedded microchannel cooling structure according to claim 1, characterized in that: The cooling liquid enters the microchannel (2112) from the manifold substrate (212).

6. The 3D stacked chip with embedded microchannel cooling structure according to claim 1, characterized in that: Multiple chips (21) are stacked to form multiple layers of cooling liquid inlet and outlet channels (2121), wherein the left channel (21211) of each layer is connected to the cooling liquid outlet (32) on the shell (3), and the right channel (21212) of each layer is connected to the cooling liquid inlet (31) on the shell (3).

7. The 3D stacked chip with embedded microchannel cooling structure according to claim 1, characterized in that: The coolant enters through the coolant inlet (31) and enters the manifold substrate (212) from the coolant inlet and outlet channel (2121) on one side of the manifold substrate (212); thereafter, the coolant enters the microchannel (2112) of the microfluidic substrate (211) and exchanges heat with the outer surface of the annular fin (2111) and the upper surface of the microfluidic substrate (211); finally, the coolant flows out from the coolant outlet (32) through the coolant inlet and outlet channel (2121) on the other side of the manifold substrate (212).

Citation Information

Patent Citations

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