SiC VDMOS Devices and Methods to Improve SiC Device Yield and Reliability

Abstract

This invention discloses a SiC VDMOS device and a method for improving the yield and reliability of SiC devices. The method includes steps of ion implantation of a SiC wafer, activation of the ion-implanted SiC wafer, and fabrication of a VDMOS device structure based on the activated SiC wafer. The activation step of the ion-implanted SiC wafer includes: depositing a protective layer on the surface of the SiC wafer and annealing the SiC wafer at 3-8 atmospheres to activate the implanted ions. Compared to the current method using C-film protection, this invention reduces the number of particles in the device, thereby improving yield and reliability.

Description

Technical Field

[0001] This invention specifically relates to a SiC VDMOS device and a method for improving the yield and reliability of SiC devices, belonging to the field of semiconductor power device technology. Background Technology

[0002] SiC devices, as an important component of third-generation semiconductors, have seen tremendous development in research over the past few decades. However, some manufacturing processes still affect SiC yield. The current traditional SiC activation process mainly involves PVD sputtering to grow a C film on the implanted wafer or coating a layer of photoresist on the surface and then carbonizing it at high temperature (600°C) to form a C film. However, PVD C film growth is slow, leading to a longer chip production cycle. The quality of the C film grown by the high-temperature carbonization process is lower than that of the C film grown by PVD, resulting in a lower surface roughness quality of the activated SiC. After the C film is completed, activation needs to be carried out at a high temperature of 1700-1800°C. However, the C film grown by both of these processes will lead to an increase in device particles during activation, reducing the device yield. Summary of the Invention

[0003] The main objective of this invention is to provide a SiC VDMOS device and a method for improving the yield and reliability of SiC devices, thereby overcoming the shortcomings of the prior art.

[0004] To achieve the aforementioned objectives, the technical solution adopted by this invention includes:

[0005] The present invention provides a method for improving the yield and reliability of SiC devices, including the steps of ion implantation of SiC wafers, activation of ion-implanted SiC wafers, and fabrication of VDMOS device structures based on the activated SiC wafers. The step of activating ion-implanted SiC wafers includes: coating the surface of the SiC wafer with a protective layer and annealing the SiC wafer under a pressure of 3-8 atmospheres to activate the implanted ions.

[0006] In one aspect, the present invention provides a SICVDMOS device obtained by the method described above for improving the yield and reliability of SiC devices.

[0007] Compared with the prior art, the advantages of the present invention include:

[0008] 1) The present invention provides a method for improving the yield and reliability of SiC devices. Compared with the current method of using C film protection, it can reduce the number of device particles and improve the yield and reliability of the devices.

[0009] 2) The present invention provides a method for improving the yield and reliability of SiC devices. By using SiC as a protective film, the cycle of equipment PM can also be reduced, thereby improving production efficiency. Attached Figure Description

[0010] Figure 1 This is a flowchart illustrating a method for improving the yield and reliability of SiC devices, provided in a typical embodiment of the present invention.

[0011] Figure 2 This is a schematic diagram of the structure of a SICVDMOS device provided in a typical embodiment of the present invention. Detailed Implementation

[0012] In view of the shortcomings of the prior art, the inventors of this invention, through long-term research and extensive practice, have proposed the technical solution of this invention. The following will further explain and illustrate this technical solution, its implementation process, and its principles.

[0013] This invention provides a method for improving the yield and reliability of SiC devices. The method involves directly depositing SiO2 or SiC film on the implanted SiC wafer, followed by activation under high temperature and high pressure conditions. This reduces particles generated by C during activation and improves the device yield. At the same time, the SiO2 fabrication rate is fast, shortening the chip production cycle.

[0014] The present invention provides a method for improving the yield and reliability of SiC devices, including the steps of ion implantation of SiC wafers, activation of ion-implanted SiC wafers, and fabrication of VDMOS device structures based on the activated SiC wafers. The step of activating ion-implanted SiC wafers includes: coating the surface of the SiC wafer with a protective layer and annealing the SiC wafer under a pressure of 3-8 atmospheres to activate the implanted ions.

[0015] Furthermore, the protective layer includes a first protective layer, which is a silicon oxide film or a silicon carbide film.

[0016] Furthermore, the thickness of the first protective layer is

[0017] Furthermore, the method for improving the yield and reliability of SiC devices specifically includes: depositing a silicon oxide film layer on the surface of the SiC wafer under two radio frequency conditions, namely high frequency and low frequency, wherein the high frequency is 27.16MHz, the low frequency is 500KHz, and the deposition power is 1500W.

[0018] Furthermore, the protective layer also includes a second protective layer, which is deposited on the surface of the SiC wafer. The first protective layer is deposited on the second protective layer, and the second protective layer includes a carbon film layer.

[0019] Furthermore, the thickness of the second protective layer is greater than the thickness of the first protective layer.

[0020] Furthermore, the ratio of the thickness of the first protective layer to the thickness of the second protective layer is greater than or equal to 1 / 5 and less than 1.

[0021] Furthermore, the thickness of the second protective layer is

[0022] Furthermore, the annealing treatment is performed at a temperature of 1700-1800℃ for 3-15 minutes.

[0023] Furthermore, the method for improving the yield and reliability of SiC devices also includes: removing the protective layer after activating the implanted ions.

[0024] In one aspect, the present invention provides a SICVDMOS device obtained by the method described above for improving the yield and reliability of SiC devices.

[0025] The following will further explain the technical solution, its implementation process and principle in conjunction with the accompanying drawings and specific implementation examples. Unless otherwise specified, the ion implantation equipment, chemical vapor deposition (CVD) equipment, plasma enhanced chemical vapor deposition (PECVD) equipment, annealing equipment and the structure of the SiC VDMOS device and its fabrication process used in the embodiments of the present invention are all known to those skilled in the art.

[0026] Example 1

[0027] Please see Figure 1 A method for fabricating a SiC VDMOS device, comprising:

[0028] 1) Ion implantation of SiC wafers is performed using processes known to those skilled in the art, and the ion dosage and other parameters are not limited herein;

[0029] 2) Activation of the ion-implanted SiC wafer, specifically including:

[0030] 2.1) Place the cleaned SiC wafer into the reaction chamber of the PECVD equipment, and deposit a layer with a thickness of [thickness missing] on the surface of the SiC wafer. The silicon oxide film layer is used as a protective layer. When depositing the silicon oxide film, two radio frequencies, high frequency and low frequency, are used. The high frequency is 27.16MHz and the low frequency is 500KHz. Under the combined effect of high frequency and low frequency, the quality of silicon oxide film can be improved. The deposition power is set to 1500W when depositing silicon oxide film. High power can accelerate the deposition rate of silicon oxide film.

[0031] 2.2) The SiC wafer with a silicon oxide film on its surface is transferred to an annealing activation furnace. The gas pressure in the annealing activation furnace is set to 5 atmospheres and the temperature is set to 1750℃ and held for 10 minutes to achieve annealing activation of the SiC wafer after ion implantation. The high-pressure environment can increase the melting point of silicon oxide and prevent silicon oxide from melting and failing under high temperature conditions.

[0032] 3) The silicon oxide film is removed using an HF solution, etc., and a VDMOS device structure is fabricated based on the activated SiC wafer, thereby forming a structure as shown in the image. Figure 2 The VDMOS device shown is known to those skilled in the art, and its specific structure will not be described in detail here.

[0033] Example 2

[0034] A method for fabricating a SiC VDMOS device, comprising:

[0035] 1) Ion implantation of SiC wafers is performed using processes known to those skilled in the art, and the ion dosage and other parameters are not limited herein;

[0036] 2) Activation of the ion-implanted SiC wafer, specifically including:

[0037] 2.1) Take the cleaned SiC wafer and form a layer with a thickness of [thickness missing] on the surface of the SiC wafer. carbon film;

[0038] 2.2) A SiC wafer with a carbon film coated on its surface is placed in the reaction chamber of a PECVD device, and a carbon film with a thickness of [thickness missing] is deposited on the surface of the carbon film. The silicon oxide film layer uses the stacked structure of the carbon film and silicon oxide film as a protective layer. When depositing the silicon oxide film, two radio frequencies, a high frequency of 27.16 MHz and a low frequency of 500 kHz, are used. Under the combined effect of the high frequency and the low frequency, the quality of the silicon oxide film can be improved. The deposition power during the deposition of the silicon oxide film is set to 1500 W. High power can accelerate the deposition rate of the silicon oxide film.

[0039] 2.3) The SiC wafer with a protective layer on its surface is transferred to an annealing activation furnace. The gas pressure in the annealing activation furnace is set to 8 atmospheres and the temperature is set to 1700℃ and held for 10 minutes to achieve annealing activation of the SiC wafer after ion implantation. The high-pressure environment can increase the melting point of silicon oxide and prevent silicon oxide from melting and failing under high temperature conditions.

[0040] 3) The silicon oxide film is removed using an HF solution, etc., and a VDMOS device structure is fabricated based on the activated SiC wafer, thereby forming a structure as shown in the image. Figure 2 The VDMOS device shown is known to those skilled in the art, and its specific structure will not be described in detail here.

[0041] Example 3

[0042] A method for fabricating a SiC VDMOS device, comprising:

[0043] 1) Ion implantation of SiC wafers is performed using processes known to those skilled in the art, and the ion dosage and other parameters are not limited herein;

[0044] 2) Activation of the ion-implanted SiC wafer, specifically including:

[0045] 2.1) Take the cleaned SiC wafer and form a layer with a thickness of [thickness value missing] on the surface of the SiC wafer. SiC film is used as a protective layer;

[0046] 2.2) The SiC wafer with a SiC film on its surface is transferred to an annealing activation furnace. The temperature in the annealing activation furnace is set to 1800℃ and held for 3 minutes to achieve annealing activation of the SiC wafer after ion implantation.

[0047] 3) Remove the SiC film and fabricate a VDMOS device structure based on the activated SiC wafer, thereby forming a structure as shown in the figure. Figure 2 The VDMOS device shown is known to those skilled in the art, and its specific structure will not be described in detail here.

[0048] Example 4

[0049] A method for fabricating a SiC VDMOS device, comprising:

[0050] 1) Ion implantation of SiC wafers is performed using processes known to those skilled in the art, and the ion dosage and other parameters are not limited herein;

[0051] 2) Activation of the ion-implanted SiC wafer, specifically including:

[0052] 2.1) Take the cleaned SiC wafer and form a layer with a thickness of [thickness missing] on the surface of the SiC wafer. carbon film;

[0053] 2.2) Form a film with a thickness of [thickness value missing] on the surface of the carbon film. The SiC film, with the stacked structure formed by the carbon film and the SiC film as the protective layer;

[0054] 2.3) Transfer the SiC wafer with a protective layer on its surface to an annealing activation furnace, set the temperature in the annealing activation furnace to 1750℃ and hold it for 15 minutes to achieve annealing activation of the SiC wafer after ion implantation.

[0055] 3) Remove the SiC film and fabricate a VDMOS device structure based on the activated SiC wafer, thereby forming a structure as shown in the figure. Figure 2 The VDMOS device shown is known to those skilled in the art, and its specific structure will not be described in detail here.

[0056] Comparative Example 1

[0057] A method for fabricating a SiC VDMOS device, comprising:

[0058] 1) Ion implantation of SiC wafers is performed using processes known to those skilled in the art, and the ion dosage and other parameters are not limited herein;

[0059] 2) Activation of the ion-implanted SiC wafer, specifically including:

[0060] 2.1) Take the cleaned SiC wafer and form a layer with a thickness of [thickness missing] on the surface of the SiC wafer. A carbon film, and the carbon film is used as a protective layer;

[0061] 2.2) The SiC wafer with a carbon film on its surface is transferred to an annealing activation furnace. The gas pressure in the annealing activation furnace is set to 5 atmospheres and the temperature is set to 1750℃ and held for 10 minutes to achieve annealing activation of the SiC wafer after ion implantation.

[0062] 3) Remove the SiC film and fabricate a VDMOS device structure based on the activated SiC wafer, thereby forming a structure as shown in the figure. Figure 2 The VDMOS device shown is known to those skilled in the art, and its specific structure will not be described in detail here.

[0063] It should be understood that the above embodiments are merely illustrative of the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A method for improving the yield and reliability of SiC devices, comprising the steps of ion implantation of a SiC wafer, activation of the ion-implanted SiC wafer, and fabrication of a VDMOS device structure based on the activated SiC wafer, characterized in that, The steps for activating a SiC wafer after ion implantation include: depositing a protective layer on the surface of the SiC wafer, and then annealing the SiC wafer under a pressure of 3-8 atmospheres, controlling the annealing temperature at 1700-1800℃ and the time at 3-15 minutes to activate the implanted ions. The protective layer includes a first protective layer, which is a silicon oxide film or a silicon carbide film.

2. The method for improving the yield and reliability of SiC devices according to claim 1, characterized in that: The thickness of the first protective layer is 300-800 Å.

3. The method for improving the yield and reliability of SiC devices according to claim 1, characterized in that, Specifically, it includes: A silicon oxide film is deposited on the surface of the SiC wafer under two radio frequency conditions: high frequency (27.16 MHz) and low frequency (500 kHz), with a deposition power of 1500 W.

4. The method for improving the yield and reliability of SiC devices according to claim 1, characterized in that: The protective layer further includes a second protective layer, which is deposited on the surface of the SiC wafer. The first protective layer is deposited on the second protective layer, and the second protective layer includes a carbon film layer.

5. The method for improving the yield and reliability of SiC devices according to claim 4, characterized in that: The thickness of the second protective layer is greater than the thickness of the first protective layer.

6. The method for improving the yield and reliability of SiC devices according to claim 5, characterized in that: The ratio of the thickness of the first protective layer to the thickness of the second protective layer is greater than or equal to 1 / 5 and less than 1.

7. The method for improving the yield and reliability of SiC devices according to claim 4, characterized in that: The thickness of the second protective layer is 500-1000 Å.

8. The method for improving the yield and reliability of SiC devices according to claim 1, characterized in that, Also includes: The protective layer is removed after the injected ions are activated.

9. A SICVDMOS device obtained by the method for improving the yield and reliability of SiC devices according to any one of claims 1-8.

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