An encapsulation structure and an encapsulation bonding process

Abstract

The present invention provides a packaging structure and a packaging bonding process, belonging to the field of semiconductor technology. The first power conversion chip and the second power conversion chip are asymmetrically arranged inside the upper double-sided copper-clad substrate and the lower double-sided copper-clad substrate. The collectors of the first power conversion chip and the second power conversion chip are respectively welded to the inner surfaces of the upper double-sided copper-clad substrate and the lower double-sided copper-clad substrate, and the gates are respectively welded to the inner surfaces of the lower double-sided copper-clad substrate and the upper double-sided copper-clad substrate. The upper surface and the lower surface of the upper end of the copper clip are respectively welded to the emitters of the first power conversion chip and the second power conversion chip, and the lower end is welded to the inner surface of the lower double-sided copper-clad substrate; the upper pin and the lower pin are respectively welded to the inner surfaces of the upper double-sided copper-clad substrate and the lower double-sided copper-clad substrate, and the upper pin is electrically connected to the collector, emitter and gate of the first power conversion chip; the lower pin is electrically connected to the collector, emitter and gate of the second power conversion chip.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and particularly relates to a packaging structure and a packaging bonding process. Background Art

[0002] Today, with the advocacy of energy conservation, emission reduction, and environmental protection, new energy vehicles have attracted much attention. Hybrid vehicles and pure electric vehicles powered by electric energy are the mainstream development directions of automobiles. The application of semiconductor power electronic devices in automobiles mainly lies in motor drive, battery charging, vehicle air conditioning, low-voltage DC power supply, etc. Motor drive is the part with the largest working power in the field of automotive electronics. Currently, most electric vehicles use Si-based IGBT modules as motor drives.

[0003] With the rapid development of wafer materials and chip processes, the cost of IGBT power devices has been continuously reduced, and they have been widely used in fields such as national defense, military, electric vehicles, and new energy. Low-inductance, high-temperature, low-thermal-resistance, and low-cost IGBT power modules have received continuous attention, putting forward higher requirements for the packaging structure and packaging process of power modules. Compared with single-sided cooling (SSC) packaging, the double-sided cooling (DSC) packaging of IGBT power modules makes full use of the heat dissipation channels on the front side of the chip, reducing the junction-to-case thermal resistance of the module by 35%. In addition, DSC packaging can eliminate the bonding wires of the module, reducing the packaging parasitic inductance by 80%, increasing the switching frequency of electrical equipment, reducing the demand for thermal management, and thus increasing the power density of the equipment. The existing patent No. CN202111507113.7, "High Power Density Ultra Heat Dissipation Chip Symmetrical Stacking Packaging Structure and Its Packaging Method", discloses a symmetrical stacking packaging structure in which two chips are stacked face to face symmetrically. The upper chip is connected to the upper double-sided copper-clad substrate, and the lower chip is connected to the lower double-sided copper-clad substrate. At the same time, two copper clips are respectively placed on the emitters and gates of the two chips to replace the metal gaskets and leads of the above DSC. This structure enables the copper-clad substrate per unit area to carry more IGBT chips through the use of symmetrical stacking packaging, improving the power density; at the same time, the circuit loop in the vertical direction of the chips in the module is shortened, the stray inductance is reduced, the circuit power consumption loss during operation is small, and the signal response is faster. At the same time, by replacing the lead process with copper clips, the stray inductance is reduced and the number of metal gaskets used is also reduced. The packaging process is simple, the materials used are few, and the cost is low. However, the symmetrical packaging double-sided cooling module of this patent also has the following problems:

[0004] 1. Poor power regulation flexibility. Since the gates and emitters of two symmetrically stacked IGBT chips are connected by copper clips, they can only be opened and closed simultaneously and cannot work independently. Once one IGBT chip fails, the entire module will be scrapped, resulting in poor power regulation flexibility and inability to adjust the output power.

[0005] 2. The encapsulation structure uses lead-free solder for welding, which has a relatively low melting point (below 220 °C), restricting the use of certain types of IGBTs at high temperatures. At the same time, due to the relatively large coefficient of thermal expansion of the copper clip (17 ppm / k), while the coefficient of thermal expansion of Si is only (3 ppm / k), the large CTE (coefficient of thermal expansion) difference causes the connection interface between the copper clip and the chip to bear a large thermal stress during use. When the cumulative plastic strain of the solder in the connection layer and copper exceeds a certain level, device failure will occur, and the reliability is poor.

[0006] 3. When using multiple reflow soldering to connect the metal pads and copper-clad substrates, on the one hand, the multiple reflow soldering process is complex. On the other hand, the temperature of multiple reflow soldering often cannot exceed the melting point of the solder connected in the first reflow soldering, otherwise the solder joints obtained in the first bonding will remelt, increasing the possibility of misalignment or failure. Summary of the Invention

[0007] In order to overcome the deficiencies of the above-mentioned prior art, the present invention provides an encapsulation structure and an encapsulation bonding process.

[0008] In order to achieve the above object, the present invention provides the following technical solutions:

[0009] An encapsulation structure, comprising:

[0010] Upper and lower double-sided copper-clad substrates arranged opposite to each other;

[0011] A first power conversion chip and a second power conversion chip, asymmetrically arranged inside the upper and lower double-sided copper-clad substrates. The collectors of the first power conversion chip and the second power conversion chip are respectively welded to the inner surfaces of the upper and lower double-sided copper-clad substrates; the gates of the first power conversion chip and the second power conversion chip are respectively welded to the inner surfaces of the lower double-sided copper-clad substrate and the upper double-sided copper-clad substrate through a first pad and a second pad.

[0012] A copper clip, the upper surface and the lower surface of the upper end of which are respectively welded to the emitters of the first power conversion chip and the second power conversion chip, and the lower end is welded to the inner surface of the lower double-sided copper-clad substrate;

[0013] The upper pin and the lower pin are respectively welded to the inner surfaces of the upper double-sided copper-clad substrate and the lower double-sided copper-clad substrate. The upper pin is electrically connected to the collector, emitter, and gate of the first power conversion chip through the circuit of the upper double-sided copper-clad substrate; the lower pin is electrically connected to the collector, emitter, and gate of the second power conversion chip through the circuit of the lower double-sided copper-clad substrate;

[0014] Preferably, it further includes a plastic package body, which is used to wrap the inner sides of the upper double-sided copper-clad substrate and the lower double-sided copper-clad substrate, as well as the inner surfaces and sides of the first power conversion chip, the second power conversion chip, the first spacer, the second spacer, the copper clip, the upper pin, and the lower pin.

[0015] Preferably, the materials of the first spacer and the second spacer are Mo.

[0016] Preferably, the upper surface of the first spacer is welded to the gate of the first power conversion chip, and the lower surface is connected to the inner surface of the lower double-sided copper-clad substrate. The lower surface of the second spacer is welded to the gate of the second power conversion chip, and the upper surface is connected to the inner surface of the upper double-sided copper-clad substrate.

[0017] Preferably, the upper pin and the lower pin are respectively welded to the inner surfaces of the upper double-sided copper-clad substrate and the lower double-sided copper-clad substrate by using nano-silver solder.

[0018] Preferably, the outer surfaces of the upper double-sided copper-clad substrate and the lower double-sided copper-clad substrate are both exposed.

[0019] Preferably, the first power conversion chip and the second power conversion chip are welded to the upper double-sided copper-clad substrate, the lower double-sided copper-clad substrate, the copper clip, the first spacer, and the second spacer by using low-temperature transient liquid-phase diffusion welding (TLP welding).

[0020] A packaging and bonding process based on the above-mentioned packaging structure. The bonding process between the first power conversion chip and the first Mo spacer includes the following steps:

[0021] First, electroplate a layer of Al on the first spacer, then sputter the first layer of metal M1 on the Al layer, and then sputter the second layer of metal M2 on M1;

[0022] Sputter the second layer of metal M3 on the first power conversion chip;

[0023] Perform TLP welding on the first power conversion chip and the first spacer at 240°C - 300°C.

[0024] Preferably, the bonding process between the first power conversion chip and the upper double-sided copper-clad substrate and the copper clip is the same as the bonding process between the first power conversion chip and the first spacer;

[0025] The bonding process of the second power conversion chip with the lower double-sided copper-clad substrate, copper clip and second spacer is the same as the bonding process of the first power conversion chip with the first spacer.

[0026] Preferably, the materials of the first layer of metal M1 and the third layer of metal M3 are Ag, Cu or Ni, and the materials of the first layer of metal M1 and the third layer of metal M3 are different. The material of the second layer of metal M2 is Sn or In. The first layer of metal M1, the second layer of metal M2 and the third layer of metal M3 form a ternary TLP solder joint.

[0027] The packaging structure and packaging bonding process provided by the present invention have the following beneficial effects:

[0028] 1. The asymmetric double-sided stacked heat dissipation packaging enables the gates of the first power conversion chip and the second power conversion chip to be controlled by different pins, so that the first power conversion chip and the second power conversion chip can work independently or cooperatively, achieving the effect of adjustable power; at the same time, the threshold of product scrapping is increased, and the entire device will not be scrapped due to the packaging failure of one chip, which is beneficial to the sales of enterprises.

[0029] 2. Improve the solder composition and process. Use magnetron sputtering to obtain a ternary thin film solder with high temperature resistance and fatigue resistance, and use the ternary thin film solder of Al-Core for TLP welding to obtain a welding joint with a high melting point, increasing the joint strength. At the same time, because the plasticity and toughness of Al are relatively good, it can correspondingly withstand a large equivalent plastic strain, solving the thermal stress problem of the joint and improving the service life.

[0030] 3. Optimize the bonding method of the Mo spacer. Directly electroplate Al on Mo, and prepare a thin film solder layer above the Al through the process of magnetron sputtering, omitting many process steps. At the same time, the solder surface is reduced, and the packaging fault tolerance is higher. Description of the Drawings

[0031] In order to more clearly illustrate the embodiments of the present invention and its design solutions, the following will briefly introduce the drawings required for this embodiment. The drawings in the following description are only partial embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0032] Figure 1 It is a structural schematic diagram of the packaging structure of the embodiment of the present invention;

[0033] Figure 2 It is a structural schematic diagram of the bonding process of the packaging structure of Embodiment 1 of the present invention;

[0034] Figure 3Schematic diagram of the low - cycle fatigue strain simulation results of the double - sided copper - clad substrate according to the embodiment of the present invention;

[0035] Figure 4 Schematic diagram of the bonding process of the packaging structure according to Embodiment 2 of the present invention;

[0036] Figure 5 Schematic diagram of another bonding process of the packaging structure according to Embodiment 2 of the present invention;

[0037] Figure 6 Schematic diagram of the electrode.

[0038] Explanation of reference numerals:

[0039] 1 - upper double - sided copper - clad substrate, 2 - lower double - sided copper - clad substrate, 3 - first power conversion chip, 4 - second power conversion chip, 5 - collector, 6 - gate, 7 - first spacer, 8 - second spacer, 9 - copper clip, 10 - emitter, 11 - upper pin, 12 - lower pin, 13 - plastic package, 14 - nano - silver solder. Detailed implementation manners

[0040] In order to enable those skilled in the art to better understand the technical solution of the present invention and be able to implement it, the present invention will be described in detail below with reference to the drawings and specific embodiments. The following embodiments are only used to more clearly illustrate the technical solution of the present invention and cannot be used to limit the protection scope of the present invention.

[0041] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the technical solution of the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present invention.

[0042] In addition, terms such as "first" and "second" are for descriptive purposes only and should not be construed as indicating or implying relative importance. In the description of the present invention, it should be noted that unless otherwise clearly specified or limited, the terms "connected" and "joined" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. In the description of the present invention, unless otherwise stated, the meaning of "a plurality of" is two or more, which will not be elaborated here.

[0043] Embodiment

[0044] The present invention provides a packaging structure and a packaging bonding process, specifically as Figure 1-6 shown. A packaging structure includes an upper double-sided copper-clad substrate 1, a lower double-sided copper-clad substrate 2, a first power conversion chip 3, a second power conversion chip 4, a copper clip 9, upper pins 11, lower pins 12, and a plastic package 13, as Figure 1 shown. The relatively arranged upper double-sided copper-clad substrate 1 and lower double-sided copper-clad substrate 2 are both formed by covering copper on the top and bottom of a ceramic substrate; the first power conversion chip 3 and the second power conversion chip 4 are asymmetrically arranged inside the upper double-sided copper-clad substrate 1 and the lower double-sided copper-clad substrate 2, and the collectors 5 of the first power conversion chip 3 and the second power conversion chip 4 are respectively welded to the inner surfaces of the upper double-sided copper-clad substrate 1 and the lower double-sided copper-clad substrate 2; the gates 6 of the first power conversion chip 3 and the second power conversion chip 4 are respectively welded to the inner surfaces of the lower double-sided copper-clad substrate 2 and the upper double-sided copper-clad substrate 1 through a first spacer 7 and a second spacer 8; the upper surface and the lower surface of the upper end of the copper clip 9 are respectively welded to the emitters 10 of the first power conversion chip 3 and the second power conversion chip 4, and the lower end is welded to the inner surface of the lower double-sided copper-clad substrate 2; the upper pins 11 and the lower pins 12 are respectively welded to the inner surfaces of the upper double-sided copper-clad substrate 1 and the lower double-sided copper-clad substrate 2, and the upper pins 11 are electrically connected to the collector 5, emitter 10, and gate 6 of the first power conversion chip 3 through the circuit of the upper double-sided copper-clad substrate 1; the lower pins 12 are electrically connected to the collector 5, emitter 10, and gate 6 of the second power conversion chip 4 through the circuit of the lower double-sided copper-clad substrate 2; the plastic package 13 is used to wrap the inner sides of the upper double-sided copper-clad substrate 1 and the lower double-sided copper-clad substrate 2, and the inner surfaces and sides of the first power conversion chip 3, the second power conversion chip 4, the first spacer 7, the second spacer 8, the copper clip 9, the upper pins 11, and the lower pins 12.

[0045] In this embodiment, the materials of the first spacer 7 and the second spacer 8 are Mo.

[0046] The upper surface of the first spacer 7 is welded to the gate 6 of the first power conversion chip 3, and the lower surface is connected to the inner surface of the lower double-sided copper-clad substrate 2. The lower surface of the second spacer 8 is welded to the gate 6 of the second power conversion chip 4, and the upper surface is connected to the inner surface of the upper double-sided copper-clad substrate 1.

[0047] The upper pin 11 and the lower pin 12 are respectively welded to the inner surfaces of the upper double-sided copper-clad substrate 1 and the lower double-sided copper-clad substrate 2 by using a nano-silver solder 14; the first power conversion chip 3 and the second power conversion chip 4 are welded to the upper double-sided copper-clad substrate 1, the lower double-sided copper-clad substrate 2, the copper clip 9, the first spacer 7 and the second spacer 8 by using low-temperature transient liquid-phase diffusion welding (TLP welding). The outer surfaces of the upper double-sided copper-clad substrate 1 and the lower double-sided copper-clad substrate 2 are both exposed for contact with an external radiator to form a fast heat dissipation channel.

[0048] Example 1:

[0049] A packaging bonding process based on a packaging structure. The bonding process between the first power conversion chip 3 and the first spacer 7 includes the following steps, as Figure 2 shown:

[0050] Step 1: First, electroplate a layer of Al on the first spacer 7, then sputter the first layer of metal M1 on the Al layer, and then sputter the second layer of metal M2 on M1;

[0051] Step 2: Sputter the second layer of metal M3 on the first power conversion chip 3;

[0052] Step 3: Perform TLP welding on the first power conversion chip 3 and the first spacer 7 at 240°C - 300°C.

[0053] In this embodiment, the materials of the first layer of metal M1 and the third layer of metal M3 are Ag, Cu or Ni, the materials of the first layer of metal M1 and the third layer of metal M3 are different, the material of the second layer of metal M2 is Sn or In, and the first layer of metal M1, the second layer of metal M2 and the third layer of metal M3 form a ternary TLP solder joint. The welding quality of the ternary TLP solder joint is higher than that of the binary solder joint, and the porosity is small. During the bonding process using this process, the first layer of metal M1, the second layer of metal M2 and the third layer of metal M3 form the intermediate layer of TLP welding. When the temperature is heated to a temperature slightly higher than the melting point of the intermediate layer, a liquid phase can be formed at the joint. Due to the sufficient diffusion of heterogeneous elements, the composition of the formed interconnection joint is significantly different from that of the metal base material and the intermediate layer. Due to the diffusion of the high-melting-point component of the metal base material into the intermediate layer, the remelting temperature of the interconnection joint will be significantly increased, and intermetallic compounds (IMCs) with high melting points will be formed at the joint, endowing it with high-temperature resistance exceeding 400°C; the introduction of Al_Core reduces the stress and strain of the IMC solder while also alleviating the low-cycle fatigue strain of the upper double-sided copper-clad substrate 1 and the lower double-sided copper-clad substrate 2, asFigure 3 As shown, when there is an Al_Core, due to the good plasticity and toughness of Al, it can correspondingly withstand a relatively large equivalent plastic strain PEEQ. Most of the stress is relieved by Al, and the PEEQ of the Cu layers of the upper double-sided copper-clad substrate 1 and the lower double-sided copper-clad substrate 2 can be ignored. According to the C-M equation of Al and the PEEQ convergence value, the life situation of the packaging module can be deduced as follows: Compared with the single-sided heat dissipation module that does not use this solder joint, the life of the entire packaging module using this double-sided heat dissipation module with this solder joint has increased by 228%. In addition, this process directly electroplates Al on Mo and prepares a thin film solder layer on Al through magnetron sputtering, eliminating many process steps and reducing the solder surface, with a higher packaging fault tolerance.

[0054] Example 2:

[0055] The first power conversion chip 3 and the first spacer 7 can also be bonded by the following bonding process:

[0056] As Figure 4 shown, first sputter the first layer of metal M1 (Ag, Cu or Ni) on the upper and lower sides of the Al layer, then sputter the second layer of metal M2 (Sn or In) on the first layer of metal M1, and sputter the third layer of metal M3 (Ag, Cu or Ni) on the first power conversion chip 3 and the first spacer 7, where M1 and M3 are different metals, thus forming a ternary TLP solder joint. Then, align and place the Al_Core with the M1 and M2 thin film solder layers as an intermediate interlayer between the first power conversion chip 3 and the Mo chip of the first spacer 7, and perform TLP soldering between 240°C and 300°C to complete the soldering; to make the TLP bonding more complete and improve the diffusion efficiency, a multi-layer film solder layer structure with staggered stacking of M1 and M2 can be used, as Figure 5 shown.

[0057] The bonding process of the first power conversion chip 3 with the upper double-sided copper-clad substrate 1 and the copper clip 9 is the same as the bonding process of the first power conversion chip 3 with the first spacer 7;

[0058] The bonding process of the second power conversion chip 4 with the lower double-sided copper-clad substrate 2, the copper clip 9 and the second spacer 8 is the same as the bonding process of the first power conversion chip 3 with the first spacer 7.

[0059] The above-described embodiments are only preferred specific embodiments of the present invention, and the protection scope of the present invention is not limited thereto. Any simple changes or equivalent replacements of the technical solutions that can be obviously obtained by those skilled in the art within the technical scope disclosed by the present invention all belong to the protection scope of the present invention.

Claims

1. An encapsulation structure, characterized in that, Including: An upper double-sided copper-clad substrate (1) and a lower double-sided copper-clad substrate (2) which are oppositely arranged; A first power conversion chip (3) and a second power conversion chip (4), asymmetrically arranged inside the upper double-sided copper-clad substrate (1) and the lower double-sided copper-clad substrate (2). The collectors (5) of the first power conversion chip (3) and the second power conversion chip (4) are respectively welded to the inner surfaces of the upper double-sided copper-clad substrate (1) and the lower double-sided copper-clad substrate (2). The gates (6) of the first power conversion chip (3) and the second power conversion chip (4) are respectively welded to the inner surfaces of the lower double-sided copper-clad substrate (2) and the upper double-sided copper-clad substrate (1) through a first spacer (7) and a second spacer (8); A copper clip (9), the upper surface and the lower surface of its upper end are respectively welded to the emitters (10) of the first power conversion chip (3) and the second power conversion chip (4), and the lower end is welded to the inner surface of the lower double-sided copper-clad substrate (2); An upper pin (11) and a lower pin (12), respectively welded to the inner surfaces of the upper double-sided copper-clad substrate (1) and the lower double-sided copper-clad substrate (2). The upper pin (11) is electrically connected to the collector (5), emitter (10) and gate (6) of the first power conversion chip (3) through the circuit of the upper double-sided copper-clad substrate (1). The lower pin (12) is electrically connected to the collector (5), emitter (10) and gate (6) of the second power conversion chip (4) through the circuit of the lower double-sided copper-clad substrate (2).

2. The encapsulation structure according to claim 1, wherein It further includes a plastic package body (13), and the plastic package body (13) is used to wrap the inner sides of the upper double-sided copper-clad substrate (1) and the lower double-sided copper-clad substrate (2) and the inner surfaces and sides of the first power conversion chip (3), the second power conversion chip (4), the first spacer (7), the second spacer (8), the copper clip (9), the upper pin (11) and the lower pin (12).

3. The encapsulation structure according to claim 1, wherein The materials of the first spacer (7) and the second spacer (8) are Mo.

4. The encapsulation structure according to claim 1, wherein The upper surface of the first spacer (7) is welded to the gate (6) of the first power conversion chip (3), and the lower surface is connected to the inner surface of the lower double-sided copper-clad substrate (2). The lower surface of the second spacer (8) is welded to the gate (6) of the second power conversion chip (4), and the upper surface is connected to the inner surface of the upper double-sided copper-clad substrate (1).

5. The encapsulation structure according to claim 1, wherein, The upper pin (11) and the lower pin (12) are respectively welded to the inner surfaces of the upper double-sided copper-clad substrate (1) and the lower double-sided copper-clad substrate (2) by using a nano-silver solder (14).

6. The encapsulation structure according to claim 1, wherein The outer surfaces of the upper double-sided copper-clad substrate (1) and the lower double-sided copper-clad substrate (2) are both exposed.

7. The encapsulation structure according to claim 1, wherein The welding of the first power conversion chip (3) and the second power conversion chip (4) to the upper double-sided copper-clad substrate (1), the lower double-sided copper-clad substrate (2), the copper clip (9), the first spacer (7) and the second spacer (8) all adopts low-temperature transient liquid-phase diffusion welding (TLP welding).

8. An encapsulation bonding process for the encapsulation structure according to claim 1, characterized in that, The bonding process of the first power conversion chip (3) and the first spacer (7) includes the following steps: First, electroplate a layer of Al on the first spacer (7), then sputter / electroplate the first layer of metal M1 on the Al layer, and then sputter / electroplate the second layer of metal M2 on M1; Sputter the second layer of metal M3 on the first power conversion chip (3); Perform TLP soldering on the first power conversion chip (3) and the first spacer (7) at 240°C - 300°C.

9. The encapsulation bonding process of the encapsulation structure according to claim 8, characterized in that, The bonding process of the first power conversion chip (3) with the upper double-sided copper-clad substrate (1) and the copper clip (9) is the same as the bonding process of the first power conversion chip (3) with the first spacer (7); The bonding process of the second power conversion chip (4) with the lower double-sided copper-clad substrate (2), the copper clip (9) and the second spacer (8) is the same as the bonding process of the first power conversion chip (3) with the first spacer (7).

10. The encapsulation bonding process of the encapsulation structure according to claim 9, characterized in that, The materials of the first layer of metal M1 and the third layer of metal M3 are Ag, Cu or Ni, the materials of the first layer of metal M1 and the third layer of metal M3 are different, the material of the second layer of metal M2 is Sn or In, and the first layer of metal M1, the second layer of metal M2 and the third layer of metal M3 form a ternary TLP solder joint.

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