Semiconductor device

CN115799316BActive Publication Date: 2026-11-03KK TOSHIBA +1
View PDF 3 Cites 0 Cited by

Patent Information

Application Number
CN202210136871.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2021-09-10
Filing Date
2022-02-15
Publication Date
2026-11-03
Estimated Expiration
2042-02-15

AI Technical Summary

Technical Problem

In the existing technology, traditional semiconductor devices are difficult to achieve high-speed switching, especially MOSFET devices with FP electrodes, which have insufficient high-speed switching performance.

Method used

By designing a novel semiconductor device structure, including a columnar first insulating film and a second electrode, combining a conductive semiconductor layer and electrode, and employing a specific electrode and insulating film configuration, the capacitance between the gate electrode and the drain electrode is reduced, and the electrode connection structure is simplified.

Benefits of technology

This technology improves the high-speed switching performance of semiconductor devices while simplifying device construction, reducing capacitance, and enhancing controllability and electrode connection reliability.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN115799316B_ABST
    Figure CN115799316B_ABST
Patent Text Reader

Abstract

Embodiments provide a semiconductor device capable of high-speed switching. The semiconductor device of the embodiments includes a first electrode, a first semiconductor layer of a first conductivity type provided over the first electrode, a first insulating film of a columnar shape extending downward from an upper surface of the first semiconductor layer, a second electrode of a columnar shape provided in the first insulating film and extending in a vertical direction, a second semiconductor layer of a second conductivity type provided in an upper portion of the first semiconductor layer and adjacent to the first insulating film via the first semiconductor layer, a third semiconductor layer of the first conductivity type provided in an upper portion of the second semiconductor layer, a third electrode provided more upward than the upper surface of the first semiconductor layer and overlapping with a portion of the first insulating film, the first semiconductor layer, and the second semiconductor layer when viewed from above, a fourth electrode provided more upward than an upper end of the third electrode, and a second insulating film provided between the third electrode and the fourth electrode, the first semiconductor layer, and the second semiconductor layer.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] Related applications

[0002] This application is based on Japanese Patent Application No. 2021-147906 (filed on September 10, 2021) and claims priority thereto. This application incorporates the entire contents of that basic application by reference. Technical Field

[0003] The implementation involves a semiconductor device. Background Technology

[0004] Previously, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) with FP (Field Plate) electrodes were known. Summary of the Invention

[0005] One embodiment of the present invention provides a semiconductor device capable of high-speed switching.

[0006] A semiconductor device according to one embodiment of the present invention includes: a first electrode; a first semiconductor layer of a first conductivity type disposed on the first electrode; a columnar first insulating film extending downward from the upper surface of the first semiconductor layer; a columnar second electrode disposed in the first insulating film and extending in a vertical direction; a second semiconductor layer of a second conductivity type partially disposed on the upper portion of the first semiconductor layer and adjacent to the first insulating film via the first semiconductor layer; a third semiconductor layer of a first conductivity type partially disposed on the upper portion of the second semiconductor layer; a third electrode disposed above the upper surface of the first semiconductor layer and, when viewed from above, overlaps with a portion of the first insulating film, a portion of the first semiconductor layer, and a portion of the second semiconductor layer; a fourth electrode disposed above the upper end of the third electrode and electrically connected to the second electrode and the third semiconductor layer; and a second insulating film disposed between the third electrode and the fourth electrode, between the third electrode and the first semiconductor layer, and between the third electrode and the second semiconductor layer. Attached Figure Description

[0007] Figure 1 This is a top view showing a portion of the semiconductor device according to the first embodiment.

[0008] Figure 2 yes Figure 1 A cross-sectional view along line A-A'.

[0009] Figure 3 yes Figure 1 A cross-sectional view along line B-B'.

[0010] Figure 4 (a) is Figure 2 Cross-sectional view along line C-C' Figure 4 (b) is Figure 2 A cross-sectional view along line D-D'.

[0011] Figure 5 (a) to (d) are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment.

[0012] Figure 6 (a) to (d) are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment.

[0013] Figure 7 (a) to (d) are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment.

[0014] Figure 8 (a) to (d) are cross-sectional views showing other examples of the manufacturing method of the semiconductor device according to the first embodiment.

[0015] Figure 9 (a) to (d) are cross-sectional views showing other examples of the manufacturing method of the semiconductor device according to the first embodiment.

[0016] Figure 10 This is a cross-sectional view showing the semiconductor device according to the second embodiment.

[0017] Figure 11 This is a cross-sectional view showing the semiconductor device according to the third embodiment.

[0018] Figure 12 This is a cross-sectional view showing the semiconductor device according to the fourth embodiment.

[0019] Figure 13 yes Figure 12 A cross-sectional view along the E-E' line.

[0020] Figure 14 (a) to (d) are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to the fourth embodiment.

[0021] Figure 15 (a) to (d) are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to the fourth embodiment.

[0022] Figure 16 (a) and Figure 16 (b) is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to the fourth embodiment.

[0023] Figure 17This is a cross-sectional view showing the semiconductor device according to the fifth embodiment.

[0024] Figure 18 yes Figure 17 A cross-sectional view along the F-F' line.

[0025] Figure 19 This indicates setting p + The contact area of ​​type n and n + A cross-sectional view of a deformed region of the source layer of the type. Detailed Implementation

[0026] Hereinafter, each embodiment will be described with reference to the accompanying drawings. Please note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the sizes between parts, etc., may not necessarily be the same as in reality. Furthermore, even when representing the same parts, there may be cases where their dimensions and ratios differ depending on the drawings. Moreover, in this specification and in each drawing, elements that are the same as those in the previously described figures are labeled with the same reference numerals, and detailed descriptions are appropriately omitted.

[0027] Furthermore, to facilitate understanding, the following explanation uses an XYZ orthogonal coordinate system to describe the configuration and structure of each part. The X-axis, Y-axis, and Z-axis are orthogonal to each other. The direction in which the X-axis extends is designated as the "X direction," the direction in which the Y-axis extends is designated as the "Y direction," and the direction in which the Z-axis extends is designated as the "Z direction." Additionally, to facilitate understanding, the direction of the arrow in the Z-direction is designated as upward, and its opposite direction as downward; however, these directions are unrelated to the direction of gravity.

[0028] Furthermore, the + and - signs below indicate the relative levels of impurity concentration in each conductivity type. Specifically, a sign with a "+" indicates a relatively higher impurity concentration compared to a sign with a "-". Here, "impurity concentration" refers to the net impurity concentration after these impurities cancel each other out, assuming that each region contains both donor and acceptor impurities.

[0029] <First Implementation>

[0030] First, the first embodiment will be described.

[0031] Figure 1 This is a top view showing a portion of the semiconductor device according to this embodiment.

[0032] Figure 2 yes Figure 1 A cross-sectional view along line A-A'.

[0033] Figure 3 yes Figure 1 A cross-sectional view along line B-B'.

[0034] Figure 4 Yes (a) is Figure 2 Cross-sectional view along line C-C' Figure 4 (b) is Figure 2 A cross-sectional view along line D-D'.

[0035] The semiconductor device 100 in this embodiment is, for example, a high-voltage MOSFET with a withstand voltage of 150V or higher and 400V or lower. However, the withstand voltage of the semiconductor device is not limited to the above values. Figure 1 As shown, a component region S1 and a terminal region S2 surrounding the component region S1 when viewed from above are provided in the semiconductor device 100. Figure 1 In the diagram, the area inside the double-dotted line is the component region S1, and the area outside the double-dotted line is the terminal region S2. The terminal region S2 corresponds to the outer peripheral region of the semiconductor device 100.

[0036] Reference Figure 2 In summary, the semiconductor device 100 includes a drain electrode 111, an n-type semiconductor layer 121, a p-type semiconductor layer 122, and an n... + The semiconductor device 100 includes a source layer 123, multiple FP electrodes 112, multiple FP insulating films 141, multiple gate electrodes 113, conductive components 151, multiple conductive components 152, multiple insulating films 142, and a source electrode 114. The various parts of the semiconductor device 100 will be described in detail below.

[0037] The drain electrode 111 is disposed over approximately the entire area of ​​the lower surface of the semiconductor device 100. That is, as shown... Figure 3 As shown, drain electrodes 111 are disposed throughout the component region S1 and the terminal region S2. The upper and lower surfaces of the drain electrodes 111 are approximately parallel to the XY plane. The drain electrodes 111 are made of conductive materials such as metal.

[0038] like Figure 2 As shown, the n-type semiconductor layer 121 includes, for example, an n-type semiconductor layer disposed on the drain electrode 111. + The drain region 121a of the type, and the drain region n is provided with + n on the drain region 121a of the type - Type 121b drift region. + Type 121a and n - The drift region 121b of the type is distributed throughout the component region S1 and the terminal region S2. - The impurity concentration in the drift region 121b of type n is higher than that in n. + The impurity concentration in the drain region 121a of the type is low.

[0039] A plurality of trenches T1 extending downward from the upper surface of the n-type semiconductor layer 121 are provided. The plurality of trenches T1 are located within the device region S1. Each trench T1 is columnar in shape. Thus, the semiconductor device 100 is a so-called point-structure MOSFET with columnar trenches T1. The lower end of each trench T1 is connected to the n-type semiconductor layer 121. + The drain region 121a of the type is located at the top. The shape of each trench T1 when viewed from above is, for example, as shown in the figure. Figure 4 (a) shows a hexagon. However, when viewed from above, the grooves can also be polygons other than hexagons, rounded polygons, circles, ellipses, or other shapes. The multiple grooves T1 are arranged in an alternating pattern when viewed from above.

[0040] In addition, such as Figure 3 As shown, an n-type semiconductor layer 121 has a trench T2 extending downward from the upper surface of the terminal region S2 of the n-type semiconductor layer 121. The lower end of the trench T2 is connected to the n-type semiconductor layer 121. + The drain region 121a of the type is located higher up compared to other types. For example... Figure 1 As shown, when viewed from above, the groove T2 has a frame shape that surrounds the element region S1.

[0041] Each FP electrode 112 as follows Figure 2 As shown, they are disposed within each trench T1. Each FP electrode 112 is a column extending along the Z direction, i.e., the vertical direction. When viewed from above, each FP electrode 112 appears as... Figure 4 As shown in (a), they are located approximately at the center of each trench T1. The shape of each FP electrode 112 when viewed from above is, for example, circular. However, the shape of each FP electrode when viewed from above can also be a hexagonal polygon, a rounded polygon, or an ellipse, etc. Figure 2 As shown, the upper surface of each FP electrode 112 is connected to n - The upper surface of the drift region 121b is located further down compared to the upper surface of the n-type electrode. However, the upper surface of the FP electrode can also be located at the same level as the n-type electrode. - The upper surface of the drift region of the type is a plane. Each FP electrode 112 is made of conductive materials such as polycrystalline silicon or metal.

[0042] Each FP insulating film 141 is disposed within each trench T1, located between each FP electrode 112 and the n-type semiconductor layer 121. Therefore, each FP insulating film 141 is columnar, extending from the n-type semiconductor layer 121. - The upper surface of the drift region 121b extends downwards. The lower end of each FP insulating film 141 is connected to n. + The drain region 121a of the type is located at the top. When viewed from above, the shape of the outer periphery of each FP insulating film 141 corresponds to the shape of each trench where the FP electrode is disposed, for example... Figure 4As shown in (a), they are hexagonal. At least a portion of the upper surface of each FP electrode 112 is exposed from each FP insulating film 141. Each FP insulating film 141 is made of silicon oxide or an insulating material such as silicon oxide.

[0043] like Figure 2 As shown, the p-type semiconductor layer 122 is locally disposed in the element region S1 on the n-type semiconductor layer. - The upper part of the p-type drift region 121b. The p-type semiconductor layer 122 contains p-type... - The base region 122a of the type, and locally located at p - The upper part of the base region 122a of the type p + Contact area 122b of type. p + The impurity concentration in contact region 122b of type p is higher than that in contact region 122b. - The base region 122a of the type has a high impurity concentration.

[0044] p - The base region 122a of the type is separated by n - The drift region 121b of the type is adjacent to the FP insulating film 141. Furthermore, as... Figure 4 As shown in (a), when viewed from above, p - The base region 122a of the type is separated by n - The drift region 121b of the type continuously surrounds each FP insulating film 141.

[0045] n + Type 123 source layer Figure 2 As shown, it is partially disposed on the upper portion of the p-type semiconductor layer 122. For example... Figure 4 (a) and Figure 4 As shown in (b), when viewed from above, n + The source layer 123 of type is separated by p - The base region 122a and n of the type - The drift region 121b is arranged in a discontinuous manner, surrounding each wiring component 161 described later and each FP insulating film 141 except directly below each wiring insulating film 144. Thus, in this specification, "surrounding" refers not only to the case of continuous surrounding but also to the case of discontinuous surrounding.

[0046] Similarly, when viewed from above, p + The contact area 122b of type n is separated by n + Type 123, p - The base region 122a and n of the type - The drift region 121b of the type is arranged discontinuously surrounding each wiring component 161 described later and each FP insulating film 141 except directly below each wiring insulating film 144. However, n+ Type source layer and p + The contact area of ​​the type can also continuously surround each FP insulating film.

[0047] like Figure 2 As shown, p - The base region 122a of the type is also located at n + Type 123 source layer and p + Below the contact area 122b of type p. Therefore, in p - The portions surrounding each FP insulating film 141 in the base region 122a of the type are connected to each other via p - In the base region 122a of type p + The portion below the contact area 122b of the type is connected. Therefore, when viewed from above, p - The base region 122a of the type has a honeycomb mesh shape. However, setting p - Type base region, p + The contact area of ​​type n and n + The region of the source layer of the type is not limited to the region mentioned above.

[0048] In this embodiment, such as Figure 2 As shown, n - The upper surface of the drift region 121b of the type, the upper surface of each FP insulating film 141, and p - The upper surface of the base region 122a of the type, p + The upper surface of the contact area 122b of type n, and n + The upper surface of the source layer 123 of the type is roughly a plane.

[0049] n-type semiconductor layer 121, p-type semiconductor layer 122 and n + The source layers 123 of the type respectively contain semiconductor materials such as silicon and impurities corresponding to each layer.

[0050] Multiple gate electrodes 113 and n - The upper surface of the drift region 121b is positioned relatively high. That is, each gate electrode 113 is a planar gate electrode. Each gate electrode 113 is plate-shaped. The outer periphery shape of each gate electrode 113 when viewed from above is, for example, as shown... Figure 4 As shown in (b), it is hexagonal. However, when viewed from above, the outer periphery of each gate electrode can also be a polygon other than a hexagon, a rounded polygon, a circle, or an ellipse, or other shapes. Each gate electrode 113 is made of a conductive material such as polysilicon or a metal.

[0051] Viewed from above, the outer edges of each gate electrode 113 are located further outward than the outer edge of the FP insulating film 141. Furthermore, as... Figure 2As shown, when viewed from above, each gate electrode 113 and a portion of the FP insulating film 141, n - Part of the drift region 121b of type p - A portion of the base region 122a of the type, and n + A portion of the source layer 123 overlaps with the FP insulating film 141. In the case where the semiconductor device 100 is a high-voltage MOSFET, the thickness t1 of the FP insulating film 141 is, for example, 1 μm or more and 3 μm or less, and the thickness t1 of the FP insulating film 141 increases. Therefore, when viewed from above, the width t2a of the overlap between each gate electrode 113 and each FP insulating film 141 can be increased. However, the thickness of the FP insulating film is not limited to the above values.

[0052] The width t2a of the portion where each gate electrode 113 overlaps with each FP insulating film 141 is larger than the width t2b of the portion in the n-type semiconductor layer 121 located between each FP insulating film 141 and the p-type semiconductor layer 122. However, the relationship between these widths is not limited to the above situation.

[0053] Furthermore, each gate electrode 113 is provided with a through-hole 113h. Each through-hole 113h extends through each gate electrode 113 in the vertical direction. When viewed from above, the outer edge of each through-hole 113h is located further outward than the outer edge of the FP electrode 112. The shape of each through-hole 113h when viewed from above is, for example, as shown below. Figure 4 As shown in (b), it is hexagonal. However, when viewed from above, the shape of each through hole can also be a polygon other than a hexagon, a rounded polygon, a circle, or an ellipse, or other shapes.

[0054] like Figure 2 As shown, a stepped difference is provided on the lower surface of each gate electrode 113. The first region on the lower surface of each gate electrode 113 adjacent to the through hole 113h is located further down than the second region on the lower surface of each gate electrode 113 which is further outward than the first region. However, the lower surface of each gate electrode can also be a flat surface that is approximately parallel to the XY plane.

[0055] like Figure 3 As shown, the source electrode 114 is disposed throughout the device region S1 and the terminal region S2. The source electrode 114 is positioned above the upper ends of the plurality of gate electrodes 113. The source electrode 114 is made of a conductive material such as a metal.

[0056] like Figure 2 As shown, conductive component 151 connects source electrode 114 and n + The source layer 123 is electrically connected to the source electrode 114. In this embodiment, the conductive component 151 is located between the source electrode 114 and the n-type source electrode. +Between the source layer 123 and the source electrode 114 and p + Between the contact areas 122b of the type. The lower surface of the conductive component 151 and n + Type 123 source layer and p + The upper surface of the contact area 122b of the type is in contact. The conductive component 151 is in contact with p. + The contact area 122b is an ohmic contact. Furthermore, the upper surface of the conductive component 151 is in contact with the source electrode 114. (As shown...) Figure 4 As shown in (b), when viewed from above, the conductive component 151 is disposed between adjacent insulating films 142, and is disposed in such a way that it discontinuously surrounds the portion of the insulating film 142 that houses the wiring component 161 described later and the wiring insulating film 144, except for that portion. The conductive component 151 is made of a conductive material such as a metal.

[0057] like Figure 2 As shown, each conductive component 152 electrically connects each FP electrode 112 to the source electrode 114. Therefore, when the semiconductor device 100 is used, the FP electrode 112 becomes at a potential approximately the same as that of the source electrode 114. In this embodiment, each conductive component 152 extends from the FP electrode 112 through a through-hole 113h in the gate electrode 113 to the source electrode 114. Therefore, each conductive component 152 is cylindrical in shape, extending in the vertical direction. The shape of each conductive component 152 when viewed from above is, for example, as shown below. Figure 4 As shown in (b), it is circular. However, when viewed from above, the shape of each conductive component can also be a hexagon or other polygon, a rounded polygon, or an ellipse. Each conductive component 152 is made of a conductive material such as metal.

[0058] like Figure 2 As shown, each insulating film 142 is disposed on each gate electrode 113 and n - Between the drift regions 121b of the type, and between each gate electrode 113 and p - Between the base region 122a of the type, and between each gate electrode 113 and n + Between the source layers 123 of the type. Furthermore, each insulating film 142 is also disposed between each gate electrode 113 and the source electrode 114, between each gate electrode 113 and the conductive component 151, and between each gate electrode 113 and each conductive component 152. In each insulating film 142, the portion located between the gate electrode 113 and the n... - The thickness t3a of the portion between the drift regions 121b is smaller than the thickness t3b of the portion of each insulating film 142 located between the gate electrode 113 and the source electrode 114. However, the relationship between these thicknesses is not limited to the above relationship. Each insulating film 142 is made of silicon oxide or an insulating material such as silicon oxide.

[0059] Next, the structure of the terminal region S2 of the semiconductor device 100 and the connection structure of the gate electrodes 113 to each other will be described.

[0060] like Figure 1 as well as Figure 3 As shown, the semiconductor device 100 also includes a terminal electrode 115, a terminal insulating film 143, a plurality of wiring components 161, a plurality of wiring components 162, a gate wiring component 116, a conductive component 153, a plurality of wiring insulating films 144, and a plurality of wiring insulating films 145.

[0061] like Figure 3 As shown, the terminal electrode 115 is disposed within the trench T2. The terminal electrode 115 extends in the vertical direction. Figure 1 As shown, when viewed from above, the terminal electrode 115 surrounds the element region S1. When the semiconductor device 100 is used, the terminal electrode 115 is partially connected in a circuit (not shown) outside the semiconductor device 100 to the potential between the potential of the drain electrode 111 and the potential of the source electrode 114. The terminal electrode 115 is made of a conductive material such as polysilicon or a metal.

[0062] like Figure 3 As shown, the terminal insulating film 143 is disposed within the trench T2. The terminal insulating film 143 is disposed between the terminal electrode 115 and n. - The drift region of type 121b is between. For example... Figure 1 As shown, when viewed from above, the terminal insulating film 143 surrounds the component region S1. The terminal insulating film 143 is made of an insulating material such as silicon oxide or silicon oxide.

[0063] like Figure 1 As shown, each wiring component 161 electrically connects adjacent gate electrodes 113 in the X direction. For example... Figure 3 As shown, each wiring component 161 extends along the X direction and is located on the same plane as each gate electrode 113. Each wiring component 161 is made of a conductive material such as polysilicon or metal, preferably of the same material as the gate electrode 113.

[0064] Each wiring component 162 extends in the X direction from the gate electrode 113 closest to the termination region S2 toward the termination region S2. For example... Figure 3 As shown, each wiring component 162 extends along the X direction and is located on the same plane as each gate electrode 113. Each wiring component 162 is made of a conductive material such as polysilicon or metal, preferably of the same material as the gate electrode 113.

[0065] Gate wiring component 116 is disposed in the termination region S2. Gate wiring component 116 is separate from source electrode 114. Figure 1As shown, when viewed from above, the gate wiring component 116 covers the ends of each wiring component 162 in the X direction. The gate wiring component 116 is made of a conductive material such as a metal, and preferably of the same material as the source electrode 114.

[0066] like Figure 3 As shown, each conductive component 153 is located between the gate wiring component 116 and each wiring component 162, electrically connecting the gate wiring component 116 and each wiring component 162. Thus, a plurality of gate electrodes 113 are electrically connected to the gate wiring component 116. Each conductive component 153 is made of a conductive material such as a metal, preferably of the same material as the conductive component 151.

[0067] like Figure 3 as well as Figure 4 As shown in (b), each wiring insulating film 144 is disposed between each wiring component 161 and the source electrode 114, and between each wiring component 161 and the p - The base region 122a of the type, and the wiring components 161 and conductive components 151. Each wiring insulating film 144 is made of silicon oxide or an insulating material such as silicon oxide.

[0068] like Figure 3 As shown, each wiring insulating film 145 is disposed between each wiring component 162 and the source electrode 114, and between the wiring component 162 and n - Between the drift region 121b and the wiring component 162 and p - The base region 122a of the type, and the wiring component 162 and the terminal insulating film 143. Each wiring insulating film 145 is made of silicon oxide or an insulating material such as silicon oxide.

[0069] Next, an example of a method for manufacturing the semiconductor device 100 of this embodiment will be described.

[0070] Figure 5 (a) to (d) are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to this embodiment.

[0071] Figure 6 (a) to (d) are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to this embodiment.

[0072] Figure 7 (a) to (d) are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device according to this embodiment.

[0073] First, such as Figure 5 As shown in (a), a structure containing n + Type 121a and n -An n-type semiconductor layer 121 is formed in the drift region of the n-type semiconductor layer 121. Next, a plurality of trenches T1 are formed in the n-type semiconductor layer 121. In addition, in the figures illustrating the manufacturing method, only one trench T1 and its surrounding area are shown.

[0074] Next, as Figure 5 As shown in (b), an insulating film 141F is formed, for example, by thermal oxidation or CVD (Chemical Vapor Deposition), covering the upper surface of the n-type semiconductor layer 121 and the inner surface of each trench T1. The portion of the insulating film 141F located within each trench T1 is a bottomed cylindrical shape with an opening at the top.

[0075] Next, as Figure 5 As shown in (c), for example, an FP electrode 112 made of polysilicon is formed in the interior space of the portion of the insulating film 141F located within each trench T1.

[0076] Next, as Figure 5 As shown in (d), for example by etching such as wet etching or CMP (chemical mechanical polishing), the portion located on the upper surface of the n-type semiconductor layer 121 in the insulating film 141F is removed.

[0077] Next, as Figure 6 As shown in (a), an insulating film 142Fa is formed, for example, on the upper surface of the n-type semiconductor layer 121 and on the FP electrode 112 by thermal oxidation. However, the insulating film 142Fa can also be formed by CVD.

[0078] Next, as Figure 6 As shown in (b), a conductive component 113F made of polycrystalline silicon is formed, for example, on the insulating films 142Fa and 141F.

[0079] Next, as Figure 6 As shown in (c), the portions of the conductive component 113F located between adjacent trenches T1 when viewed from above, and the portions of the conductive component 113F located directly above each FP electrode 112, are removed, for example, by etching such as photolithography, RIE (Reactive Ion Etching), or CDE (Chemical Dry Etching). The portion of the conductive component 113F remaining directly above a trench T1 and its surrounding area corresponds to a gate electrode 113 of the semiconductor device 100.

[0080] Next, as Figure 6As shown in (d), for example, by CVD, an insulating film 142Fb is formed on the portion of each gate electrode 113 exposed from each gate electrode 113 on the upper surface of the insulating film 142Fa.

[0081] Next, as Figure 7 As shown in (a), for example by photolithography and RIE, portions located between adjacent gate electrodes 113 when viewed from above, and portions located directly above each FP electrode 112 in insulating films 142Fa and 142Fb, are removed. This creates openings in insulating films 142Fa and 142Fb that expose the upper surface of the n-type semiconductor layer 121 and the openings for each FP electrode 112.

[0082] Next, as Figure 7 As shown in (b), p is formed, for example, by ion implantation and thermal diffusion, in a manner that diffuses in the direction along the XY plane compared to the openings on the upper surface of the exposed n-type semiconductor layer 121 of the insulating films 142Fa and 142Fb. - The base region 122a and n of the type + Type 123 source layer.

[0083] Next, as Figure 7 As shown in (c), p is formed, for example, by ion implantation. + Contact area 122b of type.

[0084] Next, as Figure 7 As shown in (d), for example by photolithography and RIE, the material located at n in insulating films 142Fa and 142Fb is further removed. + The portion directly above the source layer 123 of the type. Thus, n is exposed from the insulating films 142Fa and 142Fb. + The source layer 123 is of the type. Furthermore, in the insulating films 141F, 142Fa, and 142Fb, the portion located within the trench T1 corresponds to... Figure 2 The FP insulating film 141. Furthermore, in the insulating films 142Fa and 142Fb, located at n... - The upper surface of the drift region 121b of the type is compared to the portion that is higher up and covers each gate electrode 113, which is equivalent to Figure 2 The insulating film 142.

[0085] Next, form with p + Contact areas 122b and n of type +The source layer 123 is connected to a conductive component 151, for example, made of a metallic material, and a plurality of conductive components 152, for example, made of a metallic material, are connected to each FP electrode 112.

[0086] Next, a source electrode 114, for example made of a metallic material, is formed on the insulating film 142Fb, the conductive component 151, and the plurality of conductive components 152. Furthermore, a drain electrode 111, made of a metallic material, is formed beneath the n-type semiconductor layer 121.

[0087] Based on the above, a semiconductor device 100 can be obtained.

[0088] Next, other examples of the manufacturing method of the semiconductor device 100 of this embodiment will be described.

[0089] Figure 8 (a) to (d) are cross-sectional views showing other examples of the manufacturing method of the semiconductor device according to this embodiment.

[0090] Figure 9 (a) to (d) are cross-sectional views showing other examples of the manufacturing method of the semiconductor device according to this embodiment.

[0091] For manufacturing methods in other examples, the manufacturing method in the above example, and the steps up to forming the insulating film 142Fa, are as follows: Figure 6 The process up to (c) is the same.

[0092] In such Figure 8 After the insulating film 142Fa was formed as shown in (a), as Figure 8 As shown in (b), an insulating film 142Fc is formed on the upper surface of the gate electrode 113 and the portion of the insulating film 142Fa that is exposed from each gate electrode 113.

[0093] Next, as Figure 8 As shown in (c), portions of the insulating films 142Fa and 142Fc located between adjacent gate electrodes 113 when viewed from above, and portions of the insulating film 142Fc located directly above each gate electrode 113, are removed, for example, by photolithography and RIE. Residual portions of the insulating film 142Fc covering the sides of each gate electrode 113 remain.

[0094] Next, as Figure 8 As shown in (d), p is formed, for example, through ion implantation and thermal diffusion. - The base region 122a and n of the type + Type 123 source layer.

[0095] Next, as Figure 9As shown in (a), p is formed, for example, by ion implantation. + The contact region 122b is of the type. Corresponding to the portion of the insulating film 142Fc covering the sides of each gate electrode 113, a contact region containing p is formed. - The base region 122a, p of the type + Contact area 122b and n of type + The mesa structure of the source layer 123 of the type can therefore suppress n + The source layer 123 is offset relative to each gate electrode 113, which has a complex shape such as a hexagon.

[0096] Next, as Figure 9 As shown in (b), for example by CVD, in p + An insulating film 142Fd is formed on the contact area 122b and the insulating film 142Fc.

[0097] Next, as Figure 9 As shown in (c), for example, by photolithography and RIE, the portions of insulating films 142Fc and 142Fd located between adjacent gate electrodes 113 when viewed from above, and the portions of insulating films 142Fa, 142Fc, and 142Fd located directly above each FP electrode 112, are removed. Additionally, the portions of insulating films 141F, 142Fa, and 142Fc located within each trench T1 correspond to the FP insulating film 141. Furthermore, the portions of insulating films 142Fd, 142Fa, and 142Fc that are adjacent to n... - The upper surface of the drift region 121b of the type is equivalent to the portion located at the top and covering each gate electrode 113, which is equivalent to Figure 2 The insulating film 142.

[0098] Next, as Figure 9 As shown in (d), it forms with p + Contact areas 122b and n of type + The source layer 123 is connected to a conductive component 151, for example, made of a metallic material, and the FP electrode 112 is connected to a conductive component 152, for example, made of a metallic material.

[0099] Next, a source electrode 114, for example made of a metallic material, is formed on the insulating film 142, the conductive component 151, and the conductive component 152. Furthermore, a drain electrode 111, made of a metallic material, is formed beneath the n-type semiconductor layer 121.

[0100] Based on the above, a semiconductor device 100 can be obtained.

[0101] Next, the method of using the semiconductor device 100 of this embodiment will be described.

[0102] By applying a higher potential to the gate electrode 113 than to the source electrode 114, the p-type semiconductor layer 122 is thus... - An n-type inversion layer is formed in the portion of the base region 122a located directly below the gate electrode 113. In this state, by applying a higher potential to the drain electrode 111 than to the source electrode 114, current flows from the n-type inversion layer... + The source layer 123 of the n-type semiconductor flows to the n-type semiconductor layer 121 via the inversion layer.

[0103] Next, the effects of the semiconductor device 100 in this embodiment will be explained.

[0104] In the semiconductor device 100 of this embodiment, the gate electrode 113 is planar. Therefore, compared to a semiconductor device with a trench-type gate electrode, the semiconductor device 100 of this embodiment can reduce the area of ​​the portion of the n-type semiconductor layer 121 that faces the gate electrode 113 across the insulating film 142. Consequently, the capacitance between the gate electrode 113 and the drain electrode 111 can be reduced. Furthermore, compared to a semiconductor device with a trench-type gate electrode, the semiconductor device 100 of this embodiment can controllably reduce the capacitance between the gate electrode 113 and the n-type semiconductor layer 121. + The overlap of source layers 123 of type.

[0105] Furthermore, by extending downwards a depletion layer in the n-type semiconductor layer 121 in the portion directly below the gate electrode 113, the capacitance between the gate electrode 113 and the drain electrode 111 can be further reduced.

[0106] Furthermore, the gate electrode 113 overlaps with a portion of the FP insulating film 141. Therefore, the FP insulating film 141 easily shields the gate electrode 113 from the n-type semiconductor layer 121. As a result, the capacitance between the gate electrode 113 and the drain electrode 111 can be further reduced.

[0107] Based on the above description, by reducing the capacitance between the gate electrode 113 and the drain electrode 111, a semiconductor device 100 capable of high-speed switching can be provided.

[0108] Furthermore, in semiconductor layers with trench-type gate electrodes, conductive components are required between the source electrode and the trench for connecting the gate electrode disposed in the trench to the gate wiring component, and for connecting the FP electrode to the source electrode, thus complicating the structure of the semiconductor device. In contrast, in this embodiment, it is not necessary to provide conductive components between the source electrode 114 and the trench T1 for connecting the gate electrode 113 to the gate wiring component 116, thereby simplifying the structure of the semiconductor device 100.

[0109] In addition, p-type semiconductor layer 122 and n + The p-type source layer 123 surrounds the FP insulating film 141 through the n-type semiconductor layer 121. Therefore, in the semiconductor device 100, it is possible to add a p-type semiconductor layer 122 and an n-type semiconductor layer 123. + The area of ​​the source layer 123 of the type.

[0110] <Second Implementation>

[0111] Next, the second embodiment will be described.

[0112] Figure 10 This is a cross-sectional view showing the semiconductor device of this embodiment.

[0113] The semiconductor device 200 of this embodiment differs from the semiconductor device 100 of the first embodiment in that the source electrode 114 and n + The lower end of the conductive component 251 electrically connected to the source layer 123 of the type is connected to n + The lower surface of the source layer 123 of the type is located further down.

[0114] Furthermore, in the following description, only the differences from the first embodiment will be explained in principle. Everything else described below is the same as the first embodiment. The same applies to the other embodiments described below.

[0115] In this embodiment, p + The contact area 222b of type is set at p - The base region 122a of the type, and n + The lower surface of the source layer 123 is positioned further downwards compared to the previous type, and is disposed around the lower end of the conductive member 251. Furthermore, the side surface of the conductive member 251 is adjacent to n... + The source layer 123 of the type is connected, and the lower end of the conductive component 251 is connected to p. + The contact area 222b of the type is connected. Thus, the lower end of the conductive component 251 is located at the point where it connects with n. + The lower surface of the source layer 123 of the type is located further down, thus eliminating the need for p + Contact areas 222b and n of type+ The source layers 123 of the type are arranged adjacently along the direction of the XY plane. Therefore, it is possible to make the p-type source layers 123 adjacent to each other. - The base region 122a, p of the type + Contact area 222b and n of type + The mesa structure of the source layer 123 is refined.

[0116] <Third Implementation Method>

[0117] Next, the third embodiment will be described.

[0118] Figure 11 This is a cross-sectional view showing the semiconductor device of this embodiment.

[0119] The semiconductor device 300 of this embodiment differs from the semiconductor device 100 of the first embodiment in the shape of the FP electrode 312.

[0120] The FP electrode 312 is a cylindrical shape with a bottom and an opening at the top. Because the FP electrode 312 is relatively thin, its formation is easier. The semiconductor device 300 of this embodiment also includes an insulating film 346 disposed within the internal space of the FP electrode 312. However, an air layer may also be provided within the internal space of the FP electrode. In this case, deformation such as warping of the semiconductor device 300 can be suppressed.

[0121] <Fourth Implementation>

[0122] Next, the fourth embodiment will be described.

[0123] Figure 12 This is a cross-sectional view showing the semiconductor device of this embodiment.

[0124] Figure 13 yes Figure 12 A cross-sectional view along the E-E' line.

[0125] The semiconductor device 400 of this embodiment differs from the semiconductor device 100 of the first embodiment in that it has a plurality of electrodes 413 instead of a plurality of FP electrodes 112 and a plurality of gate electrodes 113.

[0126] Each electrode 413 has a columnar first portion 413a with its lower end disposed in the trench T1 and its upper end exposed from the trench T1 and extending in the vertical direction, and a second portion 413b connected to the upper end of the first portion 413a. Each electrode 413 is the same as the gate electrode 113 in the first embodiment and is connected to the gate wiring component 116.

[0127] In this embodiment, the first portion 413a is a cylindrical shape with a bottom and an open top. The semiconductor device 400 of this embodiment also includes an insulating film 446 disposed within the internal space of the first portion 413a. However, an air layer instead of the insulating film 446 may also exist within the internal space of the first portion 413a. (The last sentence appears to be incomplete and possibly refers to a different embodiment.) - An insulating film 441 is provided between the drift regions 121b of the type.

[0128] In this embodiment, the second part 413b is plate-shaped. In this embodiment, the lower surface of the second part 413b has a stepped difference. However, the lower surface of the second part can also be a flat surface. For example... Figure 13 As shown, the outer periphery of the second part 413b, when viewed from above, is hexagonal. Figure 12 As shown, when viewed from above, the second part 413b and a portion of the insulating film 441, n - Part of the drift region 121b of type p - A portion of the base region 122a of the type and n + A portion of the source layer 123 overlaps with the second portion 413b. An insulating film 442 is disposed on the second portion 413b and n. - The drift region between type 121b, the second part 413b and p - The base region 122a of the type and the second part 413b and n + Between the source layers 123 of the type. In addition, each insulating film 442 is also provided between the second part 413b and the source electrode 114, and between the second part 413b and the conductive component 151.

[0129] Next, an example of a method for manufacturing the semiconductor device 400 of this embodiment will be described.

[0130] Figure 14 (a)~ Figure 14 (d) is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to this embodiment.

[0131] Figure 15 (a)~ Figure 15 (d) is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to this embodiment.

[0132] Figure 16 (a) and Figure 16 (b) is a cross-sectional view showing an example of a method for manufacturing a semiconductor device according to this embodiment.

[0133] First, such as Figure 14 As shown in (a), a structure containing n + Type 121a and n -The n-type semiconductor layer 121 is a drift region 121b. Next, a plurality of trenches T1 are formed in the n-type semiconductor layer 121.

[0134] Next, an insulating film 441 is formed covering the inner surface of each trench T1, for example by thermal oxidation or CVD. Each insulating film 441 is a bottomed cylindrical shape with an opening at the top.

[0135] Next, as Figure 14 As shown in (b), in n - An insulating film 442Fa is formed, for example, by thermal oxidation, on the drift region 121b of the type.

[0136] Next, as Figure 14 As shown in (c), a conductive component 413F, made of polycrystalline silicon, is formed covering the inner surface of each insulating film 441 and the upper surface of the insulating film 442Fa. The conductive component 413F includes a first portion 413Fa with its lower end located within each insulating film 441 and its upper end exposed from each insulating film 441, and a second portion 413Fb connected to the upper end of the first portion 413Fa and located on the insulating film 442Fa. The first portion 413Fa is a bottomed cylindrical shape with an opening at the top.

[0137] Next, as Figure 14 As shown in (d), for example, an insulating film 446 is formed in the interior space of the first part 413Fa by CVD.

[0138] Next, as Figure 15 As shown in (a), the portion of the second portion 413Fb located between adjacent trenches T1 when viewed from above is removed by etching such as photolithography, RIE, or CDE. The portion remaining in the conductive component 413F that is located within a trench T1, directly above the trench T1, and directly above the periphery of the trench T1 corresponds to an electrode 413 in the semiconductor device 400.

[0139] Next, as Figure 15 As shown in (b), for example by CVD, an insulating film 442Fb is formed on each electrode 413, on the portion of the upper surface of the insulating film 442Fa exposed from each electrode 413, and on each insulating film 446.

[0140] Next, as Figure 15 As shown in (c), portions of insulating films 442Fa and 442Fb located between adjacent electrodes 413 are removed, for example, by photolithography and RIE.

[0141] Next, as Figure 15 As shown in (d), p is formed, for example, through ion implantation and thermal diffusion. -The base region 122a and n of the type + Type 123 source layer.

[0142] Next, as Figure 16 As shown in (a), p is formed, for example, by ion implantation. + Contact area 122b of type.

[0143] Next, as Figure 16 As shown in (b), for example by photolithography and RIE, the n-positioned structures in insulating films 442Fa and 442Fb are further removed. + The portion directly above the source layer 123 of the type. The portion of the remaining portion in the insulating film 442Fa and the insulating film 442Fb that covers each electrode 413 corresponds to the insulating film 442 of the semiconductor device 400. Thus, n + The source layer 123 of the type is exposed from the insulating film 442.

[0144] Next, form with p + Contact areas 122b and n of type + The source layer 123 is connected to, for example, a conductive component 151 made of a metallic material.

[0145] Next, a source electrode 114, for example made of a metallic material, is formed on the insulating film 442 and the conductive component 151. Furthermore, a drain electrode 111, made of a metallic material, is formed beneath the n-type semiconductor layer 121.

[0146] Based on the above, a semiconductor device 400 can be obtained.

[0147] Next, the effects of this implementation method will be explained.

[0148] The semiconductor device 400 of this embodiment has an electrode 413 having a columnar first portion 413a with its lower end disposed in a trench T1 and its upper end exposed from the trench T1 and extending in a vertical direction, and an electrode 413 connected to the upper end of the first portion 413a and, when viewed from above, connected to a portion of an n-type semiconductor layer 121, a portion of a p-type semiconductor layer 122, and an n + The second portion 413b overlaps with a portion of the source layer 123 of the first portion 413a. The first portion 413a and the second portion 413b are connected together to the gate potential, so that when the semiconductor device 400 is turned on, at n - An n-type accumulation layer is formed in the portion of the drift region 121b near the insulating film 441. This reduces the on-resistance of the semiconductor device 100. Furthermore, since there is no need for conductive components to electrically connect the second portion 413b to the source electrode 114, the structure of the semiconductor device 400 can be simplified.

[0149] Furthermore, the first portion 413a is a cylindrical shape with an open top. Because the first portion 413a is relatively thin, its formation is easier. Moreover, the presence of an air layer inside the first portion 413a helps to suppress warping of the semiconductor device 400.

[0150] <Fifth Implementation>

[0151] Next, the fifth embodiment will be described.

[0152] Figure 17 This is a cross-sectional view showing the semiconductor device of this embodiment.

[0153] Figure 18 yes Figure 17 A cross-sectional view along the F-F' line.

[0154] like Figure 17 As shown, the semiconductor device 500 of this embodiment differs from the semiconductor device 400 of the fourth embodiment in that the electrode 513 includes a non-cylindrical solid first portion 513a and a second portion 513b connected to the upper end of the first portion 513a. Thus, the shape of the first portion 513a only needs to be columnar, and it does not have to be cylindrical.

[0155] <Variation Example>

[0156] Next, set p + Contact areas 122b and n of type + A modified example of the source layer 123 is described below.

[0157] Figure 19 This indicates setting p + The contact area of ​​type n and n + A cross-sectional view of a deformed region of the source layer of the type.

[0158] p + The contact area 122b of type n is set to be with n + Compared to the source layer 123 of type 123, it penetrates deeper into p along the Y direction. - The portion of the base region 122a of the type located between two adjacent trenches T1 in the X direction. Thus, when n... + Parasitic bipolar action can be suppressed in the region of the source layer 123 of the type. As a result, avalanche tolerance can be improved.

[0159] The various embodiments and modifications described above can be appropriately combined without contradiction. For example, the configuration of the second embodiment and... Figure 19 The modified embodiment can also be combined with the fourth and fifth embodiments.

[0160] The implementation methods include the following approaches.

[0161] (Postscript 1)

[0162] A semiconductor device comprising:

[0163] First electrode;

[0164] A first semiconductor layer of a first conductivity type is disposed on the first electrode;

[0165] A columnar first insulating film extends downward from the upper surface of the first semiconductor layer;

[0166] A columnar second electrode is disposed in the first insulating film and extends in the vertical direction;

[0167] A second semiconductor layer of a second conductivity type is partially disposed on the upper part of the first semiconductor layer and adjacent to the first insulating film via the first semiconductor layer;

[0168] A third semiconductor layer of a first conductivity type is partially disposed on the upper part of the second semiconductor layer;

[0169] The third electrode is disposed higher than the upper surface of the first semiconductor layer, and when viewed from above, it overlaps with a portion of the first insulating film, a portion of the first semiconductor layer, and a portion of the second semiconductor layer.

[0170] The fourth electrode is disposed higher than the upper end of the third electrode and is electrically connected to the second electrode and the third semiconductor layer; and

[0171] The second insulating film is disposed between the third electrode and the fourth electrode, between the third electrode and the first semiconductor layer, and between the third electrode and the second semiconductor layer.

[0172] (Postscript 2)

[0173] As described in Appendix 1, in the semiconductor device viewed from above, the outer edge of the third electrode is located further outward than the outer edge of the first insulating film.

[0174] It also includes a first conductive component that extends from the second electrode through the third electrode and into the fourth electrode, and is electrically connected to both the second and fourth electrodes.

[0175] The second insulating film is also disposed between the third electrode and the first conductive component.

[0176] (Note 3)

[0177] The semiconductor device as described in Appendix 1 or 2 further includes a second conductive component extending in the vertical direction and electrically connected to the third semiconductor layer and the fourth electrode.

[0178] (Postscript 4)

[0179] As described in Appendix 3, in the semiconductor device, the lower end of the second conductive component is located further below the lower surface of the third semiconductor layer.

[0180] (Note 5)

[0181] As described in any of the appendices 1 to 4, when viewed from above, the second semiconductor layer and the third semiconductor layer surround the first insulating film through the first semiconductor layer.

[0182] (Note 6)

[0183] The semiconductor device described in any of Appendix 1 to 5 further comprises:

[0184] A columnar third insulating film extends downward from the upper surface of the first semiconductor layer;

[0185] A columnar fifth electrode is disposed in the third insulating film and extends in the vertical direction;

[0186] The sixth electrode is disposed higher than the upper surface of the first semiconductor layer, and when viewed from above, it overlaps with a portion of the third insulating film, a portion of the first semiconductor layer, and a portion of the second semiconductor layer.

[0187] A first wiring component is disposed between the third electrode and the sixth electrode, electrically connecting the third electrode and the sixth electrode; and

[0188] A fourth insulating film is disposed between the sixth electrode and the fourth electrode, between the sixth electrode and the first semiconductor layer, and between the sixth electrode and the second semiconductor layer.

[0189] (Note 7)

[0190] The semiconductor device described in any of Notes 1 to 6 further comprises:

[0191] A columnar fifth insulating film extends downward from the upper surface of the first semiconductor layer;

[0192] A columnar seventh electrode is disposed in the fifth insulating film and extends in the vertical direction;

[0193] The eighth electrode is disposed higher than the upper surface of the first semiconductor layer, and when viewed from above, it overlaps with a portion of the fifth insulating film, a portion of the first semiconductor layer, and a portion of the second semiconductor layer.

[0194] The second wiring component is electrically connected to the third electrode and extends from the third electrode to the terminal region of the semiconductor device;

[0195] The third wiring component is electrically connected to the eighth electrode and extends from the eighth electrode toward the terminal region;

[0196] A sixth insulating film is disposed between the eighth electrode and the fourth electrode, between the eighth electrode and the first semiconductor layer, and between the eighth electrode and the second semiconductor layer; and

[0197] A fourth wiring component is disposed above the second wiring component and the third wiring component in the terminal area, and is electrically connected to the second wiring component and the third wiring component.

[0198] (Postscript 8)

[0199] In the semiconductor device described in any of Appendix 1 to 7, the second electrode is a cylindrical shape with an open top.

[0200] An air layer exists inside the second electrode, or a seventh insulating film is disposed inside the second electrode.

[0201] (Note 9)

[0202] A semiconductor device comprising:

[0203] First electrode;

[0204] A first semiconductor layer of a first conductivity type is disposed on the first electrode;

[0205] A columnar first insulating film extends downward from the upper surface of the first semiconductor layer;

[0206] A second semiconductor layer of a second conductivity type is partially disposed on the upper part of the first semiconductor layer and adjacent to the first insulating film via the first semiconductor layer;

[0207] A third semiconductor layer of a first conductivity type is partially disposed on the upper part of the second semiconductor layer;

[0208] The second electrode includes a columnar first portion extending in a vertical direction, with its upper end exposed from the first insulating film and its lower end disposed in the first insulating film, and a second portion connected to the upper end of the first portion and overlapping with a portion of the first semiconductor layer and a portion of the second semiconductor layer when viewed from above.

[0209] The third electrode, located higher than the upper end of the second portion, is electrically connected to the third semiconductor layer; and

[0210] The second insulating film is disposed between the second portion and the third electrode, between the second portion and the first semiconductor layer, and between the second portion and the second semiconductor layer.

[0211] (Postscript 10)

[0212] As described in Appendix 9, the first part is a cylindrical shape with an open top, and an air layer exists inside the first part, or it also has a third insulating film disposed inside the first part.

[0213] The above describes embodiments of the invention, but these embodiments are provided as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included within the scope and spirit of the invention, and are included within the scope of the invention as described in the claims and its equivalents.

Claims

1. A semiconductor device comprising: First electrode; A first semiconductor layer of a first conductivity type is disposed on the first electrode; A columnar first insulating film extends downward from the upper surface of the first semiconductor layer; A columnar second electrode is disposed in the first insulating film and extends in the vertical direction; A second semiconductor layer of a second conductivity type is partially disposed on the upper part of the first semiconductor layer and adjacent to the first insulating film via the first semiconductor layer; A third semiconductor layer of a first conductivity type is partially disposed on the upper part of the second semiconductor layer; The third electrode is disposed higher than the upper surface of the first semiconductor layer, and when viewed from above, it overlaps with a portion of the first insulating film, a portion of the first semiconductor layer, and a portion of the second semiconductor layer. The fourth electrode is positioned higher than the upper end of the third electrode and is electrically connected to the second electrode and the third semiconductor layer. as well as A second insulating film is disposed between the third electrode and the fourth electrode, between the third electrode and the first semiconductor layer, and between the third electrode and the second semiconductor layer. When viewed from above, the outer edge of the third electrode is located further outward than the outer edge of the first insulating film. It also includes a first conductive component, which extends from the second electrode through the third electrode and into the fourth electrode, and is electrically connected to both the second and fourth electrodes. The second insulating film is also disposed between the third electrode and the first conductive component.

2. The semiconductor device as claimed in claim 1, It also includes a second conductive component that extends in the vertical direction and is electrically connected to the third semiconductor layer and the fourth electrode.

3. The semiconductor device as claimed in claim 2, The lower end of the second conductive component is located further below the lower surface of the third semiconductor layer.

4. The semiconductor device as claimed in claim 1, When viewed from above, the second semiconductor layer and the third semiconductor layer surround the first insulating film through the first semiconductor layer.

5. The semiconductor device of claim 1, further comprising: A columnar third insulating film extends downward from the upper surface of the first semiconductor layer; A columnar fifth electrode is disposed in the third insulating film and extends in the vertical direction; The sixth electrode is disposed higher than the upper surface of the first semiconductor layer, and when viewed from above, it overlaps with a portion of the third insulating film, a portion of the first semiconductor layer, and a portion of the second semiconductor layer. A first wiring component is disposed between the third electrode and the sixth electrode, electrically connecting the third electrode and the sixth electrode; as well as A fourth insulating film is disposed between the sixth electrode and the fourth electrode, between the sixth electrode and the first semiconductor layer, and between the sixth electrode and the second semiconductor layer.

6. The semiconductor device of claim 1, further comprising: A columnar fifth insulating film extends downward from the upper surface of the first semiconductor layer; A columnar seventh electrode is disposed in the fifth insulating film and extends in the vertical direction; The eighth electrode is disposed higher than the upper surface of the first semiconductor layer, and when viewed from above, it overlaps with a portion of the fifth insulating film, a portion of the first semiconductor layer, and a portion of the second semiconductor layer. The second wiring component is electrically connected to the third electrode and extends from the third electrode to the terminal region of the semiconductor device; The third wiring component is electrically connected to the eighth electrode and extends from the eighth electrode toward the terminal region; A sixth insulating film is disposed between the eighth electrode and the fourth electrode, between the eighth electrode and the first semiconductor layer, and between the eighth electrode and the second semiconductor layer; as well as A fourth wiring component is disposed above the second wiring component and the third wiring component in the terminal area, and is electrically connected to the second wiring component and the third wiring component.

7. The semiconductor device as claimed in claim 1, The second electrode is a cylindrical shape with an open top. An air layer exists inside the second electrode, or the semiconductor device further comprises a seventh insulating film disposed inside the second electrode.

8. A semiconductor device comprising: First electrode; A first semiconductor layer of a first conductivity type is disposed on the first electrode; A columnar first insulating film extends downward from the upper surface of the first semiconductor layer; A second semiconductor layer of a second conductivity type is partially disposed on the upper part of the first semiconductor layer and adjacent to the first insulating film via the first semiconductor layer; A third semiconductor layer of a first conductivity type is partially disposed on the upper part of the second semiconductor layer; The second electrode comprises a first part and a second part. The first part is columnar and extends in the vertical direction. Its upper end protrudes from the first insulating film and its lower end is disposed in the first insulating film. The second part is connected to the upper end of the first part and overlaps with a portion of the first semiconductor layer and a portion of the second semiconductor layer when viewed from above. The third electrode is located higher than the upper end of the second part and is electrically connected to the third semiconductor layer. as well as A second insulating film is disposed between the second portion and the third electrode, between the second portion and the first semiconductor layer, and between the second portion and the second semiconductor layer. The first semiconductor layer is in direct contact with the first insulating film and the second insulating film.

9. The semiconductor device as claimed in claim 8, The first part is a cylindrical shape with an opening at the top. An air layer exists inside the first part, or the semiconductor device further comprises a third insulating film disposed inside the first part.

Citation Information

Patent Citations

  • Automatic inspection device for manual sliding doors

    JP2021147906A

  • Semiconductor device and method for manufacturing same

    CN113053994A

  • Semiconductor device

    US20170263768A1