A message forwarding method and device
By using two hardware chips for message forwarding in ultra-low-latency switches, the problem that ultra-low-latency switches cannot gather and forward multi-channel service traffic is solved, and the aggregation and forwarding of multi-channel service traffic is realized, which improves forwarding performance .
Patent Information
- Application Number
- CN202211432497.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-15
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2042-11-15
AI Technical Summary
Due to its minimal function, ultra-low-latency switches cannot aggregate and forward the received multi-channel service traffic, and cannot forward them as a one-channel service traffic.
By using two hardware chips, the first hardware chip is used to perform message hardware forwarding, and the second hardware chip is used to perform traffic aggregation, sending messages received by each forwarding port of the first hardware chip to the aggregation of the second hardware chip The map port is forwarded, and the packets received by the aggregation forwarding mapping port of the second hardware chip are sent back to the corresponding aggregation forwarding port of the first hardware chip, so that multiple service traffic is gathered and forwarded as one service traffic.
It realizes the aggregation and forwarding of multiple service traffic by ultra-low-latency switches, and improves the forwarding performance of ultra-low-latency switches.
Smart Images
Figure CN115801707B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to communication technology, and in particular to a method and device for ultra-low latency switching and forwarding, and specifically to a message forwarding method and device. Background Art
[0002] At present, the financial securities industry has an increasingly strong demand for high-frequency trading, and there has been a spurt in demand for ultra-fast trading systems composed of ultra-low latency switches. It is under this demand background that ultra-low latency switches are born with advantages such as extremely low latency and extremely simple functions. Ultra-low latency switches have only one layer of forwarding function, which can achieve ultra-low latency forwarding.
[0003] However, the extremely simple forwarding characteristics of the ultra-low latency switch also make it impossible to aggregate and forward business traffic, and it is impossible to aggregate multiple business traffic received and forward it as one business traffic. Summary of the invention
[0004] The purpose of the present application is to provide a message forwarding method and device, which aggregates multiple service flows received by an ultra-low latency switch as one service flow and forwards it.
[0005] To achieve the above-mentioned purpose, the present application provides a message forwarding method, which includes: sending the received messages of each forwarding port of the same traffic aggregation group of the first hardware chip to the same aggregation forwarding mapping port of the second hardware chip; the first hardware chip is used to perform message hardware forwarding and the second hardware chip is used to perform traffic aggregation; sending the messages received by each aggregation forwarding mapping port of the second hardware chip to the corresponding aggregation forwarding ports on the first hardware chip; so that the received messages of each forwarding port of the same traffic aggregation group on the first hardware chip are sent through a single aggregation forwarding port.
[0006] To achieve the above-mentioned objectives, the present application also provides a message forwarding device that can be used for ultra-low latency message exchange, wherein the device includes a first hardware chip for performing message hardware forwarding and a second hardware chip for performing traffic aggregation; the first hardware chip sends the received messages of each forwarding port of its each traffic aggregation group to the same aggregation forwarding mapping port of the second hardware chip; the second hardware chip sends the messages received by each aggregation forwarding mapping port to the corresponding aggregation forwarding ports on the first hardware chip.
[0007] The beneficial effect of the present application is that multiple service flows received by the ultra-low latency switch are aggregated and forwarded as one service flow, thereby improving the forwarding performance of the ultra-low latency switch. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1This is a flow chart of an embodiment of a message forwarding method applied to an ultra-low latency switch of the present application;
[0009] Figure 2 A schematic diagram of an embodiment of outbound traffic aggregation and forwarding of an ultra-low latency switch of the present application;
[0010] Figure 3 A schematic diagram of an embodiment of inbound traffic aggregation and forwarding of an ultra-low latency switch of the present application;
[0011] Figure 4 A schematic diagram of an embodiment of a port statistics device applied to an ultra-low latency switch provided in the present application. DETAILED DESCRIPTION
[0012] The present invention will be described in detail with multiple examples shown in multiple figures. In the following detailed description, multiple specific details are used to provide a comprehensive understanding of the present application. Known methods, steps, components and circuits are not described in detail in the examples to avoid making these examples difficult to understand.
[0013] Among the terms used, the term "include" means including but not limited to; the term "contain" means including but not limited to; the terms "above", "within" and "below" are inclusive of the number; the terms "greater than" and "less than" are exclusive of the number. The term "based on" means based on at least a part thereof.
[0014] Figure 1 The flowchart of the embodiment of the message forwarding method applied to the ultra-low latency switch of the present application is shown; the embodiment of the method comprises the following steps:
[0015] Step 101, sending received messages of each forwarding port of the same traffic aggregation group of the first hardware chip to the same aggregation forwarding mapping port of the second hardware chip;
[0016] Step 102, sending the messages received by each aggregation forwarding mapping port of the second hardware chip to the corresponding aggregation forwarding ports on the first hardware chip; so that the received messages of each forwarding port of the same traffic aggregation group on the first hardware chip are sent through a single aggregation forwarding port.
[0017] Figure 1 The beneficial effect of the embodiment is that multiple service flows received by the ultra-low latency switch are aggregated and forwarded as one service flow, thereby improving the forwarding performance of the ultra-low latency switch.
[0018] Figure 2 This is a schematic diagram of an embodiment of outbound traffic aggregation and forwarding of an ultra-low latency switch of the present application.
[0019] Ultra-low latency switch CPU ( Figure 2(not shown) two traffic aggregation groups G1 and G2 are set for the switching chip 21; forwarding ports I0-I3 in the traffic aggregation group G1 are used for ordinary traffic forwarding, and forwarding port I4 is used for traffic forwarding after multi-channel traffic aggregation; forwarding ports I15-I18 in the traffic aggregation group G2 are used for ordinary traffic forwarding, and forwarding port I19 is used for traffic forwarding after multi-channel traffic aggregation;
[0020] The CPU of the ultra-low latency switch sets two outbound diversion groups for the switch chip 21, and the traffic aggregation groups G1 and G2 each correspond to an outbound diversion group; the outbound diversion group corresponding to the traffic aggregation group G1 includes internal forwarding ports I20-I23 and an outbound diversion forwarding port I24; the outbound diversion group corresponding to the traffic aggregation group G2 includes internal forwarding ports I35-I38 and an outbound diversion forwarding port I39;
[0021] The CPU of the ultra-low latency switch sets two traffic aggregation mapping groups G11 and G12 for the aggregation forwarding chip 22, corresponding to the traffic aggregation groups G1 and G2 respectively; wherein, the traffic aggregation mapping group G11 includes multiple mapping forwarding ports P0-P3 and one aggregation forwarding mapping port P4; the traffic aggregation mapping group G12 includes multiple mapping forwarding ports P15-P18 and one aggregation forwarding mapping port I19.
[0022] I20-I23 of the outbound diversion group corresponding to the traffic aggregation group G1 are directly connected to the mapping forwarding ports P0-P3 of the traffic aggregation mapping group G11 one by one, and the outbound diversion forwarding port I24 is directly connected to the mapping forwarding port P4 of the traffic aggregation mapping group G11.
[0023] I35-I38 of the outbound diversion group corresponding to the traffic aggregation group G2 are directly connected to the mapping forwarding ports P15-P18 of the traffic aggregation mapping group G12, and the outbound diversion forwarding port I39 is directly connected to the mapping forwarding port P19 of the traffic aggregation mapping group G12.
[0024] The CPU of the ultra-low latency switch sets an inbound aggregation relationship for the switching chip 21; wherein the aggregation forwarding port I4 of the traffic aggregation group G1 corresponds to the forwarding ports I0-I3 of the traffic aggregation group G1; the aggregation forwarding port I19 of the traffic aggregation group G2 corresponds to the forwarding ports I15-I18 of the traffic aggregation group G2.
[0025] The CPU of the ultra-low latency switch sets an outbound aggregation relationship for the switching chip 21; the forwarding ports I0-I3 are recorded to correspond to the internal forwarding ports I20-I23, and the forwarding ports I15-I8 correspond to the internal forwarding ports I35-I38; the outbound diversion forwarding port I24 corresponds to the aggregation forwarding port I4; the outbound diversion forwarding port I39 corresponds to the aggregation forwarding port I19.
[0026] Figure 2 In the example, the switching chip 21 sends the received messages of each forwarding port I0-I3 of the traffic aggregation group G1 to the corresponding internal forwarding ports I20-I23 according to the outbound aggregation relationship; and sends the messages received by the internal forwarding ports I20-I23 to the mapping forwarding ports P15-P18 on the directly connected aggregation forwarding chip 22.
[0027] The aggregation forwarding chip 22 sends the message received by each mapping forwarding port P15-P18 to the aggregation forwarding mapping port P19 belonging to the same traffic aggregation mapping group G12.
[0028] The aggregation forwarding chip 22 sends the message received by the aggregation forwarding mapping port P19 to the diversion port I24 on the directly connected switching chip 21.
[0029] The switch chip 21 sends the message received by the diversion port I24 to the corresponding aggregation forwarding port I5 according to the outbound aggregation relationship.
[0030] Figure 2 In the example, multiple service flows received by forwarding ports I0-I3 of the ultra-low latency switch are aggregated and forwarded as one service flow by port I4, thereby improving the forwarding performance of the ultra-low latency switch.
[0031] Figure 3 In the embodiment of inbound traffic aggregation and forwarding of the ultra-low latency switch shown, the switching chip 21 copies the received message of the aggregation forwarding port I4 to four copies according to the number of forwarding ports I0-I3 of the traffic aggregation group G1 based on the inbound aggregation relationship; and sends a copy of the received message of the aggregation forwarding port I4 through each forwarding port I0-I3 of the traffic aggregation group G1.
[0032] Figure 3 The inbound service traffic received by the ultra-low latency switch 20 is forwarded through multiple forwarding ports in a 1:N manner, thereby improving the forwarding performance of the ultra-low latency switch.
[0033] The ultra-low latency switch forwarding ports I15-I18 receive multiple service flows and then aggregate them as one service flow and forward them through port I19. Figure 2 The way of forwarding in the outbound direction is the same; for the service traffic received by I19 in the inbound direction, it is forwarded through multiple forwarding ports I15-I18 in a 1:N manner. Figure 3 The same as in the above, this application will not repeat them again.
[0034] Figure 4A schematic diagram of an embodiment of a port statistics device for an ultra-low latency switch provided by the present application. The device 40 includes a network interface, a first hardware chip, a second hardware chip, a CPU, and a memory. The first hardware chip is a switching chip that performs ultra-low latency forwarding, and the second hardware chip is an FPGA chip that performs a switching function of traffic aggregation; the processor executes the setting module by running the processor executable instructions in the memory.
[0035] The first hardware chip sends the received message of each forwarding port of each traffic aggregation group to the same aggregation forwarding mapping port of the second hardware chip; the second hardware chip sends the message received by each aggregation forwarding mapping port to the one-to-one corresponding aggregation forwarding port on the first hardware chip.
[0036] The first hardware chip sends the received messages of each forwarding port of each traffic aggregation group to the same aggregation forwarding mapping port of the second hardware chip, including: according to the outbound aggregation relationship, sending the received messages of each forwarding port to the one-to-one corresponding internal forwarding port on the first hardware chip; sending the messages received by each internal forwarding port to the mapping forwarding port on the directly connected second hardware chip; according to the outbound aggregation mapping relationship, sending the messages received by each mapping forwarding port to the aggregation forwarding mapping port belonging to the same traffic aggregation mapping group.
[0037] The second hardware chip sends the message received by each aggregation forwarding mapping port to the one-to-one corresponding aggregation forwarding port on the first hardware chip, including: sending the message received by each traffic aggregation mapping port to the diversion port on the directly connected first hardware chip; according to the outbound direction aggregation relationship, sending the message received by each diversion port to each one-to-one corresponding aggregation forwarding port.
[0038] The first hardware chip is also used to copy the received messages of each aggregation forwarding port according to the number of each forwarding port of the same traffic aggregation group according to the inbound direction aggregation relationship; and send a copy of the received messages of each aggregation forwarding port through each forwarding port of the same traffic aggregation group.
[0039] Setting module, setting module, setting multiple traffic aggregation groups for the first hardware chip; each traffic aggregation group includes multiple forwarding ports and an aggregation forwarding port; setting the inbound aggregation relationship; the inbound aggregation relationship records that the aggregation forwarding port of each traffic aggregation group corresponds to the multiple forwarding ports of the same traffic aggregation group; setting multiple outbound diversion groups for the first hardware chip and each traffic aggregation group corresponds to an outbound diversion group; each outbound diversion group includes multiple internal forwarding ports and an outbound diversion forwarding port; setting the outbound aggregation relationship; the outbound aggregation relationship records that one forwarding port corresponds to one internal forwarding port and one outbound diversion forwarding port corresponds to one aggregation forwarding port; setting multiple traffic aggregation mapping groups for the second hardware chip and each traffic aggregation mapping group corresponds to one traffic aggregation group; each traffic aggregation mapping group includes multiple mapping forwarding ports and an aggregation forwarding mapping port; wherein the multiple internal forwarding ports corresponding to the same traffic aggregation group are directly connected to the multiple mapping forwarding ports one by one; the diversion port corresponding to the same traffic aggregation group is directly connected to the aggregation forwarding mapping port.
[0040] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.
Claims
1. A message forwarding method, used for a message forwarding device for ultra-low latency message switching, characterized in that: The message forwarding device includes a first hardware chip for performing message hardware forwarding and a second hardware chip for performing traffic aggregation, and the method includes: Send the received messages of each forwarding port of the same traffic aggregation group of the first hardware chip to the same aggregation forwarding mapping port of the second hardware chip; according to the outbound aggregation relationship, send the received messages of each forwarding port to the corresponding internal forwarding ports on the first hardware chip; each of the internal forwarding ports sends the received messages to the mapping forwarding port on the directly connected second hardware chip; send the messages received by each mapping forwarding port of the second hardware chip to the aggregation forwarding mapping port belonging to the same traffic aggregation mapping group; the first hardware chip is used to perform message hardware forwarding and the second hardware chip is used to perform traffic aggregation; The messages received by each of the aggregation forwarding mapping ports of the second hardware chip are sent to the corresponding aggregation forwarding ports on the first hardware chip; each of the traffic aggregation mapping ports sends the received messages to the diversion ports on the first hardware chip that is directly connected; according to the outbound aggregation relationship, the messages received by each of the diversion ports are sent to the corresponding aggregation forwarding ports; so that the received messages of each forwarding port of the same traffic aggregation group on the first hardware chip are sent through a single aggregation forwarding port.
2. The method according to claim 1, characterized in that The method further comprises: According to the inbound aggregation relationship, the received messages of each of the aggregation forwarding ports are replicated according to the number of each of the forwarding ports in the same traffic aggregation group; A copy of the received message of each aggregation forwarding port is sent through each forwarding port of the same traffic aggregation group.
3. The method according to claim 2, characterized in that Before sending the received messages of the forwarding ports of the same traffic aggregation group of the first hardware chip to the same aggregation forwarding mapping port of the second hardware chip, the method further includes: A plurality of the traffic aggregation groups are set for the first hardware chip; each of the traffic aggregation groups includes a plurality of the forwarding ports and one aggregation forwarding port; Record the inbound direction aggregation relationship; the inbound direction aggregation relationship records that the aggregation forwarding port of each of the traffic aggregation groups corresponds to multiple forwarding ports of the same traffic aggregation group; A plurality of outbound diversion groups are set for the first hardware chip, and each of the traffic aggregation groups corresponds to one outbound diversion group; wherein each of the outbound diversion groups includes a plurality of internal forwarding ports and one outbound diversion forwarding port; Recording the outbound convergence relationship; the outbound convergence relationship records that one forwarding port corresponds to one internal forwarding port and one outbound diversion forwarding port corresponds to one converged forwarding port; A plurality of the traffic aggregation mapping groups are set for the second hardware chip, and each of the traffic aggregation mapping groups corresponds to one traffic aggregation group; wherein each of the traffic aggregation mapping groups includes a plurality of the mapping forwarding ports and one aggregation forwarding mapping port; Directly connect the multiple internal forwarding ports corresponding to the same traffic aggregation group to the multiple mapping forwarding ports one by one; and directly connect the diversion port corresponding to the same traffic aggregation group to the aggregation forwarding mapping port.
4. A message forwarding device, used for ultra-low latency message switching and forwarding, characterized in that: The device includes a first hardware chip for performing message hardware forwarding and a second hardware chip for performing traffic aggregation; The first hardware chip sends the received messages of each forwarding port of each traffic aggregation group to the same aggregation forwarding mapping port of the second hardware chip; the first hardware chip sends the received messages of each forwarding port to the one-to-one corresponding internal forwarding port on the first hardware chip according to the outbound aggregation relationship; sends the messages received by each internal forwarding port to the mapping forwarding port on the directly connected second hardware chip; the second hardware chip sends the messages received by each mapping forwarding port to the aggregation forwarding mapping port belonging to the same traffic aggregation mapping group; The second hardware chip sends the message received by each of the aggregation forwarding mapping ports to the corresponding aggregation forwarding ports on the first hardware chip; the second hardware chip sends the message received by each of the traffic aggregation mapping ports to the diversion ports on the first hardware chip that is directly connected; the first hardware chip sends the message received by each of the diversion ports to the corresponding aggregation forwarding ports according to the outbound aggregation relationship.
5. The device according to claim 4, characterized in that The first hardware chip is also used to copy the received messages of each aggregation forwarding port according to the number of each forwarding port of the same traffic aggregation group based on the inbound direction aggregation relationship; and send a copy of the received messages of each aggregation forwarding port through each forwarding port of the same traffic aggregation group.
6. The device according to claim 5, characterized in that The device further comprises: a setting module, The setting module sets a plurality of the traffic aggregation groups for the first hardware chip; each of the traffic aggregation groups includes a plurality of the forwarding ports and an aggregation forwarding port; sets a plurality of outbound diversion groups for the first hardware chip and each of the traffic aggregation groups corresponds to one outbound diversion group; each of the outbound diversion groups includes a plurality of internal forwarding ports and one outbound diversion forwarding port; sets a plurality of the traffic aggregation mapping groups for the second hardware chip and each of the traffic aggregation mapping groups corresponds to one traffic aggregation group; each of the traffic aggregation mapping groups includes a plurality of mapping forwarding ports and one aggregation forwarding mapping port; sets the inbound aggregation relationship and the outbound aggregation relationship for the first hardware chip; the inbound aggregation relationship records that the aggregation forwarding port of each traffic aggregation group corresponds to multiple forwarding ports of the same traffic aggregation group; the outbound aggregation relationship records that one forwarding port corresponds to one internal forwarding port and one outbound diversion forwarding port corresponds to one aggregation forwarding port; Among them, the multiple internal forwarding ports corresponding to the same traffic aggregation group are directly connected to the multiple mapping forwarding ports one by one; the diversion port corresponding to the same traffic aggregation group is directly connected to the aggregation forwarding mapping port.