Circuit board and method of manufacturing the same

Abstract

The application provides a circuit board, comprising a medium layer, a hollow first resistor, a second resistor, a first conducting electrode and a second conducting electrode. The medium layer is provided with an opening, the hollow first resistor is arranged on the inner wall of the opening, the first conducting electrode is arranged on the inner wall of the first resistor and connected with the first resistor, and the second conducting electrode is arranged on the second resistor and connected with the second resistor. The manufacturing method of the circuit board is beneficial to manufacturing the circuit board of high-density electronic elements. In addition, the application further provides a manufacturing method of the circuit board.

Description

TECHNICAL FIELD

[0001] The present application relates to a circuit board and a manufacturing method thereof. BACKGROUND

[0002] Generally, a resistor is an external electronic component of a circuit board, which is arranged on the surface of the circuit board by soldering. However, the resistor occupies part of the surface area of the circuit board, which reduces the surface area of the circuit board available for connection with other electronic components, thereby limiting the space utilization of the circuit board and being not conducive to manufacturing a circuit board with high-density electronic components. SUMMARY

[0003] To solve the problems in the background, the present application provides a manufacturing method of a circuit board.

[0004] In addition, it is necessary to provide a circuit board.

[0005] A manufacturing method of a circuit board comprises the steps of: providing a substrate, the substrate comprising a dielectric layer and a first copper foil layer arranged on the dielectric layer, the substrate having an opening, the opening penetrating the first copper foil layer and at least part of the dielectric layer; arranging a resistor layer on the first copper foil layer, part of the resistor layer being arranged on the inner wall of the opening to form a hollow first resistor; arranging a second copper foil layer on the resistor layer on the first copper foil layer, part of the second copper foil layer being arranged on the inner wall of the first resistor to form a hollow first conducting pole, thereby obtaining an intermediate body; etching the second copper foil layer on the resistor layer to form a second conducting pole; etching the resistor layer on the first copper foil layer to form a second resistor connected with the first resistor, wherein the first conducting pole is connected with the first resistor, the second conducting pole is connected with the second resistor, the first conducting pole, the first resistor, the second resistor and the second conducting pole jointly form a resistor structure, thereby obtaining the circuit board.

[0006] Further, before forming the second conducting pole, the manufacturing method further comprises: etching the second copper foil layer on the resistor layer to form an outer side circuit layer; and etching part of the outer side circuit layer to form the second conducting pole.

[0007] Further, the intermediate is divided into a resistance region corresponding to the via hole and a positioning region other than the resistance region, and the manufacturing method further comprises the steps of: disposing a first dry film layer on the second copper foil layer, the first dry film layer covering the via hole; exposing and developing the first dry film layer to obtain a first photosensitive pattern, the first photosensitive pattern having a first etching groove corresponding to the resistance region, and part of the second copper foil layer exposed at the bottom of the first etching groove; removing the part of the second copper foil layer corresponding to the first etching groove to obtain the outer side circuit layer; and removing the first photosensitive pattern.

[0008] Further, the first photosensitive pattern further has a second etching groove corresponding to the positioning region, and the manufacturing method further comprises the steps of: removing the part of the second copper foil layer corresponding to the second etching groove to obtain a plurality of positioning pads for assisting in positioning the second conducting pole.

[0009] Further, the removed part of the second copper foil layer forms residues, part of which remains on the second conducting pole or the positioning pad, and after the first photosensitive pattern is removed, the manufacturing method further comprises the steps of: removing the residues on the second conducting pole or the positioning pad.

[0010] Further, the manufacturing method further comprises the steps of: disposing a second dry film layer on the outer side circuit layer. Exposing and developing the second dry film layer to form a second photosensitive pattern, the second photosensitive pattern having a third etching groove, the via hole, and part of the second copper foil layer around the via hole exposed at the bottom of the third etching groove. Removing the part of the outer side circuit layer exposed at the bottom of the third etching groove to form a plurality of the second conducting poles, and removing the second photosensitive pattern.

[0011] Further, the second photosensitive pattern has a fourth etching groove, and the manufacturing method further comprises the steps of:

[0012] The fourth etching groove is positioned to correspond to the positioning pad.

[0013] Further, the material of the resistance layer includes nickel-chromium alloy, and forming the second conducting pole specifically comprises: using an alkaline etching solution to etch the outer side circuit layer to remove the part of the outer side circuit layer exposed at the bottom of the third etching groove.

[0014] Further, the resistance layer is formed by sputtering nickel-chromium alloy on the first copper foil layer.

[0015] The application discloses a circuit board, which comprises a medium layer, a hollow first resistance body, a second resistance body, a first conducting pole and a second conducting pole. The medium layer is provided with an opening, the hollow first resistance body is arranged on the inner wall of the opening, the first conducting pole is arranged on the inner wall of the first resistance body and connected with the first resistance body, and the second conducting pole is arranged on the second resistance body and connected with the second resistance body.

[0016] Compared with the prior art, the manufacturing method of the circuit board provided by the application comprises the following steps: an opening is formed on a substrate, a first resistance body is arranged in the opening, a first conducting pole is arranged on the substrate, and a second conducting pole is arranged on the first resistance body. The first conducting pole and the second conducting pole are electrically connected through the first resistance body to form a resistance structure. Since part of the resistance structure is arranged in the opening, the space utilization rate of the substrate is improved, and the circuit board with high-density electronic components can be manufactured. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 The schematic diagram of the substrate provided by an embodiment of the application is shown.

[0018] Figure 2 The schematic diagram of the substrate provided by an embodiment of the application is shown. Figure 1 The schematic diagram of the substrate provided by an embodiment of the application is shown.

[0019] Figure 3 The schematic diagram of the substrate provided by an embodiment of the application is shown. Figure 2 The schematic diagram of the substrate provided by an embodiment of the application is shown.

[0020] Figure 4 The schematic diagram of the substrate provided by an embodiment of the application is shown. Figure 3 The schematic diagram of the substrate provided by an embodiment of the application is shown.

[0021] Figure 5 The schematic diagram of the substrate provided by an embodiment of the application is shown. Figure 3 The schematic diagram of the substrate provided by an embodiment of the application is shown.

[0022] Figure 6 The schematic diagram of the substrate provided by an embodiment of the application is shown. Figure 3 The schematic diagram of the substrate provided by an embodiment of the application is shown.

[0023] Figure 7 The schematic diagram of the substrate provided by an embodiment of the application is shown. Figure 6 The schematic diagram of the substrate provided by an embodiment of the application is shown.

[0024] Figure 8 The schematic diagram of the substrate provided by an embodiment of the application is shown. Figure 7 The schematic diagram of the substrate provided by an embodiment of the application is shown.

[0025] Figure 9 The schematic diagram of the circuit board provided by an embodiment of the application is shown.

[0026] MAIN ELEMENT SYMBOL EXPLANATION

[0027] circuit board 100

[0028] substrate 10

[0029] dielectric layer 11

[0030] first copper foil layer 12

[0031] opening 13

[0032] inner side circuit layer 14

[0033] intermediate body 15

[0034] resistance layer 20

[0035] first resistance body 21

[0036] second resistance body 22

[0037] second copper foil layer 30

[0038] first conducting pole 31

[0039] second conducting pole 32

[0040] notch 33

[0041] outer side circuit layer 34

[0042] first positioning pad 41

[0043] second positioning pad 42

[0044] first dry film layer 50

[0045] first photosensitive pattern 51

[0046] first etching groove 52

[0047] second etching groove 53

[0048] second dry film layer 60

[0049] second photosensitive pattern 61

[0050] third etching groove 62

[0051] fourth etching groove 63

[0052] resistance structure 80

[0053] thickness direction H

[0054] resistance region I

[0055] positioning region II

[0056] The following detailed description will further describe the present application with reference to the above-mentioned drawings. DETAILED DESCRIPTION

[0057] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all of the embodiments of the present application.

[0058] It should be noted that when one element is considered to be "connected" to another element, it can be directly connected to the other element or can exist simultaneously with a middle element. When one element is considered to be "provided on" another element, it can be directly provided on the other element or can exist simultaneously with a middle element.

[0059] Referring to Figures 1 to 9 The manufacturing method of the circuit board 100 provided in the embodiments of the present application comprises the following steps:

[0060] S1: Referring to Figure 1 , a substrate 10 is provided, the substrate 10 comprises a dielectric layer 11 and two first copper foil layers 12, the first copper foil layers 12 are arranged on opposite sides of the dielectric layer 11. The substrate 10 has a plurality of openings 13 (only one is shown in the figure), the openings 13 penetrate the first copper foil layers 12 and the dielectric layer 11 along the thickness direction H. In other embodiments of the present application, the openings 13 penetrate the first copper foil layers 12 and part of the dielectric layer 11.

[0061] S2: Referring to Figure 2 , an electrically resistive layer 20 is arranged on the first copper foil layer 12, part of the electrically resistive layer 20 fills into the openings 13 to form hollow first electrically resistive bodies 21, the first electrically resistive bodies 21 are substantially cylindrical, and the first electrically resistive bodies 21 are attached to the inner walls of the openings 13.

[0062] In the present embodiment, referring to Figure 2 , in step S2, the electrically resistive layer 20 and the first electrically resistive bodies 21 are made of nickel-chromium alloy, and the nickel-chromium alloy is arranged on the first copper foil layer 12 and in the openings 13 by sputtering.

[0063] S3: Referring to Figure 3, on the resistance layer 20, a second copper foil layer 30 is arranged, and part of the second copper foil layer 30 is filled into the opening 13 with the first resistance body 21 to form a hollow first conducting pole 31, the first conducting pole 31 covers the first resistance body 21, and an intermediate body 15 is obtained. Wherein, the intermediate body 15 is divided into a resistance area I and a positioning area II except the resistance area I along the thickness direction H, and the opening 13 with the first resistance body 21 and the first conducting pole 31 is located in the resistance area I.

[0064] S4: please see Figures 4 to 9 , the second copper foil layer 30 is etched to form an outside circuit layer 34, the outside circuit layer 34 includes a plurality of second conducting poles 32 and a plurality of first positioning pads 41. And the resistance layer 20 located on the first copper foil layer 12 is etched to form a second resistance body 22 connected with the first resistance body 21, and the circuit board 100 is obtained (see Figure 9 ). Wherein, the second conducting pole 32 and the first conducting pole 31 have a gap 33, the gap 33 is used to separate the first conducting pole 31 and the second conducting pole 32, so that the electron cannot directly flow between the first conducting pole 31 and the second conducting pole 32, that is, the electron can only flow to the first conducting pole 31 or the second conducting pole 32 through the first resistance body 21 and the second resistance body 22.

[0065] In this embodiment, step S4 specifically includes:

[0066] S41: please see Figure 4 , a first dry film layer 50 is arranged on the second copper foil layer 30, and the first dry film layer 50 covers the opening 13.

[0067] S42: please see Figure 5 , the first dry film layer 50 is exposed and developed to obtain a first photosensitive pattern 51, the first photosensitive pattern 51 has a first etching groove 52 and a second etching groove 53. The first etching groove 52 is located in the resistance area I, and the second etching groove 53 is located in the positioning area II, and part of the second copper foil layer 30 is exposed at the bottom of the first etching groove 52 and the second etching groove 53 respectively.

[0068] S42: please see Figure 6 , the part of the second copper foil layer 30 corresponding to the first etching groove 52 is etched to form the outside circuit layer 34. Moreover, the part of the second copper foil layer 30 corresponding to the second etching groove 53 is etched to form the first positioning pad 41.

[0069] In this embodiment, in addition to etching the second copper foil layer 30 corresponding to the first etching groove 52, the resistance layer 20 corresponding to the first etching groove 52 is also etched to form a plurality of second resistance bodies 22, which are connected to the first resistance bodies 21. Moreover, in addition to etching the second copper foil layer 30 corresponding to the second etching groove 53, the resistance layer 20 corresponding to the second etching groove 53 is also etched to form a plurality of second positioning pads 42, of which the first positioning pads 41 are arranged above. In other embodiments of the present application, the second resistance layer 20 can also not be etched.

[0070] Further, the first copper foil layer 12 corresponding to the first etching groove 52 and the second etching groove 53 can also be etched to form the inner side circuit layer 14. In other embodiments of the present application, the first copper foil layer 12 can also not be etched.

[0071] S43: Please refer to Figure 6 , and the first photosensitive pattern 51 is removed.

[0072] In this embodiment, in step S42, the etched portions of the first copper foil layer 12, the second copper foil layer 30 and the resistance layer 20 form residues (not shown in the figure), and some of the residues can be deposited on the outer surface of the outer side circuit layer 34 or the first positioning pad 41. Therefore, after step S43, the following step can also be included:

[0073] S44: The residues deposited on the outer surface of the outer side circuit layer 34 or the first positioning pad 41 are cleaned by means of plasma jet. In other embodiments of the present application, the residues can also be cleaned by means of air blowing or chemical cleaning agent elution.

[0074] In this embodiment, step S4 also includes:

[0075] S45: Please refer to Figure 7 , and a second dry film layer 60 is arranged on the outer side circuit layer 34 and the first positioning pad 41.

[0076] S46: Please refer to Figure 8Exposure and development is performed on the second dry film layer 60 to form a second photosensitive pattern 61, the second photosensitive pattern 61 having a third etching groove 62 and a fourth etching groove 63, the opening 13 and the portion of the outer side circuit layer 34 around the opening 13 being exposed to the third etching groove 62. The first positioning pad 41 is exposed to the fourth etching groove 63. Then, the exposure of the first positioning pad 41 (for example, whether it is completely exposed to the bottom of the fourth etching groove 63) is determined by image recognition technology, so as to determine whether the position of the fourth etching groove 63 is correct, that is, whether the position of the exposure and development of the outer side circuit layer 34 in the subsequent step S47 is correct, and if not, it can be adjusted in time.

[0077] S47: Please refer to Figure 9 The portion of the outer side circuit layer 34 exposed to the bottom of the third etching groove 62 is removed to form a plurality of second conducting poles 32. The first conducting pole 31, the second conducting pole 32, the first resistance body 21 and the second resistance body 22 together constitute a resistance structure 80.

[0078] In this embodiment, the portion of the outer side circuit layer 34 exposed to the bottom of the third etching groove 62 can be removed by soaking in an alkaline etching solution in step S47. By using an alkaline etching solution, the first resistance body 21 and the second resistance body 22 can be protected from corrosion.

[0079] S48: Please refer to Figure 9 The second photosensitive pattern 61 is removed.

[0080] Compared with the prior art, the manufacturing method of the circuit board 100 provided by the present application has the following advantages:

[0081] (1) By opening the opening 13 on the substrate 10, and arranging the first resistance body 21 in the opening 13, and then arranging the first conducting pole 31, the second conducting pole 32, the first resistance body 21 and the second resistance body 22 on the substrate 10 respectively, the resistance structure 80 is formed. Among them, the first conducting pole 31 is arranged on the first resistance body 21, the second conducting pole 32 is arranged on the second resistance body 22, and the first conducting pole 31 and the second conducting pole 32 have a gap 33, so that the first conducting pole 31 and the second conducting pole 32 can be used as two pins of a conventional resistance respectively. Since part of the resistance structure 80 is arranged in the opening 13, the space utilization of the substrate 10 is improved, which is beneficial to the manufacture of high-density electronic component circuit boards.

[0082] (2) The thickness of the resistance layer 20 and the first resistance body 21 can be better controlled by sputtering, and the formation of the first conducting pole 31 can be more easily controlled by exposure and development, thereby reducing the resistance error of the resistance structure 80.

[0083] Please refer to Figure 9 The application also provides a circuit board 100, which comprises a dielectric layer 11, a first conducting pole 31, a second conducting pole 32, a hollow first resistor 21 and a second resistor 22.

[0084] The dielectric layer 11 is provided with an opening 13, the hollow first resistor 21 is arranged on the inner wall of the opening 13, the first conducting pole 31 is arranged on the inner wall of the first resistor 21 and connected with the first resistor 21, and the second conducting pole 32 is arranged on the second resistor 22 and connected with the second resistor 22.

[0085] The above is only the preferred embodiment of the application, and is not any form of limitation on the application. Although the preferred embodiment is disclosed above, it is not used to limit the application. Any person skilled in the art can make some changes or modifications to the equivalent embodiments with the above disclosed technical content without departing from the technical solution range of the application. Any simple modification, equivalent change and modification made on the above embodiments according to the technical essence of the application are still within the technical solution range of the application.

Claims

1. A method of manufacturing a circuit board, characterized by, The method comprises the steps of: providing a substrate, the substrate comprising a dielectric layer and a first copper foil layer disposed on the dielectric layer, the substrate having an opening, the opening penetrating the first copper foil layer and at least part of the dielectric layer; disposing a resistance layer on the first copper foil layer, part of the resistance layer also being disposed on the inner wall of the opening to form a hollow first resistance body; disposing a second copper foil layer on the resistance layer on the first copper foil layer, part of the second copper foil layer also being disposed on the inner wall of the first resistance body to form a hollow first conducting pole, thereby obtaining an intermediate body; etching the second copper foil layer on the first copper foil layer to form a second conducting pole, and etching the resistance layer on the first copper foil layer to form a second resistance body connected with the first resistance body, wherein the first conducting pole is connected with the first resistance body, the second conducting pole is connected with the second resistance body, the first conducting pole, the first resistance body, the second resistance body and the second conducting pole together form a resistance structure, thereby obtaining the circuit board. Before forming the second conducting pole, the manufacturing method further comprises the steps of:

2. The production method according to claim 1, wherein etching the second copper foil layer on the resistance layer to form an outer side circuit layer; and etching part of the outer side circuit layer to form the second conducting pole. The intermediate body is divided into a resistance region and a positioning region other than the resistance region, the resistance region corresponding to the opening, the manufacturing method further comprising the steps of:

3. The production method according to claim 2, wherein disposing a first dry film layer on the second copper foil layer, the first dry film layer covering the opening; exposing and developing the first dry film layer to obtain a first photosensitive pattern, the first photosensitive pattern having a first etching groove, the first etching groove corresponding to the resistance region, part of the second copper foil layer being exposed at the bottom of the first etching groove; removing part of the second copper foil layer corresponding to the first etching groove to obtain the outer side circuit layer; and removing the first photosensitive pattern. The first photosensitive pattern also has a second etching groove corresponding to the positioning region, the manufacturing method further comprising the steps of: removing part of the second copper foil layer corresponding to the second etching groove to obtain a plurality of positioning pads for assisting in positioning the second conducting pole. The removed part of the second copper foil layer forms residues, part of which remains on the second conducting pole or the positioning pads, and after removing the first photosensitive pattern, the manufacturing method further comprises the step of:

4. The production method according to claim 3, wherein removing the residues on the second conducting pole or the positioning pads. The manufacturing method further comprises the steps of:

5. The production method according to claim 4, wherein disposing a second dry film layer on the outer side circuit layer; exposing and developing the second dry film layer to form a second photosensitive pattern, the second photosensitive pattern having a third etching groove, the opening and part of the second copper foil layer around the opening being exposed at the bottom of the third etching groove; 6. The production method according to claim 4, wherein removing part of the outer side circuit layer exposed at the bottom of the third etching groove to form a plurality of the second conducting poles; and removing the second photosensitive pattern. The second photosensitive pattern has a fourth etching groove, and the manufacturing method further comprises the step of: positioning the fourth etching groove to correspond to the positioning pads. ​ ​ 7. The production method according to claim 6, wherein ​ ​ 8. The production method according to claim 6, wherein The material of the resistance layer includes nickel-chromium alloy, and forming the second conducting pole specifically includes: The outer circuit layer is etched by using an alkaline etching solution to remove the part of the outer circuit layer exposed to the bottom of the third etching groove.

9. The manufacturing method of claim 1, wherein, The resistance layer is formed by sputtering nickel-chromium alloy on the first copper foil layer.

10. A circuit board, characterized by It comprises: A medium layer provided with an opening; A hollow first resistance body arranged on the inner wall of the opening; A second resistance body arranged on the medium layer and connected to the first resistance body; A first conducting pole arranged on the inner wall of the first resistance body and connected to the first resistance body; A second conducting pole arranged on the second resistance body and connected to the second resistance body, and the first conducting pole, the first resistance body, the second resistance body and the second conducting pole together form a resistance structure.

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