A control system and method for a high-power bidirectional DC / DC conversion circuit

Abstract

A control system and method for a high-power bidirectional DC / DC converter circuit includes a top-level controller D1 and an FPGA chip. The top-level controller D1 is used to calculate the grid-connected power supply current, DC bus voltage, and energy storage current of the DC / DC converter circuit and send control commands to the FPGA chip. The FPGA chip is used to execute a validation algorithm to ensure the accuracy of received data, read and process DC / DC circuit electrical quantities, and provide a data basis for duty cycle calculation and energy flow direction. Combined with the energy flow direction, the data information is sent to a PWM signal output unit, which outputs high-precision control signals for switching devices in the DC / DC converter circuit. The system also detects fault feedback information from the switching devices and, if a switching device fails, issues a blocking command to the PWM signal output circuit. This invention can effectively improve the accuracy, speed, and stability of converter circuit control.

Description

Technical Field

[0001] The present invention relates to the technical field of high-power power electronic conversion device control, in particular to a control system and method for a high-power bidirectional DC / DC conversion circuit. Background Art

[0002] With the continuous development of power electronic devices and control technology, high-power power electronic conversion systems have been widely used in the fields of electric drive, transportation, power systems, and new energy. In these systems, due to the fluctuation of active power, energy storage components need to be set up to smooth the system power fluctuations or save energy and improve efficiency. In order to achieve the normal and efficient operation of the energy storage components, a high-power bidirectional DC / DC conversion circuit is generally set between the energy storage components and the system DC bus. One end of the conversion circuit is connected to the DC bus and the other end is connected to the energy storage component. The voltage at both ends of the DC / DC conversion circuit can be adjusted and controlled, thereby realizing the bidirectional flow control of energy between the DC bus and the energy storage component. Due to the fast dynamic response speed, high voltage and high power of the above system, high requirements are placed on the accuracy, speed and stability of the DC / DC conversion circuit, as follows:

[0003] (1) In high-power power electronics applications, a large number of electrical and switching quantities need to be detected. Furthermore, power electronic devices rely on high-speed switching, placing high demands on the control system's computational speed and computational complexity. Furthermore, electromagnetic interference is a prominent issue in high-power applications, and top-level controllers may experience short restarts due to interference. Therefore, new methods are needed to address these issues.

[0004] (2) Due to the existence of the above problems and the fast switching speed of power electronic devices, new ways and methods are needed to achieve precise control of the system.

[0005] (3) High-power systems have higher requirements for safety and stability. During the data transmission process of the control system, it is necessary to further consider the fault-tolerant processing of the data.

[0006] (4) For high-precision control algorithms, the system needs to have an extremely high sampling rate, which is difficult to meet with conventional microprocessors.

[0007] (5) In addition, the internal PWM of conventional microprocessors is often fixed, and users only need to call it. However, in high-power applications, the topology is diverse, and the fixed PWM program is difficult to meet the needs. Therefore, it is necessary to use a self-programmable and expandable method to complete the generation of PWM control signals.

[0008] (6) Since the time that power electronic devices withstand overcurrent is very short, often at the millisecond level, the processing speed and accuracy of microprocessors, as well as flexible energy, are difficult to meet the requirements, which is also a problem that needs to be solved. Summary of the Invention

[0009] In view of the above background, the present invention proposes a fully digital control method and system for a high-power bidirectional DC / DC converter circuit based on FPGA technology, which can effectively improve the accuracy, speed, and stability of the converter circuit control.

[0010] A control system for a high-power bidirectional DC / DC converter circuit, comprising: a top-level controller D1, an AD sampling circuit S1, a switch input circuit K1, and an FPGA chip communicatively connected to the top-level controller D1, the AD sampling circuit S1, and the switch input circuit K1;

[0011] The top-level controller D1 is used to complete the detection of various electrical quantities and switching quantities of the system, calculate the grid-connected power supply terminal current, DC bus voltage, and energy storage terminal current of the DC / DC conversion circuit, and send control commands including the grid-connected power supply terminal current, DC bus voltage, and energy storage terminal current target parameters to the FPGA chip;

[0012] The FPGA chip comprises:

[0013] The F1 module is used to receive control commands sent by the top-level controller D1, complete control data validation and processing, and if the data is correct, send the data to the F4 module and send the energy flow direction to the F5 module;

[0014] The F2 module is connected to the AD sampling circuit S1 and is used to perform high-speed sampling of the power supply end current, DC bus current, and energy storage end current through the AD sampling circuit S1 to complete the reading and processing of electrical quantities, and obtain the actual sampling value of the system electrical quantity, and provide it to the F4 module for use;

[0015] The F3 module is connected to the switch input circuit K1 and is used to complete the switch input detection and determine whether the switch input is valid;

[0016] The F4 module is connected to the F1 and F2 modules and is used to receive control commands from the F1 module and actual sampling values of electrical quantities from the F2 module. It calculates the duty cycle of the switching devices S1, S2, S3, and S4 in the high-power bidirectional DC / DC conversion circuit within the F4 module and sends it to the F6 module.

[0017] The F5 module is connected to the F1 module and the F3 module, and is used to receive information from the F1 module and the F3 module, determine the energy flow direction of the bidirectional DC / DC conversion module, and send a flow direction instruction to the F6 module when the two input signals are exactly the same;

[0018] The F6 module is connected to the F4 and F5 modules and is used to output the PWM control signal of the device according to the circuit operation status and the direction of energy flow;

[0019] The F7 module is connected to the F6 module and the top-level controller D1. When a fault occurs in the switching devices S1, S2, S3, and S4, it sends a PWM output blocking command to the F6 module to shut down the PWM control signal output of all devices and simultaneously feeds back the fault information to the top-level controller D1.

[0020] Furthermore, the switch input circuit K1 is used to determine the switch signal of the energy flow direction and transmit the switch signal of the energy flow direction to the FPGA chip and the top-level controller D1.

[0021] Furthermore, the F1 module completes control data verification and processing, specifically including: receiving the input current, DC bus voltage, energy storage current target parameters, and the CRC verification value of the target parameters from the top-level controller D1, and then obtaining the verification value of the target parameter through the same CRC verification algorithm. If the calculated verification value is inconsistent with the verification value sent by the top-level controller, a request is made to resend it. If they are consistent, it means that the received data is correct, and the target parameter is passed to module F4.

[0022] Furthermore, the F2 module is also used to perform smoothing and filtering calculations on the sampled voltage and current parameters. The typical algorithm is shown in formula (1):

[0023]

[0024] Where x k Represents the discrete sampling value of each electrical quantity, k = 1 ~ N, N is the window width of the smoothing filter algorithm, x avg Indicates the average value of the electrical quantity obtained after smoothing and filtering. If the calculated average value of the electrical quantity exceeds the system set value, a blocking command is sent to the F6 module to stop the output of the PWM control signal;

[0025] Then the rate of change of electrical quantities is calculated. The typical algorithm is as shown in formula (2):

[0026]

[0027] In formula (2), x i is the current sampling value of the electrical quantity, x i-wis the sampling value of the first w points, w is usually 2 or 3, x d Characterizes the rate of change of the electrical quantity. If the rate of change exceeds the set value, the F4 module is controlled to quickly reduce the duty cycle to protect the safety of the device.

[0028] Furthermore, the F3 module completes the input detection of the switching quantity, specifically including: sampling the switching input signal of the switching input circuit K1 continuously M times, and judging the sampling value. If one or more low levels appear in the M sampling results, it means that the input signal is jittery and unstable. Until the results of the M samplings are all high levels, it is determined that the switching input is valid.

[0029] Furthermore, the F4 module completes the duty cycle calculation of the switching devices S1, S2, S3, and S4, specifically including: using the internal closed-loop control algorithm to obtain the duty cycle that the S1, S2, S3, and S4 devices need to output. The duty cycle needs to meet the constraint condition of formula (3):

[0030]

[0031] In formula (3), Ds x , x=1, 2, 3, 4, represents the duty cycle of each switching device. When the calculated pulse width is less than 1 / 2 times the minimum pulse width, the duty cycle is 0; when the calculated pulse width is greater than 1 / 2 times the minimum pulse width but less than the minimum pulse width, the duty cycle is set to the time corresponding to the minimum pulse width; when in the F2 module, the calculated rate of change of the electrical quantity is greater than the set value, the duty cycle is set to the time corresponding to the minimum pulse width; when the calculated pulse width is greater than the maximum pulse width, the duty cycle is set to the time corresponding to the maximum pulse width; in other cases, the duty cycle is the calculated value of the closed-loop control.

[0032] A control method for a high-power bidirectional DC / DC converter circuit is implemented using the above system, and the method comprises the following steps:

[0033] The top-level controller D1 completes the detection of various electrical quantities and switching quantities of the system, calculates the grid-connected power supply terminal current, DC bus voltage, and energy storage terminal current of the DC / DC conversion circuit, and sends a control command including the grid-connected power supply terminal current, DC bus voltage, and energy storage terminal current target parameters to the FPGA chip;

[0034] The F1 module in the PGA chip receives the control command sent by the top-level controller D1, completes the control data validation and processing, and if the data is correct, sends the data to the F4 module and sends the energy flow direction to the F5 module at the same time;

[0035] The F2 module uses the AD sampling circuit S1 to perform high-speed sampling of the power supply current, DC bus current, and energy storage current, completing the reading and processing of electrical quantities, and obtains the actual sampling value of the system electrical quantity, which is provided to the F4 module for use;

[0036] The F3 module completes the input detection of the switch quantity to determine whether the switch quantity input is valid;

[0037] The F4 module receives control commands from the F1 module and actual sampling values of electrical quantities from the F2 module. It calculates the duty cycle of the switching devices S1, S2, S3, and S4 in the high-power bidirectional DC / DC converter circuit and sends it to the F6 module.

[0038] The F5 module receives information from the F1 and F3 modules, determines the energy flow direction of the bidirectional DC / DC converter module, and sends a flow direction instruction to the F6 module when the two input signals are exactly the same;

[0039] The F6 module completes the device PWM control signal output according to the circuit operation status and energy flow direction;

[0040] When a fault occurs in the switching devices S1, S2, S3, and S4, the F7 module sends a PWM output blocking command to the F6 module to shut down the PWM control signal outputs of all devices and simultaneously feeds back the fault information to the top-level controller D1.

[0041] Furthermore, the module F2 performs smoothing and filtering calculation on the sampled voltage and current parameters. The typical algorithm is as shown in formula (1):

[0042]

[0043] Where x k Represents the discrete sampling value of each electrical quantity, k = 1 ~ N, N is the window width of the smoothing filter algorithm, x avg Indicates the average value of the electrical quantity obtained after smoothing and filtering. If the calculated average value of the electrical quantity exceeds the system set value, a blocking command is sent to the F6 module to stop the output of the PWM control signal;

[0044] Then the rate of change of electrical quantities is calculated. The typical algorithm is as shown in formula (2):

[0045]

[0046] In formula (2), x i is the current sampling value of the electrical quantity, x i-w is the sampling value of the first w points, w is usually 2 or 3, x dCharacterizes the rate of change of the electrical quantity. If the rate of change exceeds the set value, the F4 module is controlled to quickly reduce the duty cycle to protect the safety of the device.

[0047] The present invention has the following beneficial effects:

[0048] (1) The top-level controller and FPGA are designed separately to reduce the computational burden of the top-level controller. When the top-level controller is reset or fails, the FPGA can complete the relevant control of the DC / DC converter according to the internal program, thereby improving the system's ability to operate safely and stably for a long time.

[0049] (2) Under the fully digital overall framework based on FPGA technology, all elements involved in the DC / DC PWM control algorithm are completed inside the FPGA, and all algorithms and functions are in parallel operation, which improves the operation speed. In addition, the system uses the FPGA clock signal as the benchmark, and the PWM output control accuracy is higher;

[0050] (3) Adding control data validation and processing functions within the FPGA further ensures the security and stability of data transmission. Adding a switch input detection algorithm within the FPGA can directly read the switch signal. Even if the top-level controller fails, it can independently respond to external control.

[0051] (4) FPGA is directly interfaced with AD chip, and the sampling speed is much higher than that of microprocessor or DSP chip, which enables the system to work with faster response speed and provides hardware support for various high-performance filtering calculations and electrical quantity change calculations. For high-power power electronic devices, this processing method can also better realize the protection function of the device;

[0052] (5) The FPGA internally calculates the duty cycle of the switching device with higher accuracy, achieving the same accuracy as the FPGA clock signal. The response speed is faster, and the duty cycle of the switching device can be adjusted every time the device switches on and off. Since the program can be written by itself, the generation and adjustment methods of the PWM signal are more flexible than those of conventional top-level controllers.

[0053] (6) Since the program can be written by itself, the generation and adjustment methods of PWM signals are more flexible than those of conventional top-level controllers;

[0054] (7) The fault feedback signal is completed by FPGA, which can complete the fault locking function faster and more accurately than the top-level controller. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 It is a high-power bidirectional DC / DC energy storage conversion circuit;

[0056] Figure 2 yes Figure 1 Schematic diagram of energy flow from the power supply end to the energy storage end;

[0057] Figure 3 yes Figure 1 Schematic diagram of energy flow from the energy storage end to the power supply end;

[0058] Figure 4 It is a structural schematic diagram of a control system of a high-power bidirectional DC / DC conversion circuit of the present invention;

[0059] Figure 5 This is a working schematic diagram of a control system for a high-power bidirectional DC / DC conversion circuit of the present invention;

[0060] Figure 6 This is a flow chart of a control method for a high-power bidirectional DC / DC conversion circuit of the present invention;

[0061] Figure 7 This is a parameter diagram of the IGBT device selected in the high-power bidirectional DC / DC conversion circuit of the present invention. DETAILED DESCRIPTION

[0062] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0063] like Figure 4 As shown, an embodiment of the present invention provides a high-power bidirectional DC / DC conversion circuit control system based on FPGA technology, including a top-level controller D1, an AD sampling circuit S1, a switch input circuit K1, and an FPGA chip communicatively connected to the top-level controller D1, the AD sampling circuit S1, and the switch input circuit K1.

[0064] The high-power bidirectional DC / DC conversion circuit is as follows: Figure 1 As described above, TA is a current sensor, which is installed in series on the power supply end and the energy storage end circuit, and TV is a voltage sensor, which is installed in parallel on the DC bus.

[0065] In the above technical solution, the AD sampling circuit S1 can use chips from any company or brand, and various forms of filtering or isolation circuits can be added inside. It mainly completes the sampling of the grid-connected power supply end current, DC bus voltage, and energy storage end current of the DC / DC conversion circuit.

[0066] In the above technical solution, the switch input circuit K1 primarily determines the switch signal indicating the direction of energy flow. The output signal from the switch input circuit K1 is sent to both the FPGA chip and the top-level controller D1, enabling dual-level information reading and improving the stability of the high-power conversion system.

[0067] The FPGA chip includes a control data verification and processing algorithm module F1 (hereinafter referred to as the F1 module), a system electrical quantity reading and conversion algorithm module F2 (hereinafter referred to as the F2 module), a switch input detection module F3 (hereinafter referred to as the F3 module), a switch device duty cycle calculation module F4 (hereinafter referred to as the F4 module), an energy flow direction determination module F5 (hereinafter referred to as the F5 module), a PWM signal output algorithm module F6 (hereinafter referred to as the F6 module), and a fault feedback information judgment algorithm module F7 (hereinafter referred to as the F7 module).

[0068] The top-level controller D1 is used to complete the detection of various electrical quantities and switching quantities of the system, and calculate the grid-connected power supply end current, DC bus voltage, and energy storage end current of the DC / DC conversion circuit. The above control algorithm can be a dual closed-loop control algorithm of the current inner loop or the voltage outer loop, or various other new algorithms, and then sent to the F1 module of the FPGA chip through the bus. Thereafter, according to the overall control algorithm of the DC / DC conversion circuit application system, control commands including target parameters such as the grid-connected power supply end current, the DC bus voltage, and the energy storage end current are sent to the FPGA chip.

[0069] The F1 module is connected to the top-level controller D1 and is used to receive control commands sent by the top-level controller D1, complete control data validation and processing, and ensure the correctness of the received power supply end current, DC bus voltage, and energy storage end current data. If the data is incorrect, the error data information is sent to the top-level controller D1 to request retransmission of the data. If the data is correct, the above data is sent to the F4 module, and the energy flow direction is sent to the F5 module.

[0070] Preferably, the F1 module specifically first receives target parameters such as the input end current, DC bus voltage, energy storage end current, etc. from the top-level controller D1, as well as the CRC (Cyclic Redundancy Check) verification value of these parameters, as shown in Table 1. The specific transmission format is not limited to Table 1, and the data length can be adjusted according to actual needs.

[0071] Table 1 Top-level controller transmission data format

[0072]

[0073] Then, the F1 module uses the same CRC verification algorithm to obtain the verification values of the target parameters such as voltage and current. If the value is inconsistent with the value sent by the top-level controller (that is, the CRC verification value at position n-1 shown in Table 1), it requests resending. If the value is consistent with the value sent by the top-level controller, it means that the received data is correct, and then these target values are passed to module F4.

[0074] The F2 module is connected to the AD sampling circuit S1 and is used to perform high-speed sampling of the power supply end current, DC bus current, and energy storage end current through the AD sampling circuit S1, complete the reading and processing of electrical quantities, obtain the actual voltage and current parameters of the system, and provide them to the F4 module for use.

[0075] Preferably, the F2 module is specifically, according to f s The sampling frequency, f s The speed is the top controller sampling frequency f d The data obtained after sampling is stored in the register inside the FPGA. After that, all the data such as voltage and current can be smoothed and filtered. The typical algorithm is as follows:

[0076]

[0077] Where x k Represents the discrete sampling value of each electrical quantity (k = 1 ~ N), N is the window width of the smoothing filter algorithm, x avg Represents the average value of the electrical quantity after smoothing and filtering. This processing method can filter out interference signals. The value of N can be adjusted based on the FPGA sampling rate; a value of 10 or more is generally recommended. Furthermore, if the calculated average value of the electrical quantity exceeds the system's set value, a blocking command is immediately sent to the F6 module, halting the PWM control signal output to ensure system safety.

[0078] Then the rate of change of electrical quantities is calculated. The typical algorithm is as shown in formula (2):

[0079]

[0080] In formula (2), x i is the current sampling value of the electrical quantity, x i-w is the sampling value of the first w points, w is usually 2 or 3, x d It can represent the rate of change of the electrical quantity. Since the overvoltage and overcurrent capabilities of power electronic devices are very limited, far lower than those of copper and iron devices, after processing through formula (2), the rate of change of the system voltage and current can be known in advance. Once the rate of change exceeds the set value, the F4 module can quickly reduce the duty cycle to achieve the purpose of protecting the device safety.

[0081] The F3 module is connected to the switch input circuit K1 and is used to complete the input detection of the switch. In order to avoid malfunction of the switch, the F3 module needs to complete the debouncing and fault judgment of the switch.

[0082] Preferably, module F3 samples the digital input signal of digital input circuit K1 M times continuously and determines the sampled values. If one or more of the M sampling results show a low level, it indicates that the input signal is jittery and unstable. If all M sampling results show a high level, the digital input is determined to be valid. This processing method can effectively eliminate interference signals in high-power environments.

[0083] The algorithms of the above F1, F2, and F3 modules are completed in parallel inside the FPGA.

[0084] The F4 module is connected to the F1 module and the F2 module, and receives the control command from the F1 module, including but not limited to the control reference value of the input side current, DC bus voltage, energy storage side current, and the actual sampling value of the electrical quantity of the F2 module, and then completes the duty cycle calculation of the switching devices S1, S2, S3, and S4 in the F4 module. In addition, the voltage and current change rate x calculated by the F2 module is also required in the F4 module. d , complete the current limiting control function, that is, when x d When the value of exceeds the set value, the F4 module will set the duty cycle to the minimum value to ensure that the system will not have overcurrent or overvoltage problems. d After the value returns to the normal range, the F4 module will restart the closed-loop control and the system voltage and current will gradually return to normal.

[0085] Preferably, the F4 module is specifically configured such that the internal closed-loop control algorithm can be a traditional PID algorithm, or a fuzzy control algorithm, an artificial neural network control algorithm, an artificial particle swarm control algorithm, a multi-objective optimization control algorithm, etc. Through the above closed-loop control, the duty cycle required to be output by the S1, S2, S3, and S4 devices is obtained. In addition, the duty cycle also needs to meet the constraint conditions described in formula (3):

[0086]

[0087] In formula (3), Ds x, x = 1, 2, 3, 4, represents the duty cycle of each switching device. Due to high-power applications, to ensure normal switching of the device, the minimum pulse width is set much larger than that of low-voltage applications. To improve the quality of the output waveform, the control system adopts an optimization method. That is, when the calculated pulse width is less than 1 / 2 times the minimum pulse width, the duty cycle is 0. When the calculated pulse width is greater than 1 / 2 times the minimum pulse width but less than the minimum pulse width, the duty cycle is set to the time corresponding to the minimum pulse width. When the calculated rate of change of the electrical quantity in the F2 module is greater than the set value, the duty cycle is set to the time corresponding to the minimum pulse width. When the calculated pulse width is greater than the maximum pulse width, the duty cycle is set to the time corresponding to the maximum pulse width. In other cases, the duty cycle is the calculated value of the closed-loop control.

[0088] After calculating the duty cycle of each device, the F4 module sends the value to the F6 module, which completes the device PWM control signal output based on the circuit operating status and energy flow direction.

[0089] The F5 module is connected to the F1 module and the F3 module, and is used to receive information from the F1 module and the F3 module, determine the energy flow direction of the bidirectional DC / DC conversion module, and send a flow direction instruction to the F6 module.

[0090] Preferably, the F5 module specifically receives the signals sent by the F1 and F3 modules, and performs an "AND" confirmation on the F5 module. Only when the two input signals are exactly the same does the F5 module send an energy flow direction instruction to the F6 module.

[0091] The F6 module is connected to the F4 module and the F5 module to complete the control of the four switching devices in the bidirectional DC / DC circuit.

[0092] Preferably, the F6 module is specifically configured such that the FPGA calculates the period of each PWM control according to the switching frequency and the system clock frequency according to formula (4):

[0093]

[0094] Where PWM_TM is the total number of clocks per switching cycle, f CLK is the FPGA clock cycle, f PWM is the switching frequency of the power device, and PWM_TM is calculated by formula (4). The system counts based on the FPGA clock and generates a start signal when the value reaches PWM_TM.

[0095] In the PWM control of each device, the size of the on-time counter of each switching device can be calculated by formula (5):

[0096] PWM_S1_Counter=Ds1×PWM_TM (5)

[0097] Taking switch device S1 as an example, each time a PWM start signal arrives, the output level of the S1 control signal is set to a high level, turning the switch on. The system then counts each rising edge of the system clock based on the FPGA clock. When the count reaches the value given in formula (5), the output level of the S1 control signal is set to a low level, turning the switch off. This cycle continues, achieving uninterrupted system control. The PWM control method for switch devices S2, S3, and S4 is consistent with that for switch device S1. The specific device to be controlled is selected according to the rules in Table 2.

[0098] Table 2 Switching device control rules

[0099]

[0100] The F7 module is connected to the F6 module and the top-level controller D1 to quickly process the feedback signals of the switching devices S1, S2, S3, and S4.

[0101] Module F7 preferably uses the FPGA clock signal frequency as the sampling frequency to check the feedback signals from switching devices S1, S2, S3, and S4. If the feedback signal from any device disappears for a set time (typically 200ns to 400ns, which can also be adjusted based on the FPGA clock signal period), it issues a PWM output lockout command to module F6, shutting down the PWM control signal outputs of all devices and simultaneously feeding fault information back to the top-level controller D1. Compared to microprocessors' millisecond-level sampling, FPGA processing of fault feedback signals allows for a much faster response.

[0102] Figure 1 The figure shows a high-power bidirectional DC / DC converter circuit. Two reversible current converter circuits on the left and right sides are connected via a DC bus. Each circuit consists of four switching devices, S1, S2, S3, and S4. For this project, Infineon Technologies' IGBTs, specifically the FZ1200R33HE, are rated at 3300V and 1200A. Inductors 1 and 2 are 4mH. The fuse is selected based on the actual current flow, with a nominal rating of 2. In this project, the fuse is 300A. The power supply voltage is rated between 750 and 1500V, the DC bus voltage is 1800V, and the battery voltage on the energy storage side is 450V to 1000V.

[0103] In this circuit, the energy is as Figure 2 and Figure 3The two flow directions shown in the figure can realize the bidirectional flow of energy. The specific working method is as follows:

[0104] When the energy flows from the power supply end to the energy storage end, the circuit working diagram is as follows Figure 2 As shown, in the current reversible conversion circuit on the left side of the DC bus, i.e., the power supply side, only switch S2 is in operation, while switch S1 is inoperative. In this state, the circuit operates in a left-to-right boost state. Through the control method of the present invention, the fluctuating voltage at the power supply side is increased to a stable voltage of 1800V. In the current reversible conversion circuit on the right side of the DC bus, i.e., the energy storage side, only switch S3 is in operation, while switch S4 is inoperative. In this state, the circuit operates in a left-to-right step-down state. Through the control method of the present invention, efficient charging of the battery pack is achieved. This allows energy to flow from the power supply side to the energy storage side.

[0105] When the energy flows from the energy storage end to the power supply end, the circuit working diagram is as follows Figure 3 As shown, in the current reversible conversion circuit on the left side of the DC bus, i.e., the power supply end, only switch S1 is in operation, while switch S2 is inoperative. In this state, the circuit operates in a step-down state from right to left. Through the control method of the present invention, the DC bus voltage is converted to the voltage required by the power supply end, and the current output to the power supply end is controlled. In the current reversible conversion circuit on the right side of the DC bus, i.e., the energy storage end, only switch S4 is in operation, while switch S3 is inoperative. In this state, the circuit operates in a step-up state from right to left. Through the control method of the present invention, the battery pack supplies power to the DC bus and maintains the DC bus voltage at 1800V.

[0106] Figure 4 The following illustrates the specific flow of the control method proposed in the present invention. The system control method is described below using the example of connecting the device to the DC bus of a reactive power compensation device. Traditional reactive power compensation devices, lacking a source of active power, can only compensate for the system's reactive power. However, adding a conversion circuit capable of bidirectional power flow to the DC bus of the reactive power compensation device and installing an energy storage battery at one end of the circuit can assist the reactive power compensation device in achieving active power output control.

[0107] (1) Top-level controller D1 determines the active current and DC bus voltage parameters required by the DC / DC bidirectional conversion circuit based on the system status of the reactive power compensation device. It then sends commands to the FPGA. For example, if the active current required is 100A, the DC bus voltage is controlled at 1800V.

[0108] There are a total of 7 sub-modules inside the FPGA. The specific implementation of each module is shown below.

[0109] (2-1) The F1 module is specifically, internally it uses the same CRC validation algorithm to obtain Figure 1 The target parameters of the DC / DC converter circuit, such as the power supply current, DC bus voltage, and energy storage current, are verified. If the value is inconsistent with the CRC verification value sent by the top-level controller, a retransmission request is made. If the value is consistent with the value sent by the top-level controller, the received data is correct. These target values are then passed to the F4 switching device duty cycle calculation module.

[0110] (2-2) The F2 module is specifically as follows: s The sampling frequency, f s The speed is the top controller sampling frequency f d 10 times, for example, f s The frequency is 10kHz, which means the sampling is done every 0.1ms. The data obtained after sampling is stored in the registers inside the FPGA. Then, all the data such as voltage and current are smoothed and filtered. The typical algorithm is shown in formula (1). The typical algorithm for rate of change calculation is shown in formula (2).

[0111]

[0112] In the formula, x k Represents the discrete sampling value of each electrical quantity (k = 1 to N), where N is the window width of the smoothing filter algorithm. avg This represents the average value of the electrical quantity after smoothing and filtering. This processing method can filter out interference signals. The value of N can be adjusted according to the FPGA sampling rate, for example, N is set to 20. In addition, if the calculated average value of the electrical quantity exceeds the system set value, such as 1.5 times the rated current, that is, 150A, a blocking command is immediately sent to the F6 module, stopping the output of the PWM control signal to ensure system safety.

[0113] In addition, the F4 module also needs to complete the calculation of the rate of change of electrical quantities according to formula (2).

[0114]

[0115] In formula (2), x i is the current sampling value of the electrical quantity, x i-w is the sampling value of the first w points, w is usually 2 or 3, x d It can characterize the rate of change of the electrical quantity. For example, the IGBT device in this project, such as Figure 7 As shown, the rated current of the device is 1200A, but when the current exceeds 2400A, the device can only withstand it for 1ms. If the DSP sampling rate is used, it is difficult to achieve efficient protection of the IGBT.

[0116] However, after processing with formula (2), the system voltage and current change rate can be known in advance. By combining the current sampling current value and the change rate for judgment, the device control can be completed more quickly. For example, the F4 module can quickly reduce the duty cycle to achieve the purpose of protecting the device safety.

[0117] (2-3) Module F3 specifically samples the switch input signal M times continuously and determines the sampled values. If the external switch is a fast-response component such as a button, M can be approximately 5 times. If the external switch is a component with a longer response time, such as a contactor, M can be 20 to 100 times. Once the M value is determined, if one or more of the M sampling results show a low level, it indicates jitter and instability in the input signal. If all M sampling results are high, the switch input is determined to be valid. This processing method effectively eliminates interference signals in high-power environments.

[0118] The above steps (2-1), (2-2), and (2-3) are completed in parallel inside the FPGA.

[0119] (3) After obtaining the data from the above modules, the FPGA completes the various algorithms of the F4 and F5 modules, as follows:

[0120] (3-1) Specifically, the closed-loop control algorithm within module F4 can be a traditional PID algorithm, a fuzzy control algorithm, an artificial neural network control algorithm, an artificial particle swarm control algorithm, a multi-objective optimization control algorithm, or the like. Through this closed-loop control, the duty cycle required to be output by devices S1, S2, S3, and S4 is determined. Furthermore, the duty cycle must satisfy the constraints described in formula (3).

[0121]

[0122] In formula 3, Ds x, x = 1, 2, 3, 4, represents the duty cycle of each switching device. In high-power applications, to ensure proper device switching, the minimum pulse width is set much higher than in low-voltage applications, typically 50µs to 100µs. In the early stages of closed-loop control, the duty cycle can remain below the minimum pulse width for extended periods, causing the system to fail. To address this issue, the control system employs an optimization approach: when the calculated pulse width is less than 1 / 2 the minimum pulse width, the duty cycle is set to 0. When the calculated pulse width is greater than 1 / 2 the minimum pulse width but less than the minimum pulse width, the duty cycle is set to the time corresponding to the minimum pulse width. In module F2, if the calculated rate of change of the electrical quantity exceeds the set value, the duty cycle is set to the time corresponding to the minimum pulse width. When the calculated pulse width exceeds the maximum pulse width, the duty cycle is set to the time corresponding to the maximum pulse width. In other cases, the duty cycle is the value calculated by closed-loop control. After calculating the duty cycle of each device, the F4 module sends the value to the F6 module, which completes the device PWM control signal output based on the circuit operating status and energy flow direction.

[0123] (3-2) Module F5 specifically receives the signals from modules F1 and F3 and performs an AND operation on them. Only when the two input signals are identical does module F5 send an energy flow direction instruction to module F6.

[0124] (4) After modules F4 and F5 are completed, the data is further passed to module F6, which controls the four switching devices in the bidirectional DC / DC circuit. The FPGA calculates the PWM control period based on the switching frequency and the system clock frequency according to formula (4).

[0125]

[0126] Where PWM_TM is the total number of clocks per switching cycle, f CLK is the FPGA clock cycle, f PWM is the switching frequency of the power device. PWM_TM is calculated by formula (4). The system counts based on the FPGA clock and generates a start signal when the value reaches PWM_TM. For example, the switching frequency f PWM The FPGA clock frequency is 50MHz, and the value of PWM_TM is 50000.

[0127] In the PWM control of each device, the size of the on-time counter of each switching device can be calculated using formula (5).

[0128] PWM_S1_Counter=Ds1×PWM_TM (5)

[0129] Taking the switch device S1 as an example, when the device duty cycle Ds1 is 0.5, the switch counter value is 25000. When each PWM start signal arrives, the output level of the S1 control signal is set to a high level, that is, the switch device is turned on. After that, the system uses the FPGA clock as the basis and counts at each rising edge of the system clock. When the count value reaches 25000, the output level of the S1 control signal is set to a low level, that is, the switch device is turned off. This cycle is repeated to achieve uninterrupted control of the system. The PWM control method of the switch devices S2, S3, and S4 is consistent with the PWM control method of the switch device S1. Which device is specifically controlled is selected according to the rules in Table 2. When energy flows into the device, the system works at Figure 2 In the working state shown, when energy flows out of the device, the system works in Figure 3 The working status shown.

[0130] (5) Module F7 specifically checks the feedback signals of switching devices S1, S2, S3, and S4 using the FPGA clock signal frequency as the sampling frequency. If the feedback signal of any device disappears for a set time (typically 200ns to 400ns, but adjustable based on the FPGA clock signal period), it issues a PWM output lockout command to module F6, shutting down the PWM control signal outputs of all devices and simultaneously feeding back fault information to the top-level controller D1. Compared to microprocessor sampling at the millisecond level, FPGA processing of fault feedback signals allows for a much faster response time.

[0131] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A control system for a high-power bidirectional DC / DC converter circuit, characterized in that: include: A top-level controller D1, an AD sampling circuit S1, a switching input circuit K1, and an FPGA chip communicatively connected to the top-level controller D1, the AD sampling circuit S1, and the switching input circuit K1; The top-level controller D1 is used to complete the detection of various electrical quantities and switching quantities of the system, calculate the grid-connected power supply terminal current, DC bus voltage, and energy storage terminal current of the DC / DC conversion circuit, and send control commands including the grid-connected power supply terminal current, DC bus voltage, and energy storage terminal current target parameters to the FPGA chip; The FPGA chip comprises: The F1 module is used to receive control commands sent by the top-level controller D1, complete control data validation and processing, and if the data is correct, send the data to the F4 module and send the energy flow direction to the F5 module; The F2 module is connected to the AD sampling circuit S1 and is used to perform high-speed sampling of the power supply end current, DC bus current, and energy storage end current through the AD sampling circuit S1 to complete the reading and processing of electrical quantities, and obtain the actual sampling value of the system electrical quantity, and provide it to the F4 module for use; The F3 module is connected to the switch input circuit K1 and is used to complete the switch input detection and determine whether the switch input is valid; The F4 module is connected to the F1 and F2 modules and is used to receive control commands from the F1 module and actual sampling values of electrical quantities from the F2 module. It calculates the duty cycle of the switching devices S1, S2, S3, and S4 in the high-power bidirectional DC / DC conversion circuit within the F4 module and sends it to the F6 module. The F5 module is connected to the F1 module and the F3 module, and is used to receive information from the F1 module and the F3 module, determine the energy flow direction of the bidirectional DC / DC conversion module, and send a flow direction instruction to the F6 module when the two input signals are exactly the same; The F6 module is connected to the F4 and F5 modules and is used to output the PWM control signal of the device according to the circuit operation status and the direction of energy flow; The F7 module is connected to the F6 module and the top-level controller D1. When a fault occurs in the switching devices S1, S2, S3, and S4, it sends a PWM output blocking command to the F6 module to shut down the PWM control signal output of all devices and simultaneously feeds back the fault information to the top-level controller D1.

2. The control system of the high-power bidirectional DC / DC converter circuit according to claim 1, characterized in that: The switch input circuit K1 is used to determine the switch signal of the energy flow direction and transmit the switch signal of the energy flow direction to the FPGA chip and the top-level controller D1.

3. The control system of the high-power bidirectional DC / DC converter circuit according to claim 1, characterized in that: The F1 module completes control data validation and processing, specifically including: receiving the input current, DC bus voltage, energy storage current target parameters, and the CRC validation value of the target parameters from the top-level controller D1, and then obtaining the validation value of the target parameter through the same CRC validation algorithm. If the calculated validation value is inconsistent with the validation value sent by the top-level controller, a resend request is made. If they are consistent, it means that the received data is correct, and the target parameter is passed to module F4.

4. The control system of the high-power bidirectional DC / DC converter circuit according to claim 1, characterized in that: The F2 module is also used to perform smoothing and filtering calculations on the sampled voltage and current parameters. The typical algorithm is shown in formula (1): （1）； Where x k Represents the discrete sampling value of each electrical quantity, k=1~N, N is the window width of the smoothing filter algorithm, x avg Indicates the average value of the electrical quantity obtained after smoothing and filtering. If the calculated average value of the electrical quantity exceeds the system set value, a blocking command is sent to the F6 module to stop the output of the PWM control signal; Then the rate of change of electrical quantities is calculated. The typical algorithm is as follows: （2）； In formula (2), x i is the current sampling value of the electrical quantity, x i-w is the sampling value of the first w points, w is 2 or 3, x d Characterizes the rate of change of the electrical quantity. If the rate of change exceeds the set value, the F4 module is controlled to quickly reduce the duty cycle to protect the safety of the device.

5. The control system of the high-power bidirectional DC / DC converter circuit according to claim 1, characterized in that: The F3 module completes the input detection of the switching quantity, specifically including: sampling the switching input signal of the switching input circuit K1 continuously M times, and judging the sampling value. If one or more levels appear low in the M sampling results, it means that the input signal is jittery and unstable. If the results of the M samplings are all high, it is determined that the switching input is valid.

6. The control system of the high-power bidirectional DC / DC converter circuit according to claim 4, characterized in that: The F4 module completes the duty cycle calculation of the switching devices S1, S2, S3, and S4, specifically including: using the internal closed-loop control algorithm to obtain the duty cycle that the S1, S2, S3, and S4 devices need to output. The duty cycle needs to meet the constraint condition of formula (3): （3）； In formula (3), Ds x , x=1, 2, 3, 4, represents the duty cycle of each switching device. When the calculated pulse width is less than 1 / 2 times the minimum pulse width, the duty cycle is 0; when the calculated pulse width is greater than 1 / 2 times the minimum pulse width but less than the minimum pulse width, the duty cycle is set to the time corresponding to the minimum pulse width; when in the F2 module, the calculated rate of change of the electrical quantity is greater than the set value, the duty cycle is set to the time corresponding to the minimum pulse width; when the calculated pulse width is greater than the maximum pulse width, the duty cycle is set to the time corresponding to the maximum pulse width; in other cases, the duty cycle is the calculated value of the closed-loop control.

7. A control method for a high-power bidirectional DC / DC converter circuit, characterized in that: The method is performed using the system according to any one of claims 1 to 6, comprising the steps of: The top-level controller D1 completes the detection of various electrical quantities and switching quantities of the system, calculates the grid-connected power supply terminal current, DC bus voltage, and energy storage terminal current of the DC / DC conversion circuit, and sends a control command including the grid-connected power supply terminal current, DC bus voltage, and energy storage terminal current target parameters to the FPGA chip; The F1 module in the PGA chip receives the control command sent by the top-level controller D1, completes the control data validation and processing, and if the data is correct, sends the data to the F4 module and sends the energy flow direction to the F5 module at the same time; The F2 module uses the AD sampling circuit S1 to perform high-speed sampling of the power supply current, DC bus current, and energy storage current, completing the reading and processing of electrical quantities, and obtains the actual sampling value of the system electrical quantity, which is provided to the F4 module for use; The F3 module completes the input detection of the switch quantity to determine whether the switch quantity input is valid; The F4 module receives control commands from the F1 module and actual sampling values of electrical quantities from the F2 module. It calculates the duty cycle of the switching devices S1, S2, S3, and S4 in the high-power bidirectional DC / DC converter circuit and sends it to the F6 module. The F5 module receives information from the F1 and F3 modules, determines the energy flow direction of the bidirectional DC / DC converter module, and sends a flow direction instruction to the F6 module when the two input signals are exactly the same; The F6 module completes the device PWM control signal output according to the circuit operation status and energy flow direction; When a fault occurs in the switching devices S1, S2, S3, and S4, the F7 module sends a PWM output blocking command to the F6 module to shut down the PWM control signal outputs of all devices and simultaneously feeds back the fault information to the top-level controller D1.

8. The control method of a high-power bidirectional DC / DC converter circuit according to claim 7, wherein: It also includes: F2 module performs smoothing and filtering calculation on the sampled voltage and current parameters. The typical algorithm is as follows: （1）； Where x k Represents the discrete sampling value of each electrical quantity, k=1~N, N is the window width of the smoothing filter algorithm, x avg Indicates the average value of the electrical quantity obtained after smoothing and filtering. If the calculated average value of the electrical quantity exceeds the system set value, a blocking command is sent to the F6 module to stop the output of the PWM control signal; Then the rate of change of electrical quantities is calculated. The typical algorithm is as follows: （2）； In formula (2), x i is the current sampling value of the electrical quantity, x i-w is the sampling value of the first w points, w is 2 or 3, x d Characterizes the rate of change of the electrical quantity. If the rate of change exceeds the set value, the F4 module is controlled to quickly reduce the duty cycle to protect the safety of the device.

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