A patterning method, a patterned structure and a semiconductor device

Abstract

The application discloses a patterning method, a patterning structure and a semiconductor device. The patterning method comprises the following steps: providing a substrate; forming a patterned epitaxy-induced structure on a surface of the substrate, the patterned epitaxy-induced structure comprising first intervals and first protrusions spaced by the first intervals, and a material of the first protrusions being block copolymers; filling an inducing layer in the first intervals, and performing directional self-assembly on the block copolymers to form a plurality of modified regions; and selectively removing part of the modified regions in the block copolymers to form a patterning structure, and a size of an interval of the patterning structure being the same as a size of the first intervals. The patterning method and the structure can improve space utilization of the semiconductor device when applied to production of the semiconductor device.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device manufacturing technology, and more specifically to a patterning method, a patterned structure, and a semiconductor device. Background Technology

[0002] As the integration of semiconductor devices increases, the overall chip area gradually increases with the increase in memory capacity. However, the area of ​​the layout pattern of each memory cell in a semiconductor device is actually getting smaller and smaller. The pitch of the layout pattern, such as the critical dimension (CD) of a pattern or the spacing between patterns, is getting smaller and smaller as semiconductor devices shrink.

[0003] Directed self-assembly (DSA) technology involves depositing block copolymers (BCPs) or polymer mixtures onto a substrate, typically using spin coating, followed by an annealing process to "direct" the formation of an ordered structure. Under certain conditions, the blocks of this copolymer phase separate into microdomains (also called "domains"), and in this process, nanoscale features of different chemical compositions can be formed. Therefore, DSA technology can be used to create pitch patterns with nanoscale features. However, the critical dimensions or spacing of patterns produced by existing DSA technologies remain relatively large, hindering further breakthroughs. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a patterning method, a patterned structure, and a semiconductor device to form a patterned structure with a critical dimension of less than 28 nm.

[0005] To achieve the above and other related objectives, the present invention provides a patterning method, specifically comprising the following steps:

[0006] Provide a substrate;

[0007] A patterned epitaxial induced structure is formed on one surface of a substrate. The patterned epitaxial induced structure includes a first spacer and a first protrusion spaced apart by the first spacer. The material of the first protrusion is a block copolymer.

[0008] An induction layer is filled in the first interval, and the block copolymer forming the first protrusion is oriented to self-assemble to form multiple modified regions, wherein the material of the induction layer is the same as the properties of a segment of the block copolymer.

[0009] Selectively removing some modified regions from the block copolymer to form a patterned structure, wherein the spacing size of the patterned structure is the same as the size of the first spacing.

[0010] Optionally, a patterned epitaxial induction structure is formed on one surface of the substrate. The patterned epitaxial induction structure includes a first spacer and first protrusions spaced apart by the first spacer, comprising:

[0011] A patterned structure is formed on one surface of a substrate by nanoimprinting. The patterned structure includes first protrusions spaced apart by a first interval.

[0012] A dielectric layer is filled into the first gap to form a second protrusion, and the first protrusion is removed to form a second gap;

[0013] The second spacer is filled with a block copolymer to form a first protrusion, and the second protrusion is removed to form the first spacer.

[0014] Optionally, the size of the first gap is between 28 nm.

[0015] Optionally, the size of the first gap is between 5nm and 28nm.

[0016] Optionally, the size of the first gap is less than 5 nm.

[0017] Optionally, the molecular weight of the block copolymer is between 5,000 and 7,000, and the value of the Flory-Hutchins parameter X1 of the block copolymer is between 0.18 and 0.20.

[0018] Optionally, the block copolymer forming the first protrusion is directionally self-assembled to form multiple modified regions, including:

[0019] Annealing the block copolymer causes the polymer materials in the block copolymer to undergo self-assembly and arrangement.

[0020] Optionally, the modified region is formed into a first modified region and a second modified region, and the material of the inducing layer is the same as the material of the first modified region or the second modified region.

[0021] Optionally, selective removal of certain modified regions from the block copolymer to form a patterned structure includes:

[0022] Wet etching or dry etching methods are used to selectively remove some of the modified areas.

[0023] Alternatively, the co-polymer includes polystyrene-b-polycarbonate.

[0024] Optionally, the block copolymer is polystyrene-b-polycarbonate, and the block copolymer is annealed to induce self-assembly and arrangement of the polymer materials in the block copolymer, including:

[0025] The polystyrene-b-polycarbonate is annealed to form a first modified region composed of polystyrene and a second modified region composed of polycarbonate.

[0026] Optionally, selective removal of certain modified regions from the block copolymer to form a patterned structure includes:

[0027] The second modification zone, composed of polycarbonate, is selectively removed to form a patterned structure.

[0028] Alternatively, the material of the inducing layer may include polystyrene.

[0029] The present invention also provides a patterned structure, which is formed using any of the patterning methods described above. The present invention also provides a semiconductor device having a first metal interconnect layer structure, a Fin structure, or a gate structure, wherein the first metal interconnect layer structure, Fin structure, or gate structure utilizes the patterned structure described above.

[0030] As described above, the patterning method, patterned structure, and semiconductor device of the present invention have at least the following beneficial effects:

[0031] The patterning method described in this invention first forms a patterned epitaxial induced structure with a spacing of less than 28 nm on the surface of a substrate. Based on this patterned epitaxial structure, the intercalation copolymers within the patterned epitaxial induced structure undergo directional self-assembly, thereby forming a patterned structure with a size of less than 28 nm. This patterned structure can improve the space utilization of semiconductor devices when applied to their production.

[0032] Furthermore, the block copolymer used in the patterning method of this invention is polystyrene-b-polycarbonate. The interfacial energy of this block copolymer during directional self-assembly is the same as that of the substrate, thus achieving stable micro-phase separation without the need for substrate neutralization treatment. Therefore, this invention eliminates the need for a neutral layer that alters the substrate surface energy, simplifying the process and reducing production costs.

[0033] Furthermore, in the patterning method of the present invention, a first pattern structure that is not easily deformable is first formed, and then a second pattern structure is formed on the basis of the first pattern structure. The second pattern structure is then transferred to form a pattern epitaxial induced structure formed by block copolymer material. Thus, the present invention minimizes the etching process of the pattern epitaxial induced structure and block copolymer, and avoids the adverse effects of pattern irregularity on small-size processes.

[0034] The patterned structure and semiconductor device described in this invention are fabricated using the above-described patterning method and also possess the aforementioned technical effects. Attached Figure Description

[0035] Figure 1 This is a flowchart of the patterning method described in an embodiment of the present invention;

[0036] Figure 2 This is a schematic diagram of the structure after a hard mask layer and a nanoimprint layer are sequentially formed on a substrate in an embodiment of the present invention;

[0037] Figure 3 This is a schematic diagram of the structure of the nanoimprinted layer after it has been imprinted using nanoimprinting in an embodiment of the present invention;

[0038] Figure 4 This is a schematic diagram of the structure after etching the hard mask layer in an embodiment of the present invention;

[0039] Figure 5 and Figure 6 This is a schematic diagram of the structure after filling the first gap' of the hard mask layer with a dielectric layer in an embodiment of the present invention;

[0040] Figure 7 This is a schematic diagram of the structure after removing the first protrusion formed by the hard mask layer in an embodiment of the present invention;

[0041] Figure 8 This is a schematic diagram of the structure after filling the second interval with the intercalated copolymer in an embodiment of the present invention;

[0042] Figure 9 This is a schematic diagram of the structure after removing the second protrusion to form the first gap in an embodiment of the present invention;

[0043] Figure 10 This is a schematic diagram of the structure after the induction layer is formed in the first interval in an embodiment of the present invention;

[0044] Figure 11 This is a schematic diagram of the structure after the chimeric copolymer is directionally self-assembled to form multiple modified regions in an embodiment of the present invention;

[0045] Figure 12 This is a schematic diagram of the structure after removing part of the modified region in an embodiment of the present invention.

[0046] List of reference numerals in the attached diagram:

[0047] 100 substrate

[0048] 200 hard mask layers

[0049] 211 First protrusion'

[0050] 212 First Interval'

[0051] 300 nm Imprinted Layer

[0052] 301 Imprinting Area

[0053] 302 Non-printing area

[0054] 400 dielectric layer

[0055] 411 Second protrusion

[0056] 412 Second Interval

[0057] 500 block copolymer

[0058] 510 First protrusion

[0059] 512 First Interval

[0060] 600 Induction Layer

[0061] 701 First Modification Zone

[0062] 702 Second Modification Zone

[0063] 801 Third protrusion

[0064] 802 Third Interval Detailed Implementation

[0065] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0066] It should be understood that the illustrations provided in the embodiments of this invention are merely schematic representations of the basic concept of the invention. Although the illustrations only show components relevant to the invention and are not drawn according to the actual number, shape, and size of components in implementation, the shape, quantity, and proportion of each component can be arbitrarily changed in actual implementation, and the component layout may also be more complex. The structures, proportions, sizes, etc., shown in the accompanying drawings are only used to complement the content disclosed in the specification for those skilled in the art to understand and read, and are not intended to limit the conditions under which this application can be implemented. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportional relationships, or adjustments to the size, without affecting the effects and objectives that the invention can produce, should still fall within the scope of the technical content disclosed in this application.

[0067] Block copolymers are polymers formed by covalently linking two or more chemically distinct polymer segments. Due to the spontaneous movement of molecules in different block copolymers, they reach thermal equilibrium and arrange themselves into a periodically ordered structure. This process is called the self-assembly of block copolymers. Currently, when using the self-assembled structure of block copolymers as a template for etching substrates, the self-assembled structure must form a vertical structure to achieve effective selective etching of the substrate. To enable vertical phase separation of the block copolymer, a neutral layer is typically formed between the substrate and the block copolymer to neutralize the substrate, thereby making the surface energy of the substrate equal to that of the block copolymer, achieving vertical phase separation. However, different block copolymers require neutral layer materials with different compositions, and the thickness and density of the neutral layer must be precisely controlled to accurately regulate the surface energy and achieve optimal phase separation. Therefore, the process for preparing the neutral layer is relatively complex and costly.

[0068] To address the technical problems existing in the background art and the aforementioned technical problems, this embodiment provides a patterning method that can form a patterned structure with a critical dimension of less than 28nm, and this patterning method can achieve a good phase separation effect without setting a neutral layer during the patterning process.

[0069] The patterning method described in this embodiment refers to... Figure 1 ,include:

[0070] S101: Provides a substrate;

[0071] Reference Figure 2 A substrate 100 is provided, which includes, but is not limited to, Si substrate, Ge substrate, SiGe substrate, SiC substrate, etc. In this embodiment, a silicon substrate is used as an example for illustration.

[0072] S102: A patterned epitaxial induced structure is formed on one surface of a substrate. The patterned epitaxial induced structure includes a first spacer and a first protrusion spaced apart by the first spacer. The material of the first protrusion is a chimeric copolymer.

[0073] Specifically, refer to Figure 2A hard mask layer 200 is formed on one surface of a substrate 100, and a nanoimprint layer 300 is formed above the hard mask layer 200. The hard mask layer 200 is made of one or more of the following materials: a nitride layer, silicon oxynitride, and metal nitride. The nanoimprint layer 300 can be a photoresist layer, or a combination of one or more of the following: a thermoplastic polymer and a curable resin. In this embodiment, the hard mask layer 200 is a titanium nitride layer, and the nanoimprint layer 300 is a photoresist layer. The methods for forming the hard mask layer 200 and the nanoimprint layer 300 may include spin coating, immersion coating, roll coating, physical vapor deposition (PVD), or other coating methods.

[0074] Reference Figure 3 Imprinting is used to form imprinted regions 301 and non-imprinted regions 302 within the nanoimprinted layer 300. Nanoimprinting can be thermal imprinting, ultraviolet imprinting, etc. In this embodiment, nanoimprinting is performed using thermal imprinting. During the imprinting process, a template with an imprinting surface is first provided. This template can be made of a rigid or semi-rigid material. The imprinting surface of the template has a nanoscale imprinting pattern, with the nanoimprint size of the imprinting pattern being less than 28 nm. After nanoimprinting is completed, imprinted regions 301 and non-imprinted regions 302 are formed on the nanoimprinted layer 300. The imprinting size of the imprinted region 301 is less than 28 nm.

[0075] Referring to 3 and 4, the hard mask layer 200 is etched along the window formed in the imprinted region 301 to the surface of the substrate 100, and the nanoimprinted layer 300 is removed to form a first patterned structure. This first patterned structure includes a first spacer 212 and first protrusions 211 spaced apart by the first spacer 212, the size of which is less than 28 nm. Optionally, the size of the first spacer 212 is between 5 nm and 28 nm. Optionally, the size of the first spacer 212 is less than 5 nm.

[0076] Block copolymer materials or other low-hardness material layers are prone to shrinkage during etching processes, leading to uneven surfaces. In this embodiment, a hard mask layer is formed below the photoresist layer. This hard mask layer is used for pattern transfer to prevent pattern shrinkage caused by direct etching of the block copolymer or other material layers, thus avoiding the formation of uneven pattern structures. To further prevent pattern shrinkage and pattern defects caused by uneven pattern formation during pattern preparation, this embodiment forms a second pattern structure based on the first pattern structure, and then transfers the second pattern structure to form a pattern epitaxial induced structure formed by the block copolymer material, thereby avoiding the adverse effects of pattern irregularities on small-size processes. Specifically, refer to 5 and Figure 6A dielectric layer 400 is filled within the first interval 212 of the first patterned structure to form a second protrusion 412. During this process, any excess portion of the deposited dielectric layer 400 needs to be removed by chemical mechanical polishing. The first protrusion 211 is removed to form the second interval, ultimately forming the second patterned structure, as shown below. Figure 7 As shown. The material of the dielectric layer 400 can be any material suitable for pattern transfer. In this embodiment, the material of the dielectric layer 400 is silicon dioxide.

[0077] The second graphic structure is transferred to form a graphic extension-induced structure. Specifically, refer to... Figure 8 Block copolymer 500 is filled within the second interval of the second pattern structure to form a first protrusion 511, as shown in the figure. Figure 9 The second protrusion 411 is removed to form the first spacer 512. Optionally, the molecular weight of the block copolymer 500 is between 5000 and 7000, and the Flory-Hirkins parameter X1 of the block copolymer 500 is between 0.18 and 0.20. Since the molecular weight and Flory-Hirkins parameter X1 of the block copolymer 500 affect the micro-phase separation during directional self-assembly, and can influence the size of the modified region, selecting a molecular weight and Flory-Hirkins parameter X1 within the aforementioned range enables the block copolymer 500 to form a micro-phase separation with a critical size less than 28 nm during phase separation. In this embodiment, the block copolymer 500 is a diblock copolymer, its material is polystyrene-b-polycarbonate, its molecular weight is 7000, and its Flory-Hirkins parameter X1 is 0.19.

[0078] S103: Fill the first interval with an induction layer and perform directional self-assembly of the block copolymer forming the first protrusion to form multiple modified regions, wherein the material of the induction layer has the same properties as a segment of the block copolymer;

[0079] Specifically, refer to Figure 10 An induction layer 600 is filled within the first interval 512. The material of the induction layer 600 has the same properties as one segment of the block copolymer 500. Thus, during directional self-assembly, the induction layer 600 can induce a surrounding phase separation structure, causing the formation of a copolymer with different properties around it. In this embodiment, the material of the induction layer 600 is polystyrene.

[0080] Reference Figure 11Under the action of the inducing layer 600, the block copolymer 500 forming the first protrusion 511 undergoes directional self-assembly to form multiple modified regions. Specifically, the block copolymer 500 is annealed to allow the polymer materials in the block copolymer 500 to undergo autonomous polymerization and arrangement. The modified regions include a first modified region 701 with a first property and a second modified region 702 with a second property, wherein the first modified region 701 and the second modified region 702 have different physicochemical properties. For example, the first property and the second property may independently include hydrophilic properties, hydrophobic properties, temperature-sensitive properties, or acid-base-sensitive properties, respectively. In this embodiment, polystyrene-b-polycarbonate is annealed to form a first modified region 701 composed of polystyrene and a second modified region 702 composed of polycarbonate. Because the polystyrene-b-polycarbonate used in this embodiment has a small molecular weight and a high value for the Florey-Hutchins parameter X1, the surface energy of the block copolymer 500 is almost equal to the interfacial energy of the substrate 100 during the annealing process, thus exhibiting good micro-phase separation capability.

[0081] S104: Selectively remove some modified regions from the block copolymer to form a patterned structure, wherein the spacing size of the patterned structure is the same as the size of the first spacing.

[0082] The modified regions of the block copolymer 500 are selectively removed using wet or dry etching methods to form a patterned structure. Annealing improves the etching resistance of the block copolymer, enabling the formation of regular patterned surfaces. In this embodiment, reference is made to... Figure 12 The second modified region 702, composed of polycarbonate, is selectively removed to form a patterned structure. This patterned structure includes a third spacer 802 and third protrusions 801 spaced apart by the third spacer 802, the third spacer 802 having the same size as the first spacer 512. The size of the third spacer 802 is less than 28 nm. Optionally, the size of the third spacer 802 is between 5 nm and 28 nm. Optionally, the size of the third spacer 802 is less than 5 nm.

[0083] An embodiment of the present invention also provides a patterned structure, which is formed using the above-described patterning method.

[0084] The key dimensions of the above-mentioned patterned structure are less than 28nm, which can be used as a mask layer for substrate 100 in the semiconductor field to etch substrate 100 or other semiconductor material layers. For example, an embodiment of the present invention also provides a semiconductor device having a first metal interconnect layer structure, a Fin structure or a gate structure. The first metal interconnect layer structure, Fin structure or gate structure uses the above-mentioned patterned structure, thereby improving the space utilization of the semiconductor device.

[0085] In summary, the patterning method of this invention first forms a patterned epitaxial induced structure with a spacing of less than 28 nm on the surface of a substrate. Based on this patterned epitaxial structure, the intercalation copolymers within the patterned epitaxial induced structure undergo directional self-assembly, thereby forming a patterned structure with a size of less than 28 nm. This patterned structure can improve the space utilization of semiconductor devices when applied to their production.

[0086] Furthermore, the block copolymer used in the patterning method of this invention is polystyrene-b-polycarbonate. The interfacial energy of this block copolymer during directional self-assembly is the same as that of the substrate, thus achieving stable micro-phase separation without the need for substrate neutralization treatment. Therefore, this invention eliminates the need for a neutral layer that alters the substrate surface energy, simplifying the process and reducing production costs.

[0087] Furthermore, in the patterning method of the present invention, a first pattern structure that is not easily deformable is first formed, and then a second pattern structure is formed on the basis of the first pattern structure. The second pattern structure is then transferred to form a pattern epitaxial induced structure formed by block copolymer material. Thus, the present invention minimizes the etching process of the pattern epitaxial induced structure and block copolymer, and avoids the adverse effects of pattern irregularity on small-size processes.

[0088] The patterned structure and semiconductor device described in this invention are manufactured using the above-described patterning method and also possess the aforementioned technical effects.

[0089] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A patterning method, characterized in that, Includes the following steps: Provide a substrate; A patterned epitaxial induced structure is formed on one surface of the substrate. The patterned epitaxial induced structure includes a first spacer and a first protrusion spaced apart by the first spacer. The material of the first protrusion is a block copolymer, and the block copolymer is polystyrene-b-polycarbonate. An induction layer is filled within the first interval, and the polystyrene-b-polycarbonate is annealed to form multiple modified regions, the multiple modified regions including a first modified region composed of polystyrene and a second modified region composed of polycarbonate; before the annealing process, no neutral layer for changing the surface energy of the substrate is provided; wherein, the material of the induction layer has the same properties as a segment of the copolymer in the block copolymer, and the material of the induction layer includes polystyrene; The second modified region, composed of polycarbonate, is selectively removed to form a patterned structure, wherein the spacing size of the patterned structure is the same as that of the first spacing.

2. The patterning method according to claim 1, characterized in that, A patterned epitaxial induction structure is formed on one surface of the substrate, the patterned epitaxial induction structure including a first spacer and first protrusions spaced apart by the first spacer, comprising: A patterned structure is formed on one surface of the substrate by nanoimprinting, the patterned structure including first protrusions spaced apart by a first interval; A dielectric layer is filled within the first gap to form a second protrusion, and the first protrusion is removed to form a second gap; The second spacer is filled with a block copolymer to form a first protrusion, and the second protrusion is removed to form the first spacer.

3. The patterning method according to claim 1, characterized in that, The size of the first interval is less than 28 nm.

4. The patterning method according to claim 1, characterized in that, The size of the first interval is between 5 nm and 28 nm.

5. The patterning method according to claim 1, characterized in that, The size of the first interval is less than 5 nm.

6. The patterning method according to claim 1, characterized in that, The molecular weight of the block copolymer is between 5000 and 7000, and the value of the Flory-Hutchins parameter X1 of the block copolymer is between 0.18 and 0.

20.

7. The patterning method according to claim 1, characterized in that, The block copolymer forming the first protrusion undergoes directional self-assembly to form multiple modified regions, including: The block copolymer is annealed to induce self-aggregation and arrangement of the polymer materials in the block copolymer.

8. The patterning method according to claim 1, characterized in that, The modified region is formed into a first modified region and a second modified region, and the material of the inducing layer is the same as the material of the first modified region or the second modified region.

9. The patterning method according to claim 1, characterized in that, Selectively removing a portion of the modified regions in the block copolymer to form a patterned structure includes: The modified regions are selectively removed using wet etching or dry etching methods.

10. A patterned structure, characterized in that, The patterned structure is formed using any of the patterning methods described in claims 1 to 9.

11. A semiconductor device having a first metal interconnect layer structure, a Fin structure, or a gate structure, characterized in that, The first metal interconnect layer structure, Fin structure, or gate structure applies the patterned structure as described in claim 10.

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