Modeling method, device and computer readable storage medium of IGBT

Abstract

The application provides an IGBT modeling method, device and computer readable storage medium, the method comprises the following steps: obtaining a voltage-current (I-V) model and a capacitance-voltage (C-V) model, both independent variables comprising a first voltage and a second voltage, the first voltage being the voltage between the gate and the emitter, and the second voltage being the voltage between the collector and the emitter, the I-V model representing the output current characteristics of the IGBT, and the C-V model representing the three nonlinear capacitance characteristics of the IGBT; due to the difference between the IGBT and the ordinary field effect transistor, the second voltage in the I-V model is modified to a certain extent. The IGBT modeling method of the application is not limited to the type of IGBT, is universal, and has strong implementability.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power electronics simulation, in particular, to an IGBT modeling method and device, a computer readable storage medium, a processor and an electronic device. BACKGROUND

[0002] Current IGBT (Insulated Gate Bipolar Transistor) modeling mainly falls into two categories: mechanism (physical model) modeling and behavior modeling.

[0003] Mechanism modeling is mainly based on the internal structure of IGBT and the motion process of carriers to establish a model using the knowledge of semiconductor physics, which can accurately simulate the steady-state and transient characteristics of IGBT. Classic mechanism modeling includes Hefner modeling, etc. Although mechanism modeling is accurate, it has a complex structure, is difficult to extract parameters, has a large amount of calculation and is not easy to converge, and is not suitable for complex circuit simulation.

[0004] Behavior modeling ignores some internal physical mechanisms of IGBT and focuses more on fitting the external characteristics of the device, which can be used for circuit simulation, and the results obtained by the simulation are more accurate than those obtained by ideal switch modeling. Existing behavior modeling is only for specific types (different structures or materials) of IGBT, such as FS IGBT (Field Stop-IGBT), planar gate NPT IGBT (Non-Punch Through-IGBT) or SiC IGBT, and the obtained model lacks the universality of IGBT.

[0005] The above information disclosed in the background section is only used to enhance the understanding of the background of the technology described herein, therefore, the background section can contain some information that is not known to those skilled in the art as prior art in the country. SUMMARY

[0006] The main purpose of the present application is to provide an IGBT modeling method, device, computer readable storage medium, processor and electronic device to solve the problem of lack of universality of the existing IGBT modeling method.

[0007] According to an aspect of the embodiments of the present application, a modeling method of an IGBT is provided, comprising: obtaining a main function and a sub-function, the main function being a function representing an output characteristic of a field effect transistor, the sub-function being a function representing a difference between an output characteristic of the IGBT and the output characteristic of the field effect transistor, the independent variables of the main function and the sub-function both comprising a first voltage and a second voltage, the first voltage being a voltage between a gate and an emitter, the second voltage being a voltage between a collector and the emitter, the dependent variables of the main function and the sub-function both being a predetermined current, the predetermined current being a current between the collector and the emitter; and performing a predetermined processing on the main function and the sub-function to obtain an output characteristic model of the IGBT, the predetermined processing at least comprising an adding processing or a subtracting processing.

[0008] Optionally, the obtaining of the main function and the sub-function comprises: establishing an initial main function according to the output characteristic of the field effect transistor, the initial main function comprising a plurality of first parameters; establishing an initial sub-function according to the difference between the output characteristic of the IGBT and the output characteristic of the field effect transistor, the initial sub-function comprising the plurality of first parameters and a plurality of second parameters, the first parameters and the second parameters both being constant parameters to be determined; obtaining a plurality of sample data of the IGBT, the sample data comprising a gate voltage value, a collector voltage value and an emitter voltage value; substituting the sample data into the initial main function to calculate the plurality of first parameters to obtain the main function; and substituting the sample data into the initial sub-function to calculate the plurality of second parameters to obtain the sub-function.

[0009] Optionally, the establishing of the initial main function according to the output characteristic of the field effect transistor comprises: establishing the initial main function according to the output characteristic of the field effect transistor wherein, V gest = f(V ge2 ), V gest is a piecewise function, V ge1 = V GE -V t , I CE0 is the initial main function, V GE is the first voltage, V CE is the second voltage, V t is a threshold voltage of the IGBT, and β, ω, α, ε and δ are the first parameters.

[0010] Optionally, the initial sub-function is established according to a difference between the output characteristic of the IGBT and the output characteristic of the field effect transistor, comprising: establishing the initial sub-function according to the difference between the output characteristic of the IGBT and the output characteristic of the field effect transistor wherein V gest = f(V ge2 ), V gest is a piecewise function, V ge1 = V GE -V t , I CE1 is the initial sub-function, V GE is the first voltage, V CE is the second voltage, V t is a threshold voltage of the IGBT, β, ω, α, ε and δ are the first parameters, and γ and are the second parameters.

[0011] Optionally, after the output characteristic model of the IGBT is obtained, the method further comprises: determining a transfer characteristic model of the IGBT according to the output characteristic model.

[0012] Optionally, the method further comprises: establishing a first capacitance function with a parasitic capacitance between the gate and the emitter as a dependent variable and the first voltage as an independent variable; establishing a second capacitance function with a parasitic capacitance between the collector and the emitter as a dependent variable and the second voltage as an independent variable; and establishing a third capacitance function with a parasitic capacitance between the gate and the collector as a dependent variable and a voltage between the gate and the collector as an independent variable, the first capacitance function, the second capacitance function and the third capacitance function constituting a capacitance characteristic model of the IGBT.

[0013] Optionally, the first capacitance function is C GE = a + b{1 + tanh[c(V GE +d)]} + e[1-tanh(fV GE )], the second capacitance function is C CE = g + h{1 + tanh[i(V CE +j)]} + k{1 + tanh[l(V CE +m)]}, and the third capacitance function is C GC = n + o{1 + tanh[p(V GC +q)]}, wherein C GE is the parasitic capacitance between the gate and the emitter, V GE is the first voltage, and C CEV is a parasitic capacitance between the gate and the collector, CE V is the second voltage, GC C is a parasitic capacitance between the gate and the collector, GC V is a voltage between the gate and the collector, and a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, and q are constants.

[0014] Optionally, after obtaining the output characteristic model of the IGBT, the method further includes: performing circuit simulation on the IGBT according to the output characteristic model.

[0015] According to another aspect of the embodiments of the present application, there is also provided an IGBT modeling device, comprising: an obtaining unit configured to obtain a main function and a sub-function, the main function being a function representing an output characteristic of a field effect transistor, the sub-function being a function representing a difference between an output characteristic of an IGBT and the output characteristic of the field effect transistor, the independent variables of the main function and the sub-function both including a first voltage and a second voltage, the first voltage being a voltage between a gate and an emitter, the second voltage being a voltage between a collector and the emitter, the dependent variables of the main function and the sub-function both being a predetermined current, the predetermined current being a current between the collector and the emitter; and a processing unit configured to perform a predetermined processing on the main function and the sub-function to obtain an output characteristic model of the IGBT, the predetermined processing at least including an adding processing or a subtracting processing.

[0016] According to still another aspect of the embodiments of the present application, there is also provided a computer readable storage medium, the computer readable storage medium including a stored program, wherein the program performs any of the methods.

[0017] According to still another aspect of the embodiments of the present application, there is also provided a processor, the processor being configured to run a program, wherein the program performs any of the methods when running.

[0018] In the embodiment of the present application, firstly, a main function representing the output characteristic of the FET is obtained, and a sub-function representing the difference between the output characteristics of the IGBT and the field effect transistor is obtained, wherein the independent variables of the main function and the sub-function both include the gate-emitter voltage and the collector-emitter voltage, and the dependent variables of the main function and the sub-function are both the collector-emitter current; then the main function and the sub-function are added or subtracted to obtain the output characteristic model of the IGBT. Compared with the IGBT behavior modeling for the characteristic type in the prior art, the model of the IGBT has poor universality. According to the present application, the main function is obtained according to the existing behavior function representing the FET, the sub-function is obtained according to the difference between the output characteristics of the IGBT and the FET, and then the output characteristic model of the IGBT is obtained by mathematical processing of the main function and the sub-function. The output characteristic model is not limited to the type of the IGBT, has universality, and has strong implementability. BRIEF DESCRIPTION OF DRAWINGS

[0019] The drawings constituting a part of the specification of the present application are used to provide further understanding of the present application, the illustrative embodiments of the present application and the description thereof are used to explain the present application, and do not constitute improper limitation on the present application. In the drawings:

[0020] Figure 1 A flowchart of the modeling method of the IGBT according to the embodiment of the present application is shown;

[0021] Figure 2 An equivalent circuit diagram of the IGBT according to the embodiment of the present application is shown;

[0022] Figure 3 A comparison diagram of the output characteristic model and the measured data according to the embodiment of the present application is shown;

[0023] Figures 4 to 6 Comparison diagrams of the capacitance characteristic model and the measured data according to the embodiment of the present application are shown respectively;

[0024] Figure 7 A schematic diagram of the modeling device of the IGBT according to the embodiment of the present application is shown. DETAILED DESCRIPTION

[0025] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict. The present application will be described in detail below with reference to the drawings and in combination with the embodiments.

[0026] In the following, the technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the drawings in the embodiments of the present application, so that those skilled in the art can better understand the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work should fall within the scope of protection of the present application.

[0027] It should be noted that the terms "first", "second", and the like in the description of the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily have to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0028] It should be understood that when an element (such as a layer, film, region, or substrate) is described as "on" another element, it can be directly on the other element, or there can be an intermediate element. Moreover, in the specification and claims, when an element is described as "connected" to another element, it can be "directly connected" to the other element, or "connected" to the other element through a third element.

[0029] As mentioned in the background, the modeling method of the IGBT in the prior art lacks universality. In order to solve the above problems, in a typical embodiment of the present application, a modeling method, device, computer readable storage medium, processor and electronic equipment of an IGBT are provided.

[0030] According to an embodiment of the present application, a modeling method of an IGBT is provided.

[0031] Figure 1 is a flowchart of the modeling method of the IGBT according to an embodiment of the present application. As shown in Figure 1 the method comprises the following steps:

[0032] In step S101, a main function and a sub-function are obtained. The main function is a function representing an output characteristic of a field-effect transistor (FET), and the sub-function is a function representing a difference between an output characteristic of an IGBT and the output characteristic of the FET. The independent variables of the main function and the sub-function both include a first voltage and a second voltage. The first voltage is a voltage between a gate and an emitter, and the second voltage is a voltage between a collector and the emitter. The dependent variables of the main function and the sub-function are respectively a predetermined current, which is a current between the collector and the emitter.

[0033] Specifically, the main function and the sub-function are obtained by: establishing an initial main function according to an output characteristic of the FET, the initial main function including a plurality of first parameters; establishing an initial sub-function according to a difference between an output characteristic of the IGBT and the output characteristic of the FET, the initial sub-function including the plurality of first parameters and a plurality of second parameters, the first parameters and the second parameters being constant parameters to be determined; obtaining a plurality of sample data of the IGBT, the sample data including a gate voltage value, a collector voltage value and an emitter voltage value; substituting the sample data into the initial main function to calculate the plurality of first parameters, thereby obtaining the main function; and substituting the sample data into the initial sub-function to calculate the plurality of second parameters, thereby obtaining the sub-function.

[0034] In the embodiment of obtaining the main function and the sub-function, the initial main function and the initial sub-function including unknown parameters are established first, and then the parameters are extracted through sample data to obtain fitting parameter values, thereby obtaining the main function and the sub-function, which ensures that the main function and the sub-function are obtained relatively simply.

[0035] Specifically, the parameter extraction is performed through a fitting algorithm, and the fitting parameter values are obtained when a fitting error meets certain conditions. The fitting algorithm includes but is not limited to a nonlinear least square method, a steepest descent method, etc.

[0036] It should be noted that the sample data can be measured data or simulation data.

[0037] In a specific embodiment of the present application, the initial main function is established according to the output characteristic of the FET by: establishing the initial main function according to the output characteristic of the FET wherein V gest =f(V ge2 ), V gest is a piecewise function, V ge1 =V GE -Vt , I CE0 is the initial main function, V GE is the first voltage, V CE is the second voltage, V t is the threshold voltage of the IGBT, β, ω, α, ε and δ are the first parameters.

[0038] According to another specific embodiment of the present application, the initial sub-function is established according to the difference between the output characteristic of the IGBT and the output characteristic of the field effect transistor, including: establishing the initial sub-function according to the difference between the output characteristic of the IGBT and the output characteristic of the field effect transistor wherein V gest = f(V ge2 ), V gest is a piecewise function, V ge1 = V GE -V t , I CE1 is the initial sub-function, V GE is the first voltage, V CE is the second voltage, V t is the threshold voltage of the IGBT, β, ω, α, ε and δ are the first parameters, γ and are the second parameters.

[0039] It should be noted that the main function is not limited to the above specific expression, and can be any suitable function for describing the behavior of the device in the existing FET, such as a function obtained by using a polynomial, Taylor series, and neural network algorithm, etc. The same applies to the sub-function.

[0040] In step S102, the predetermined processing is performed on the main function and the sub-function to obtain the output characteristic model of the IGBT as shown in Figure 2 , and the predetermined processing at least includes addition processing or subtraction processing.

[0041] wherein the output characteristic model is a model describing the functional relationship between the second voltage and the predetermined current of the IGBT with the first voltage of the IGBT as the variable.

[0042] In the IGBT modeling method, a main function representing the output characteristics of the FET is obtained, and a sub-function representing the difference between the output characteristics of the IGBT and the field effect transistor is obtained, wherein the independent variables of the main function and the sub-function include the gate voltage and the emitter voltage and the collector voltage and the emitter voltage, and the dependent variables of the main function and the sub-function are the collector current and the emitter current; then the main function and the sub-function are added or subtracted to obtain the output characteristic model of the IGBT. Compared with the prior art, the IGBT behavior modeling is performed according to the characteristic type, and the model of the IGBT has poor universality. According to the present application, the main function is obtained according to the existing behavior function representing the FET, the sub-function is obtained according to the difference between the output characteristics of the IGBT and the FET, and the output characteristic model of the IGBT is obtained by mathematical processing of the main function and the sub-function. The output characteristic model is not limited to the type of IGBT, has universality, and has strong implementability.

[0043] In addition, after obtaining the output characteristic model of the IGBT, the method further includes: step S103, performing circuit simulation on the IGBT according to the output characteristic model.

[0044] According to the output characteristic model, the circuit simulation of the IGBT can further ensure that the simulation circuit has strong universality, and can be used to systematically, scientifically and reasonably calculate the possible future situations before the production and use of the IGBT, to determine whether it can be normally used, thereby ensuring the accuracy of the IGBT design, helping the optimization of the IGBT, and effectively avoiding the waste of manpower and material resources.

[0045] In actual application, the static characteristics include not only the output characteristics, but also the transfer characteristics and the capacitance characteristics. In order to further facilitate the subsequent complete static characteristic simulation of the IGBT, according to another specific embodiment of the present application, after obtaining the output characteristic model of the IGBT, the method further includes: determining the transfer characteristic model of the IGBT according to the output characteristic model. The transfer characteristic model of the IGBT can be obtained by deforming the output characteristic model, thereby further ensuring the complete simulation of the static characteristics of the IGBT.

[0046] In another embodiment of the present application, the method further comprises: establishing a first capacitance function with the parasitic capacitance between the gate and the emitter as the dependent variable and the first voltage as the independent variable; establishing a second capacitance function with the parasitic capacitance between the collector and the emitter as the dependent variable and the second voltage as the independent variable; and establishing a third capacitance function with the parasitic capacitance between the gate and the collector as the dependent variable and the voltage between the gate and the collector as the independent variable, wherein the first capacitance function, the second capacitance function and the third capacitance function constitute the capacitance characteristic model of the IGBT. The present application further establishes the characteristic model of the parasitic capacitance of the IGBT, which further ensures that the complete static characteristic simulation of the IGBT can be performed according to the established models.

[0047] The first capacitance function, the second capacitance function and the third capacitance function are obtained in the same way, and the obtaining way of the first capacitance function is described below. First, an initial capacitance function with the first voltage as the independent variable and the parasitic capacitance between the gate and the emitter as the dependent variable is established according to the capacitance characteristic of the field effect transistor, wherein the initial capacitance function includes a plurality of position parameters; then, a plurality of position parameters are determined according to the sample set of the IGBT and the initial capacitance function, and the first capacitance function is obtained, wherein the sample set includes a plurality of data groups, and each data group includes the parasitic capacitance between the gate and the emitter and the corresponding first voltage. The sample set can be measured data or simulation data.

[0048] Specifically, the first capacitance function is C GE =a+b{1+tanh[c(V GE +d)]}+e[1-tanh(fV GE )], the second capacitance function is C CE =g+h{1+tanh[i(V CE +j)]}+k{1+tanh[l(V CE +m)]}, and the third capacitance function is C GC =n+o{1+tanh[p(V GC +q)]}, wherein C GE is the parasitic capacitance between the gate and the emitter, V GE is the first voltage, C CE is the parasitic capacitance between the collector and the emitter, V CE is the second voltage, C GC is the parasitic capacitance between the gate and the collector, and V GCFor the voltage between the gate and the collector, a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p and q are constants.

[0049] The comparison chart of the output characteristic model obtained by the IGBT modeling method of the present application and the measured data is shown in Figure 3 The comparison chart of the first capacitance function obtained and the measured data is shown in Figure 4 The comparison chart of the second capacitance function obtained and the measured data is shown in Figure 5 The comparison chart of the third capacitance function obtained and the measured data is shown in Figure 6 It can be seen that the static characteristic model function fitting image error of the IGBT of the present application is small and the precision is high. Since the model does not completely deviate from the physical meaning, the device behavior can be basically guaranteed not to deviate outside the data range. Moreover, compared with the physical model, the model established by the IGBT modeling method of the present application is a behavior model, which has better convergence and faster simulation speed. Figures 3 to 6

[0050] It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described herein can be executed in an order different from that shown herein.

[0051] The embodiment of the present application also provides an IGBT modeling device. It should be noted that the IGBT modeling device of the embodiment of the present application can be used to execute the IGBT modeling method provided by the embodiment of the present application. The IGBT modeling device provided by the embodiment of the present application is introduced as follows.

[0052] Figure 7 is a schematic diagram of the IGBT modeling device according to the embodiment of the present application. As shown in Figure 7 The device comprises:

[0053] The acquisition unit 10 is configured to acquire a main function and a sub-function. The main function is a function representing the output characteristic of the field effect transistor, and the sub-function is a function representing the difference between the output characteristic of the IGBT and the output characteristic of the field effect transistor. The independent variables of the main function and the sub-function both comprise a first voltage and a second voltage. The first voltage is the voltage between the gate and the emitter, and the second voltage is the voltage between the collector and the emitter. The dependent variables of the main function and the sub-function are both predetermined currents. The predetermined current is the current between the collector and the emitter.

[0054] ​Specifically, the obtaining unit comprises: a first establishing module, configured to establish an initial main function according to the output characteristic of the field effect transistor, the initial main function comprising a plurality of first parameters; a second establishing module, configured to establish an initial sub function according to a difference between the output characteristic of the IGBT and the output characteristic of the field effect transistor, the initial sub function comprising the plurality of first parameters and a plurality of second parameters, the first parameters and the second parameters being constant parameters to be determined; an obtaining module, configured to obtain a plurality of sample data of the IGBT, the sample data comprising a gate voltage value, a collector voltage value and an emitter voltage value; a first substituting module, configured to substitute the sample data into the initial main function to calculate the plurality of first parameters, and obtain the main function; and a second substituting module, configured to substitute the sample data into the initial sub function to calculate the plurality of second parameters, and obtain the sub function.

[0055] In the embodiment of obtaining the main function and the sub function, the initial main function and the initial sub function comprising unknown parameters are established first, and then the sample data is used to extract the parameters to obtain the fitting parameter values, so that the main function and the sub function are obtained, and the main function and the sub function are ensured to be obtained relatively simply.

[0056] Specifically, the parameter extraction is performed by a fitting algorithm, and the fitting parameter values are obtained when the fitting error meets certain conditions. The fitting algorithm includes but is not limited to a nonlinear least square method, a steepest descent method, etc.

[0057] It should be noted that the sample data can be measured data or simulation data.

[0058] In a specific embodiment of the present application, the first establishing module comprises: a first establishing submodule, configured to establish the initial main function according to the output characteristic of the field effect transistor wherein, V gest = f(V ge2 ), V gest is a piecewise function, V ge1 = V GE -V t , I CE0 is the initial main function, V GE is the first voltage, V CE is the second voltage, V t is the threshold voltage of the IGBT, and β, ω, α, ε and δ are the first parameters.

[0059] According to yet another specific embodiment of the present application, the second establishing module comprises a second establishing sub-module configured to establish the initial sub-function according to a difference between an output characteristic of the IGBT and an output characteristic of the field effect transistor wherein V gest = f(V ge2 ), V gest is a piecewise function, V ge1 = V GE -V t , I CE1 is the initial sub-function, V GE is the first voltage, V CE is the second voltage, V t is a threshold voltage of the IGBT, and β, ω, α, ε and δ are the first parameters, and γ and are the second parameters.

[0060] It should be noted that the main function is not limited to the specific expression above, but can be any suitable function for describing the behavior of a device in a conventional FET, such as a function obtained using a polynomial, Taylor series, neural network algorithm, etc. The same applies to the sub-function.

[0061] The processing unit 20 is configured to perform a predetermined processing on the main function and the sub-function to obtain an output characteristic model of the IGBT, wherein the predetermined processing at least includes an addition processing or a subtraction processing.

[0062] wherein the output characteristic model is a model describing a functional relationship between the second voltage and the predetermined current of the IGBT with the first voltage of the IGBT as a variable.

[0063] The IGBT modeling device described above includes an acquisition unit configured to acquire a main function representing an output characteristic of a FET and a sub-function representing a difference between an output characteristic of the IGBT and the output characteristic of the FET, wherein the independent variables of the main function and the sub-function both include a gate-emitter voltage and a collector-emitter voltage, and the dependent variables of the main function and the sub-function are both collector-emitter currents; and a processing unit configured to perform addition processing or subtraction processing on the main function and the sub-function to obtain an output characteristic model of the IGBT. Compared with the prior art of modeling the behavior of the IGBT according to the type of the IGBT, the present application obtains the main function according to the existing behavior function representing the FET, obtains the sub-function according to the difference between the output characteristic of the IGBT and the output characteristic of the FET, and then obtains the output characteristic model of the IGBT by performing mathematical processing on the main function and the sub-function. The output characteristic model is not limited to the type of the IGBT and has universality and high implementability.

[0064] In addition, the device further includes an emulation unit configured to perform circuit emulation on the IGBT according to the output characteristic model of the IGBT after the output characteristic model of the IGBT is obtained.

[0065] The circuit emulation on the IGBT according to the output characteristic model can further ensure that the emulation circuit has high universality, and can be used to systematically, scientifically and rationally calculate possible future situations before the IGBT is produced and used, to determine whether the IGBT can be normally used, thereby ensuring the accuracy of the design of the IGBT, helping to optimize the IGBT, and effectively avoiding waste of manpower and material resources.

[0066] In actual application, the static characteristics include not only the output characteristic but also the transfer characteristic and the capacitance characteristic. In order to further facilitate subsequent complete static characteristic emulation of the IGBT, according to another specific embodiment of the present application, the device further includes a determination unit configured to determine a transfer characteristic model of the IGBT according to the output characteristic model of the IGBT after the output characteristic model of the IGBT is obtained. The transfer characteristic model of the IGBT can be obtained by deforming the output characteristic model, thereby further ensuring complete static characteristic emulation of the IGBT.

[0067] In another embodiment of the present application, the device further comprises: a first establishing unit configured to establish a first capacitance function with the parasitic capacitance between the gate and the emitter as the dependent variable and the first voltage as the independent variable; a second establishing unit configured to establish a second capacitance function with the parasitic capacitance between the collector and the emitter as the dependent variable and the second voltage as the independent variable; and a third establishing unit configured to establish a third capacitance function with the parasitic capacitance between the gate and the collector as the dependent variable and the voltage between the gate and the collector as the independent variable, wherein the first capacitance function, the second capacitance function and the third capacitance function constitute the capacitance characteristic model of the IGBT. The present application further establishes the characteristic model of the parasitic capacitance of the IGBT, thereby further ensuring that the complete static characteristic simulation of the IGBT can be performed according to the established models.

[0068] The first capacitance function, the second capacitance function and the third capacitance function are obtained in the same way, and the obtaining way of the first capacitance function is described below. First, an initial capacitance function with the first voltage as the independent variable and the parasitic capacitance between the gate and the emitter as the dependent variable is established according to the capacitance characteristic of the field effect transistor, wherein the initial capacitance function includes a plurality of position parameters; then, a plurality of position parameters are determined according to the sample set of the IGBT and the initial capacitance function, thereby obtaining the first capacitance function, wherein the sample set includes a plurality of data groups, and each data group includes the parasitic capacitance between the gate and the emitter and the corresponding first voltage. The sample set can be measured data or simulation data.

[0069] Specifically, the first capacitance function is C GE =a+b{1+tanh[c(V GE +d)]}+e[1-tanh(fV GE )], the second capacitance function is C CE =g+h{1+tanh[i(V CE +j)]}+k{1-tanh[l(V CE +m)]}, and the third capacitance function is C GC =n+o{1+tanh[p(V GC +q)]}, wherein C GE is the parasitic capacitance between the gate and the emitter, V GE is the first voltage, C CE is the parasitic capacitance between the collector and the emitter, V CE is the second voltage, C GC is the parasitic capacitance between the gate and the collector, and V GCFor the voltage between the gate and the collector, a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p and q are constants.

[0070] The comparison chart of the output characteristic model obtained by the IGBT modeling method of the present application and the measured data is shown in Figure 3 The comparison chart of the first capacitance function obtained and the measured data is shown in Figure 4 The comparison chart of the second capacitance function obtained and the measured data is shown in Figure 5 The comparison chart of the third capacitance function obtained and the measured data is shown in Figure 6 It can be seen that the static characteristic model function fitting image error of the IGBT of the present application is small, and the precision is high. Figures 3 to 6 Since the model does not completely deviate from the physical meaning, the device behavior is basically not deviated outside the data range. Moreover, compared with the physical model, the model established by the IGBT modeling method of the present application is a behavior model, and the convergence is better, and the simulation speed is faster.

[0071] The modeling device of the IGBT includes a processor and a memory, and the acquisition unit and the processing unit are stored in the memory as program units, and the corresponding functions are realized by the processor executing the program units stored in the memory.

[0072] The processor includes a core, and the corresponding program units are called from the memory by the core. The core can be set to one or more, and the problem of lack of universality of the IGBT modeling method in the prior art can be solved by adjusting the core parameters.

[0073] The memory can include a non-permanent memory in a computer readable medium, a random access memory (RAM) and / or a non-volatile memory such as a read-only memory (ROM) or a flash memory (flash RAM), and the memory includes at least one memory chip.

[0074] The embodiment of the present application provides a computer readable storage medium, which stores a program, and the program is executed by a processor to realize the IGBT modeling method.

[0075] The embodiment of the present application provides a processor, and the processor is used to run a program, and the program is executed to perform the IGBT modeling method.

[0076] The embodiment of the present application provides a device, and the device includes a processor, a memory and a program stored on the memory and executable on the processor, and the processor performs the program to realize at least the following steps:

[0077] In step 101, a main function and a sub-function are obtained, the main function is a function representing an output characteristic of a field effect transistor, the sub-function is a function representing a difference between an output characteristic of an IGBT and the output characteristic of the field effect transistor, the independent variables of the main function and the sub-function both include a first voltage and a second voltage, the first voltage is a voltage between a gate and an emitter, the second voltage is a voltage between a collector and the emitter, the dependent variables of the main function and the sub-function are respectively a predetermined current, and the predetermined current is a current between the collector and the emitter.

[0078] In step S102, a predetermined processing is performed on the main function and the sub-function to obtain an output characteristic model of the IGBT, and the predetermined processing at least includes an adding processing or a subtracting processing.

[0079] The device herein can be a server, a PC, a PAD, a mobile phone, etc.

[0080] The application further provides a computer program product, which is suitable for executing a program of at least the following method steps when executed on a data processing device:

[0081] In step 101, a main function and a sub-function are obtained, the main function is a function representing an output characteristic of a field effect transistor, the sub-function is a function representing a difference between an output characteristic of an IGBT and the output characteristic of the field effect transistor, the independent variables of the main function and the sub-function both include a first voltage and a second voltage, the first voltage is a voltage between a gate and an emitter, the second voltage is a voltage between a collector and the emitter, the dependent variables of the main function and the sub-function are respectively a predetermined current, and the predetermined current is a current between the collector and the emitter.

[0082] In step S102, a predetermined processing is performed on the main function and the sub-function to obtain an output characteristic model of the IGBT, and the predetermined processing at least includes an adding processing or a subtracting processing.

[0083] In the above embodiments of the application, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0084] In several embodiments provided in the present application, it should be understood that the disclosed technical content can be implemented by other manners. Among them, the above-described device embodiments are only illustrative, for example, the division of the above-mentioned units can be a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or modules shown or discussed can be indirect coupling or communication connection between the units or modules through some interfaces, and can be electrical or other forms.

[0085] The units described above as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, that is, they can be located in one place, or they can be distributed to multiple units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0086] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0087] The integrated unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the part of the prior art that makes a contribution or the whole or part of the technical solutions can be embodied in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server or a network device, etc.) to execute all or part of the steps of the above-mentioned method of each embodiment of the present application. The foregoing storage medium includes: a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various program code storage media.

[0088] From the above description, it can be seen that the above-described embodiments of the present application achieve the following technical effects:

[0089] 1)、the IGBT modeling method of the above application, first, the main function representing the output characteristics of FET is obtained, and the sub-function representing the difference between the output characteristics of IGBT and the above field effect transistor is obtained, wherein the independent variables of the above main function and the above sub-function include gate and emitter voltage and collector and emitter voltage, and the dependent variables of the above main function and the above sub-function are collector and emitter current; then the above main function and the above sub-function are added or subtracted to obtain the output characteristic model of the above IGBT. Compared with the IGBT behavior modeling according to the characteristics type in the prior art, the problem of poor universality of the model of IGBT is solved. According to the existing behavior function representing FET, the main function is obtained, the sub-function is obtained according to the difference between the output characteristics of IGBT and FET, and then the output characteristic model of IGBT is obtained by mathematical processing of the main function and the sub-function. The output characteristic model is not limited to the type of IGBT, has universality, and has strong implementability.

[0090] 2)、the IGBT modeling device of the above application, the main function representing the output characteristics of FET is obtained by the acquisition unit, and the sub-function representing the difference between the output characteristics of IGBT and the above field effect transistor is obtained, wherein the independent variables of the above main function and the above sub-function include gate and emitter voltage and collector and emitter voltage, and the dependent variables of the above main function and the above sub-function are collector and emitter current; the above main function and the above sub-function are added or subtracted by the processing unit to obtain the output characteristic model of the above IGBT. Compared with the IGBT behavior modeling according to the characteristics type in the prior art, the problem of poor universality of the model of IGBT is solved. According to the existing behavior function representing FET, the main function is obtained, the sub-function is obtained according to the difference between the output characteristics of IGBT and FET, and then the output characteristic model of IGBT is obtained by mathematical processing of the main function and the sub-function. The output characteristic model is not limited to the type of IGBT, has universality, and has strong implementability.

[0091] The above is only the preferred embodiment of the application and is not used to limit the application. For those skilled in the art, the application can have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the application shall be included in the protection scope of the application.

Claims

1. A method of modeling an IGBT, characterized by, The method comprises: obtaining a main function and a sub-function, the main function being a function representing an output characteristic of a field effect transistor, the sub-function being a function representing a difference between an output characteristic of an IGBT and the output characteristic of the field effect transistor, the independent variables of the main function and the sub-function both comprising a first voltage and a second voltage, the first voltage being a voltage between a gate and an emitter, the second voltage being a voltage between a collector and the emitter, the dependent variables of the main function and the sub-function both being a predetermined current, the predetermined current being a current between the collector and the emitter; performing a predetermined processing on the main function and the sub-function to obtain an output characteristic model of the IGBT, the predetermined processing at least comprising an adding processing or a subtracting processing, establishing an initial master function according to an output characteristic of the field effect transistor, including: establishing the initial master function according to the output characteristic of the field effect transistor wherein, , is a piecewise function, , , is the initial master function, is the first voltage, is the second voltage, is a threshold voltage of the IGBT, , , , and are all first parameters, According to the difference between the output characteristics of the IGBT and the output characteristics of the field effect transistor, an initial sub-function is established, comprising: establishing the initial sub-function according to the difference between the output characteristics of the IGBT and the output characteristics of the field effect transistor 、 wherein, is the initial sub-function, and are second parameters.

2. The method of claim 1, wherein, obtaining a main function and a sub-function, comprising: establishing an initial main function according to an output characteristic of a field effect transistor, the initial main function comprising a plurality of first parameters; establishing an initial sub-function according to a difference between an output characteristic of an IGBT and the output characteristic of the field effect transistor, the initial sub-function comprising a plurality of the first parameters and a plurality of second parameters, the first parameters and the second parameters both being constant parameters to be determined; obtaining a plurality of sample data of the IGBT, the sample data comprising a gate voltage value, a collector voltage value and an emitter voltage value; substituting the sample data into the initial main function to calculate a plurality of the first parameters to obtain the main function; substituting the sample data into the initial sub-function to calculate a plurality of the second parameters to obtain the sub-function.

3. The method according to claim 1 or 2, characterized in that, After obtaining the output characteristic model of the IGBT, the method further comprises: determining a transfer characteristic model of the IGBT according to the output characteristic model.

4. The method according to claim 1 or 2, characterized in that, The method further comprises: establishing a first capacitance function with an intrinsic capacitance between the gate and the emitter as a dependent variable and the first voltage as an independent variable; establishing a second capacitance function with an intrinsic capacitance between the collector and the emitter as a dependent variable and the second voltage as an independent variable; establishing a third capacitance function with an intrinsic capacitance between the gate and the collector as a dependent variable and a voltage between the gate and the collector as an independent variable, the first capacitance function, the second capacitance function and the third capacitance function constituting a capacitance characteristic model of the IGBT.

5. The method of claim 4, wherein, the first capacitance function is the second capacitance function is the third capacitance function is wherein is an intrinsic capacitance between the gate and the emitter, is the first voltage, is an intrinsic capacitance between the collector and the emitter, is the second voltage, is an intrinsic capacitance between the gate and the collector, is a voltage between the gate and the collector, a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, and q are constants.

6. The method of claim 1, wherein, After obtaining the output characteristic model of the IGBT, the method further comprises: performing a circuit simulation on the IGBT according to the output characteristic model.

7. An apparatus for modeling an IGBT, characterized by The method comprises: An acquisition unit is configured to acquire a main function and a sub function, the main function being a function representing an output characteristic of a field effect transistor, the sub function being a function representing a difference between an output characteristic of an IGBT and the output characteristic of the field effect transistor, the main function and the sub function having a first voltage and a second voltage as an independent variable, the first voltage being a voltage between a gate and an emitter, the second voltage being a voltage between a collector and the emitter, the main function and the sub function having a predetermined current as a dependent variable, the predetermined current being a current between the collector and the emitter; A processing unit is configured to perform a predetermined processing on the main function and the sub function to obtain an output characteristic model of the IGBT, the predetermined processing including at least an addition processing or a subtraction processing, The modeling device is also used to establish an initial main function based on the output characteristics of the field-effect transistor. ,in, , It is a piecewise function. , , This is the initial main function. The first voltage, The second voltage, The threshold voltage of the IGBT. , , , as well as All are the first parameter. and for establishing an initial sub-function from a difference between an output characteristic of the IGBT and an output characteristic of the field effect transistor 、 wherein is the initial sub-function, and are second parameters.

8. A computer-readable storage medium, characterized in that, The computer readable storage medium includes a stored program, wherein the program performs the method of any one of claims 1 to 6.

9. A processor, comprising: The processor is configured to run a program, wherein the program performs the method of any one of claims 1 to 6 when running.

10. An electronic device, comprising: including: one or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, the one or more programs including a program for performing the method of any one of claims 1 to 6.

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