Pixel capacitance circuit, driving method and display panel

Abstract

Embodiments of the present application disclose a pixel capacitor circuit, a driving method, and a display panel. Among them, the circuit includes: The pixel capacitor circuit includes: multiple rows of first switch modules and multiple rows of voltage storage modules; the multiple rows of first switch modules are connected in series and are respectively connected to the voltage storage modules in the same row; the first switch module in any row is connected between the voltage storage module in the row above the any row and the voltage storage module in the any row; the multiple rows of first switch modules are used to receive a first control signal; wherein, the first control signal is used to synchronously control the on / off states of the multiple rows of first switch modules; the multiple rows of voltage storage modules are used to charge and discharge based on the on / off states of the multiple rows of first switch modules.

Description

Technical Field

[0001] This application relates to, but is not limited to, the field of display technology, and in particular, to a pixel capacitor circuit, a driving method, and a display panel. Background Art

[0002] During the display process of a display panel, the gate driving circuit (Gate On Array, GOA) turns on row by row. The thin film transistors (TFTs) in each row are all turned on, and the source signals (Source signals) of each column sequentially load corresponding pixel voltages for the pixels and simultaneously charge the storage capacitors. When the next row is turned on, the TFTs in the current row are all turned off. At this time, the storage capacitors of each pixel are responsible for continuing to charge the pixels and loading the corresponding pixel voltages to maintain the pixel voltages. However, when a solid color screen is loaded, at this time, the pixel voltages of each column are the same, but all GOAs still need to be turned on row by row, the TFTs in each row are all turned on, and the Source signals of each column sequentially load the same pixel voltages. During this process, a large number of TFTs in the GOA are turned on, generating additional power consumption. Summary of the Invention

[0003] In view of this, embodiments of the present application at least provide a pixel capacitor circuit, a driving method, and a display panel.

[0004] The technical solution of the embodiments of the present application is implemented as follows:

[0005] On the one hand, an embodiment of the present application provides a pixel capacitor circuit, which includes:

[0006] Multiple rows of first switch modules and multiple rows of voltage storage modules;

[0007] The multiple rows of first switch modules are connected in series, and are respectively connected to the voltage storage modules in the same row; the first switch module in any row is connected between the voltage storage module in the previous row of the any row and the voltage storage module in the any row;

[0008] The multiple rows of first switch modules are used to receive a first control signal; wherein, the first control signal is used to synchronously control the on-off states of the multiple rows of first switch modules;

[0009] The multiple rows of voltage storage modules are used to charge and discharge based on the on-off states of the multiple rows of first switch modules.

[0010] On the other hand, an embodiment of the present application provides a display panel, which includes: a display driving chip, a liquid crystal module, and the above-mentioned pixel capacitor circuit;

[0011] The display driving chip is connected to the pixel capacitor circuit, and the pixel capacitor circuit is connected to the liquid crystal module;

[0012] The display driving chip is configured to generate a first control signal based on a picture to be displayed and transmit it to the pixel capacitor circuit;

[0013] The pixel capacitor circuit is configured to provide a pixel voltage to the liquid crystal module based on the first control signal;

[0014] The liquid crystal module is configured to display a picture based on the pixel voltage.

[0015] On the other hand, an embodiment of the present application provides a driving method for a pixel capacitor circuit, which is applied to the pixel capacitor circuit described above. The method includes:

[0016] Controlling multiple rows of first switch modules in the pixel capacitor circuit to receive a first control signal; wherein, the first control signal is used to synchronously control the on-off states of the multiple rows of first switch modules;

[0017] Based on the on-off states of the multiple rows of first switch modules, controlling multiple rows of voltage storage modules in the pixel capacitor circuit to charge and discharge.

[0018] On yet another aspect, an embodiment of the present application provides an electronic device, including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor executes the program, some or all of the steps in the above method are implemented.

[0019] On still another aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, some or all of the steps in the above method are implemented.

[0020] On still another aspect, an embodiment of the present application provides a computer program, including computer-readable code. When the computer-readable code runs in a computer device, a processor in the computer device executes to implement some or all of the steps in the above method.

[0021] On still another aspect, an embodiment of the present application provides a computer program product. The computer program product includes a non-transitory computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, some or all of the steps in the above method are implemented.

[0022] An embodiment of the present application provides a pixel capacitor circuit. In the pixel capacitor circuit, multiple rows of first switch modules are connected in series, and a first control signal is received through the multiple rows of first switch modules to synchronously control the on / off states of the multiple rows of first switch modules. In this way, the synchronous conduction or disconnection of the multiple rows of first switch modules connected in series can be controlled by a unified first control signal. When a solid-color image needs to be presented on the display panel, the synchronous conduction of the multiple rows of first switch modules can be uniformly controlled, and there is no need to load the pixel voltages of different pixel points row by row. By connecting the first switch module of any row between the voltage storage module of the previous row of any row and the voltage storage module of any row, the connection between the voltage storage modules of adjacent rows can be disconnected when the first switch module of any row is in the off state. And the multiple rows of voltage storage modules perform charge and discharge based on the on / off states of the multiple rows of first switch modules. In this way, when the multiple rows of first switch modules are synchronously conducted, the multiple rows of voltage storage modules can be synchronously charged, so as to synchronously load the pixel voltages of the multiple rows of pixel points corresponding to the multiple rows of voltage storage modules, to achieve synchronous control of multiple rows of pixels, and further reduce the power consumption of the display panel.

[0023] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and do not limit the technical solutions of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings herein are incorporated into the specification and constitute a part of this specification. These drawings show embodiments consistent with the present application and are used together with the specification to explain the technical solutions of the present application.

[0025] Figure 1 It is a schematic diagram of the composition structure of the pixel capacitor circuit provided by the embodiment of the present application;

[0026] Figure 2A It is another schematic diagram of the composition structure of the pixel capacitor circuit provided by the embodiment of the present application;

[0027] Figure 2B It is yet another schematic diagram of the composition structure of the pixel capacitor circuit provided by the embodiment of the present application;

[0028] Figure 2C It is still another schematic diagram of the composition structure of the pixel capacitor circuit provided by the embodiment of the present application;

[0029] Figure 3 It is a schematic diagram of the implementation process of a driving method for a pixel capacitor circuit provided by the embodiment of the present application;

[0030] Figure 4 It is a schematic diagram of the composition structure of a pixel circuit provided in some embodiments;

[0031] Figure 5 Another structural schematic diagram of the pixel capacitor circuit provided by the embodiment of the present application;

[0032] Figure 6 Another structural schematic diagram of the pixel capacitor circuit provided by the embodiment of the present application. Detailed implementation manners

[0033] In order to make the objectives, technical solutions and advantages of the present application clearer, the technical solutions of the present application will be further elaborated in detail below with reference to the accompanying drawings and Embodiment 5. The described embodiments should not be regarded as limitations on the present application.

[0034] All other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0035] In the following description, reference is made to "some embodiments", which describe a subset of all possible embodiments.

[0036] However, it can be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments, and can be combined with each other without conflict.

[0037] The terms "first / second / third" involved are only used to distinguish similar objects and do not represent a specific order for the objects. It can be understood that "first / second / third" can be interchanged with a specific order or sequence when permitted, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used herein are only for the purpose of describing this application and are not intended to limit this application.

[0039] Before further elaborating on the embodiments of the present application in detail, the nouns and terms involved in the embodiments of the present application are explained first. The nouns and terms involved in the embodiments of the present application are applicable to the following explanations. 1) The GOA technology, that is, the array substrate driving technology, is a driving technology commonly used in liquid crystal displays (LCDs), panel and other display panels. By fabricating the row scanning driving signal circuit on the array substrate, the sequential scanning of the gate lines (Gate lines) is achieved.

[0040] 2) The Integrated Circuit (IC) industry has been continuously driving the development of the smartphone industry. Touch and Display Drive Integration (TDDI) brings a unified system architecture. In the original system architecture, since the display and touch chips are separated,

[0041] this may lead to the existence of some display noise. However, due to the implementation of unified control in TDDI, it has better effects in noise management. TDDI adopts the "time-sharing scanning" method, which divides the display time of 1 frame into two parts. One part is used for touch scanning, and the other part is used for display scanning, without interference with each other, fundamentally reducing the hidden danger of signal interference.

[0042] The pixel capacitor circuit provided by the embodiments of the present application, by designing multiple rows of first switch modules and multiple rows of voltage storage modules in the pixel capacitor circuit, when a pure color screen needs to be presented on the display panel, can control the synchronous conduction or disconnection of multiple rows of first switch modules connected in series through a unified first control signal, without the need to load the pixel voltages of different pixel points row by row. Moreover, when multiple rows of first switch modules are synchronously conducted, multiple rows of voltage storage modules can be synchronously charged, so as to synchronously load the pixel voltages of multiple rows of pixel points corresponding to the multiple rows of voltage storage modules, so as to realize the synchronous control of multiple rows of pixels and reduce power consumption. The pixel capacitor circuit provided by the embodiments of the present application can be applied in the display screen of an electronic device, where the electronic device can be a laptop computer, a tablet computer, a desktop computer, a mobile phone, etc.

[0043] Figure 1 is a schematic diagram of the composition structure of the pixel capacitor circuit provided by the embodiments of the present application. In combination with Figure 1 the following description is made: The pixel capacitor circuit includes: multiple rows of first switch modules 101, 102 to 10n, and multiple rows of voltage storage modules 111, 112 to 11n;

[0044] The multiple rows of first switch modules 101, 102 to 10n are connected in series, and are respectively connected to the voltage storage modules in the same row; the first switch module of any row is connected between the voltage storage module of the row above the any row and the voltage storage module of the any row.

[0045] Here, the multi-line first switch modules 101, 102 to 10n can belong to the same column or multiple columns. The multi-line first switch modules correspond one-to-one with the multi-line voltage storage modules. That is, the number of rows of the multi-line first switch modules is the same as the number of rows of the multi-line voltage storage modules, and this number of rows is greater than or equal to 2. One row of first switch modules is connected to the voltage storage modules belonging to the same row. For example, the first switch module in the first row is connected to the voltage storage module in the first row, and the first switch module in the second row is connected to the voltage storage module in the second row. Among them, the number of rows in the multi-line first switch modules and the multi-line voltage storage modules can be the number of rows for pixel display in the display panel to which the pixel capacitor circuit is connected; for example, the number of rows of pixel points on the array substrate in the display panel.

[0046] In some possible implementation manners, the first switch module can be implemented by a TFT, and the voltage storage module can be implemented by a storage capacitor and a liquid crystal capacitor. The multi-line first switch modules 101, 102 to 10n are connected in series, so as to be able to synchronously control the on / off states of the multi-line first switch modules through a unified first control signal. The first switch module is connected between the voltage storage module in the previous row and the voltage storage module in the same row. In this way, when the first switch module is in the off state, the voltage storage modules in adjacent two rows are disconnected. For example, the first switch module in the third row is connected between the voltage storage module in the second row and the first switch module in the third row. When the first switch module in the third row is in the off state, the circuit between the voltage storage module in the second row and the first switch module in the third row is disconnected.

[0047] The multi-line first switch modules 101, 102 to 10n are used to receive the first control signal 10.

[0048] Here, the first control signal is used to synchronously control the on / off states of the multi-line first switch modules. This first control signal can be a voltage control signal, for example, a high-level signal or a low-level signal. When the first control signal is a high-level signal, the multi-line first switch modules 101, 102 to 10n are synchronously turned on. When the first control signal is a low-level signal, the multi-line first switch modules 101, 102 to 10n are synchronously turned off. This first control signal can be output by a driving IC connected to the multi-line first switch modules. In some possible implementation manners, the driving IC generates this first control signal according to display parameters such as the color and hue of the display panel to be displayed, and transmits this first control signal to the pixel capacitor circuit to control the on or off of the row first switch modules.

[0049] The multi-line voltage storage modules 111, 112 to 11n are used to charge and discharge based on the on / off states of the multi-line first switch modules.

[0050] Here, each row in the multi - row voltage storage module is connected to the first switch module of the same row. Since the first switch module of any row is connected between the voltage storage module of the previous row of any row and the voltage storage module of that any row, the voltage storage modules of adjacent rows can be disconnected through the first switch module of the lower row of the adjacent two rows. The multi - row first switch modules synchronously control the charging and discharging of the multi - row voltage storage modules. When the multi - row first switch modules are synchronously turned on, the multi - row voltage storage modules are charged based on the first control signal. When the multi - row first switch modules are synchronously turned off, the multi - row voltage storage modules are discharged. In this way, when the multi - row first switch modules are synchronously turned on, the multi - row voltage storage modules are synchronously charged, and then the voltage values of the multi - row voltage storage modules are the same, so as to present a pure - color picture in the display area corresponding to the multi - row voltage storage modules. In some possible implementation manners, if the columns corresponding to the multi - row voltage storage modules are partial pixel columns in the display panel, after the multi - row first switch modules enter the conducting state based on the first control signal, the multi - row voltage storage modules are charged and at the same time pixel voltages are provided for the partial pixel columns, so that the pictures of the partial pixel columns are presented on the display panel.

[0051] In the embodiments of the present application, in the pixel capacitor circuit, the multi - row first switch modules are connected in series, and the first control signal is received through the multi - row first switch modules to synchronously control the on - off states of the multi - row first switch modules; in this way, the synchronous conduction or disconnection of the series - connected multi - row first switch modules can be controlled through a unified first control signal. When a pure - color picture needs to be presented on the display panel, the synchronous conduction of the multi - row first switch modules can be uniformly controlled, and there is no need to load the pixel voltages of different pixel points row by row. By connecting the first switch module of any row between the voltage storage module of the previous row of any row and the voltage storage module of that any row, the voltage storage modules of adjacent rows can be disconnected when the first switch module of any row is in the off state. And the multi - row voltage storage modules are charged and discharged based on the on - off states of the multi - row first switch modules; in this way, when the multi - row first switch modules are synchronously conducted, the multi - row voltage storage modules can be synchronously charged, so as to synchronously load the pixel voltages of the multi - row pixel points corresponding to the multi - row voltage storage modules, so as to realize the synchronous control of multi - row pixels, and further reduce the power consumption of the display panel.

[0052] In some embodiments, the connection relationship between each first switch module in the multi - row first switch modules and each voltage storage module in the multi - row voltage storage modules is as Figure 2A shown, the drain 201 of each first switch module in the multi - row first switch modules is connected to the first end 202 of the voltage storage module of the same row, and the second end 203 of the voltage storage module accesses the common electrode voltage signal 11.

[0053] Here, the common electrode voltage signal is used to form a voltage difference across the voltage storage module with the source control signal, so as to drive the corresponding liquid crystal module of the voltage storage module to display through the voltage difference. The common electrode voltage signal can be a fixed reference voltage signal. For example, the voltage value of the common electrode voltage signal is set to -1 volt (V). When the multi-line first switch modules are in the on state, the source control signal provides voltage to the multi-line voltage storage modules to charge the multi-line voltage storage modules; thus, there are two voltages across the liquid crystal corresponding to the multi-line voltage storage modules. One is the pixel voltage provided after the multi-line voltage storage modules are charged, and the other is the voltage value of the connected common electrode voltage signal. In this way, a voltage difference is formed across the liquid crystal, so that the liquid crystal can display a picture based on the drive of this voltage difference.

[0054] In some possible implementation manners, the gates 204 of the multi-line first switch modules commonly receive the same gate control signal. When the gate control signal is a high-level signal, the multi-line first switch modules are commonly turned on. After the multi-line first switch modules are commonly turned on, the sources of the multi-line first switch modules receive the source control signal, and transmit the source control signal to the multi-line voltage storage modules through the sources and drains of the first switch modules to charge the multi-line voltage storage modules, so that the voltage stored in the voltage storage modules is the voltage value carried by the source control signal. In this way, when the gate control signal changes to a low-level signal, the multi-line first switch modules are commonly turned off, and the multi-line voltage storage modules discharge to provide pixel voltage for the pixel points corresponding to the multi-line voltage storage modules, so that the liquid crystal module can present the picture corresponding to the pixel points based on the pixel voltage. In this way, through the on-off state of the first switch modules connected between the voltage storage modules of adjacent two rows, the connection and disconnection between the voltage storage modules of adjacent two rows can be controlled.

[0055] The drain of each first switch module is connected to the source of the first switch module of the next row of the row to which each first switch module belongs, forming a series connection between the multi-line first switch modules.

[0056] Here, for each first switching module in the multi - row first switching modules, the drain of each first switching module is connected to the source of the first switching module in the next row, and the drain of each first switching module is also connected to the first end of the voltage storage module in the same row. In this way, the drain of each first switching module is connected to the source of the first switching module in the next row, making the multi - row first switching modules in series; moreover, the drain of each first switching module is connected to the first end of the voltage storage module in the same row as each first switching module, so that there is a row of first switching modules connected between every two adjacent rows of voltage storage modules. In the embodiments of the present application, by connecting the multi - row first switching modules in series, the conduction of the multi - row first switching modules can be controlled by a unified gate control signal, so that for a pure - color screen or a screen with the same pixel color in the same column, the pixel voltages of these pixel points can be loaded simultaneously, instead of loading the pixel voltages of these pixel points row by row, thereby saving power consumption.

[0057] In some embodiments, as Figure 2A shown, the gates 204 of the multi - row first switching modules receive the gate control signal 12, and the sources 205 of the multi - row first switching modules receive the source control signal 13.

[0058] Here, the gate control signal matches the gate voltage of the multi - row first switching modules; the source control signal matches the display parameters of the to - be - displayed screen corresponding to the multi - row first switching modules.

[0059] In some possible implementation manners, since the gate control signal is used to input to the gate of the first switching module to turn on or off the first switching module, the gate control signal can be set by the driving IC according to the magnitude of the gate voltage of the multi - row first switching modules. If it is necessary to turn on the multi - row first switching modules (for example, the to - be - displayed screen is a pure - color screen, or at least one column of the to - be - displayed screen has the same color), then according to the gate voltage of the multi - row first switching modules, the voltage in the gate control signal is set to this gate voltage, that is, the gate control signal is determined as a high - level signal. If it is necessary to turn off the first switching module (for example, each column of the to - be - displayed screen has different colors), then the gate control signal is determined as a low - level signal.

[0060] In some possible implementation manners, the display parameters of the to-be-displayed screen include: the color, hue, etc. of the to-be-displayed screen. For example, the color includes: red, green, blue, etc., and the hue includes: dark color, light color, red-biased, green-biased or blue-biased, etc. The driving IC analyzes the display parameters of the to-be-displayed screen to determine the pixel voltage required for the liquid crystal module to present the to-be-displayed screen with such display parameters; since the pixel voltage is provided by the voltage storage module when the first switching module is in the off state, when the first switching module is in the on state, the voltage storage module needs to be charged so that the voltage stored in the voltage storage module reaches the pixel voltage; based on this, the magnitude of the voltage value of the source control signal for charging the voltage storage module can be determined according to the pixel voltage, that is, the source control signal is made to match the display parameters of the to-be-displayed screen corresponding to the multiple rows of the first switching module. In the embodiments of the present application, the gate control signal is set according to the gate voltage of the multiple rows of the first switching module, and the source control signal is set according to the to-be-displayed screen, so that the pixel voltage of the pixel points that better meet the to-be-displayed screen can be loaded through the source control signal, and the effect of the to-be-displayed screen presented by the liquid crystal module is better.

[0061] The gate 204 of the multiple rows of the first switching module is used to enter the on state when the gate control signal is a high-level signal.

[0062] Here, when the gate control signal is a high-level signal, the voltage of the gate 204 of the multiple rows of the first switching module is high level, so that the first switching module conducts with high level, that is, enters the on state. The first control signal includes a gate control signal and a source control signal. The gate control signal and the source control signal can be generated by the driving IC of the display panel and input to the first switching module. The voltage value of the gate control signal and the voltage value of the source control signal can be determined by the driving IC through analyzing the color components of the to-be-displayed screen. The driving IC analyzes the proportion of each color component in the to-be-displayed screen to determine the pixel voltage required to present this color component, and then determines the source control signal that can provide this pixel voltage. For example, the source control signal can be a signal with this pixel voltage.

[0063] The source 205 of the multiple rows of the first switching module is used to receive the source control signal when the multiple rows of the first switching module are in the on state, and charge the multiple rows of voltage storage modules based on the source control signal.

[0064] Here, when the multi-line first switching module is in the conducting state, the driving IC sends the source control signal to the multi-line first switching module through the source of the multi-line first switching module, so that the multi-line first switching module can transmit the source control signal to the multi-line voltage storage module to charge the multi-line voltage storage module. In this way, the multi-line voltage storage module can be charged based on the voltage carried by the source control signal, so that the voltage is stored in the multi-line voltage storage module; thus, when the multi-line first switching module enters the off state, the voltage storage module discharges to provide the pixel voltage of the pixel points of the picture to be displayed to the liquid crystal module, so that the liquid crystal module can continuously and stably display the picture.

[0065] In some embodiments, the multi-line first switching module is associated with at least one column of pixel points having the same color in the picture to be displayed.

[0066] Here, when there is at least one column of pixel points having the same color in the picture to be displayed, the switching module corresponding to the at least one column of pixel points having the same color is used as the multi-line first switching module in the pixel capacitor circuit. In this way, by synchronously controlling the opening of the multi-line first switching module in the pixel capacitor circuit, the pixel voltages of at least one column of pixel points having the same color can be synchronously loaded. In this way, the multi-line first switching module is associated with at least one column of pixel points having the same color in the picture to be displayed, which can be understood as that the multi-line first switching module is the thin film transistor connected to the liquid crystal cells corresponding to at least one column of pixel points having the same color, and is used to provide the pixel voltages of at least one column of pixel points having the same color. In this way, during the display process of the display panel, the pixel columns having the same color in the picture to be displayed can be determined first, and for the switching modules corresponding to one or more columns of pixel points having the same color, a first control signal is used to uniformly control the conduction and cutoff of these switching modules.

[0067] The multi-line voltage storage module is used to provide the pixel voltages of at least one column of pixel points having the same color to the liquid crystal module connected to the multi-line voltage storage module when the multi-line first switching module is in the off state, so that the liquid crystal module presents the picture corresponding to at least one column of pixel points having the same color.

[0068] Here, when the multi-line first switching module is in the conducting state, the source control signal flows through the multi-line first switching module, thereby charging the multi-line voltage storage module. After the charging is completed, if the multi-line first switching module enters the off state, then the multi-line voltage storage module starts to discharge, thereby providing the pixel voltage to the liquid crystal module connected to the multi-line voltage storage module, and the liquid crystal module is the liquid crystal cells corresponding to at least one column of pixel points having the same color. In this way, the liquid crystal module can continue to stably display the picture corresponding to at least one column of pixel points having the same color according to the pixel voltage provided by the multi-line voltage storage module.

[0069] In some embodiments, in the pixel capacitance circuit, a multi-row second switch module for row-by-row activation may also be provided. For example, Figure 2B as shown, the pixel capacitance circuit further includes: multi-row second switch modules 221 to 22n. The multi-row second switch modules 221 to 22n are respectively connected to the voltage storage modules in the same row.

[0070] Here, the number of rows of the multi-row second switch modules may be the same as that of the multi-row first switch modules, both being the number of rows of pixel points in the display panel. There may be one second switch module in one row, and the input of this second switch module may be the output of the GOA circuit. The drains of each of the second switch modules in the multi-row second switch modules are all connected to the voltage storage modules in the same row, so that the charging and discharging of the voltage storage modules in this row can be controlled through the output of the GOA circuit in this row.

[0071] The multi-row second switch modules 221 to 22n are used to conduct or turn off row by row based on the received second control signal 14, so as to control the charging and discharging of the voltage storage modules in the same row as the conducting second switch module.

[0072] Here, the gates of the multi-row second switch modules 221 to 22n receive the second control signal 14. The second control signal 14 is the output of the GOA circuit and may be a high-level signal or a low-level signal. When the second control signal is a high-level signal, the second switch modules in the multi-row second switch modules 221 to 22n that are in the same row as this second control signal enter the conducting state, and the voltage storage modules in the same row as the conducting second switch module are charged. When the second control signal is a low-level signal, the second switch modules in the multi-row second switch modules 221 to 22n that enter the same row as this second control signal are turned off, and the voltage storage modules in the same row are discharged. In this way, a second switch module that conducts row by row is provided in the pixel capacitance circuit, so as to control the charging or discharging of the voltage storage modules row by row; in this way, in this pixel capacitance circuit, the conduction of the multi-row first switch modules can be synchronously controlled to synchronously present the same-color picture of at least one column; and the second switch modules can be activated row by row to load the pixel voltages of each row of pixel points in the picture to be displayed row by row.

[0073] In some embodiments, if the picture to be displayed is a solid-color picture or a picture in which the colors of at least one column of pixel points are the same, Figure 2B the working process of the pixel capacitance circuit in

[0074] The multi-row first switch modules 101, 102 to 10n are used to enter the conducting state based on the gate control signal and transmit the source control signal to the multi-row voltage storage modules.

[0075] Here, the gate control signal and the source control signal in the first control signal are high-level signals respectively, and the second control signal is a low-level signal; the first type of picture includes: a solid-color picture or a picture in which the colors of at least one column of pixel points are the same.

[0076] The multiple-line voltage storage modules 111, 112 to 11n are used to charge based on the source control signal;

[0077] The multiple-line second switch modules 221 to 22n are used to enter the off state based on the second control signal.

[0078] In this way, when the picture to be displayed is a solid-color picture or a picture in which the colors of at least one column of pixel points are the same, the multiple-line first switch modules are turned on and the multiple-line second switch modules are turned off, that is, the function of the GOA in the pixel capacitor circuit is turned off; the pixel voltages required to present the solid-color picture or the picture in which the colors of at least one column of pixel points are the same are synchronously loaded through the multiple-line first switch modules to present the picture to be displayed, and there is no need to load the pixel voltages row by row, thereby saving power consumption.

[0079] In some embodiments, if the picture to be displayed is a second type of picture, Figure 2B the working process of the pixel capacitor circuit in

[0080] The multiple-line first switch modules 101, 102 to 10n are used to enter the off state based on the first control signal;

[0081] Here, the picture to be displayed is a second type of picture, that is, there is no column of pixel points with the same color in the picture to be displayed, indicating that the colors of the pixel points in each column in the picture to be displayed are different. The first control signal is a low-level signal, and the second control signal is a high-level signal; the second type of picture is different from the first type of picture.

[0082] The multiple-line voltage storage modules are used to disconnect the connection between the voltage storage modules of adjacent two rows when the first switch module between the voltage storage modules of adjacent two rows enters the off state;

[0083] Any one of the multiple-line second switch modules 221 to 22n is used to enter the on state based on the second control signal belonging to the same row as the any one of the second switch modules, turn off the second switch modules of other rows, and charge the voltage storage module belonging to the same row as the any one of the second switch modules.

[0084] Here, the second switch modules of other rows are the second switch modules other than the any one of the multiple-line second switch modules.

[0085] Thus, when the pixel colors in each column of the to-be-displayed image are different, the multi-line first switching module is turned off, and the second switching module is turned on row by row, that is, the function of GOA in the pixel capacitor circuit is enabled; by turning on the second switching module row by row, the pixel voltages required for presenting the to-be-displayed image are loaded row by row, so as to load the pixel voltages required for different rows of the to-be-displayed image, and further present a colorful image on the liquid crystal module.

[0086] In some embodiments, during the blanking time of two consecutive frames of to-be-displayed images, the voltage storage module in the pixel capacitor circuit performs voltage reset to reduce the loading of voltage difference, which can be achieved through the following process:

[0087] The multi-line first switching module is further configured to enter a conducting state based on the high-level signal during the blanking period of the two consecutive frames, and provide the common electrode voltage signal to the multi-line voltage storage module.

[0088] Here, during the blanking time of two consecutive frames of to-be-displayed images, the gate control signal in the first control signal is a high-level signal, and the source control signal in the first control signal is a common electrode voltage signal.

[0089] The multi-line voltage storage module is further configured to perform voltage reset based on the common electrode voltage signal during the blanking time of the two consecutive frames of to-be-displayed images.

[0090] In the embodiments of the present application, during the blanking time of two consecutive frames of to-be-displayed images, by setting the gate control signal to a high-level signal and setting the source control signal to a common electrode voltage signal, the voltage of the multi-line voltage storage module during the blanking time is the voltage carried by the common electrode voltage signal, thereby realizing the reset of the multi-line voltage storage module. Thus, after resetting the multi-line voltage storage module, when displaying the next frame of image, the difference in capacitance voltage that needs to be loaded can be reduced, and further the power consumption required by the product can be reduced.

[0091] Embodiments of the present application provide a display panel, as Figure 2C shown, the display panel 230 includes: a display driving chip 231, a liquid crystal module 232, and the pixel capacitor circuit 233 in the above embodiments; wherein:

[0092] The display driving chip 231 is connected to the pixel capacitor circuit 233, and the pixel capacitor circuit 233 is connected to the liquid crystal module 232;

[0093] The display driving chip 231 is configured to generate a first control signal based on the to-be-displayed image and transmit it to the pixel capacitor circuit;

[0094] The pixel capacitance circuit 233 is configured to provide a pixel voltage to the liquid crystal module based on the first control signal;

[0095] In some possible implementation manners, the number of the pixel capacitance circuits matches the number of columns of pixel points with the same color in the to-be-displayed picture. When the columns of pixel points with the same color in the to-be-displayed picture include a red pixel point column, a green pixel point column, and a blue pixel point column, the pixel capacitance circuit includes: a first pixel capacitance circuit corresponding to the red pixel point column, a second pixel capacitance circuit corresponding to the green pixel point column, and a third pixel capacitance circuit corresponding to the blue pixel point column; the first control signals in the first pixel capacitance circuit, the second pixel capacitance circuit, and the third pixel capacitance circuit are different.

[0096] The liquid crystal module 232 is configured to perform picture display based on the pixel voltage.

[0097] In the embodiment of the present application, the display driving chip analyzes the to-be-displayed picture to generate a first control signal and transmits it to the pixel capacitance circuit; then, through the unified first control signal, the synchronous conduction or disconnection of multiple rows of first switch modules connected in series is controlled. When a pure color picture needs to be presented on the display panel, the pixel capacitance circuit can be uniformly controlled to synchronously load the pixel voltage to the liquid crystal module, instead of loading the pixel voltages of different pixel points row by row, which can reduce the power consumption of the display panel.

[0098] The embodiment of the present application provides a driving method for a pixel capacitance circuit, which is applied to the pixel capacitance circuit in the above embodiment. The implementation process of the driving method for the pixel capacitance circuit is as Figure 3 shown, and the following description is made in combination with Figure 3 the steps shown:

[0099] Step S301: Control multiple rows of first switch modules in the pixel capacitance circuit to receive a first control signal.

[0100] Wherein, the first control signal is used to synchronously control the on-off states of the multiple rows of first switch modules;

[0101] Step S302: Based on the on-off states of the multiple rows of first switch modules, control multiple rows of voltage storage modules in the pixel capacitance circuit to charge and discharge.

[0102] In the embodiment of the present application, by adopting a plurality of rows of first switch modules to synchronously receive the same first control signal to synchronously control the on-off states of the plurality of rows of first switch modules; in this way, the synchronous conduction or disconnection of the plurality of rows of first switch modules connected in series can be controlled by a unified first control signal. Moreover, when the plurality of rows of voltage storage modules are synchronously conducted, they can be synchronously charged, so as to synchronously load the pixel voltages of the pixel points corresponding to the plurality of rows of voltage storage modules, so as to realize the synchronous control of the plurality of rows of pixels, and further reduce the display power consumption of the display panel.

[0103] The following describes the application of the pixel capacitor circuit provided in the embodiment of the present application in an actual scenario. Taking the introduction of a capacitor control circuit into three different color pixel columns to realize the charging and discharging of different column capacitors directly without GOA as an example for illustration.

[0104] The display panel is an indispensable visual carrier in daily life, and various dynamic information can be transmitted through the panel. However, as the size and resolution of display products are getting higher and higher, the requirements for performance and power consumption are also getting higher and higher.

[0105] The power consumption problem of the display panel has always been a research hotspot in the display field. In the related art, power consumption reduction is achieved through methods such as charge sharing and panel self-refresh. Among them, the charge sharing technology refers to resetting the pixel driving voltage by neutralizing positive and negative voltages during the blanking time, thereby reducing the huge voltage difference caused by polarity inversion and ultimately resulting in voltage consumption.

[0106] According to the display principle, during the display process, when a solid-color picture is loaded, the pixel voltages of each column are the same, but all GOAs still need to be turned on row by row, all the TFTs in each row are fully turned on, and the Source signals of each column are then sequentially loaded with the same pixel voltage. During this process, a large number of TFTs in the GOA are turned on, which is likely to generate a lot of additional power consumption. As Figure 4 shown, Figure 4Schematic diagram of the composition structure of the pixel circuit provided in some embodiments. The pixel circuit includes: a plurality of GOA units: GOA1, GOA2, ···, GOAn-1, GOAn. Each GOA unit represents one row. The voltage control signal output by the GOA unit is connected to the gate of the TFT in the same row to control the on / off of the TFT by controlling the voltage of the gate. For example, the voltage control signal G1 output by GOA1 is connected to the gate of the TFT to control the on / off state of the TFT in the first row; and the source of the TFT is connected to the Source signal to access the Source signal; and when the TFT is turned on, the capacitor C is charged by the voltage of the Source signal. The capacitor C includes capacitor 41 and capacitor 42; among them, capacitor 41 is a storage capacitor, and capacitor 42 represents a liquid crystal capacitor. When GOA1 turns on the first row, the TFTs in the first row are turned on, and the TFTs in other rows are turned off. The capacitor C in the first row is charged, and the capacitor C can discharge to the connected TFT to provide a pixel voltage, so that the pixel corresponding to the TFT is displayed on the panel. The other end of the capacitor C is connected to the common electrode voltage signal VCOM terminal. The voltage difference is formed across the liquid crystal cell corresponding to the capacitor C by the common electrode voltage signal VCOM and the input Source signal (as Figure 4 shown, the Source signal of the first column is S1, and the Source signal of the nth column is S n ) to enable the liquid crystal cell to perform grayscale display.

[0107] Similarly, the voltage control signal G2 output by GOA2 is connected to the gate of the TFT to control the on / off state of the TFT in the second row; the voltage control signal Gn-1 output by GOAn-1 is connected to the gate of the TFT to control the on / off state of the TFT in the (n-1)th row; the voltage control signal Gn output by GOAn is connected to the gate of the TFT to control the on / off state of the TFT in the nth row. The input signals of the plurality of GOA units include: a high-level control signal (GCH), a low-level signal (Vgatelow, VGL), a clock sequence signal (CLK), and a frame start signal (Start Vertical, STV). Among them, the GCH signal is used to provide a high-level signal for the GOA unit to turn on the GOA unit; VGL is used to provide a low-level signal for the GOA unit; CLK is used to provide a clock sequence for the GOA unit; STV is used to trigger the first-row GOA unit to output a scan signal, and the signal output of the previous-row GOA unit is input to the signal input terminal of the next-row GOA unit to trigger the next-row GOA unit. The STV signal is used to turn on the first-row GOA unit.

[0108] Such as Figure 4As shown, in the GOA circuit, there are a large number of TFTs in each row of the GOA, and as the resolution of the product gets higher and higher, the number of rows of the GOA also increases. However, when displaying a solid-color screen or a Source-to-Block screen, the Source voltage loaded in each column is the same. At this time, it is not necessary to turn on the GOA row by row to control the loading of different pixel voltages. If the GOA is still used for row-by-row control, it will cause a large waste of power consumption.

[0109] Based on this, an embodiment of the present application provides a pixel capacitor circuit. As Figure 5 shown, different pixel columns of red, green, and blue colors are controlled by different capacitor control circuits. Among them, for the red (Red, R)

[0110] pixel column, the R capacitor control circuit is used for control. At this time, the pixel capacitors C of all R pixels are connected in series using the TFTs in the R capacitor control circuit; that is, as Figure 5 shown in, the TFTs 501 to 50n are connected in series. Each capacitor circuit is disconnected by a TFT. The gates of the TFTs are uniformly controlled by Gr, and the sources are uniformly controlled by Vr.

[0111] Similarly, for the green (Green, G) pixel column, the G capacitor control circuit is used for control. At this

[0112] time, the pixel capacitors C of all G pixels are connected in series using the G capacitor control TFTs, that is, as Figure 5 shown in, the TFTs 511 to 51n are connected in series. And each capacitor circuit is disconnected by the G capacitor TFT. The gates of the G capacitor TFTs are uniformly controlled by Gg, and the sources are uniformly controlled by Vg.

[0113] For the blue (Blue, B) pixel column, the B capacitor control circuit is used for control. At this time, the pixel capacitors C of all B pixels are connected in series using the B capacitor control TFTs, that is, as Figure 5 shown in

[0114] the TFTs 521 to 52n are connected in series. And each capacitor circuit is disconnected by the B capacitor TFT. The gates of the B capacitor TFTs are uniformly controlled by Gb, and the sources are uniformly controlled by Vb.

[0115] In some embodiments, the overall connection diagram of the pixel capacitor circuit is as Figure 6 shown, and the screen is displayed through the display interface 601. In Figure 6 this, all R pixel columns can choose to use the same Gr to control the unified turn-on and turn-off of all columns of the "R capacitor control circuit", or each column can choose to use different

[0116] Gr1 to Grn control the separate turn-on and turn-off of different columns of the "R capacitance control circuit". The gates of the TFTs in the pixel 0 capacitance circuit 61 and the pixel capacitance circuit 62 are uniformly controlled by Gr, and the sources are uniformly controlled by Vr.

[0117] Furthermore, all G pixel columns can choose to use the same Gg to control the unified turn-on and turn-off of all columns of the "G capacitance control circuit", or each column can use different Gg1 to Gg n

[0118] to control the separate turn-on and turn-off of different columns of the "G capacitance control circuit". The gates of the TFTs in the pixel capacitance circuit 63 and the pixel capacitance circuit 64 are uniformly controlled by Gg, and the sources are uniformly controlled by Vg.

[0119] Furthermore, all B pixel columns can choose to use the same Gb to control the unified turn-on and turn-off of all columns of the "B capacitance control circuit", or each column can use different Gb1 to Gb n to control the separate turn-on and turn-off of different columns of the "B capacitance control circuit". The gates of the TFTs in the pixel capacitance circuit 65 and the pixel capacitance circuit 66 are uniformly controlled by Gb, and the sources are uniformly controlled by Vb.

[0120] Among them, Vr is responsible for loading the pixel capacitance voltage of the "R capacitance control circuit"; Vg is responsible for loading the pixel capacitance voltage of the "G capacitance control circuit"; Vb is responsible for loading the pixel capacitance voltage of the "B capacitance control circuit"; the turn-on and turn-off control of the capacitance control circuits of all pixel columns can be achieved through Gr, Gg, and Gb; the control of how much pixel capacitance voltage is loaded for all pixel columns can be achieved through Vr, Vg, and Vb, so as to realize the display of different grayscale pure color pictures.

[0121] In the embodiments of the present application, in the normal working mode, Gr, Gg, and Gb output low levels. At this time, the R, G, and B capacitor control circuits are turned off, and the display of the display panel depends on the GOA to be turned on row by row and different pixel voltages are loaded to achieve normal display. In the solid color working mode, Gr, Gg, and Gb output high levels. At this time, the R, G, and B capacitor control circuits are turned on; the GOA circuit controls not to output, and the display of the display panel depends on the R, G, and B capacitor control circuits for separate control, and Vr, Vg, and Vb cooperate to provide the gray-scale voltage for the display of the display panel to achieve solid color display. In the capacitor reset mode, when the LCD is displaying, the liquid crystal needs to be polarity-inverted between frames. During the process of polarity inversion, the pixel capacitor needs to overcome a large voltage span whether from the positive polarity to the negative polarity or from the negative polarity to the positive polarity, resulting in waste of energy. Therefore, in the Blanking stage between frames, the capacitor reset mode can be used. By simultaneously outputting high levels by Gr, Gg, and Gb and simultaneously loading the VCOM voltage by Vr, Vg, and Vb, the reset of the pixel capacitor voltage is achieved, thereby reducing the difference in capacitor voltage to be loaded when the next frame of the picture is displayed and further reducing the product power consumption. In this way, by introducing capacitor voltage control circuits in different pixel columns of R, G, B respectively, low-power display in the solid color picture and capacitor voltage reset between frames are achieved, thereby saving the power consumption of the display panel.

[0122] Based on the foregoing embodiments, the driving method of the pixel circuit provided by the embodiments of the present application can be implemented by a device. The device includes each unit included and each module included in each unit, and can be implemented by a processor in a computer device; of course, it can also be implemented by a specific logic circuit; during the implementation process, the processor can be a central processing unit (CPU), a microprocessor unit (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA), etc.

[0123] The description of the above device embodiments is similar to the description of the above method embodiments and has similar beneficial effects to the method embodiments. In some embodiments, the functions or modules included in the device provided by the embodiments of the present application can be used to execute the methods described in the above method embodiments. For the technical details not disclosed in the device embodiments of the present application, please refer to the description of the method embodiments of the present application for understanding.

[0124] It should be noted that in the embodiments of the present application, if the above-mentioned driving method of the pixel capacitor circuit is implemented in the form of software function modules and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiments of the present application, in essence or the part that contributes to the related art, can be embodied in the form of a software product. The software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROMs), magnetic disks, or optical discs that can store program codes. In this way, the embodiments of the present application are not limited to any specific hardware, software, or firmware, or any combination among hardware, software, and firmware.

[0125] The embodiments of the present application provide a computer device, including a memory and a processor. The memory stores a computer program that can run on the processor, and when the processor executes the program, it implements some or all of the steps in the above method.

[0126] The embodiments of the present application provide a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements some or all of the steps in the above method. The computer-readable storage medium can be transient or non-transient.

[0127] The embodiments of the present application provide a computer program, including computer-readable code. When the computer-readable code runs in a computer device, the processor in the computer device executes to implement some or all of the steps in the above method.

[0128] The embodiments of the present application provide a computer program product. The computer program product includes a non-transient computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, it implements some or all of the steps in the above method. The computer program product can be specifically implemented in a manner of hardware, software, or a combination thereof. In some embodiments, the computer program product is specifically embodied as a computer storage medium. In other embodiments, the computer program product is specifically embodied as a software product, such as a software development kit (SDK), etc.

[0129] It should be noted here that the descriptions of the above embodiments tend to emphasize the differences between the embodiments, and their similarities can be referred to each other. The descriptions of the above embodiments of the device, storage medium, computer program, and computer program product are similar to the descriptions of the above method embodiments and have beneficial effects similar to those of the method embodiments. For the technical details not disclosed in the embodiments of the device, storage medium, computer program, and computer program product of the present application, please refer to the descriptions of the method embodiments of the present application for understanding.

[0130] It should be understood that the "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures, or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, the appearances of "in one embodiment" or "in an embodiment" throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures, or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the magnitudes of the serial numbers of the above steps / processes do not mean the order of execution, and the order of execution of each step / process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application. The serial numbers of the embodiments of the present application above are only for description and do not represent the advantages or disadvantages of the embodiments.

[0131] It should be noted that in this article, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0132] In several embodiments provided in the present application, it should be understood that the disclosed device and method can be implemented in other ways. The device embodiments described above are only illustrative. For example, the division of the units is only a logical function division, and there can be other division methods in actual implementation. For example, multiple units or components can be combined, or can be integrated into another system, or some features can be ignored, or not executed. In addition, the couplings, direct couplings, or communication connections between the components shown or discussed with each other can be through some interfaces, and the indirect couplings or communication connections of the devices or units can be electrical, mechanical, or other forms.

[0133] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units; they may be located in one place or distributed across multiple network units; some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0134] In addition, in each embodiment of the present application, all the functional units may be integrated into one processing unit, or each unit may be separately taken as one unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware, or in the form of hardware plus software functional units.

[0135] Those of ordinary skill in the art can understand that all or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions. The foregoing program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps including the above method embodiments; and the foregoing storage medium includes: removable storage devices, read-only memory (ROM), magnetic disks, or optical discs and other various media that can store program codes.

[0136] Alternatively, if the above-mentioned integrated units of the present application are implemented in the form of software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application essentially or the part that contributes to the related technology can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in each embodiment of the present application. And the foregoing storage medium includes: removable storage devices, ROM, magnetic disks, or optical discs and other various media that can store program codes.

[0137] The above is only the implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered by the protection scope of the present application.

Claims

1. A pixel capacitor circuit, characterized in that, The pixel capacitance circuit includes: multiple rows of first switch modules and multiple rows of voltage storage modules; The multiple rows of first switch modules are connected in series, and are respectively connected to the voltage storage modules in the same row; The first switch module in any row is connected between the voltage storage module in the row above the any row and the voltage storage module in the any row; The multiple rows of first switch modules are used to receive a first control signal; wherein, the first control signal is used to synchronously control the on / off states of the multiple rows of first switch modules; The multiple rows of voltage storage modules are used to charge and discharge based on the on / off states of the multiple rows of first switch modules; The sources of the multiple rows of first switch modules are used to receive the source control signal when the multiple rows of first switch modules are in the on state, and charge the multiple rows of voltage storage modules based on the source control signal; The drain of each first switch module in the multiple rows of first switch modules is connected to the first end of the voltage storage module in the same row as the each first switch module, and the second end of the voltage storage module is connected to a common electrode voltage signal; wherein, the common electrode voltage signal is used to form a voltage difference with the source control signal across the voltage storage module, so as to drive the corresponding liquid crystal module of the voltage storage module to display through the voltage difference.

2. The pixel capacitor circuit according to claim 1, characterized in that, The drain of each first switch module is connected to the source of the first switch module in the row below the row to which the each first switch module belongs, forming the series connection between the multiple rows of first switch modules.

3. The pixel capacitor circuit according to claim 1 or 2, wherein The first control signal includes: a gate control signal and a source control signal; The gates of the multiple rows of first switch modules are used to receive the gate control signal, and enter the on state when the gate control signal is a high-level signal.

4. The pixel capacitance circuit according to claim 3, wherein The gate control signal matches the gate voltage of the multiple rows of first switch modules; the multiple rows of first switch modules correspond to at least one column of first pixel points with the same color between columns in the to-be-displayed picture, the colors within each column of the at least one column of first pixel points are the same, and the source control signal of the multiple rows of first switch modules matches the color of the at least one column of pixel points; The multiple rows of voltage storage modules are used to charge based on the source control signal when the multiple rows of first switch modules are in the on state; when the multiple rows of first switch modules are in the off state, provide the pixel voltage of the at least one column of pixel points with the same color for the liquid crystal module connected to the multiple rows of voltage storage modules, so that the liquid crystal module presents the picture corresponding to the at least one column of pixel points with the same color.

5. The pixel capacitor circuit according to claim 1, wherein The pixel capacitance circuit further includes: multiple rows of second switch modules; Any row of second switch modules in the multiple rows of second switch modules is connected to the voltage storage module in the same row as the row to which the any row of second switch modules belongs; The multiple rows of second switch modules are used to conduct or turn off row by row based on the received second control signal, so as to control the charging and discharging of the voltage storage module in the same row as the conducting second switch module.

6. The pixel capacitance circuit according to claim 5, wherein When the to-be-displayed screen is a first type of screen, the gate control signal and the source control signal in the first control signal are high-level signals respectively, and the second control signal is a low-level signal; the first type of screen includes: a solid-color screen or a screen in which the colors of at least one column of pixel dots are the same; The multi-row first switch module is used to enter a conducting state based on the gate control signal and transmit the source control signal to the multi-row voltage storage module; The multi-row voltage storage module is used to charge based on the source control signal; The multi-row second switch module is used to enter a closed state based on the second control signal.

7. The pixel capacitance circuit according to claim 5, wherein When the to-be-displayed screen is a second type of screen, the first control signal is a low-level signal and the second control signal is a high-level signal; the second type of screen is different from the first type of screen; The multi-row first switch module is used to enter a closed state based on the first control signal; The multi-row voltage storage module is used to disconnect the connection between the voltage storage modules of adjacent rows when the first switch module between the voltage storage modules of adjacent rows enters a closed state; Any row second switch module in the multi-row second switch module is used to enter a conducting state based on the second control signal belonging to the same row as the any row second switch module, turn off the second switch modules of other rows, and charge the voltage storage module belonging to the same row as the any row second switch module; wherein, the second switch modules of other rows are the second switch modules in the multi-row second switch module except the any row second switch module.

8. The pixel capacitance circuit according to claim 1 or 2, characterized in that, During the blanking time of two consecutive frames of to-be-displayed screens, the gate control signal in the first control signal is a high-level signal, and the source control signal in the first control signal is a common electrode voltage signal; The multi-row first switch module is further used to enter a conducting state based on the high-level signal during the blanking period of the two consecutive frames and provide the common electrode voltage signal to the multi-row voltage storage module; The multi-row voltage storage module is further used to reset the voltage based on the common electrode voltage signal during the blanking time of the two consecutive frames of to-be-displayed screens.

9. A display panel, characterized in that, The display panel includes: a display driving chip, a liquid crystal module, and the pixel capacitance circuit described in any one of claims 1 to 8 above; The display driving chip is connected to the pixel capacitance circuit, and the pixel capacitance circuit is connected to the liquid crystal module; The display driving chip is used to generate a first control signal based on the to-be-displayed screen and transmit it to the pixel capacitance circuit; The pixel capacitance circuit is used to provide a pixel voltage to the liquid crystal module based on the first control signal; The liquid crystal module is used to display a screen based on the pixel voltage.

10. A driving method for a pixel capacitor circuit, characterized in that, Applied to the pixel capacitance circuit described in any one of claims 1 to 8 above, the method includes: Controlling the multi-row first switch module in the pixel capacitance circuit to receive a first control signal; wherein, the first control signal is used to synchronously control the on-off states of the multi-row first switch module; Based on the on / off states of the multiple rows of the first switching module, control the charging and discharging of the multiple rows of voltage storage modules in the pixel capacitor circuit.

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