A power amplifier power selection circuit and radio frequency circuit

Abstract

This invention discloses a power amplifier power selection circuit and an RF circuit, comprising: a system power supply, an RF power supply, a first load switch, a second load switch, a CPU, an RF circuit, and an RF power amplifier; the system power supply is connected to the RF power amplifier via the first load switch; the RF power supply is connected to the RF power amplifier via the second load switch; the CPU is connected to the first and second load switches, and the RF circuit is connected to the CPU and the RF power amplifier; the CPU controls the on / off state of the first and second load switches based on signal feedback between the RF circuit and the RF power supply, selecting either the system power supply or the RF power supply to power the RF power amplifier. This invention utilizes the first and second load switches to select either the system power supply or the RF power supply to power the RF power amplifier, enabling the system power supply to directly power the RF power amplifier, thereby reducing the number of RF power supply modules, shrinking the motherboard area, and reducing hardware costs.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a power amplifier power selection circuit and a radio frequency circuit. Background Technology

[0002] In the design and manufacturing of smartphones, the radio frequency (RF) components on the motherboard need to be compatible with signals from multiple frequency bands simultaneously, resulting in a significant increase in the number of components. At the same time, this increase in components leads to increased power consumption. To maintain the device's battery life, the battery needs to be larger, further reducing the size of the motherboard.

[0003] Considering the size and power consumption of smartphone motherboards, the design of the RF power supply is particularly important. To simultaneously meet the power supply requirements of two RF power amplifiers, a common design approach in existing technology is to use two separate RF power supplies to power each amplifier. However, due to voltage and switching speed limitations, the system power supply cannot power all frequency bands of the RF power amplifiers, leaving it idle.

[0004] Due to the need to reduce the size of smartphone motherboards and the idle state of system power supplies in existing technologies, a circuit design is needed to solve the problem of powering the RF power amplifier with the system power supply, while also reducing the size of smartphone modules and the motherboard area. Summary of the Invention

[0005] The purpose of this invention is to provide a power amplifier power selection circuit and an RF circuit, which can select the system power supply to power the RF power amplifier, thereby reducing the number of RF power supply modules and shrinking the motherboard area.

[0006] To solve the above-mentioned technical problems, the present invention provides a power amplifier power selection circuit, comprising:

[0007] The system includes a power supply, an RF power supply, a first load switch, a second load switch, a CPU, RF circuitry, and an RF power amplifier.

[0008] Furthermore, the system power supply is connected to the RF power amplifier via the first load switch; the RF power supply is connected to the RF power amplifier via the second load switch; the CPU is connected to the first load switch and the second load switch; and the RF circuit is connected to the CPU and the RF power amplifier.

[0009] Furthermore, the CPU controls the on / off state of the first load switch and the second load switch based on the signal feedback between the RF circuit and the RF power supply, so as to select the system power supply or the RF power supply to power the RF power amplifier.

[0010] Furthermore, the first GPIO pin of the CPU is connected to the on / off pin of the first load switch; the second GPIO pin of the CPU is connected to the on / off pin of the second load switch.

[0011] Furthermore, the CPU is loaded with an RF driver file. By writing the RF driver file, the CPU's operating mode is controlled to control the output control signals of the first GPIO pin and the second GPIO pin. The control signals control the on / off state of the first load switch and the second load switch.

[0012] Furthermore, when the RF power amplifier is operating in the first frequency band, the CPU controls the first GPIO pin to output a high level to control the first load switch to turn on, and selects the system power supply to power the RF power amplifier.

[0013] Furthermore, when the RF power amplifier is operating in the second frequency band, the CPU controls the second GPIO pin to output a high level to control the second load switch to turn on, and selects the RF power supply to power the RF power amplifier.

[0014] Furthermore, when the RF power supply is in standby mode, the CPU controls the first GPIO pin and the second GPIO pin to output a low level, controls the first load switch and the second load switch to disconnect, and stops supplying power to the RF power amplifier.

[0015] Furthermore, the power selection circuit for the RF power amplifier also includes: a first capacitor and a second capacitor; one plate of the first capacitor is connected between the first load switch and the RF power amplifier, and the other plate is grounded; one plate of the second capacitor is connected between the second load switch and the RF power amplifier, and the other plate is grounded.

[0016] Furthermore, the radio frequency circuit and the CPU are connected via QLINK.

[0017] The present invention also proposes a radio frequency (RF) circuit, which includes a power amplifier power selection circuit as described above, and further includes a filter; the filter is connected to the RF power amplifier and the RF circuit for signal filtering.

[0018] Furthermore, the radio frequency circuit also includes an antenna; the antenna is connected to the filter.

[0019] Compared with the prior art, the present invention has at least the following beneficial effects:

[0020] This application utilizes a first load switch and a second load switch to select the system power supply or the RF power supply to power the RF power amplifier, so that the system power supply can also be selected to power the RF power amplifier, thereby reducing the number of RF power supply modules, reducing the motherboard area, and reducing hardware costs.

[0021] Furthermore, by writing RF driver files in the CPU, the CPU can control the on / off state of the first and second load switches. When the smartphone is in standby mode, the CPU controls both the first and second load switches to disconnect, stopping power supply to the RF power amplifier, thereby saving power and extending standby time. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of a power amplifier power selection circuit and an RF circuit module according to an embodiment of the present invention;

[0023] Figure 2 This is a detailed circuit diagram of a power amplifier power selection circuit and an RF circuit according to an embodiment of the present invention. Detailed Implementation

[0024] The following is a more detailed description of a power amplifier power selection circuit and radio frequency circuit diagram of the present invention, with reference to the schematic diagrams, which illustrate preferred embodiments of the invention. It should be understood that those skilled in the art can modify the invention described herein while still achieving its advantageous effects. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit the invention.

[0025] The invention is described more specifically by way of example in the following paragraphs with reference to the accompanying drawings. The advantages and features of the invention will become clearer from the following description and claims. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.

[0026] This invention provides a power amplifier power selection circuit; please refer to [reference needed]. Figure 1 and Figure 2 As shown, the power amplifier power selection circuit includes: system power supply U4, RF power supply U5, first load switch U2, second load switch U3, CPU, RF circuit, and RF power amplifier U1.

[0027] Specifically, the system power supply U4 is connected to the RF power amplifier U1 through the first load switch U2; the RF power supply U5 is connected to the RF power amplifier U1 through the second load switch U3; the CPU is connected to the first load switch U2 and the second load switch U3; and the RF circuit is connected to the CPU and the RF power amplifier U1.

[0028] In a specific example, port 11 of the system power supply U4 is connected to port 3 (VIN) of the first load switch U2; port 7 of the RF power supply U5 is connected to the VIN port of the second load switch U3; port 1 of the first load switch U2 is grounded; port 2 of the first load switch U2 is connected to the second load switch U3, and port 3 (VPA) of the RF power amplifier U1 is connected at this connection node; port 1 of the second load switch U3 is grounded. Specifically, the RF circuit is connected to the RFIN_LB of the RF power amplifier U1 via TX0_LB1. The CPU controls the on / off state of the first load switch U2 and the second load switch U3 through signal feedback between the RF circuit and the RF power supply U5, so as to select the system power supply U4 or the RF power supply U5 to power the RF power amplifier U1.

[0029] In a specific example, the Qualcomm SM4350PRO is used as the CPU; please refer to [link / reference]. Figure 1 and Figure 2 As shown, the first GPIO pin GPIO115 of the CPU is connected to the ON pin of the first load switch U2, and the second GPIO pin GPIO116 of the CPU is connected to the ON pin of the second load switch U3, which is used to control the on / off state of the first load switch U2 and the second load switch U3.

[0030] Specifically, the CPU is loaded with an RF driver file. By writing the RF driver file, the CPU's operating mode is controlled to control the output control signals of the first GPIO pin and the second GPIO pin. The control signals control the on / off state of the first load switch U2 and the second load switch U3.

[0031] Furthermore, in practical applications, radio frequency driver files can be written as needed to change the control mode of the CPU for the first load switch U2 and the second load switch U3.

[0032] In a specific example, when the RF power amplifier U1 is operating in the first frequency band, the CPU controls the first GPIO pin, i.e., GPIO115, to output a high level to control the first load switch U2 to turn on, and selects the system power supply U4 to supply power to the RF power amplifier U1.

[0033] As an example, the second GPIO pin of the second load switch U3, namely GPIO116, is connected to the RF power supply U5. When the RF power amplifier U1 is operating in the second frequency band, the CPU controls the second GPIO pin to output a high level to control the second load switch U3 to turn on, and selects the RF power supply U5 to supply power to the RF power amplifier U1.

[0034] Specifically, when the RF power supply U5 is in standby mode, the CPU controls the first GPIO pin, i.e. GPIO115 and the second GPIO pin, i.e. GPIO116, to output a low level, thereby controlling the first load switch U2 and the second load switch U3 to disconnect and stop supplying power to the RF power amplifier U1.

[0035] Furthermore, the RF power amplifier power selection circuit also includes: a first capacitor C1 and a second capacitor C2; one plate of the first capacitor C1 is connected between the first load switch U2 and the RF power amplifier U1, and the other plate is grounded; one plate of the second capacitor C2 is connected between the second load switch U3 and the RF power amplifier U1, and the other plate is grounded. Specifically, the first capacitor C1 and the second capacitor C2 are used to eliminate the power ripple of the system power supply U4 and the RF power supply U5, and can stabilize the supply voltage of the RF power amplifier U1.

[0036] Furthermore, the RF circuit and the CPU are connected via QLINK. Specifically, the RF circuit and the CPU, namely the Qualcomm SM4350PRO, are connected via QLINK M and QLINK P.

[0037] In another aspect of this embodiment, a radio frequency (RF) circuit is also provided, which includes a power amplifier power selection circuit as described above, and further includes a filter and an antenna, wherein the antenna is connected to the filter; the filter is connected to the RF power amplifier U1 and the RF circuit for signal filtering.

[0038] In this embodiment, the system power supply U4 is used to power the 5G RF power amplifier U1 as an example to illustrate the specific circuit diagram. In the circuit diagram, the Qualcomm SM4350PRO is selected as the CPU model, and the BAND 8 duplex filter is selected as the filter model. For details, please refer to... Figure 2 As shown, the ON interface of the load switch U2 is connected to the CPU, namely the GPIO115 interface of the Qualcomm SM4350PRO, and the ON interface of the load switch U3 is connected to the CPU, namely the GPIO116 interface of the Qualcomm SM4350PRO.

[0039] It is understood that this embodiment is only for the purpose of facilitating understanding of the design scheme of a power amplifier power selection circuit according to the present invention. Figure 2 The specific circuit diagram shown is not the only possible model for the power amplifier power selection circuit of this invention. It can be concluded that... Figure 2 The specific circuit diagram shown is not the only specific implementation scheme of the present invention.

[0040] In one specific embodiment, the power amplifier power selection circuit of the present invention utilizes the first load switch U2 and the second load switch U3 to select between the system power supply U4 and the RF power supply U5 to supply power to the RF power amplifier U1. Specifically, it can be performed as follows:

[0041] In this embodiment, when the RF power amplifier U1 operates in the 3G and 4G frequency bands or ENDC mode, the RF circuit outputs a high level to GPIO 115 and a low level to GPIO 116. At this time, the first load switch U2 is turned on, the second load switch U3 is turned off, and the system power supply U4 supplies power to the RF power amplifier U1.

[0042] Specifically, when the RF power amplifier U1 operates in the 5G or HPUE frequency band, the RF circuit outputs a low level to GPIO115 and a high level to GPIO116. At this time, the first load switch U2 is closed, the second load switch U3 is open, and the RF power supply U5 supplies power to the RF power amplifier U1.

[0043] Furthermore, when the smartphone is in standby mode, the RF circuit outputs a low level to GPIO 115 and a low level to GPIO 116. At this time, the first load switch U2 and the second load switch U3 are turned off at the same time, and the power supply of the RF power amplifier U1 is disconnected, reducing the leakage current of the RF power amplifier U1 and extending the standby time.

[0044] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A power amplifier power selection circuit, characterized in that, include: System power supply, RF power supply, first load switch, second load switch, CPU, RF circuit and RF power amplifier; The system power supply is connected to the RF power amplifier via the first load switch; the RF power supply is connected to the RF power amplifier via the second load switch; the CPU is connected to the first load switch and the second load switch; and the RF circuit is connected to the CPU and the RF power amplifier. The CPU controls the on / off state of the first load switch and the second load switch based on the signal feedback between the RF circuit and the RF power supply, so as to select the system power supply or the RF power supply to power the RF power amplifier. The first GPIO pin of the CPU is connected to the on / off pin of the first load switch; the second GPIO pin of the CPU is connected to the on / off pin of the second load switch. When the RF power amplifier is operating in the first frequency band, the CPU controls the first GPIO pin to output a high level to control the first load switch to turn on, and selects the system power supply to power the RF power amplifier. When the RF power amplifier is operating in the second frequency band, the CPU controls the second GPIO pin to output a high level to control the second load switch to turn on, and selects the RF power supply to power the RF power amplifier.

2. The power amplifier power selection circuit as described in claim 1, characterized in that, The CPU is loaded with an RF driver file. By writing the RF driver file, the CPU's operating mode is controlled to control the output control signals of the first GPIO pin and the second GPIO pin. The control signals control the on / off state of the first load switch and the second load switch.

3. The power amplifier power selection circuit as described in claim 2, characterized in that, When the RF power supply is in standby mode, the CPU controls the first GPIO pin and the second GPIO pin to output a low level, controls the first load switch and the second load switch to disconnect, and stops supplying power to the RF power amplifier.

4. The power amplifier power selection circuit as described in claim 1, characterized in that, It also includes: a first capacitor and a second capacitor; one plate of the first capacitor is connected between the first load switch and the radio frequency power amplifier, and the other plate is grounded; one plate of the second capacitor is connected between the second load switch and the radio frequency power amplifier, and the other plate is grounded.

5. The power amplifier power selection circuit as described in claim 1, characterized in that, The radio frequency circuit and the CPU are connected via QLINK.

6. A radio frequency circuit, characterized in that, The power amplifier power selection circuit as described in any one of claims 1-5 further includes: a filter; the filter is connected to the RF power amplifier and the RF circuit for signal filtering.

7. The radio frequency circuit as described in claim 6, characterized in that, The radio frequency circuit further includes an antenna; the antenna is connected to the filter.

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