Memory device control method, memory device, electronic device, memory controller, and computer-readable medium

Abstract

The present invention provides a method, a memory device, an electronic device, a controller for a memory device block, and a computer-readable medium for performing communication specification version control of a memory device in a predetermined communication architecture by means of compatibility management. The method may include: receiving a first command from a host device via a transmission interface circuit within the memory controller by the memory controller; executing a device-side compatibility management program of a compatibility management function by the memory controller to detect whether the host device complies with any of multiple predetermined versions of a predetermined communication specification based on the first command to generate a detection result, and selectively switching from one firmware version to another firmware version based on the detection result; and sending a first response to the host device via the transmission interface circuit by the memory controller.

Description

Technical Field

[0001] The present invention relates to memory control, and more particularly to a method for performing communication specification version control of a memory device in a predetermined communication architecture by means of compatibility management, and related apparatus such as the memory device, an electronic device, a memory controller of the memory device, and related computer-readable media. Background Art

[0002] A memory device may include a flash memory for storing data, and the management of access to the flash memory is quite complex. For example, the memory device may be a memory card, a solid state drive (SSD), or an embedded memory device (e.g., an embedded memory device that complies with the universal flash storage (UFS) specification). For example, multiple versions of the UFS specification, such as UFS 3.0 and UFS 3.1, may each define its own characteristics. When a manufacturer of a memory device attempts to implement a memory device according to the UFS specification, certain problems may arise. In particular, in a preliminary stage (e.g., a design stage) before the mass production stage of the memory device, a controller integrated circuit (IC) supplier may initially provide a controller IC with a firmware version of a firmware code to the memory device manufacturer, and this firmware version complies with a specific version of the UFS specification (e.g., UFS3.0). When it is determined that a target host device to be coupled to a memory device, together with the memory device, should comply with another version of the UFS specification (e.g., UFS 3.1), the memory device manufacturer may need to wait for the controller IC supplier to resolve the compatibility issue because the controller IC with the current firmware version of the firmware code is incompatible with the target host device. For example, the controller IC supplier may need to prepare another controller IC for the memory device manufacturer, or replace the current firmware version of the firmware code with another firmware version of the firmware code, and the memory device manufacturer may need to reconfigure the memory device, resulting in increased costs for both the memory device manufacturer and the controller IC supplier. Related technologies have attempted to address this issue, however, they may introduce more problems (e.g., certain side effects). Therefore, a novel method and related architecture are needed to address these issues without introducing any side effects or in a manner that is less likely to introduce side effects. Summary of the Invention

[0003] Therefore, one of the multiple objects of the present invention is to provide a method for performing communication specification version control of a memory device in a predetermined communication architecture (e.g., a Universal Flash Storage (UFS) communication architecture) by means of compatibility management, as well as related devices such as the memory device, an electronic device, a memory controller of the memory device, and related computer-readable media, to solve the above-mentioned problems.

[0004] At least one embodiment of the present invention provides a method for controlling the communication specification version of a memory device in a predetermined communication architecture by means of compatibility management, wherein the method is applicable to a memory controller of the memory device. The memory device may include the memory controller and a non-volatile memory, and the non-volatile memory may include at least one non-volatile memory element (e.g., one or more non-volatile memory elements). The method may include: receiving a first command from a host device via a transmission interface circuit within the memory controller by the memory controller; executing a device-side compatibility management program of a compatibility management function in the memory controller to detect whether the host device complies with any of multiple predetermined versions of a predetermined communication specification based on the first command to generate a detection result, and selectively switching from one firmware version to another firmware version based on the detection result; and sending a first response to the host device via the transmission interface circuit by the memory controller, wherein the first response is sent to the host device in response to the first command.

[0005] In addition to the above method, the present invention further provides a memory controller for a memory device, wherein the memory device may include the memory controller and a non-volatile memory. The non-volatile memory may include at least one non-volatile memory element (e.g., one or more non-volatile memory elements). The memory controller further includes a processing circuit configured to control the memory controller based on a plurality of host commands from a host device to allow the host device to access the non-volatile memory via the memory controller. The processing circuit is configured to perform communication specification version control of the memory device in a predetermined communication architecture by means of compatibility management. The memory controller further includes a transmission interface circuit, and the transmission interface circuit is configured to communicate with the host device. For example, the memory controller receives a first command from the host device via the transmission interface circuit within the memory controller; the memory controller executes a device-side compatibility management program of a compatibility management function to detect whether the host device complies with any of multiple predetermined versions of a predetermined communication specification based on the first command to generate a detection result, and selectively switches from one firmware version to another firmware version based on the detection result; and the memory controller sends a first response to the host device via the transmission interface circuit, wherein the first response is sent to the host device in response to the first command.

[0006] In addition to the above method, the present invention further provides the memory device including the memory controller, wherein the memory device includes the non-volatile memory and the memory controller. The non-volatile memory is used to store information. The memory controller is coupled to the non-volatile memory and is used to control the operation of the memory device.

[0007] In addition to the aforementioned method, the present invention further provides a related electronic device. The electronic device may include the aforementioned memory device and may further include: a host device coupled to the memory device. The host device may include: at least one processor for controlling the operation of the host device; and a power supply circuit coupled to the at least one processor and configured to provide power to the at least one processor and the memory device. Furthermore, the memory device may provide storage space for the host device.

[0008] At least one embodiment of the present invention provides a method for performing communication specification version control of a memory device in a predetermined communication architecture by means of compatibility management, wherein the method is applicable to a host device coupled to the memory device. The memory device may include a memory controller and a non-volatile memory, and the non-volatile memory may include at least one non-volatile memory element (e.g., one or more non-volatile memory elements). The method may include: sending a first command from the host device to the memory controller via a transmission interface circuit within the host device to trigger the memory controller to execute a device-side compatibility management program for a compatibility management function, so as to detect whether the host device complies with any of multiple predetermined versions of a predetermined communication specification based on the first command to generate a detection result, and selectively switch from one firmware version to another firmware version based on the detection result; after sending the first command to trigger the memory controller to execute the device-side compatibility management program, waiting for a first response from the memory controller; and receiving the first response from the memory controller via the transmission interface circuit, wherein the first response is sent by the memory controller to the host device in response to the first command.

[0009] In addition to the above method, the present invention further provides a host device operating according to the method, and further provides a computer-readable medium related to the method, wherein the computer-readable medium stores a program code that, when executed by the host device, causes the host device to operate according to the method. According to some embodiments, the host device may send a vendor-specific command, such as a vendor-defined command, to the memory device to indicate that the host device complies with one of multiple predetermined versions of the UFS specification (e.g., one of UFS 3.0 and UFS 3.1).

[0010] According to certain embodiments, the device may include at least a portion (e.g., a portion or all) of the electronic device. For example, the device may include the memory controller in the memory device. For another example, the device may include the memory device. For another example, the device may include the entire electronic device.

[0011] According to certain embodiments, the memory device can store data for the host device. In addition, the memory device can read the stored data in response to a host command from the host device and provide the data read from the non-volatile memory to the host device. In order to correct the problems of the related art, it is proposed that the memory device can operate according to a compatibility management workflow of the method to detect whether the host device complies with any of multiple predetermined versions of the UFS specification (e.g., UFS 3.0 and UFS 3.1) among all versions of the UFS specification, and selectively switch from one firmware version to another firmware version based on a detection result of this detection operation. According to certain embodiments, the host device may be configured to send a vendor-specific command (e.g., a vendor-defined command) to the memory device to indicate that the host device complies with any one of the multiple predetermined versions of the UFS specification (e.g., one of UFS 3.0 and UFS 3.1), and the memory device may be configured to receive the vendor-specific command (e.g., the vendor-defined command) from the host device and detect that the host device complies with the any one of the multiple predetermined versions of the UFS specification (e.g., one of UFS 3.0 and UFS 3.1), and selectively switch from one firmware version to another firmware version based on the vendor-specific command.

[0012] The method and related apparatus of the present invention can ensure that the memory device can operate properly in various situations. For example, the memory device can automatically switch firmware versions based on the detection results of the detection operation or based on the vendor-specific command, thereby ensuring compatibility between the memory device and the host device. Furthermore, the method and apparatus of the present invention can solve problems of the related art without introducing any side effects or in a manner that is unlikely to introduce side effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the present invention.

[0014] Figure 2 According to an embodiment of the present invention, a memory device such as a memory device in a predetermined communication architecture is configured to perform compatibility management. Figure 1 A compatibility control scheme of a communication specification version control method for a memory device is shown.

[0015] Figure 3 According to an embodiment of the present invention, a workflow of a method for controlling the communication specification version of the memory device in the predetermined communication architecture by means of compatibility management is described.

[0016] Figure 4According to an embodiment of the present invention, a host-side workflow of the method is described.

[0017] Figure 5 According to one embodiment of the present invention, a device-side workflow of the method is described.

[0018]

Explanation of symbols

[0019] 10: Electronic devices

[0020] 50: Host device

[0021] 52: Processor

[0022] 52C: Program code

[0023] 52M: Computer readable media

[0024] 54: Power supply circuit

[0025] 58: Transmission interface circuit

[0026] 100: Memory device

[0027] 110:Memory controller

[0028] 110CM: Programming code in compatibility management system

[0029] 112: Microprocessor

[0030] 112C: Program code

[0031] 112M: Read-only memory

[0032] 114: Control logic circuit

[0033] 116: Random Access Memory

[0034] 116T: Temporary logical to physical address mapping table

[0035] 118: Transmission interface circuit

[0036] 118U: Upper (U) controller

[0037] 118M:M physical layer circuit

[0038] 120: Non-volatile (NV) memory

[0039] 120T: Global logical to physical address mapping table

[0040] 122-1 to 122-N: Non-volatile (NV) memory devices

[0041] S11~S13, S21~S23, S30~S40, S51~S53, S61~S63: Steps DETAILED DESCRIPTION

[0042] Figure 1 FIG1 is a schematic diagram of an electronic device 10 according to an embodiment of the present invention, wherein the electronic device 10 may include a host device 50 and a memory device 100. The host device 50 may include at least one processor (e.g., one or more processors), collectively referred to as a processor 52, and may include a computer-readable medium 52M storing a program code 52C, a power supply circuit 54, and a transmission interface circuit 58. The processor 52 and the transmission interface circuit 58 may be coupled to each other via a bus and may be coupled to the power supply circuit 54 for power. The processor 52 may be used to control the operation of the host device 50, and the power supply circuit 54 may be used to provide power to the processor 52, the transmission interface circuit 58, and the memory device 100, and output one or more driving voltages to the memory device 100. The memory device 100 may provide storage space to the host device 50 and may receive the one or more driving voltages from the host device 50 as power for the memory device 100. Examples of the host device 50 may include (but are not limited to): multi-function mobile phones, tablet computers, wearable devices, and personal computers, such as desktop computers and laptop computers. Examples of the memory device 100 may include (but are not limited to): portable memory devices (such as memory cards that comply with SD / MMC, CF, MS or XD specifications, solid state drives (SSDs), and various types of embedded memory devices (such as embedded memory devices that comply with universal flash storage (UFS) specifications or embedded multi-media cards (eMMC) specifications). In addition, the computer-readable medium 52M may be implemented by one or more hard disk drives (HDDs), one or more SSDs, etc. According to this embodiment, the memory device 100 may include a controller, such as a memory controller 110, and may further include a non-volatile (NV) memory 120 (in Figure 1 The controller is used to access the non-volatile memory 120, and the non-volatile memory 120 is used to store information. The non-volatile memory 120 may include at least one non-volatile memory element (e.g., one or more non-volatile memory elements), such as a plurality of non-volatile memory elements 122-1, 122-2, ..., and 122-N (in FIG. Figure 1, and 122-N may be a plurality of flash memory chips or a plurality of flash memory dies, respectively. However, the present invention is not limited thereto.

[0043] like Figure 1 As shown, the memory controller 110 may include a processing circuit such as a microprocessor 112, a storage unit such as a read-only memory (ROM) 112M, a control logic circuit 114, a random access memory (RAM) 116 (for example, which may be implemented as static random access memory), and a transmission interface circuit 118. At least a portion (for example, a portion or all) of the above components may be coupled to each other via a bus. The RAM 116 may be used to provide internal storage space for the memory controller 110 (for example, to temporarily store information), but the present invention is not limited thereto. In addition, the ROM 112M of this embodiment is used to store program code 112C, and the microprocessor 112 is used to execute the program code 112C to control access to the non-volatile memory 120. Please note that the program code 112C may also be stored in the RAM 116 or any other type of memory. In addition, the control logic circuit 114 is used to control the non-volatile memory 120. The control logic circuit 114 may include an error correction code (ECC) circuit (not shown). Figure 1), which can perform error correction code encoding and decoding to protect data and / or perform error correction, and the transmission interface circuit 118 can include multiple sub-circuits that can interact with each other for communication. The transmission interface circuit 118 can comply with one or more communication standards among various communication standards (such as the Serial Advanced Technology Attachment (SATA) standard, the Universal Serial Bus (USB) standard, the Peripheral Component Interconnect Express (PCIe) standard, the embedded MultiMediaCard standard, and the Universal Flash Storage standard), and can communicate between the memory device 100 and the host device 50 (such as the transmission interface circuit 58) according to the one or more communication standards. Similarly, the transmission interface circuit 58 can comply with the one or more communication standards, and can communicate between the host device 50 and the memory device 100 (such as the transmission interface circuit 118) according to the one or more communication standards. For example, the multiple sub-circuits of the transmission interface circuit 118 may include a physical layer (PHY) circuit, such as an M-PHY circuit 118M that complies with the relevant specifications of the mobile industry processor interface (MIPI) Alliance, and at least one upper layer controller (e.g., one or more upper layer controllers), which may be collectively referred to as an upper layer controller 118U (labeled as "U controller" for simplicity), and the transmission interface circuit 58 may be implemented to have a circuit architecture (e.g., multiple corresponding sub-circuits) that is similar to or identical to the circuit architecture of the transmission interface circuit 118.

[0044] In this embodiment, the host device 50 may transmit multiple host commands corresponding to logical addresses to the memory controller 110 to indirectly access the non-volatile memory 120 in the memory device 100. The memory controller 110 receives the multiple host commands and the logical addresses, converts each of the multiple host commands into memory operation commands (hereinafter referred to as operation commands for simplicity), and further uses the operation commands to control the non-volatile memory 120 to read from, write to, or program a memory cell or data page at a specific physical address in the non-volatile memory 120. The physical address may be associated with the logical address. For example, the memory controller 110 may generate or update at least one logical-to-physical (L2P) address mapping table to manage the relationship between physical addresses and logical addresses. The non-volatile memory 120 may store a global logical-to-physical address mapping table 120T to enable the memory controller 110 to control the memory device 100 to access data in the non-volatile memory 120, but the present invention is not limited thereto. For example, the non-volatile memory 120 may store a plurality of in-system programming (ISP) codes, each of which is used to provide various functions for the memory device 100 (e.g., the memory controller 110). The memory controller 110 may load any of the plurality of ISP codes from the non-volatile memory 120 into at least one storage area within the memory controller 110 (e.g., a program code area within the random access memory 116). The processing circuit, such as the microprocessor 112, may run / execute the ISP code to provide the memory device 100 (e.g., the memory controller 110) with a function corresponding to the ISP code among the various functions described above. For example, the ISP code may be a compatibility management system ISP code 110CM. When executed by the memory device 100 (e.g., the memory controller 110), the compatibility management system ISP code 110CM enables the memory device 100 (e.g., the memory controller 110) to have a compatibility management function.

[0045] For better understanding, the global logical-to-physical address mapping table 120T may be located in a predetermined area within the non-volatile memory device 122-1, such as a system area, wherein one or more of the plurality of in-system programming codes, such as the compatibility management system in-system programming code 110CM, may be located in another predetermined area within the non-volatile memory device 122-1. However, the present invention is not limited thereto. For example, the global logical-to-physical address mapping table 120T may be divided into a plurality of local logical-to-physical address mapping tables, and the plurality of local logical-to-physical address mapping tables, together with the plurality of in-system programming codes, may be stored in one or more of the non-volatile memory devices 122-1, 122-2, ..., and 122-N, and more particularly, may be stored in the non-volatile memory devices 122-1, 122-2, ..., and 122-N, respectively. When needed, the memory controller 110 may load at least a portion (e.g., a portion or all) of the global logical-to-physical address mapping table 120T into the random access memory 116 or other memory. For example, the memory controller 110 may load a local logical-to-physical address mapping table from the multiple local logical-to-physical address mapping tables into the random access memory 116 as a temporary logical-to-physical address mapping table 116T to access data in the non-volatile memory 120 based on the local logical-to-physical address mapping table stored as the temporary logical-to-physical address mapping table 116T, but the present invention is not limited to this.

[0046] Furthermore, the at least one non-volatile memory device (e.g., one or more non-volatile memory devices, such as non-volatile memory devices 122-1, 122-2, ..., and 122-N) may include multiple blocks. The minimum unit for performing data erase operations on the non-volatile memory 120 by the memory controller 110 may be a block, and the minimum unit for performing data write operations on the non-volatile memory 120 by the memory controller 110 may be a page, but the present invention is not limited thereto. For example, any non-volatile memory device 122-n (where "n" may represent any integer in the range [1, N]) among the non-volatile memory devices 122-1, 122-2, ..., and 122-N may include multiple blocks, and one of the multiple blocks may include and store a specific number of pages. The memory controller 110 may access a specific page within a specific block of the multiple blocks based on a block address and a page address.

[0047] Figure 2 According to one embodiment of the present invention, a memory device such as a memory device in a predetermined communication architecture (such as a universal flash storage (UFS) communication architecture) is described by using compatibility management (such as the compatibility management function). Figure 1 The compatibility control scheme of the communication specification version control method of the memory device 100 shown in FIG. Figure 1 The illustrated architecture includes, for example, an electronic device 10, a host device 50, a memory device 100, and a memory controller 110, particularly, the components within the memory controller 110. On the host side of the host device 50, the host device 50 (e.g., the processor 52 running program code 52C) may be in an idle state, then leave this idle state to perform steps S11, S12, and S13, and then enter its idle state. On the device side of the memory device 100, the memory device 100 (e.g., the memory controller 110, particularly, the microprocessor 112 running program code 110CM within the compatibility management system) may be in an idle state, then leave this idle state to perform steps S21, S22, and S23, and then enter its idle state.

[0048] In step S11, the host device 50 (e.g., the processor 52 running the program code 52C) may prepare a first command (labeled as "prepared command" for simplicity), and more particularly, send the first command to the memory controller 110 (e.g., the memory controller 110) via the transmission interface circuit 58. For example, the first command may represent a vendor-specific command (e.g., a vendor-defined command, which may be defined by a vendor of the memory controller 110) to indicate that the host device 50 complies with one of a plurality of predetermined versions of the UFS specification (e.g., one of UFS 3.0 and UFS 3.1). The vendor-specific command may be implemented as a write buffer command, but the present invention is not limited thereto. For another example, the first command may represent a read descriptor request, wherein the memory device 100 (e.g., the memory controller 110) may detect whether the host device 50 complies with any of the multiple predetermined versions of the UFS specification (e.g., any one of UFS 3.0 and UFS 3.1).

[0049] In step S12 , in response to the command, the host device 50 (eg, the processor 52 running the program code 52C) may wait for a first response (labeled “wait for response” for simplicity) sent by the memory device 100 (eg, the memory controller 110 ).

[0050] In step S13, the host device 50 (e.g., the processor 52 running the program code 52C) may receive the first response from the memory device 100 (e.g., the memory controller 110) via the transmission interface circuit 58 to obtain the first response (labeled as "obtain response" for simplicity). For example, the first command may represent the vendor-specific command (e.g., the vendor-defined command), and the first response may represent a vendor-specific response (e.g., a vendor-defined response) corresponding to the vendor-specific command (e.g., the vendor-defined command) to indicate a result of the compatibility management performed by the memory device 100 (e.g., the memory controller 110). For another example, the first command may represent the read descriptor request, and the first response may represent a read descriptor response corresponding to the read descriptor request.

[0051] In step S21 , the memory device 100 (eg, the memory controller 110 , and in particular, the microprocessor 112 running the compatibility management system programming code 110CM) may receive the first command (labeled as “receive command” for simplicity) from the host device 50 via the transmission interface circuit 118 .

[0052] In step S22, the memory device 100 (e.g., the memory controller 110, and in particular, the microprocessor 112 running the compatibility management system internal programming code 110CM) may execute a device-side compatibility management program (which may also be referred to as a "compatibility program" for simplicity) for the compatibility management function. Based on the first command, such as the vendor-specific command or the read descriptor request, the memory device 100 (e.g., the memory controller 110, and in particular, the microprocessor 112 running the compatibility management system internal programming code 110CM) may detect whether the host device 50 complies with any of the plurality of predetermined versions of the UFS specification (e.g., any one of UFS 3.0 and UFS 3.1), and selectively switch from one firmware version to another firmware version based on a detection result of this detection operation.

[0053] In step S23 , the memory device 100 (eg, the memory controller 110 , and in particular, the microprocessor 112 running the compatibility management system programming code 110CM) may send the first response to the host device 50 via the transmission interface circuit 118 (labeled as “send response” for simplicity).

[0054] For a better understanding, the method can be used as Figure 2 The respective workflows of the host device 50 and the memory device 100 are described in detail, but the present invention is not limited thereto. Figure 2One or more steps may be added, deleted, or changed in any of the respective workflows of the host device 50 and the memory device 100 shown.

[0055] According to some embodiments, a firmware code of the memory device 100 (e.g., the memory controller 110) may include a combination of at least a portion of the plurality of in-system programming codes (e.g., a portion of the in-system programming codes or all of the in-system programming codes), but the present invention is not limited thereto.

[0056] According to certain embodiments, the memory device 100 (e.g., the memory controller 110, and in particular, the microprocessor 112 running the programming code 110CM within the compatibility management system) may control a target firmware version of the firmware code in the compatibility management (e.g., the compatibility management function) to be preset (by default) to a first predetermined firmware version among a plurality of predetermined firmware versions of the firmware code, and selectively switch from the first predetermined firmware version to a second predetermined firmware version among the plurality of predetermined firmware versions based on the detection result of the detection operation. For example, the first predetermined firmware version and the second predetermined firmware version may be associated with a newer version and an older version (e.g., UFS 3.1 and UFS 3.0) of the plurality of predetermined versions of the UFS specification, respectively. For another example, the first predetermined firmware version and the second predetermined firmware version may be associated with the older version and the newer version (e.g., UFS 3.0 and UFS 3.1) of the plurality of predetermined versions of the UFS specification, respectively.

[0057] Table 1

[0058]

[0059] Table 1 shows an example of the format of the write buffer command, wherein bytes 0 to 9 in this format have multiple fields, and any of bytes 0 to 9 may include bits 7 to 0. Some fields of this format can be described as follows:

[0060] (1) The field "OPERATION CODE" in byte 0 may carry an operation code (Opcode) such as 3Bh (e.g., the symbol "h" indicates that the value is a hexadecimal value);

[0061] (2) The field "MODE" in bits 4 to 0 of byte 1 may contain a mode;

[0062] (3) The field "BUFFER ID" in byte 2 may carry a buffer identifier (ID); (4) The field "BUFFER OFFSET" in bytes 3 to 5 may carry a buffer offset, from the most significant bit (MSB) of byte 3 to the least significant bit (LSB) of byte 5;

[0063] (5) The field "PARAMETER LIST LENGTH" in bytes 6-8, from the MSB of byte 6 to the LSB of byte 8, may carry a parameter list length; and

[0064] (6) The field "CONTROL" in byte 9 may carry a control code such as 00h; however, the present invention is not limited thereto. For example, the field "Reserved" in bits 7 to 5 of byte 1 may be configured to carry a UFS version (e.g., UFS 3.0 or UFS 3.1) of a target host device in an end-user phase. For better understanding, the host device 50 may be used to play the role of the target host device, and the target host device may be implemented to have a circuit architecture (e.g., a plurality of corresponding sub-circuits) that is similar to or identical to the circuit architecture of the host device 50. For the sake of simplicity, similar contents in this embodiment are not repeated here.

[0065] Figure 3 According to an embodiment of the present invention, a workflow of a method for controlling the communication specification version of the memory device in the predetermined communication architecture by means of compatibility management is described. Figure 2 The device-side compatibility management procedure described in step S22 of the illustrated embodiment may include: Figure 3 At least a portion (e.g., a portion or all) of the workflow shown, such as steps S30 and S32 to S39, may be executed, but the present invention is not limited thereto. Under the control of the microprocessor 112 running the programming code 110CM within the compatibility management system, the memory device 100 (e.g., the memory controller 110) may be executed according to Figure 3 The process is operated according to the workflow shown, in particular, one or more operations of one or more steps S30 to S40 in this workflow are performed, and the processing result of the compatibility management function is returned in any step of steps S31 and S40.

[0066] In step S30, the memory device 100 (e.g., the memory controller 110) may check whether any of the multiple logical unit numbers (LUNs) (e.g., LUNs LUN0-LUN31) of the memory device 100 has been allocated or configured (labeled "Any LUN has been configured" for simplicity). If so, the process proceeds to step S31, whereupon the firmware may terminate a process such as the device-side compatibility management process and return the result of the process in step S31. If not, the process proceeds to step S32.

[0067] In step S31 , the memory device 100 (eg, the memory controller 110 ) may return a processing result “failure” (eg, an error code) to the host device 50 (labeled as “return failure to host” for simplicity).

[0068] In step S32, the memory device 100 (e.g., the memory controller 110) may decode at least one parameter (e.g., one or more parameters) from the first command (e.g., the vendor-specific command or the read descriptor request) to determine the UFS version of the target host device, wherein a first parameter of the at least one parameter may indicate the UFS version of the target host device. For example, the first command may represent a vendor-specific command (e.g., a vendor-defined command), and the first parameter may represent the UFS version indicated by the field "Reversed" in the format shown in Table 1. For another example, the first command may represent the read descriptor request, and the parameter may represent a UFS-version-dependent parameter, such as a parameter that may vary with the version of the UFS specification, wherein the UFS-version-dependent parameter may be used to determine the UFS version of the target host device (e.g., the host device 50).

[0069] In step S33 , based on the first parameter, the memory device 100 (e.g., the memory controller 110 ) may check whether the target host device is running UFS 3.0 (labeled "UFS 3.0" for clarity). If so, this indicates that the target host device is running UFS 3.0, and the process proceeds to step S34 . If not, the process proceeds to step S35 .

[0070] In step S34, when it is determined that the UFS version of the target host device is UFS 3.0, the memory device 100 (e.g., the memory controller 110) may configure a target UFS version of the memory device 100 to UFS 3.0. In particular, relevant query information (e.g., query descriptor / attribute parameters) of the memory device 100 may be updated to UFS 3.0 (labeled as “update query information to UFS 3.0” for simplicity) to allow the memory device 100 to subsequently operate according to the updated query information (e.g., in the end-user phase).

[0071] In step S35 , based on the first parameter, the memory device 100 (e.g., the memory controller 110 ) may check whether the target host device is running UFS 3.1 (labeled "UFS 3.1" for clarity). If so, this indicates that the target host device is running UFS 3.1, and the process proceeds to step S36 . If not, the process proceeds to step S37 .

[0072] In step S36, when it is determined that the UFS version of the target host device is UFS 3.1, the memory device 100 (e.g., the memory controller 110) may configure the target UFS version of the memory device 100 to UFS 3.1. In particular, relevant query information (e.g., query descriptors / attribute parameters) of the memory device 100 may be updated to UFS 3.1 (labeled as “Update query information to UFS 3.1” for simplicity) to allow the memory device 100 to subsequently operate according to the updated query information (e.g., in the end-user phase).

[0073] In step S37, based on at least one default setting, the memory device 100 (e.g., the memory controller 110) may check whether a default condition, such as UFS 3.1, has been established (labeled "default condition" for simplicity). If so, this indicates that the UFS version of the target host device is determined to be UFS 3.1, and the process proceeds to step S38. If not, the memory device 100 (e.g., the memory controller 110) may trigger a predetermined operation. For example, to trigger the predetermined operation, the process may proceed to step S31 to return a processing result of "failure" (e.g., the error code) to the host device 50. The dotted arrow below step S37 may point to step S31, thereby forming a partial workflow from step S37 to step S31, but the present invention is not limited thereto. As another example, the memory device 100 (e.g., the memory controller 110) may always determine in step S37 that a default condition, such as UFS 3.1, has been established. In some embodiments, step S37 may be omitted, and the local workflow from step S35 to step S37 and the local workflow from step S37 to step S38 may be integrated into the same local workflow, such as the local workflow from step S35 to step S38.

[0074] In step S38, when it is determined that the UFS version of the target host device is UFS 3.1, the memory device 100 (e.g., the memory controller 110) may configure the target UFS version of the memory device 100 to UFS 3.1. In particular, relevant query information (e.g., query descriptors / attribute parameters) of the memory device 100 may be updated to UFS 3.1 (labeled as “Update query information to UFS 3.1” for simplicity) to allow the memory device 100 to subsequently operate according to the updated query information (e.g., in the end-user phase).

[0075] In step S39, the memory device 100 (e.g., the memory controller 110) may update the configuration of the target UFS version (e.g., one of UFS 3.0 and UFS 3.1) of the memory device 100 to at least one predetermined block (e.g., a system block) among the plurality of blocks in the non-volatile memory 120 (labeled as “update UFS version to NV memory block” for simplicity) to allow the memory device 100 to be compatible with the host device 50.

[0076] In step S40 , the memory device 100 (eg, the memory controller 110 ) may return a processing result “successful” to the host device 50 (labeled as “return success to host” for simplicity).

[0077] For better understanding, the method can be used Figure 3The workflow shown in FIG. 1 is used to illustrate the present invention, but the present invention is not limited thereto. According to some embodiments, the Figure 3 One or more steps may be added, deleted, or changed in the workflow shown.

[0078] According to certain embodiments, the host device 50 may be configured to act as a target host device. Specifically, the host device 50 may trigger initialization of the memory device 100 or may need to perform one or more descriptor operations on the memory device 100. Therefore, the host device 50 may first send a query request (UFS Protocol Information Unit, UPIU) for a descriptor and then wait for a query response (UPIU) containing the descriptor. For example, the descriptor may be implemented as a device descriptor, a configuration descriptor, a geometry descriptor, a unit descriptor, etc. Furthermore, the memory device 100 (e.g., the memory controller 110) may obtain a parameter contained in the "LENGTH" field in a query request (e.g., the query request UPIU) sent by the host device 50 as the first parameter, and determine whether the UFS version of the host device 50 is UFS 3.0 or UFS 3.1 based on the first parameter, thereby configuring the target UFS version of the memory device 100 to be the UFS version of the host device 50 to achieve compatibility with the host device 50.

[0079] According to some embodiments, since the query request may be considered as a command, the query request may also be referred to as a query request command.

[0080] According to certain embodiments, the host device 50 may be configured to play the role of the target host device. In particular, the first command mentioned in step S11 and the first response mentioned in step S31 may represent a query request (e.g., a query request UPIU) and a query response (e.g., a query response UPIU), respectively. The host device 50 may prepare a 32-byte packet in the query request (e.g., a query request UPIU) according to the UFS specification, wherein certain bytes (e.g., bytes 12-27) may change relative to the query opcode.

[0081] Table 2A

[0082]

[0083] Table 2B

[0084]

[0085]

[0086] Table 2A shows an example of the format of a query request UPIU, while Table 2B shows an example of the format of a query response UPIU. The first field labeled "xx01 0110b" in the query request UPIU and the first field labeled "xx110110b" in the query response UPIU may each represent a predetermined value. Other fields shown in Tables 2A and 2B, such as "Flags," "Reserved," "Task Tag," "Query Function," "Query Response," "Total EHS Length," "Device Information," and "Data Segment Length," may indicate their respective meanings, such as flags, reserved, task tag, query function, query response, total EHS length, device information, and data segment length. For example, the transaction-specific fields in bytes 12-27 of the query request UPIU format shown in Table 2A may vary depending on the query opcode. For a read device descriptor (read device descriptor; also referred to as "read descriptor") indicated by a read descriptor opcode, an example of the format for transmitting specific fields can be shown in Table 3 below:

[0087] Table 3

[0088]

[0089]

[0090] The "DESCRIPTOR IDN" field in the format shown in Table 3 may contain a descriptor ID to indicate a particular type of descriptor. The host device 50 may set the descriptor ID contained in the "DESCRIPTOR IDN" field in byte 13 of the query request (e.g., the query request UPIU) to a target descriptor ID corresponding to a target type of descriptor from among a plurality of predetermined descriptor IDs corresponding to a plurality of types of descriptors (e.g., the aforementioned device descriptor, configuration descriptor, geometry descriptor, and cell descriptor) to indicate that the corresponding query response (e.g., the corresponding query response UPIU) should contain descriptors of the target type, for example, starting from byte 32 of the query response (e.g., the query response UPIU). Furthermore, the host device 50 may set the parameter contained in the "LENGTH" field in bytes 18-19 of the query request (e.g., the query request UPIU) to the size of the descriptor of the target type, where the descriptor of the target type contained in the corresponding query response (e.g., the corresponding query response UPIU) should have this size.

[0091] For example, the host device 50 may set the descriptor ID contained in the field "DESCRIPTOR IDN" to 00h (i.e., 0x00) to indicate that the descriptor contained in the corresponding query response UPIU sent by the memory device 100 should be a device descriptor. For another example, the host device 50 may set the descriptor ID contained in the field "DESCRIPTOR IDN" to 01h (i.e., 0x01) to indicate that the descriptor contained in the corresponding query response UPIU sent from the memory device 100 should be a configuration descriptor. For another example, the host device 50 may set the descriptor ID contained in the field "DESCRIPTOR IDN" to 07h (i.e., 0x07) to indicate that the descriptor contained in the corresponding query response UPIU sent from the memory device 100 should be a geometry descriptor.

[0092] Table 4

[0093]

[0094]

[0095] Table 5

[0096]

[0097] Table 6

[0098]

[0099] Table 7

[0100]

[0101] Table 8

[0102]

[0103]

[0104] Table 9

[0105]

[0106] Tables 4-6 illustrate examples of the formats of the UFS 3.0 device descriptor, UFS 3.0 configuration descriptor header, and UFS 3.0 geometry descriptor, respectively. Tables 7-9 illustrate examples of the formats of the UFS 3.1 device descriptor, UFS 3.1 configuration descriptor header, and UFS 3.1 geometry descriptor, respectively. The first parameter may represent the manufacturer default value (MDV) contained in the "bLength" field in any of these formats, as shown in Tables 4-9, but the present invention is not limited thereto. For better understanding, the host device 50 may enter a value into the "LENGTH" field in bytes 18-19 (as shown in Table 3) of the transfer-specific fields in bytes 12-27 of the query request UPIU (as shown in Table 2A), depending on the UFS version of the host device 50. Taking the MDV (e.g., 40h) contained in the field "bLength" shown in Table 4 and the MDV (e.g., 59h) contained in the field "bLength" shown in Table 7 as examples, since the size of the UFS 3.0 device descriptor is equal to 0x40 (e.g., bLength = 40h) and the size of the UFS 3.1 device descriptor is equal to 0x59 (e.g., bLength = 59h), the parameters {0x00, 0x59} contained in the field "LENGTH" in bytes 18-19 of the query request for reading the UFS 3.1 device descriptor and the parameters {0x00, 0x40} contained in the field "LENGTH" in bytes 18-19 of the query request for reading the UFS 3.0 device descriptor are different.

[0107] Table 10

[0108] Bytes 0 to 3 0x16 0x00 0x00 0x80 Bytes 4 to 7 0x00 0x01 0x00 0x00 Bytes 8 to 11 0x00 0x00 0x00 0x00 Bytes 12-15 0x01 0x00 0x00 0x00 Bytes 16-19 0x00 0x00 0x00 0x59 Bytes 20-23 0x00 0x00 0x00 0x00 Bytes 24-27 0x00 0x00 0x00 0x00 Bytes 28-31 0x00 0x00 0x00 0x00

[0109] Table 11

[0110] Bytes 0 to 3 0x16 0x00 0x00 0x80 Bytes 4 to 7 0x00 0x01 0x00 0x00 Bytes 8 to 11 0x00 0x00 0x00 0x00 Bytes 12-15 0x01 0x00 0x00 0x00 Bytes 16-19 0x00 0x00 0x00 0x40 Bytes 20-23 0x00 0x00 0x00 0x00 Bytes 24-27 0x00 0x00 0x00 0x00 Bytes 28-31 0x00 0x00 0x00 0x00

[0111] Table 10 shows an example of a query request for reading a UFS 3.1 device descriptor, and Table 11 shows an example of a query request for reading a UFS 3.0 device descriptor, but the present invention is not limited thereto. Note that the parameters {0x00, 0x59} contained in bytes 18-19 (i.e., the "LENGTH" field of the query request for reading a UFS 3.1 device descriptor) shown in Table 10 and the parameters {0x00, 0x40} contained in bytes 18-19 (i.e., the "LENGTH" field of the query request for reading a UFS 3.0 device descriptor) shown in Table 11 are different.

[0112] Furthermore, the memory device 100 (e.g., the memory controller 110) may fill a value into the "LENGTH" field in bytes 18-19 of the query response UPIU based on the target UFS version of the memory device 100. For example, in response to a query request to read UFS 3.1 device descriptors, the memory device 100 (e.g., the memory controller 110) may send a query response to read UFS 3.1 device descriptors. For another example, in response to a query request to read UFS 3.0 device descriptors, the memory device 100 (e.g., the memory controller 110) may send a query response to read UFS 3.0 device descriptors. Similarly, the parameters {0x00, 0x59} contained in the field “LENGTH” in bytes 18-19 of the query response for reading the UFS 3.1 device descriptor and the parameters {0x00, 0x40} contained in the field “LENGTH” in bytes 18-19 of the query response for reading the UFS 3.0 device descriptor are different from each other.

[0113] Table 12

[0114] Bytes 0 to 3 0x36 0x00 0x00 0x80 Bytes 4 to 7 0x00 0x01 0x00 0x00 Bytes 8 to 11 0x00 0x00 0x00 0x59 Bytes 12-15 0x01 0x00 0x00 0x00 Bytes 16-19 0x00 0x00 0x00 0x59 Bytes 20-23 0x00 0x00 0x00 0x00 Bytes 24-27 0x00 0x00 0x00 0x00 Bytes 28-31 0x00 0x00 0x00 0x00 Bytes 32-35 0x59 0x00 0x00 0x00 Bytes 36 to 120 … … … …

[0115] Table 13

[0116]

[0117]

[0118] Table 12 shows an example query response for reading the UFS 3.1 device descriptor, and Table 13 shows an example query response for reading the UFS 3.0 device descriptor. The symbol "..." indicates that certain table contents may be omitted, but the present invention is not limited to this. Please note that the parameters {0x00, 0x59} contained in bytes 18-19 (i.e., the "LENGTH" field of the query response for reading the UFS 3.1 device descriptor) shown in Table 12 and the parameters {0x00, 0x40} contained in bytes 18-19 (i.e., the "LENGTH" field of the query response for reading the UFS 3.0 device descriptor) shown in Table 13 are different. Furthermore, the parameters {0x00, 0x59} contained in bytes 18-19 (i.e., the "LENGTH" field of the query response for reading the UFS 3.1 device descriptor) shown in Table 12 are equal to the parameters {0x00, 0x59} contained in bytes 18-19 (i.e., the "LENGTH" field of the query request for reading the UFS 3.1 device descriptor) shown in Table 10, and the parameters {0x00, 0x40} contained in bytes 18-19 (i.e., the "LENGTH" field of the query response for reading the UFS 3.0 device descriptor) shown in Table 13 are equal to the parameters {0x00, 0x40} contained in bytes 18-19 (i.e., the "LENGTH" field of the query request for reading the UFS 3.0 device descriptor) shown in Table 11.

[0119] The memory device 100 (e.g., the memory controller 110) can return descriptor information (e.g., descriptor information) to the host device 50 using a plurality of consecutive bytes starting from byte 32 of the query response UPIU, where the total byte count of the plurality of consecutive bytes can be equal to the size of the descriptor carried in the query response UPIU. Taking the read device descriptor as an example, byte 32 can represent the field "bLength" (e.g., the size of the descriptor), and byte 33 can represent the field "bDescriptorIDN" (e.g., the descriptor ID of the descriptor), and so on. For the query response for reading the UFS 3.1 device descriptor, as shown in Table 12, the size of the descriptor is 0x59 (e.g., bLength = 59h, as shown in Table 7). Therefore, the last byte of the query response (e.g., query response UPIU) and the last byte of the descriptor can both be 120 bytes (e.g., (5*16+9)+31=120). For the query response for reading the UFS 3.0 device descriptor, as shown in Table 13, the size of the descriptor is 0x40 (e.g., bLength = 40h, as shown in Table 4). Therefore, the last byte of the query response (e.g., query response UPIU) and the last byte of the descriptor can both be 95 bytes (e.g., (4*16+0)+31=95). Regarding the "bLength" field of the descriptor, the differences between UFS 3.0 and UFS 3.1 can be seen in Tables 4-9.

[0120] Figure 4According to one embodiment of the present invention, a host-side workflow of the method is illustrated. A computer-readable medium 52M stores program code 52C. When executed by a host device 50 (e.g., a processor 52), the program code 52C causes the host device 50 (e.g., the processor 52) to operate according to the method. The host device 50 (e.g., the processor 52 running the program code 52C) on the host side can trigger execution of the device-side compatibility management program on the device side. Furthermore, the memory controller 110 can pre-load the compatibility management system internal programming code 110CM from the non-volatile memory 120 into at least one storage area within the memory controller 110 (e.g., the program code area in the random access memory 116). For example, this operation can be performed during the initialization of the memory device 100 (e.g., the memory controller 110). When executed by the memory controller 110, the compatibility management system internal programming code 110CM enables the memory controller 110 to have the compatibility management function, but the present invention is not limited thereto. The memory controller 110 may load the compatibility management system internal programming code 110CM from the non-volatile memory 120 into the at least one storage area at any time before the execution of the device-side compatibility management program is triggered by the host device 50. For example, this loading operation may be completed at the moment before the execution of the device-side compatibility management program is triggered by the host device 50.

[0121] In step S51, the host device 50 (eg, the processor 52 running the program code 52C) may send a first command (eg, Figure 2 The first command mentioned in the illustrated embodiment) is sent to the memory controller 110 to trigger the memory controller 110 to execute the device-side compatibility management program of the compatibility management function, so as to detect whether the host device 50 complies with any of multiple predetermined versions (for example, UFS 3.0 and UFS 3.1) of a predetermined communication specification (for example, a UFS specification) according to the first command to generate a detection result, and selectively switch from one firmware version to another firmware version according to the detection result.

[0122] For example, the first command may represent the aforementioned vendor-specific command, such as the aforementioned vendor-defined command. In particular, the vendor-specific command may be configured to indicate that the host device 50 complies with a first version (e.g., one of UFS 3.0 and UFS 3.1) among all versions of the predetermined communication specification. Based on the vendor-specific command, the memory controller 110 executing the device-side compatibility management program may determine that the host device 50 complies with the first version.

[0123] For another example, the first command may represent a first predetermined request (e.g., a read descriptor request) that complies with each of the plurality of predetermined versions of the predetermined communication specification. Based on one or more contents carried in the first predetermined request, the memory controller 110 may detect whether the host device 50 complies with any of the plurality of predetermined versions of the predetermined communication specification.

[0124] In step S52, after sending the first command to trigger the memory controller 110 to execute the device-side compatibility management program, the host device 50 (eg, the processor 52 running the program code 52C) may wait for a first response (eg, Figure 2 The first response mentioned in the embodiment shown).

[0125] In step S53, the host device 50 (e.g., the processor 52 running the program code 52C) may receive the first response from the memory controller 110 via the transmission interface circuit 58 to obtain the first response, wherein the first response is sent by the memory controller 110 to the host device 50 in response to the first command.

[0126] For example, the host device 50 sending the first command may trigger the execution of the device-side compatibility management program, causing the memory controller 110 to send the first response to the host device 50 to return the processing result of the compatibility management function to the host device 50. In addition, the device-side compatibility management process may include:

[0127] (1) performing at least one check operation (e.g., one or more check operations, such as the operations of steps S33, S35, and / or S37) according to the first command to generate at least one check result (e.g., one or more check results) of the at least one check operation for determining the detection result, wherein the detection result indicates whether the host device 50 complies with the first version of the plurality of predetermined versions of the predetermined communication specification (e.g., UFS 3.0 in step S34; or UFS 3.1 in any one of steps S36 and S38);

[0128] (2) in response to the detection result indicating that the host device 50 complies with the first version of the plurality of predetermined versions of the predetermined communication specification, configuring a target firmware version of the memory device 100 (e.g., the target firmware version mentioned in some embodiments described above) to a first firmware version associated with the first version of the plurality of predetermined versions of the predetermined communication specification (e.g., the first predetermined firmware version, such as a firmware version corresponding to one of UFS 3.0 and UFS 3.1), for example, as described in any one of steps S34, S36, and S38; and

[0129] (3) updating the configuration of the target firmware version (e.g., the firmware version corresponding to one of UFS 3.0 and UFS 3.1) of the memory device 100 to the at least one predetermined block (e.g., the system block) among the plurality of blocks in the non-volatile memory 120 to allow the memory device 100 to be compatible with the target host device, such as the host device 50, for example, as described in step S39;

[0130] However, the present invention is not limited thereto. For example, configuring the target firmware version of the memory device 100 to the first firmware version associated with the first version among the plurality of predetermined versions of the predetermined communication specification may further include: updating relevant query information (e.g., query descriptors / attribute parameters) of the memory device 100 to first query information associated with the first version among the plurality of predetermined versions of the predetermined communication specification (e.g., query descriptors / attribute parameters corresponding to one of UFS 3.0 and UFS 3.1) to allow the memory device 100 to subsequently operate according to the updated query information; for example, as described in steps S34, S36, and S38. For the sake of brevity, similar content in this embodiment is not repeated here.

[0131] For better understanding, the method can be used Figure 4 The workflow shown in FIG. 1 is used to illustrate the present invention, but the present invention is not limited thereto. According to some embodiments, the Figure 4 One or more steps may be added, deleted, or changed in the workflow shown.

[0132] Figure 5 According to one embodiment of the present invention, a device-side workflow of the method is described.

[0133] In step S61, the memory device 100 may utilize the memory controller 110 (eg, the microprocessor 112 running the compatibility management system programming code 110CM) to receive a first command (eg, Figure 2 In the illustrated embodiment, the first command may be a first command. For example, the first command may represent the aforementioned vendor-specific command, such as the aforementioned vendor-defined command. In another example, the first command may represent the first predetermined request (e.g., a read descriptor request) for each of the plurality of predetermined versions of the predetermined communication specification.

[0134] In step S62, the memory device 100 may utilize the memory controller 110 (e.g., the microprocessor 112 running the compatibility management system programming code 110CM) to execute the device-side compatibility management program of the compatibility management function to detect whether the host device 50 complies with any of the multiple predetermined versions (e.g., UFS 3.0 and UFS 3.1) of the predetermined communication specification (e.g., the UFS specification) based on the first command to generate a detection result, and selectively switch from one firmware version to another firmware version based on the detection result. For example, if the first command represents the vendor-specific command, the vendor-specific command may be configured to indicate that the host device 50 complies with the first version (e.g., one of UFS 3.0 and UFS 3.1) of the multiple predetermined versions among all versions of the predetermined communication specification. Based on the vendor-specific command, the memory controller 110 executing the device-side compatibility management program may determine that the host device 50 complies with the first version. For another example, when the first command represents the first predetermined request (e.g., a read descriptor request) that complies with each predetermined version of the multiple predetermined versions of the predetermined communication specification, the memory controller 110 may detect whether the host device 50 complies with any of the multiple predetermined versions of the predetermined communication specification based on one or more contents carried in the first predetermined request.

[0135] In step S63, the memory device 100 may utilize the memory controller 110 (eg, the microprocessor 112 running the compatibility management system internal programming code 110CM) to send a first response (eg, Figure 2 The first response (referred to as the first response in the illustrated embodiment) is sent to the host device 50 in response to the first command. For example, the memory device 100 may utilize the memory controller 110 to send the first response to the host device 50 via the transmission interface circuit 118 to transmit the processing result of the compatibility management function back to the host device 50. For the sake of brevity, similar contents in this embodiment are not repeated here.

[0136] For better understanding, the method can be used Figure 5 The workflow shown in FIG. 1 is used to illustrate the present invention, but the present invention is not limited thereto. According to some embodiments, the Figure 5 One or more steps may be added, deleted, or changed in the workflow shown.

[0137] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the present invention.

Claims

1. A method for performing communication specification version control of a memory device in a predetermined communication architecture by means of compatibility management, the method being applicable to a memory controller of the memory device, the memory device comprising the memory controller and a non-volatile memory, the non-volatile memory comprising at least one non-volatile memory element, the method comprising: Receive a first command from a host device using the memory controller via a transmission interface circuit within the memory controller; a device-side compatibility management program that utilizes the memory controller to execute a compatibility management function, detecting whether the host device complies with any one of a plurality of predetermined versions of a predetermined communication specification according to the first command to generate a detection result, and selectively switching from one firmware version to another firmware version according to the detection result; as well as Using the memory controller to send a first response to the host device via the transmission interface circuit, wherein the first response is sent to the host device in response to the first command; The first command represents a first predetermined request, the first predetermined request being implemented as a read descriptor request, wherein a plurality of fields of a predetermined format of the read descriptor request include: a first field for carrying a first predetermined value; a flag field for containing at least one flag; a task tag field for carrying at least one task tag; a first length field for carrying a first length; as well as a second length field for carrying a second length; as well as At least one other field of the plurality of fields that is reserved for at least one other purpose is used to carry at least one parameter for indicating whether the host device complies with any one of the plurality of predetermined versions of the predetermined communication specification.

2. The method according to claim 1, wherein The plurality of fields further include a plurality of transmission specific fields, wherein the at least one other field represents at least one transmission specific field in the plurality of transmission specific fields.

3. The method according to claim 1, wherein The first predetermined request complies with each predetermined version of the multiple predetermined versions of the predetermined communication specification; and the memory controller detects whether the host device complies with any of the multiple predetermined versions of the predetermined communication specification based on one or more contents contained in the first predetermined request, wherein the one or more contents include the at least one parameter contained in the at least one other field.

4. The method according to claim 1, wherein Utilizing the memory controller to send the first response to the host device via the transmission interface circuit further includes: The memory controller is used to send the first response to the host device via the transmission interface circuit, so as to return a processing result of the compatibility management function to the host device.

5. The method according to claim 1, wherein The memory controller is used to load a compatibility management system in-system programming (ISP) code from the non-volatile memory into at least one storage area in the memory controller; The programming code in the compatibility management system enables the memory controller to have the compatibility management function when executed by the memory controller.

6. The method according to claim 1, wherein The device-side compatibility management program includes: performing at least one check operation according to the first command to generate at least one check result of the at least one check operation for determining the detection result, wherein the detection result indicates whether the host device complies with a first version of the plurality of predetermined versions of the predetermined communication specification; In response to the detection result indicating that the host device complies with the first version of the plurality of predetermined versions of the predetermined communication specification, configuring a target firmware version of the memory device to a first firmware version associated with the first version of the plurality of predetermined versions of the predetermined communication specification; as well as The configuration of the target firmware version of the memory device is updated to at least a predetermined block among a plurality of blocks in the non-volatile memory to allow the memory device to be compatible with the host device.

7. The method according to claim 6, wherein Configuring the target firmware version of the memory device to be the first firmware version associated with the first version of the plurality of predetermined versions of the predetermined communication specification further comprises: Query information of the memory device is updated to first query information associated with the first version of the plurality of predetermined versions of the predetermined communication specification to allow the memory device to subsequently operate according to the updated query information.

8. A memory controller for a memory device, the memory device comprising the memory controller and a non-volatile memory, the non-volatile memory comprising at least one non-volatile memory element, the memory controller comprising: a processing circuit configured to control the memory controller according to a plurality of host commands from a host device to allow the host device to access the non-volatile memory through the memory controller, wherein the processing circuit is configured to perform communication specification version control of the memory device in a predetermined communication architecture by means of compatibility management; as well as a transmission interface circuit for communicating with the host device; in: The memory controller receives a first command from the host device via the transmission interface circuit in the memory controller; The memory controller executes a device-side compatibility management program of a compatibility management function to detect, according to the first command, whether the host device complies with any one of a plurality of predetermined versions of a predetermined communication specification to generate a detection result, and selectively switches from one firmware version to another firmware version according to the detection result; and The memory controller sends a first response to the host device through the transmission interface circuit, wherein the first response is sent to the host device in response to the first command; The first command represents a first predetermined request, the first predetermined request being implemented as a read descriptor request, wherein a plurality of fields of a predetermined format of the read descriptor request include: a first field for carrying a first predetermined value; a flag field for containing at least one flag; a task tag field for carrying at least one task tag; a first length field for carrying a first length; and a second length field for carrying a second length; and At least one other field of the plurality of fields that is reserved for at least one other purpose is used to carry at least one parameter for indicating whether the host device complies with any one of the plurality of predetermined versions of the predetermined communication specification.

9. A memory device comprising the memory controller according to claim 8, wherein: The memory device comprises: The non-volatile memory is used to store information; and The memory controller is coupled to the non-volatile memory and is used to control the operation of the memory device.

10. An electronic device comprising the memory device according to claim 9, wherein: Also includes: The host device is coupled to the memory device, wherein the host device comprises: at least one processor for controlling the operation of the host device; and a power supply circuit coupled to the at least one processor for providing power to the at least one processor and the memory device; The memory device provides storage space for the host device.

11. A method for performing communication specification version control of a memory device in a predetermined communication architecture by means of compatibility management, the method being applicable to a host device coupled to the memory device, the memory device comprising a memory controller and a non-volatile memory, the non-volatile memory comprising at least one non-volatile memory element, the method comprising: sending a first command from the host device to the memory controller via a transmission interface circuit within the host device to trigger the memory controller to execute a device-side compatibility management program of a compatibility management function, wherein the program detects whether the host device complies with any one of a plurality of predetermined versions of a predetermined communication specification based on the first command to generate a detection result, and selectively switches from one firmware version to another firmware version based on the detection result; After sending the first command to trigger the memory controller to execute the device-side compatibility management program, waiting for a first response from the memory controller; as well as receiving the first response from the memory controller through the transmission interface circuit, wherein the first response is sent by the memory controller to the host device in response to the first command; The first command represents a first predetermined request, the first predetermined request being implemented as a read descriptor request, wherein a plurality of fields of a predetermined format of the read descriptor request include: a first field for carrying a first predetermined value; a flag field for containing at least one flag; a task tag field for carrying at least one task tag; a first length field for carrying a first length; as well as a second length field for carrying a second length; as well as At least one other field of the plurality of fields that is reserved for at least one other purpose is used to carry at least one parameter for indicating whether the host device complies with any one of the plurality of predetermined versions of the predetermined communication specification.

12. The method according to claim 11, wherein The plurality of fields further include a plurality of transmission specific fields, wherein the at least one other field represents at least one transmission specific field in the plurality of transmission specific fields.

13. The method according to claim 11, wherein The first predetermined request complies with each predetermined version of the multiple predetermined versions of the predetermined communication specification; and the memory controller detects whether the host device complies with any of the multiple predetermined versions of the predetermined communication specification based on one or more contents contained in the first predetermined request, wherein the one or more contents include the at least one parameter contained in the at least one other field.

14. The method according to claim 11, wherein The host device sends the first command to trigger the execution of the device-side compatibility management program, so that the memory controller sends the first response to the host device to return a processing result of the compatibility management function to the host device.

15. The method according to claim 11, wherein The memory controller is used to load a compatibility management system in-system programming (ISP) code from the non-volatile memory into at least one storage area in the memory controller; The programming code in the compatibility management system enables the memory controller to have the compatibility management function when executed by the memory controller.

16. The method according to claim 11, wherein The host device sends the first command to trigger the execution of the device-side compatibility management program, and the device-side compatibility management program includes: performing at least one check operation according to the first command to generate at least one check result of the at least one check operation for determining the detection result, wherein the detection result indicates whether the host device complies with a first version of the plurality of predetermined versions of the predetermined communication specification; In response to the detection result indicating that the host device complies with the first version of the plurality of predetermined versions of the predetermined communication specification, configuring a target firmware version of the memory device to a first firmware version associated with the first version of the plurality of predetermined versions of the predetermined communication specification; as well as The configuration of the target firmware version of the memory device is updated to at least a predetermined block among a plurality of blocks in the non-volatile memory to allow the memory device to be compatible with the host device.

17. The method according to claim 16, wherein Configuring the target firmware version of the memory device to be the first firmware version associated with the first version of the plurality of predetermined versions of the predetermined communication specification further comprises: Query information of the memory device is updated to first query information associated with the first version of the plurality of predetermined versions of the predetermined communication specification to allow the memory device to subsequently operate according to the updated query information.

18. The host device operating according to the method of claim 11.

19. A computer readable medium for the method of claim 11, wherein: The computer readable medium stores a program code, and when the program code is executed by the host device, the host device operates according to the method.

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