Display Panel and Display Device

Abstract

The present application discloses a display panel and a display device. The display panel includes a plurality of scan lines and a plurality of waveform shaping units located in a display area. By controlling the first transistor to turn on through the Nth scan line, the trailing edge of the pulse transmitted in the (N - 1)th scan line can be made steeper or closer to the ideal target during the forward scan process. Alternatively, by controlling the second transistor to turn on through the Nth scan line, the trailing edge of the pulse transmitted in the (N + 1)th scan line can be made steeper or closer to the ideal target during the reverse scan process. This can improve the deformation of the trailing edge of the scan signal during transmission, not only reducing the risk of charging errors, but also increasing the charging time or facilitating the realization of higher-frequency display.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to a display panel and a display device. Background Art

[0002] With the rapid development of display technologies, people's demands for product forms have also become diversified. To provide customers with a more perfect usage experience, improving the resolution is an important direction for the development of display panels.

[0003] However, as the resolution continuously increases, the signal waveform also changes during transmission, which may lead to abnormal display. Summary of the Invention

[0004] The present application provides a display panel and a display device to alleviate the technical problem that the pulse end edge of the scan signal changes significantly during transmission.

[0005] In a first aspect, the present application provides a display panel. The display panel is provided with a display area and a non-display area. The display panel includes a plurality of scan lines and a plurality of groups of waveform conditioning units located in the display area. The plurality of scan lines include the (N - 1)-th scan line, the N-th scan line, and the (N + 1)-th scan line arranged in sequence. Each waveform conditioning unit in the N-th group includes a first transistor and a second transistor. The gate of the first transistor is connected to the N-th scan line, the first pole of the first transistor is connected to the (N - 1)-th scan line, and the second pole of the first transistor is connected to a first potential transmission line. The gate of the second transistor is connected to the N-th scan line, the first pole of the first transistor is connected to the (N + 1)-th scan line, and the second pole of the first transistor is connected to a second potential transmission line.

[0006] In some embodiments, when the display panel performs a forward scan, a corresponding electrical signal is provided to the first potential transmission line, and no electrical signal is provided to the second potential transmission line; or when the display panel performs a reverse scan, a corresponding electrical signal is provided to the second potential transmission line, and no electrical signal is provided to the first potential transmission line.

[0007] In some embodiments, when the scan line transmits a scan signal with a positive pulse, both the first transistor and the second transistor are N-channel thin film transistors, and the first potential transmission line or the second potential transmission line is used to transmit a low potential signal; or when the scan line transmits a scan signal with a negative pulse, both the first transistor and the second transistor are P-channel thin film transistors, and the first potential transmission line or the second potential transmission line is used to transmit a high potential signal.

[0008] In some embodiments, the display area includes a plurality of display sub-areas sequentially distributed in the extending direction of the scanning lines; in a part of each display sub-area, a plurality of first transistors in different groups are distributed column by column in the arranging direction of the scanning lines; in another part of each display sub-area, a plurality of second transistors in different groups are distributed column by column in the arranging direction of the scanning lines.

[0009] In some embodiments, the display area includes a plurality of display sub-areas sequentially distributed in the extending direction of the scanning lines, and in each display sub-area, one waveform shaping unit in each group is distributed column by column in the arranging direction of the scanning lines.

[0010] In some embodiments, in each waveform shaping unit, the first transistor and the second transistor are adjacently distributed.

[0011] In some embodiments, the display area includes a plurality of display sub-areas sequentially distributed in the extending direction of the scanning lines, and in each display sub-area, one waveform shaping unit in each group is distributed every other column in the arranging direction of the scanning lines.

[0012] In some embodiments, in each waveform shaping unit, there is a data line between the first transistor and the second transistor.

[0013] In some embodiments, in each waveform shaping unit, the first transistor and the second transistor are distributed every other column; or, there are multiple data lines between the first transistor and the second transistor.

[0014] In a second aspect, the present application provides a display device, which includes the display panel in at least one of the above embodiments. The display panel further includes two gate driving circuits respectively located on opposite sides of the display area, and both ends of each scanning line are respectively connected to corresponding gate driving units in one of the gate driving circuits.

[0015] In the display panel and the display device provided by the present application, by controlling the first transistor to turn on through the Nth scanning line, the end edge of the pulse transmitted in the (N - 1)th scanning line can be made steeper or closer to the ideal target during the forward scanning process; or, by controlling the second transistor to turn on through the Nth scanning line, the end edge of the pulse transmitted in the (N + 1)th scanning line can be made steeper or closer to the ideal target during the reverse scanning process. This can improve the deformation of the end edge of the scanning signal pulse during transmission, not only reducing the risk of charging errors, but also increasing the charging time or facilitating the realization of higher-frequency display.

[0016] Moreover, since the end edge of the scanning signal pulse can be improved both during the forward scanning process and during the reverse scanning process, the display panel and the display device provided by the present application can be applicable to driving methods of forward scanning or reverse scanning. Brief Description of the Drawings

[0017] In combination with the accompanying drawings, through a detailed description of the specific embodiments of the present application, the technical solutions and other beneficial effects of the present application will become obvious.

[0018] Figure 1 It is a schematic structural diagram of a display panel in the related art.

[0019] Figure 2 It is a first schematic structural diagram of the display panel provided by the embodiment of the present application.

[0020] Figure 3 It is a second schematic structural diagram of the display panel provided by the embodiment of the present application.

[0021] Figure 4 It is a third schematic structural diagram of the display panel provided by the embodiment of the present application.

[0022] Figure 5 It is a fourth schematic structural diagram of the display panel provided by the embodiment of the present application.

[0023] Figure 6 It is a fifth schematic structural diagram of the display panel provided by the embodiment of the present application.

[0024] Figure 7 It is a schematic diagram of the effect improvement of the display panel provided by the embodiment of the present application.

[0025] Figure 8 It is a timing schematic diagram of forward scanning provided by the embodiment of the present application.

[0026] Figure 9 It is a timing schematic diagram of reverse scanning provided by the embodiment of the present application. Detailed Embodiments

[0027] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in combination with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0028] In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless otherwise specifically defined.

[0029] Figure 1 It is a schematic structural diagram of a display panel in the related art. The display panel includes a plurality of scan lines, a plurality of data lines, and sub-pixels (Pixels). Each scan line is connected to a corresponding row of sub-pixels. For example, the (N - 1)-th scan line GateN-1 is connected to the (N - 1)-th row of sub-pixels, the N-th scan line GateN is connected to the N-th row of sub-pixels, and the (N + 1)-th scan line GateN+1 is connected to the (N + 1)-th row of sub-pixels. Each data line is connected to a corresponding column of sub-pixels. For example, the data line datar is connected to a column of red sub-pixels (R), the data line datag is connected to a column of green sub-pixels (G), and the data line datab is connected to a column of blue sub-pixels (B).

[0030] In addition, in order to make the aperture ratio of each sub-pixel consistent, dummy traces are provided on one side of the corresponding data line. For example, a dummy trace dummy1 is provided on the left side of the data line datar, a dummy trace dummy2 is provided on the left side of the data line datag, and a dummy trace dummy3 is provided on the left side of the data line datab.

[0031] In view of the technical problem that the pulse end edge of the scan signal varies greatly during transmission, this embodiment provides a display panel. Please refer to Figures 2 to 9 , as Figure 2 shown. The display panel is provided with a display area and a non-display area. The display panel includes a plurality of scan lines and a plurality of groups of waveform conditioning units 20 located in the display area. The plurality of scan lines include the (N - 1)-th scan line GateN-1, the N-th scan line GateN, and the (N + 1)-th scan line GateN+1 arranged in sequence. Among them, each waveform conditioning unit 20 in the N-th group includes a first transistor NTA and a second transistor NTB. The gate of the first transistor NTA is connected to the N-th scan line GateN. The first pole of the first transistor NTA is connected to the (N - 1)-th scan line GateN-1. The second pole of the first transistor NTA is connected to the first potential transmission line. The gate of the second transistor NTB is connected to the N-th scan line GateN. The first pole of the first transistor NTA is connected to the (N + 1)-th scan line GateN+1. The second pole of the first transistor NTA is connected to the second potential transmission line.

[0032] It can be understood that for the display panel provided in this embodiment, by controlling the first transistor NTA to turn on through the Nth scan line GateN, the trailing edge of the pulse transmitted in the (N - 1)th scan line GateN-1 can be made steeper or closer to the ideal target during the forward scan. Or, by controlling the second transistor NTB to turn on through the Nth scan line GateN, the trailing edge of the pulse transmitted in the (N + 1)th scan line GateN+1 can be made steeper or closer to the ideal target during the reverse scan. This can improve the deformation of the trailing edge of the scan signal pulse during transmission, not only reducing the risk of charging errors, but also improving the charging time or facilitating the realization of higher-frequency display.

[0033] Moreover, since the trailing edge of the scan signal can be improved during both the forward scan and the reverse scan, the display panel provided in this embodiment can be applicable to driving methods of forward scan or reverse scan.

[0034] It should be noted that the first pole can be one of the source or the drain, and the second pole can be the other of the source or the drain. For example, when the first pole is the source, the second pole is the drain; or when the first pole is the drain, the second pole is the source.

[0035] Each scan line is configured with a corresponding set of waveform shaping units 20. For example, the Nth scan line GateN is configured with the Nth set of waveform shaping units 20. Each set of waveform shaping units 20 can include one or more waveform shaping units 20.

[0036] It should be noted that at least one of the first transistor NTA and the second transistor NTB can be a low-temperature polysilicon (LTPS) thin-film transistor, an amorphous silicon (a_Si) thin-film transistor, an indium gallium zinc oxide (IGZO) thin-film transistor, or a hybrid thin-film transistor such as LTPS&IGZO.

[0037] During the forward scan, as Figure 8 shown, the pulses of the scan signal Gaten-1 transmitted in the (N - 1)th scan line GateN-1, the pulses of the scan signal Gaten transmitted in the Nth scan line GateN, and the pulses of the scan signal Gaten+1 transmitted in the (N + 1)th scan line GateN+1 arrive in sequence. Correspondingly, the sub-pixels in the (N - 1)th row, the Nth row, and the (N + 1)th row are turned on in sequence to write the corresponding data signals respectively.

[0038] Among them, in order to achieve a better pull-down effect, the pulse rising edge of the scanning signal Gaten occurs at the same moment as the falling edge of the scanning signal Gaten-1, or the time interval between the two is 0 us. In this way, at the start moment of the time period T2, the scanning signal Gaten is at a high potential, and the first transistor NTA in the waveform sorting unit 20 of the Nth group is turned on or opened, and the falling edge of the scanning signal Gaten-1 can be pulled down to a low level at the end moment of the time period T1; similarly, at the start moment of the time period T3, the scanning signal Gaten+1 is at a high potential, and the first transistor NTA in the waveform sorting unit 20 of the (N + 1)th group is turned on or opened, and the falling edge of the scanning signal Gaten can be pulled down to a low level at the end moment of the time period T2. This makes the pulse end edge of each scanning signal steeper or closer to the ideal target.

[0039] Reverse scanning is as Figure 9 shown, the pulses of the scanning signal Gaten+1 transmitted in the (N + 1)th scanning line GateN+1, the pulses of the scanning signal Gaten transmitted in the Nth scanning line GateN, and the pulses of the scanning signal Gaten-1 transmitted in the (N - 1)th scanning line GateN-1 arrive in sequence, corresponding to turning on the sub-pixels of the (N + 1)th row, the sub-pixels of the Nth row, and the sub-pixels of the (N - 1)th row in sequence to write the corresponding data signals respectively.

[0040] Among them, in order to achieve a better pull-down effect, the pulse rising edge of the scanning signal Gaten occurs at the same moment as the falling edge of the scanning signal Gaten+1, or the time interval between the two is 0 us. In this way, at the start moment of the time period T2, the scanning signal Gaten is at a high potential, and the second transistor NTB in the waveform sorting unit 20 of the Nth group is turned on or opened, and the falling edge of the scanning signal Gaten+1 can be pulled down to a low level at the end moment of the time period T1; similarly, at the start moment of the time period T3, the scanning signal Gaten-1 is at a high potential, and the second transistor NTB in the waveform sorting unit 20 of the (N - 1)th group is turned on or opened, and the falling edge of the scanning signal Gaten can be pulled down to a low level at the end moment of the time period T2. Similarly, it can also make the pulse end edge of each scanning signal steeper or closer to the ideal target.

[0041] As Figure 2As shown, when N is equal to 2, the (N - 1)-th scan line GateN-1 can be the first scan line Gate1 connected to the sub-pixels in the first row, the N-th scan line GateN can be the second scan line Gate2 connected to the sub-pixels in the second row, the (N + 1)-th scan line GateN+1 can be the third scan line Gate3 connected to the sub-pixels in the third row, and the (N + 2)-th scan line can be the fourth scan line Gate4 connected to the sub-pixels in the fourth row. Assuming there are only four rows of sub-pixels in a display panel, the scan lines Gate0 and Gate5 can be virtual scan lines respectively, which are not connected to the corresponding sub-pixels.

[0042] In one embodiment, when the display panel performs a forward scan, corresponding electrical signals are provided to the first potential transmission line, and no electrical signals are provided to the second potential transmission line; or, when the display panel performs a reverse scan, corresponding electrical signals are provided to the second potential transmission line, and no electrical signals are provided to the first potential transmission line.

[0043] It should be noted that during the forward scan, the first potential transmission line pulls down or pulls up the end edge of the corresponding scan signal through each first transistor NTA; while the second potential transmission line does not pull down or pull up the end edge of the corresponding scan signal through each second transistor NTB, nor does it affect the normal transmission of the corresponding scan signal.

[0044] During the reverse scan, the second potential transmission line pulls down or pulls up the end edge of the corresponding scan signal through each second transistor NTB; while the first potential transmission line does not pull down or pull up the end edge of the corresponding scan signal through each first transistor NTA, nor does it affect the normal transmission of the corresponding scan signal.

[0045] Herein, the end edge refers to the falling edge of a positive pulse or the rising edge of a negative pulse.

[0046] In one embodiment, when the scan line transmits a scan signal with a positive pulse, both the first transistor NTA and the second transistor NTB are N-channel thin film transistors, and the first potential transmission line or the second potential transmission line is used to transmit a low potential signal; or, when the scan line transmits a scan signal with a negative pulse, both the first transistor NTA and the second transistor NTB are P-channel thin film transistors, and the first potential transmission line or the second potential transmission line is used to transmit a high potential signal.

[0047] It should be noted that the potential of the low potential signal in this embodiment can be less than or equal to the low level of the corresponding scan signal to pull down the falling edge of the positive pulse. The potential of the high potential signal can be greater than or equal to the high level of the corresponding scan signal to pull up the rising edge of the negative pulse.

[0048] In one embodiment, the display area includes a plurality of display sub-areas sequentially distributed in the extending direction of the scanning lines; in a part of each display sub-area, a plurality of first transistors NTA in different groups are distributed column by column in the arrangement direction of the scanning lines; in another part of each display sub-area, a plurality of second transistors NTB in different groups are distributed column by column in the arrangement direction of the scanning lines.

[0049] It should be noted that Figure 3 The area shown can be a display sub-area. The corresponding first transistors NTA are distributed in the left half of the display sub-area, and the corresponding second transistors NTB are distributed in the right half of the display sub-area.

[0050] This embodiment can not only achieve a more ideal improvement of the end edge of the scanning signal, but also differentially configure different improvement effects during forward scanning and reverse scanning, which is beneficial to meeting different application requirements.

[0051] In one embodiment, as Figure 4 shown, the display area includes a plurality of display sub-areas sequentially distributed in the extending direction of the scanning lines. In each display sub-area, one waveform shaping unit 20 in each group is distributed column by column in the arrangement direction of the scanning lines.

[0052] It should be noted that one waveform shaping unit 20 in each group being distributed column by column in the arrangement direction of the scanning lines means that: the first transistors NTA and the second transistors NTB whose gates are connected to the (N - 1)-th scanning line GateN-1 are located in the leftmost column, the first transistors NTA and the second transistors NTB whose gates are connected to the N-th scanning line GateN are located in the middle column, and the first transistors NTA and the second transistors NTB whose gates are connected to the (N + 1)-th scanning line GateN+1 are located in the rightmost column.

[0053] In one embodiment, as Figure 4 shown, in each waveform shaping unit 20, the first transistors NTA and the second transistors NTB are adjacent to each other.

[0054] It should be noted that the first transistors NTA and the second transistors NTB being adjacent to each other in each waveform shaping unit 20 means that: in the extending direction of the scanning lines, there are no other first transistors NTA or second transistors NTB between the first transistors NTA and the second transistors NTB in each waveform shaping unit 20.

[0055] In this embodiment, without adding in-plane traces, by continuously using each dummy trace as the first potential transmission line or the second potential transmission line, the waveform shaping units 20 are placed adjacent to each other in the extending direction of the scanning lines. This makes the improvement effect on the end edge of the scanning signal during forward scanning and reverse scanning not significantly different, and it can also meet the requirements of more application scenarios.

[0056] In one embodiment, as Figure 5 , Figure 6 shown, the display area includes a plurality of display sub-areas arranged in sequence in the extending direction of the scanning lines. In each display sub-area, one waveform shaping unit 20 in each group is distributed in every other column in the arrangement direction of the scanning lines.

[0057] It should be noted that one waveform shaping unit 20 in each group being distributed in every other column in the arrangement direction of the scanning lines means that: the first transistor NTA and the second transistor NTB whose gates are connected to the (N - 1)-th scanning line GateN-1 are located in the left column, the first transistor NTA and the second transistor NTB whose gates are connected to the N-th scanning line GateN are located in the middle column, and the first transistor NTA and the second transistor NTB whose gates are connected to the (N + 1)-th scanning line GateN+1 are located in the right column. As Figure 5 shown, there are two columns without waveform shaping units 20 placed between the left column and the middle column, and between the middle column and the right column; or, as Figure 6 shown, there is one column without waveform shaping units 20 placed between the left column and the middle column, and between the middle column and the right column.

[0058] In one embodiment, as Figure 5 shown, in each waveform shaping unit 20, there is a data line between the first transistor NTA and the second transistor NTB.

[0059] It should be noted that there is a data line between the first transistor NTA and the second transistor NTB in each waveform shaping unit 20, which indicates that the first transistor NTA and the second transistor NTB in the same waveform shaping unit 20 are adjacent to each other. This makes the improvement effect on the end edge of the scanning signal during forward scanning and reverse scanning not significantly different. At the same time, since there is no continuous use of dummy traces as Figure 3 , Figure 4 shown, the routing difficulty of these dummy traces is also reduced.

[0060] In one embodiment, as Figure 6 shown, in each waveform shaping unit 20, the first transistor NTA and the second transistor NTB are distributed in every other column; or, there are multiple data lines between the first transistor NTA and the second transistor NTB.

[0061] It should be noted that in each waveform arranging unit 20, the first transistor NTA and the second transistor NTB are distributed in alternate columns; alternatively, there are multiple data lines between the first transistor NTA and the second transistor NTB, which indicates that the first transistor NTA and the second transistor NTB in the same waveform arranging unit 20 are not adjacent to each other. This ensures that there is no significant difference in the improvement effect on the trailing edge of the scanning signal during forward scanning and reverse scanning. At the same time, since the virtual traces are more dispersed, the routing difficulty of these virtual traces is further reduced.

[0062] In addition, in Figures 3 to 6 , taking the first transistor NTA and the second transistor NTB both being N-channel thin film transistors as an example, the first potential transmission line is used to transmit the first low potential signal VGL, and the potential of the first low potential signal VGL can be less than or equal to the low level of the corresponding scanning signal; the second potential transmission line is used to transmit the second low potential signal VGL2, and the potential of the second low potential signal VGL2 can be less than or equal to the low level of the corresponding scanning signal.

[0063] Among them, the data line datar can be connected to the red sub-pixels (R) in the corresponding column, the data line datag can be connected to the green sub-pixels (G) in the corresponding column, and the data line datab can be connected to the blue sub-pixels (B) in the corresponding column.

[0064] In order to keep the aperture ratio of each sub-pixel consistent and not add new wiring, the virtual trace (dummy) can be used as the touch trace (TP), the first potential transmission line, or the second potential transmission line.

[0065] In the waveform arranging unit 20 of the N-1th group, the first pole of the first transistor NTA is connected to the (N-2)th scanning line GateN-2, the gate of the first transistor NTA is connected to the (N-1)th scanning line GateN-1, and the second pole of the first transistor NTA is connected to a corresponding first potential transmission line; the first pole of the second transistor NTB is connected to the Nth scanning line GateN, the gate of the second transistor NTB is connected to the (N-1)th scanning line GateN-1, and the second pole of the second transistor NTB is connected to a corresponding second potential transmission line.

[0066] In the waveform shaping unit 20 of the (N + 1)th group, the first pole of the first transistor NTA is connected to the Nth scan line GateN, the gate of the first transistor NTA is connected to the (N + 1)th scan line GateN+1, and the second pole of the first transistor NTA is connected to a corresponding first potential transmission line; the first pole of the second transistor NTB is connected to the (N + 2)th scan line GateN+2, the gate of the second transistor NTB is connected to the (N + 1)th scan line GateN+1, and the second pole of the second transistor NTB is connected to a corresponding second potential transmission line.

[0067] In summary, the above embodiments can improve the trailing edge of the in-plane scan signal during forward driving scanning, and can also improve the trailing edge of the in-plane scan signal during reverse driving scanning. Since the improvement of the trailing edge of the in-plane scan signal during forward and reverse driving scanning can be respectively satisfied, the application of each embodiment can achieve the liberalization of the installation method for ultra-wide screens.

[0068] As Figure 2 、 Figure 7 shown, in order to improve the driving ability of the scan signal, for an ultra-wide screen, two gate driving circuits 100 (GOA circuits) are constructed. The two gate driving circuits 100 are respectively located on the opposite sides of the display area, and the data driving chip 300 for providing the corresponding data signal is located in the lower border area.

[0069] During forward scanning, the first row of sub-pixels to the last row of sub-pixels are sequentially turned on from the first scan line (Gate1) to the last scan line (GateM); during reverse scanning, the last row of sub-pixels to the first row of sub-pixels are sequentially turned on from the last scan line (GateM) to the first scan line (Gate1).

[0070] The display area is simply divided into four areas: area A, area B, area C, and area D. Among them, area A and area B are close to the gate driving circuit 100 and are symmetric left and right; area C and area D are far from the gate driving circuit 100 and are also symmetric. According to Figure 7 the comparison between the waveform of the first row without in-plane pull-down and the waveform of the second row with in-plane pull-down, it can be seen that after in-plane pull-down for the ultra-wide screen, not only the falling edges of the scan signals in each area become closer to the ideal target, but also the falling edges of the scan signals in area A and area B are steeper than those in area C and area D, that is, the improvement is more ideal.

[0071] In one of the embodiments, this embodiment provides a display device, which includes the display panel in at least one of the above embodiments, such as Figure 2 、 Figure 7As shown, the display panel further includes two gate driving circuits 100 respectively located on opposite sides of the display area, and both ends of each scanning line are respectively connected to corresponding gate driving units in a gate driving circuit 100.

[0072] It can be understood that since the display device provided in this embodiment includes the display panel in the above-mentioned at least one embodiment, it is also possible to control the first transistor NTA to turn on through the Nth scanning line GateN, so that the pulse end edge transmitted in the (N - 1)th scanning line GateN - 1 is steeper or closer to the ideal target during the forward scanning process. Or, by controlling the second transistor NTB to turn on through the Nth scanning line GateN, the pulse end edge transmitted in the (N + 1)th scanning line GateN + 1 can be made steeper or closer to the ideal target during the reverse scanning process. This can improve the deformation of the pulse end edge of the scanning signal during transmission, not only reducing the risk of charging errors, but also increasing the charging time or facilitating the realization of higher-frequency display.

[0073] Moreover, since the pulse end edge of the scanning signal can be improved during both the forward scanning process and the reverse scanning process, the display device provided in this embodiment is also applicable to the driving methods of forward scanning or reverse scanning.

[0074] It should be noted that the above-mentioned display device can be, but is not limited to, a liquid crystal display device, and can also be a self-luminous display device. For example, an organic light-emitting diode display device, a mini light-emitting diode display device, a micro light-emitting diode display device, or a quantum dot light-emitting diode display device.

[0075] In the above embodiments, the descriptions of each embodiment have their own emphases. For the parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0076] The display panel and the display device provided in the embodiments of the present application have been introduced in detail above. Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the technical solution and its core idea of the present application; those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, characterized in that, the display panel is provided with a display area and a non-display area, and the display panel includes: a plurality of scan lines, the plurality of scan lines including a (N-1)th scan line, an Nth scan line, and a (N+1)th scan line arranged in sequence; a plurality of waveform shaping units located in the display area, wherein each waveform shaping unit in the Nth group includes: a first transistor, the gate of the first transistor is connected to the Nth scan line, the first pole of the first transistor is connected to the (N-1)th scan line, and the second pole of the first transistor is connected to a first potential transmission line; a second transistor, the gate of the second transistor is connected to the Nth scan line, the first pole of the first transistor is connected to the (N+1)th scan line, and the second pole of the first transistor is connected to a second potential transmission line; wherein, when the display panel performs a forward scan, a corresponding electrical signal is provided to the first potential transmission line, and no electrical signal is provided to the second potential transmission line; or, when the display panel performs a reverse scan, a corresponding electrical signal is provided to the second potential transmission line, and no electrical signal is provided to the first potential transmission line.

2. The display panel according to claim 1, characterized in that, when the scan line transmits a scan signal with a positive pulse, the first transistor and the second transistor are both N-channel thin film transistors, and the first potential transmission line or the second potential transmission line is used to transmit a low potential signal; or, when the scan line transmits a scan signal with a negative pulse, the first transistor and the second transistor are both P-channel thin film transistors, and the first potential transmission line or the second potential transmission line is used to transmit a high potential signal.

3. The display panel according to claim 1, characterized in that, the display area includes a plurality of display sub-areas sequentially distributed in the extending direction of the scan line; in a part of each display sub-area, a plurality of first transistors in different groups are distributed column by column in the arranging direction of the scan line; in another part of each display sub-area, a plurality of second transistors in different groups are distributed column by column in the arranging direction of the scan line.

4. The display panel according to claim 1, characterized in that, the display area includes a plurality of display sub-areas sequentially distributed in the extending direction of the scan line, and in each display sub-area, one waveform shaping unit in each group is distributed column by column in the arranging direction of the scan line.

5. The display panel according to claim 4, characterized in that, in each waveform shaping unit, the first transistor and the second transistor are adjacent to each other.

6. The display panel according to claim 1, characterized in that, the display area includes a plurality of display sub-areas sequentially distributed in the extending direction of the scan line, and in each display sub-area, one waveform shaping unit in each group is distributed every other column in the arranging direction of the scan line.

7. The display panel according to claim 6, characterized in that, In each of the waveform shaping units, a data line is provided between the first transistor and the second transistor.

8. The display panel according to claim 6, wherein, in each of the waveform shaping units, the first transistor and the second transistor are distributed in alternate columns; or, a plurality of data lines are provided between the first transistor and the second transistor.

9. A display device, wherein, the display device includes the display panel according to any one of claims 1-8, and the display panel further includes two gate driving circuits respectively located on opposite sides of the display area, and both ends of each scanning line are respectively connected to corresponding gate driving units in a gate driving circuit.

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