A data conversion control method and system
The data conversion system with a sub-control module and power-saving features addresses CPU time consumption issues in D/A and A/D conversion, enhancing real-time processing and reliability in integrated circuits.
Patent Information
- Application Number
- CN202211689384.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-27
- Publication Date
- 2025-07-15
- Estimated Expiration
- 2042-12-27
AI Technical Summary
In the prior art, the D/A and A/D converters are programmed by CPU software to take up a large amount of CPU time, resulting in a decrease in system reliability.
The data conversion system of the main control module, the sub-control module and the conversion module is adopted. By judging the amount of data to be converted and the cache location, selecting the appropriate control subject for data conversion, reducing the intervention of the main control module, increasing the workload of the sub-control module, and optimizing power management through low-power control circuits.
It improves the real-time processing capability of the main control module, reduces system power consumption, improves system reliability, and ensures that data is not lost when real-time data flows exceeding the conversion capability.
Smart Images

Figure CN115955241B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of integrated circuits, and particularly relates to a data conversion control method and system. Background Art
[0002] Analog-to-digital conversion circuits and digital-to-analog conversion circuits are one of the commonly used circuits in digital systems. Their main functions are to convert digital signals into analog signals and convert analog signals into digital signals. Usually, dedicated D / A conversion circuit chips and A / D conversion circuit chips are used to achieve this. The conventional method for realizing the D / A conversion function and the A / D conversion function is to use the CPU as the control component and control the converter through software programming. Although the software implementation method is simple, it will inevitably occupy a large amount of CPU time, weaken the real-time processing ability of the CPU, and reduce the reliability of the system. Summary of the Invention
[0003] The technical problem to be solved by the present invention: The conventional method for realizing the D / A conversion function and the A / D conversion function is to use the CPU as the control component and control the converter through software programming. Although the software implementation method is simple, it will inevitably occupy a large amount of CPU time, weaken the real-time processing ability of the CPU, and reduce the reliability of the system.
[0004] To solve the above technical problems, the present invention proposes a data conversion control method and system.
[0005] The present invention adopts the following technical solutions:
[0006] A data conversion control method, based on a data conversion system including a main control module, a sub-control module, and a conversion module, for the currently received data to be converted, performs the following steps to control the data conversion of the currently received data to be converted:
[0007] Step A: Determine whether there is data to be converted in the current data conversion system. If there is data to be converted, execute Step B; if there is no data to be converted, execute Step C;
[0008] Step B: Based on the amount of data to be converted in the current data conversion system and the control entity corresponding to the buffer position of the data to be converted, in combination with a first preset data volume threshold, obtain the control entity corresponding to the buffer position of the currently received data to be converted, that is, select a control entity to buffer the currently received data to be converted, and the currently received data to be converted is controlled by this control entity to perform data conversion through the conversion module; the control entities include the main control module and the sub-control module;
[0009] Step C: Based on the currently received amount of data to be converted and in combination with the first preset data volume threshold, obtain the transmission position of the currently received data to be converted, that is, select a control entity to receive the currently received data to be converted, and the currently received data to be converted is controlled by this control entity to pass through the conversion module for data conversion.
[0010] Preferably, in the said Step B, the following steps are specifically executed to obtain the control entity corresponding to the caching position of the currently received data to be converted:
[0011] Step B1: Judge the control entity corresponding to the caching position of the data to be converted in the current data conversion system. If the caching position is in the main control module, execute Step B2; if the caching position is in the sub-control module, execute Step B3;
[0012] Step B2: Based on the currently received amount of data to be converted and the amount of data to be converted cached in the main control module, and in combination with the first preset data volume threshold, if the sum of the currently received amount of data to be converted and the amount of data to be converted cached in the main control module is greater than the first preset data volume threshold, transmit and cache the currently received data to be converted and the data to be converted cached in the main control module to the sub-control module, and the sub-control module controls the conversion module to perform data conversion on the data to be converted cached in the sub-control module; if the sum of the currently received amount of data to be converted and the amount of data to be converted cached in the main control module is not greater than the first preset data volume threshold, transmit and cache the currently received data to be converted to the main control module, and the main control module controls the conversion module to perform data conversion on the data to be converted cached in the main control module;
[0013] Step B3: Transmit and cache the currently received data to be converted to the sub-control module, and the sub-control module controls the conversion module to perform data conversion on the data to be converted cached in the sub-control module.
[0014] Preferably, in the said Step C, the following steps are specifically executed to obtain the transmission position of the currently received data to be converted:
[0015] Based on the currently received amount of data to be converted and in combination with the first preset data volume threshold, if the currently received amount of data to be converted is greater than the first preset data volume threshold, transmit the currently received data to be converted to the sub-control module, and the sub-control module controls the conversion module to perform data conversion on the currently received data to be converted; if the currently received amount of data to be converted is not greater than the first preset data volume threshold, transmit the currently received data to be converted to the main control module, and the main control module controls the conversion module to perform data conversion on the currently received data to be converted.
[0016] Preferably, in step C, after obtaining the transmission position of the currently received data volume to be converted, based on the currently received data volume to be converted and in combination with a second preset data volume threshold, if the currently received data volume to be converted is greater than the second preset data volume threshold, the currently received data volume to be converted is transmitted to the control main body cache, and the control main body controls the conversion module to perform data conversion on the cached data volume to be converted; if the currently received data volume to be converted is not greater than the second preset data volume threshold, the currently received data volume to be converted is transmitted to the control main body, and the control main body controls the conversion module to perform data conversion on the currently received data volume to be converted in real time.
[0017] A system based on a data conversion control method includes a main control module, a sub-control module, and a conversion module. The conversion module is respectively connected to the main control module and the sub-control module, and the main control module is connected to the sub-control module. The main control module selects a control main body for the currently received data volume to be converted based on the data volume to be converted in the current data conversion system; the conversion module performs data conversion on the data volume to be converted under the control of the control main body, and the conversion module transmits the converted data to the main control module.
[0018] Preferably, the conversion module includes a DA conversion unit and an AD conversion unit. The DA conversion unit and the AD conversion unit are respectively connected to the main control module and the sub-control module. The AD conversion unit performs analog-to-digital conversion on the data volume to be converted under the control of the control main body, and the DA conversion unit performs digital-to-analog conversion on the data volume to be converted under the control of the control main body. The main control module receives the output data of the DA conversion unit and the AD conversion unit.
[0019] Preferably, the DA conversion unit includes a DA conversion circuit and a follow-up filter circuit. The output end of the DA conversion circuit is connected to the input end of the follow-up filter circuit, and the output end of the follow-up filter circuit is connected to the main control module; the DA conversion circuit performs digital-to-analog conversion on the data volume to be converted under the control of the control main body, and outputs the converted data to be filtered by the follow-up filter circuit and then transmitted to the main control module.
[0020] Preferably, the AD conversion unit includes an AD conversion circuit and a potential shift and attenuation circuit. The data volume to be converted corresponding to the AD conversion circuit is input to the AD conversion circuit through the potential shift and attenuation circuit; the AD conversion circuit performs analog-to-digital conversion on the data volume to be converted under the control of the control main body, and the AD conversion circuit outputs the converted signal to the main control module.
[0021] Preferably, it further includes a power supply module. The power supply module includes a DA conversion module power supply circuit and an AD conversion module power supply circuit. The DA conversion module power supply circuit provides a preset voltage for the DA conversion unit, and the AD conversion module power supply circuit provides a preset voltage for the AD conversion unit.
[0022] Preferably, it further includes low-power control circuits corresponding to the power supply circuits of the DA conversion module and the AD conversion module respectively, and each low-power control circuit controls the corresponding power supply circuit to supply power externally under the control of the control main body.
[0023] The beneficial effects of the present invention are as follows: The present invention provides a data conversion control method and system, and designs a conversion system including a main control module, a sub-control module, and a conversion module. Since the sub-control module can work without excessive intervention from the main control module, it shares the workload of the main control module in the system; and based on the conversion system, a data conversion control method is also designed. Considering factors such as the amount of data to be converted received in real time and the amount of data to be converted already existing in the system, the transmission position of the data to be converted is determined, and further conversion transmission control is performed on the data to be converted, improving the real-time signal processing ability of the main control module; in addition, this solution also adds a power-saving function to reduce the power consumption of the system. At the same time, due to the existence of the caching function, no data will be lost when dealing with real-time data streams that exceed the conversion ability. This solution not only improves the real-time signal processing ability of the main control module, but also improves the reliability of the system, and has certain practical value and reference value in integrated circuits. Description of the Drawings
[0024] Figure 1 It is a block diagram of a data analog-to-digital conversion control method in an embodiment of the present invention;
[0025] Figure 2 It is a DA conversion circuit diagram in an embodiment of the present invention;
[0026] Figure 3 It is a power supply circuit diagram of the DA conversion module in an embodiment of the present invention;
[0027] Figure 4 It is an AD conversion circuit diagram in an embodiment of the present invention;
[0028] Figure 5 It is a potential shift and attenuation circuit diagram in an embodiment of the present invention;
[0029] Figure 6 It is a reverse transformation circuit diagram in the power supply circuit of the AD conversion module in an embodiment of the present invention;
[0030] Figure 7 The power supply conversion circuit for eliminating noise in an embodiment of the present invention;
[0031] Figure 8 It is a low-power control circuit diagram in an embodiment of the present invention. Detailed Embodiments
[0032] The present invention will be further described below in conjunction with the accompanying drawings. The following embodiments can enable those skilled in the art to understand the present invention more comprehensively, but do not limit the present invention in any way.
[0033] A data conversion system in this embodiment includes a main control module, a sub-control module, and a conversion module. The conversion module is respectively connected to the main control module and the sub-control module, and the main control module is connected to the sub-control module. The main control module selects a control entity for the currently received data to be converted based on the situation of the data to be converted in the current data conversion system, that is, executes a data conversion control method; the control entity includes the main control module and the sub-control module; the conversion module performs data conversion on the data to be converted in the main control module under the control of the control entity, and the conversion module transmits the converted data to the main control module.
[0034] The conversion module includes a DA conversion unit and an AD conversion unit. Both the DA conversion unit and the AD conversion unit are respectively connected to the main control module and the sub-control module. The AD conversion unit performs analog-to-digital conversion on the data to be converted in the main control module under the control of the control entity, and the DA conversion unit performs digital-to-analog conversion on the data to be converted in the main control module under the control of the control entity. The main control module receives the output data of the DA conversion unit and the AD conversion unit.
[0035] The DA conversion unit includes a DA conversion circuit and a follow-up filter circuit. The output end of the DA conversion circuit is connected to the input end of the follow-up filter circuit, and the output end of the follow-up filter circuit is connected to the main control module; the DA conversion circuit performs digital-to-analog conversion on the data to be converted in the main control module under the control of the control entity, and outputs the converted data to be filtered by the follow-up filter circuit, and then transmits it to the main control module.
[0036] The follow-up filter circuit includes a resistor R1 and a capacitor C1. One end of the resistor R1 is used as the input end of the follow-up filter circuit and is connected to the output end of the DA conversion circuit. The other end of the resistor R1 is grounded through the capacitor C1, and the other end of the resistor R1 is used as the output end of the follow-up filter circuit to transmit the output data of the DA conversion unit to the main control module.
[0037] Such as Figure 2As shown in the figure, in one embodiment, the DA conversion circuit uses an AD7846 chip. The output after the DA conversion circuit is converted is input to an RC follower filter module composed of a resistor R1 and a capacitor C1 to filter out the ripple of the output voltage. The 16-bit data lines IO1_1 to IO1_16 and the 4-bit control lines IO1_33 to IO1_36 of the AD7846 chip are connected to the I / O ports of the corresponding module of the control main body. The 16-bit data lines IO1_1 to IO1_16 are the input ends of the DA conversion circuit, and obtain the digital signal data to be converted from the control main body. The 4-bit control lines IO1_33 to IO1_36 respectively correspond to the functions of LDAC, CLR, CS, and RW. The control of the DA conversion is mainly realized through these four control lines. Among them, CS is the chip select line; RW and CS are used together as the control lines for reading back data and loading data. The data read-back function reads the data in the DAC register, which is more practical in automatic testing equipment, and this design does not involve this function; the LDAC control line is used for the synchronous conversion of DA and is used for the synchronous update of multiple DAs after the conversion data is loaded; CLR and RW are used together to reset the DAC register to the 0V voltage output value and output a 0V voltage. When the present invention needs to reset the 0V output, RW is set high (low for single-polarity output). The internal structure of the AD7846 mainly includes three parts: a control logic circuit, a DA conversion circuit, and a 4- to 16-segment switch matrix. The basic control principle of the DA conversion circuit of the AD7846 is as follows: through four control signals CS, RW, LDAC, and CLR, corresponding storage and initialization operations are selected and performed. The lower 12-bit data in the conversion data is latched, and the higher 4-bit data controls the 16-segment switch network to complete the setting of the reference voltage, so that the output voltage has a 16-bit accuracy. Among them, the RW input controls the read / write operation of the conversion data register to realize the read-back processing of the data. Through the cooperation of the CLR and RW control signals, the initialization output value can be configured; it is cleared in the write state, and the conversion value of the output data bit 000...000 is output; it is cleared in the read state, and the output data is 100...000. This feature can easily achieve a 0V voltage output in the single- and bipolar working states. Therefore, the AD7846 chip is selected in this solution.
[0038] The AD conversion unit includes an AD conversion circuit, a potential shift and attenuation circuit. The data to be converted corresponding to the AD conversion circuit is input to the AD conversion circuit through the potential shift and attenuation circuit; the AD conversion circuit performs analog-to-digital conversion on the data to be converted under the control of the control main body, and the AD conversion circuit outputs the converted signal to the main control module.
[0039] The AD conversion unit includes an AD conversion circuit, a potential shift and attenuation circuit. The signal to be converted corresponding to the AD conversion circuit is input to the AD conversion circuit through the potential shift and attenuation circuit for digital-to-analog conversion, and the AD conversion circuit outputs the converted signal to the main control module.
[0040] The potential shift and attenuation circuit includes a voltage follower ua, a voltage follower uc, an inverting amplifier ub, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a diode D1, and a diode D2. The signal to be converted corresponding to the AD conversion circuit is input to one end of the resistor R2. The other end of the resistor R2 is respectively connected to the negative electrode of the diode D2, the positive electrode of the diode D1, one end of the resistor R3, and the non-inverting input terminal of the voltage follower uc. The other end of the resistor R3 is grounded. The positive electrode of the diode D2 is respectively connected to the negative electrode of the diode D1, the inverting input terminal of the voltage follower uc, one end of the resistor R4, and one end of the resistor R5. The other end of the resistor R4 is connected to the output terminal of the voltage follower uc. The other end of the resistor R5 is connected to the output terminal of the inverting amplifier. The non-inverting input terminal of the inverting amplifier ub is grounded. A resistor R6 is connected in series between the inverting input terminal and the output terminal of the inverting amplifier ub. And the inverting input terminal of the inverting amplifier ub is connected to one end of the resistor R7. The other end of the resistor R7 is respectively connected to the output terminal and the inverting input terminal of the voltage follower ua. The non-inverting input terminal of the voltage follower ua is connected to a preset reference voltage provided by the AD conversion circuit. The output terminal of the voltage follower uc is connected to the AD conversion circuit as the output terminal of the potential shift and attenuation circuit. The potential shift and attenuation circuit is for collecting data in a larger range.
[0041] Specifically, in one embodiment, as Figure 4 shown, the AD conversion circuit uses an AD9226 chip. The 12-bit data lines BIT1 - BIT12 of the AD9926 chip are connected to the I / O ports corresponding to the data output and control main body modules. The VINA port and the VINB port are for analog signal input. The VINA port is connected to the R11 resistor and then connected to the analog signal input. The VINB is connected to the R12 resistor and then connected to the VREF terminal. The VREF terminal is connected to the non-inverting input terminal of the voltage follower ua and then grounded through the capacitors C3 and C4. The selected analog-to-digital converter AD9226 has a very convenient interface. Its advantages are that it has an on-chip high-performance sample-and-hold amplifier and a reference voltage source, has a signal overflow indication bit, and can directly output data in binary form. In addition, the AD9226 uses a multi-stage differential pipelined structure with error correction logic, which can ensure no loss of codes within the entire operating temperature range and obtain accurate 12-bit data. At the same time, the AD9226 also has low power consumption and a high signal-to-noise ratio. The AD9226 has two packaging formats: 28-Lead SSOP and 48-Lead LQEP. The 28-pin chip is used in this embodiment. For the AD9226 chip, the external clock input is connected to the CLK pin; the collected signal is input to the VINA pin;
[0042] The BIT1 to BIT12 pins output the results after analog-to-digital conversion; OTR is the overflow flag pin. When this pin is at a high level, it indicates that the input signal exceeds the range of the AD9226. +5V is the analog voltage input, 3.3V is the digital voltage input, GND is the digital ground, and AGND is the analog ground. In essence, the digital ground and the analog ground are both grounds. The main reasons for separating the two are as follows: First, digital signals and analog signals will interfere with each other; second, the requirements for the ground of analog signals are much higher than those for the ground of digital signals. When the SENSE pin is grounded, the chip uses the internal reference source. In this mode, the internal reference voltage is output from VREF, with a magnitude of 2V. This reference voltage will be provided to the attenuation circuit.
[0043] As Figure 5 shown, in this embodiment, the VREF reference voltage of 2V is input at the lower left corner of the circuit diagram, provided by the VREF pin of the AD9226, and -2V of NREF is obtained through the voltage follower Ua and the inverting proportional amplifier Ub. Among them, the output voltage of the voltage follower is the same as the input voltage. Because the output impedance of the voltage amplifier is generally relatively high, usually in the range of several thousand ohms to several tens of thousand ohms. If the input impedance of the subsequent stage is relatively small, then a considerable part of the signal will be lost in the output resistance of the previous stage. Therefore, a voltage follower is needed in front. On the one hand, it increases the input impedance, and on the other hand, it reduces the output impedance, so as to buffer in the middle and play a role of connecting the previous and the next. For example, when the ADCIN input signal is +5V, according to the resistance values of R1 and R2, the voltage at point A is 0.5V. Then the voltage difference from NREF to point B is 2.5V. So the voltage difference between point B and point C is also 2.5V, that is, the voltage at point C is 3V; similarly, when the ADCIN inputs a voltage of -5V, according to the resistance values of R1 and R2, the voltage at point A is -0.5V. Then the voltage difference from NREF to point B is 1.5V. So the voltage difference between point B and point C is also 1.5V, that is, the voltage at point C is 1V. This attenuates the input signal from -5V to +5V to 1V to 3V, thereby expanding the acquisition range.
[0044] A digital conversion system further includes a power supply module. The power supply module includes a DA conversion module power supply circuit and an AD conversion module power supply circuit. The DA conversion module power supply circuit provides a preset voltage for the DA conversion unit, and the AD conversion module power supply circuit provides a preset voltage for the AD conversion unit.
[0045] Specifically, in one embodiment, the DA conversion module power supply circuit uses the AD588 power supply chip, as Figure 3As shown, the AD588 is a dedicated power supply chip for the AD7846 chip, providing the required ±5V reference power supply. Pins 1 and 3 provide +5V, and pins 14 and 15 provide -5V. Capacitor C1 is used to filter out high and low frequency noises. Variable resistors R10 and R8 are used to calibrate the output analog voltage value. When the control line LDAC loads 10000…000, by adjusting R10, the output is 0V. When loading all 1111…111, adjust R8 to make the output reach the full scale of 9.99694V to complete the module calibration.
[0046] Specifically, in one embodiment, the power supply circuit of the AD conversion module uses the AMS117 voltage conversion chip and the MC34063 chip. As Figure 6 shown, the power supply circuit part of the AD conversion module is composed of the MC34063 chip to form a buck-boost circuit for generating -5V reverse voltage, and the AMS117 is used for generating 3.3V voltage. In the buck-boost circuit, the IPK pin of the MC34063 chip is connected to VCC through the resistor R16. VCC is selected as 15V. The VCC pin is connected to VCC. The IPK pin is connected to the DC pin and then to the SC pin. The SE pin is grounded through the inductor L1. The TC pin is connected to the GND pin through the capacitor C10 and then grounded. When the internal switch T1 of the chip is turned on, the current flows through the SC pin, SE pin of the MC34063 and the inductor L1 to the ground, and the inductor L1 stores energy. At this time, C11 provides energy to the load. When T1 is turned off, since the current flowing through the inductor cannot change suddenly, the freewheeling diode D3 conducts. At this time, L1 supplies power to the load and C11 (through the common ground) through D3, and a negative voltage is output. In this way, as long as the operating frequency of the chip is high enough relative to the time constant of the load, a continuous DC voltage can be obtained on the load. The internal reference voltage value of the MC34063 chip is 1.25V, so the value of the DC voltage is Vout = -1.25(1 + R9 / R8) = -5V.
[0047] In this embodiment, in addition to the conversion of each voltage value, the problem of eliminating noise is also considered. Figure 7A power conversion circuit for eliminating noise is provided to eliminate noise from the power supply voltage in this solution. In the figure, -5V0 is the voltage generated in the power supply circuit of this solution, and -5V is the power supply after noise elimination. The noise elimination between several power supply signals used in the circuit is achieved through the bead FB1. The bead is dedicated to suppressing high-frequency noise and spike interference on signal lines and power lines, and also has the ability to absorb electrostatic pulses. The main function of the bead is to eliminate the RF noise existing in the transmission line structure. The RF energy is the AC sine wave component superimposed on the DC transmission level, and the DC component is the useful signal required. To eliminate this unwanted signal energy, a chip bead is used to play the role of a high-frequency resistor, that is, an attenuator. The bead has a high resistivity and magnetic permeability. It is equivalent to a series connection of a resistor and an inductor, but both the resistance value and the inductance value change with frequency. The main way the bead works is to reflect noise using the inductance component at high frequencies and convert the noise into heat using the resistance component, thereby achieving the effect of suppressing noise; it has better high-frequency filtering characteristics than ordinary inductors. It presents a resistive property at high frequencies, so it can maintain a high impedance within a relatively wide frequency range, thereby improving the FM filtering effect.
[0048] A digital conversion system also includes low-power control circuits corresponding to the power supply circuits of the DA conversion module and the AD conversion module respectively. Each low-power control circuit controls the corresponding power supply circuit to supply power externally under the control of the control main body.
[0049] As Figure 8 Shown is the design of the low-power control circuit. Among them, EN corresponds to the control signal of the control main body module, which is used to turn on or off the power supply of the power supply circuit. In this embodiment, there are three designs of low-power control circuits, corresponding to the three power supplies of AD588, AMS117, and MC34063 respectively; for each low-power control circuit: Vi is the power supply voltage input, and 12V is selected; Vo is connected to the corresponding power supply pin, that is, the power supply pins of AD588, AMS117, and MC34063. Therefore, a total of 3 NCT3527s are required to control each power supply circuit. Specifically: when the control main body detects the existence of an AD conversion requirement, the control main body separately pulls up EN for controlling the power supplies of AMS117 and MC34063 to turn on the power supply of the AD conversion part. After the conversion is completed, the power supply is immediately disconnected to save power. When the control main body detects the existence of a DA conversion requirement, the main control or sub-control module separately pulls up EN for controlling the power supply of AD588 to turn on the power supply of the DA part. After the conversion is completed, the power supply is immediately disconnected to save power. Based on the low-power control circuit, when the amount of single-task data is much smaller than the carrying capacity of the conversion module or the transmission data is frequently interrupted, the power supply can be disconnected to save power in the non-working state.
[0050] For the sub-control module, in one embodiment, the sub-control module adopts a virtual control module divided by the main control module. When the data volume of the data to be converted in the main control module exceeds the first preset data volume threshold, the virtual control module controls the conversion module to perform data conversion; when the data volume of the data to be converted in the main control module does not exceed the first preset data volume threshold, the main control module controls the conversion module to perform data conversion. That is, in this embodiment, the main control module uses a CPU, the sub-control module uses a virtual CPU divided by the CPU, and the synchronization signal SYNC, load signal LDAC, clock signal SCLK, data signal SDIN, and clear signal CLR of the AD5724 are all connected to the main control module; the 16-bit data lines IO1_1 to IO1_16 and the 4-bit control lines IO1_33 to IO1_36 of the AD7846 chip are connected to the I / O ports of the main control module; the 12-bit data lines BIT1 to BIT12 of the AD9226 chip are data outputs and are connected to the I / O ports of the main control module.
[0051] In another embodiment, the sub-control module adopts an FPGA control module. The FPGA control module is respectively connected to the main control module and the conversion module. When the data volume of the data to be converted in the main control module exceeds the first preset data volume threshold, the main control module transmits the data volume of the data to be converted to the FPGA control module, and the FPGA control module controls the conversion module to perform data conversion, and the main control module proceeds to the next task. When the data volume of the data to be converted in the main control module does not exceed the first preset data volume threshold, the main control module controls the conversion module to perform data conversion. In this embodiment, the main control module uses a CPU. That is, in this embodiment, based on the above connection between the conversion module and the main control module, there are also the following connections with the FPGA in the conversion module: the synchronization signal SYNC, load signal LDAC, clock signal SCLK, data signal SDIN, and clear signal CLR of the AD5724 are all set by the FPGA, and the control signals are set by the state machine in the FPGA; the 16-bit data lines IO1_1 to IO1_16 and the 4-bit control lines IO1_33 to IO1_36 of the AD7846 chip are connected to the I / O ports of the FPGA1; the 12-bit data lines BIT1 to BIT12 of the AD9926 chip are data outputs and are connected to the I / O ports of the FPGA.
[0052] Based on the above data conversion system, as Figure 1 shown, a data conversion control method in this embodiment is based on a data conversion system including a main control module, a sub-control module, and a conversion module. For the currently received data to be converted, the following steps are executed to perform data conversion control on the currently received data to be converted:
[0053] Step A: Determine whether there is data to be converted in the current data conversion system. If there is data to be converted, execute Step B; if there is no data to be converted, execute Step C.
[0054] Step B: Based on the amount of data to be converted in the current data conversion system and the control entity corresponding to the cache location of the data to be converted, combined with the first preset data volume threshold, obtain the control entity corresponding to the cache location of the currently received data to be converted, that is, select a control entity to cache the currently received data to be converted, and the currently received data to be converted is controlled by this control entity to pass through the conversion module for data conversion; the control entity includes a main control module and a sub-control module.
[0055] In Step B, the following steps are specifically executed to obtain the control entity corresponding to the cache location of the currently received data to be converted:
[0056] Step B1: Determine the control entity corresponding to the cache location of the data to be converted in the current data conversion system. If the cache location is in the main control module, execute Step B2; if the cache location is in the sub-control module, execute Step B3;
[0057] Step B2: Based on the amount of currently received data to be converted and the amount of data to be converted cached in the main control module, combined with the first preset data volume threshold, if the sum of the currently received data to be converted and the amount of data to be converted cached in the main control module is greater than the first preset data volume threshold, transfer and cache the currently received data to be converted and the data to be converted cached in the main control module to the sub-control module, and the sub-control module controls the conversion module to perform data conversion on the data to be converted cached in the sub-control module; if the sum of the currently received data to be converted and the amount of data to be converted cached in the main control module is not greater than the first preset data volume threshold, transfer and cache the currently received data to be converted to the main control module, and the main control module controls the conversion module to perform data conversion on the data to be converted cached in the main control module;
[0058] Step B3: Transfer and cache the currently received data to be converted to the sub-control module, and the sub-control module controls the conversion module to perform data conversion on the data to be converted cached in the sub-control module.
[0059] Step C: Based on the amount of currently received data to be converted, combined with the first preset data volume threshold, obtain the transfer location of the currently received data to be converted, that is, select a control entity to receive the currently received data to be converted, and the currently received data to be converted is controlled by this control entity to pass through the conversion module for data conversion.
[0060] In Step C, the following steps are specifically executed to obtain the transfer location of the currently received data to be converted:
[0061] Based on the currently received amount of data to be converted and in combination with the first preset data volume threshold, if the currently received amount of data to be converted is greater than the first preset data volume threshold, the currently received data to be converted is transmitted to the sub-control module, and the sub-control module controls the conversion module to perform data conversion on the currently received data to be converted; if the currently received amount of data to be converted is not greater than the first preset data volume threshold, the currently received data to be converted is transmitted to the main control module, and the main control module controls the conversion module to perform data conversion on the currently received data to be converted.
[0062] Further, in step C, after obtaining the transmission position of the currently received amount of data to be converted, based on the currently received amount of data to be converted and in combination with the second preset data volume threshold, if the currently received amount of data to be converted is greater than the second preset data volume threshold, the currently received data to be converted is transmitted to the control entity buffer, and the control entity controls the conversion module to perform data conversion on the buffered data to be converted; if the currently received amount of data to be converted is not greater than the second preset data volume threshold, the currently received data to be converted is transmitted to the control entity, and the control entity controls the conversion module to perform data conversion on the currently received data to be converted in real time.
[0063] Moreover, during the data conversion process, when the control entity, i.e., the main control module or the sub-control module, detects a data conversion requirement, the main control or sub-control module individually pulls up or down the EN pin used to control the power supply circuit in the low-power control circuit to turn on the power supply circuit corresponding to the conversion part for power supply. After the conversion is completed, the power supply is immediately disconnected to save power consumption. Due to the power-saving function, the power consumption of the system is reduced.
[0064] The present invention designs a data conversion control method and system. Specifically, a conversion system including a main control module, a sub-control module, and a conversion module is designed. Since the sub-control module can work without excessive intervention from the main control module and shares the workload of the main control module in the system; and based on the conversion system, a data conversion control method is also designed. Considering factors such as the currently received amount of data to be converted and the amount of data to be converted already existing in the system, the transmission position of the data to be converted is determined, and further control of the conversion and transmission of the data to be converted is performed to improve the real-time signal processing ability of the main control module; in addition, this solution also adds a power-saving function to reduce the power consumption of the system. At the same time, thanks to the existence of the caching function, no data will be lost when dealing with real-time data streams that exceed the conversion capacity. This solution not only improves the real-time signal processing ability of the main control module but also improves the reliability of the system, and has certain practical value and reference value in integrated circuits.
[0065] The above are only the preferred embodiments of the present invention, but do not limit the patent scope of the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, for those skilled in the art, they can still modify the technical solutions recorded in the foregoing specific embodiments, or perform equivalent replacements for some of the technical features. Any equivalent structures made by using the content of the specification and drawings of the present invention, directly or indirectly applied in other related technical fields, are similarly within the scope of the patent protection of the present invention.
Claims
1. A data conversion control method, characterized in that: Based on a data conversion system including a main control module, a sub-control module, and a conversion module, for the data to be converted currently received, the following steps are executed to perform data conversion control on the data to be converted currently received: Step A: Determine whether there is data to be converted in the current data conversion system. If there is data to be converted, execute Step B; if there is no data to be converted, execute Step C; Step B: Based on the amount of data to be converted in the current data conversion system and the control entity corresponding to the cache location of the data to be converted, combined with the first preset data volume threshold, obtain the control entity corresponding to the cache location of the data to be converted currently received, that is, select a control entity to cache the data to be converted currently received. The data to be converted currently received is controlled by this control entity to perform data conversion through the conversion module; the control entities include the main control module and the sub-control module; Step C: Based on the amount of data to be converted currently received, combined with the first preset data volume threshold, obtain the transmission location of the data to be converted currently received, that is, select a control entity to receive the data to be converted currently received. The data to be converted currently received is controlled by this control entity to perform data conversion through the conversion module; In Step B, the following steps are specifically executed to obtain the control entity corresponding to the cache location of the data to be converted currently received: Step B1: Determine the control entity corresponding to the cache location of the data to be converted in the current data conversion system. If the cache location is in the main control module, execute Step B2; if the cache location is in the sub-control module, execute Step B3; Step B2: Based on the amount of data to be converted currently received and the amount of data to be converted cached in the main control module, combined with the first preset data volume threshold, if the sum of the amount of data to be converted currently received and the amount of data to be converted cached in the main control module is greater than the first preset data volume threshold, transfer and cache the data to be converted currently received and the data to be converted cached in the main control module to the sub-control module, and the sub-control module controls the conversion module to perform data conversion on the data to be converted cached in the sub-control module; if the sum of the amount of data to be converted currently received and the amount of data to be converted cached in the main control module is not greater than the first preset data volume threshold, transfer and cache the data to be converted currently received to the main control module, and the main control module controls the conversion module to perform data conversion on the data to be converted cached in the main control module; Step B3: Transfer and cache the data to be converted currently received to the sub-control module, and the sub-control module controls the conversion module to perform data conversion on the data to be converted cached in the sub-control module; In Step C, the following steps are specifically executed to obtain the transmission location of the data to be converted currently received: Based on the amount of data to be converted currently received, combined with the first preset data volume threshold, if the amount of data to be converted currently received is greater than the first preset data volume threshold, transfer the data to be converted currently received to the sub-control module, and the sub-control module controls the conversion module to perform data conversion on the data to be converted currently received; if the amount of data to be converted currently received is not greater than the first preset data volume threshold, transfer the data to be converted currently received to the main control module, and the main control module controls the conversion module to perform data conversion on the data to be converted currently received.
2. The data conversion control method according to claim 1, characterized in that: In step C, after obtaining the transmission position of the currently received data volume to be converted, based on the currently received data volume to be converted and in combination with the second preset data volume threshold, if the currently received data volume to be converted is greater than the second preset data volume threshold, the currently received data volume to be converted is transmitted to the control main body buffer, and the control main body controls the conversion module to perform data conversion on the buffered data volume to be converted; if the currently received data volume to be converted is not greater than the second preset data volume threshold, the currently received data volume to be converted is transmitted to the control main body, and the control main body controls the conversion module to perform data conversion on the currently received data volume to be converted in real time.
3. A system based on the data conversion control method according to claim 1 or 2, characterized in that: It includes a main control module, a sub-control module, and a conversion module. The conversion module is respectively connected to the main control module and the sub-control module, and the main control module is connected to the sub-control module. The main control module selects a control main body for the currently received data volume to be converted based on the situation of the data volume to be converted in the current data conversion system; the conversion module performs data conversion on the data volume to be converted under the control of the control main body, and the conversion module transmits the converted data to the main control module.
4. The system according to the method for controlling data conversion as claimed in claim 3, wherein: The conversion module includes a DA conversion unit and an AD conversion unit. The DA conversion unit and the AD conversion unit are both respectively connected to the main control module and the sub-control module. The AD conversion unit performs analog-to-digital conversion on the data volume to be converted under the control of the control main body, and the DA conversion unit performs digital-to-analog conversion on the data volume to be converted under the control of the control main body. The main control module receives the output data of the DA conversion unit and the AD conversion unit.
5. A system based on the data conversion control method according to claim 4, characterized in that: The DA conversion unit includes a DA conversion circuit and a follow-up filter circuit. The output end of the DA conversion circuit is connected to the input end of the follow-up filter circuit, and the output end of the follow-up filter circuit is connected to the main control module; the DA conversion circuit performs digital-to-analog conversion on the data volume to be converted under the control of the control main body, and outputs the converted data to be filtered by the follow-up filter circuit and then transmitted to the main control module.
6. The system according to claim 4 for a data conversion control method, characterized in that: The AD conversion unit includes an AD conversion circuit and a potential shift and attenuation circuit. The data volume to be converted corresponding to the AD conversion circuit is input to the AD conversion circuit through the potential shift and attenuation circuit; the AD conversion circuit performs analog-to-digital conversion on the data volume to be converted under the control of the control main body, and the AD conversion circuit outputs the converted signal to the main control module.
7. The system according to claim 4 for a data conversion control method, characterized in that: It further includes a power supply module. The power supply module includes a DA conversion module power supply circuit and an AD conversion module power supply circuit. The DA conversion module power supply circuit provides a preset voltage for the DA conversion unit, and the AD conversion module power supply circuit provides a preset voltage for the AD conversion unit.
8. A system based on the data conversion control method according to claim 7, characterized in that: It further includes low-power control circuits corresponding to the DA conversion module power supply circuit and the AD conversion module power supply circuit respectively. Each low-power control circuit controls the corresponding power supply circuit to supply power externally under the control of the control main body.
Citation Information
Patent Citations
Analog-to-digital conversion method and device
CN110708071A
Portable electroencephalogram signal real-time acquisition system
CN115429283A