Capacitor and method for manufacturing a capacitor

Abstract

The present invention discloses a capacitor and a method for manufacturing the capacitor. The capacitor includes a main body and two external electrodes. The main body has an outer peripheral surface and two end surfaces. The two external electrodes are respectively disposed on the two end surfaces of the main body, and each of the two external electrodes covers the corresponding end surface and at least a part of the outer peripheral surface. The main body includes a plurality of dielectric layers and internal electrodes that are alternately stacked. Adjacent internal electrodes form an internal electrode group. One end of one of the internal electrodes in each internal electrode group is electrically connected to one of the external electrodes, and one end of the other internal electrode in each internal electrode group is electrically connected to the other external electrode. The main body further includes a gap formed on at least one side of the corresponding internal electrode and located between adjacent dielectric layers. The gap is formed inside the capacitor, and this gap can reduce noise, absorb the deformation amount of the dielectric layer, and reduce the internal stress so as to prevent cracks from occurring.

Description

Technical Field

[0001] The present invention relates to the field of electronic components, and in particular to capacitors and manufacturing methods thereof. Background Art

[0002] In the prior art, the structure of a traditional multi-layer ceramic capacitor is that dielectric layers and internal electrodes are alternately arranged, with the internal electrodes disposed on the dielectric layers. At positions corresponding to the internal electrodes, dielectric layers are usually used for filling. However, when manufacturing MLCCs with dielectric layer filling at positions corresponding to the internal electrodes, cracks are likely to occur, affecting the product quality, and the noise will be relatively large during use. As shown in the existing related patent CN114724850A, although it reveals that the internal electrodes 121 / 122 of the multi-layer electronic component 100 are disposed on the first dielectric layer 111, and dielectric patterns 141 / 142 are provided in the regions on the first dielectric layer 111 where the internal electrodes 121 / 122 are not provided. The materials of the dielectric patterns 141 / 142 can be barium titanate or lead composite perovskite or strontium titanate materials, etc. The materials of the first dielectric layer 111 and the dielectric patterns 141 / 142 can be the same or different. After sintering, dielectric patterns 141 / 142 with different voids are obtained according to the content of the added binder, and the porosity of the dielectric patterns 141 / 142 is greater than that of the first dielectric layer 111. This dielectric pattern is used to reduce the deviation of the shrinkage rate between the effective part and the edge part, and can prevent the deterioration of reliability caused by the deformation or reverse connection of the multi-layer electronic component 100. Although the product of this patented technology overcomes the defect of crack generation, noise will also be generated during use. Summary of the Invention

[0003] In order to overcome the deficiencies of the prior art, one of the objectives of the present invention is to provide a capacitor with low internal stress, not prone to crack generation, and capable of reducing noise during use.

[0004] In order to overcome the deficiencies of the prior art, another objective of the present invention is to provide a manufacturing method for a capacitor with low internal stress, not prone to crack generation, and capable of reducing noise during use.

[0005] One of the objectives of the present invention is achieved by adopting the following technical solution:

[0006] A capacitor includes a main body and two external electrodes. The main body has an outer peripheral surface and two end surfaces. The two external electrodes are respectively disposed on the two end surfaces of the main body. The two external electrodes respectively cover the corresponding end surfaces and at least a part of the outer peripheral surface. The main body includes a plurality of dielectric layers and internal electrodes that are alternately stacked. Adjacent internal electrodes form an internal electrode group. One end of one internal electrode in each internal electrode group is electrically connected to one of the external electrodes, and one end of the other internal electrode in each internal electrode group is electrically connected to the other external electrode. The main body further includes a gap formed on at least one side of the corresponding internal electrode and located between adjacent dielectric layers. The gap is formed inside the capacitor.

[0007] Further, each internal electrode includes an outer end surface exposed to the end surface and electrically connected to the external electrode and an inner peripheral surface distributed within the projected area of the dielectric layer. The gap is located on at least one side of the inner peripheral surface and communicates with the internal electrode.

[0008] Further, the inner peripheral surface includes an inner end surface spaced from the end surface of the main body and a side surface connecting the inner end surface and the outer end surface. The gap includes a first gap formed between the inner end surface and the end surface of the main body in the length direction of the capacitor. The first gap communicates with the inner end surface of the internal electrode and the inner surface of the external electrode.

[0009] Further, the dimension of the first gap in the width direction is greater than or equal to the dimension of the internal electrode in the width direction.

[0010] Further, the first gap includes a gap portion communicating with the outer peripheral surface of the main body. The dimension of the gap portion in the length direction of the capacitor is less than the dimension of the external electrode covering the outer peripheral surface. The dimension of the gap portion in the width direction of the capacitor is equal to the dimension of the dielectric layer. The gap portion is covered by the external electrode.

[0011] Further, the dimension of the gap portion of the first gap in the length direction of the capacitor is less than or equal to 20% of the dimension of the internal electrode in the length direction.

[0012] Further, the first gap further includes a gap extension portion extending from the gap portion toward the internal electrode and communicating with the internal electrode. The dimension of the gap extension portion in the width direction of the capacitor is equal to the dimension of the internal electrode. The gap extension portion is covered by the dielectric layer.

[0013] Further, the void further includes a second gap formed outside the side surface of the inner electrode and communicating with the inner electrode. The size of the second gap in the width direction of the capacitor is smaller than the size of the width direction of the side surface of the inner electrode away from the outer peripheral surface. The second gap is coated with the dielectric layer. The void further includes a third gap, and the third gap is symmetrically arranged with respect to the inner electrode with the second gap.

[0014] Further, the thickness of the void is less than or equal to the thickness of the inner electrode.

[0015] Further, along the height direction of the capacitor, two adjacent first gaps are respectively formed between the inner end surfaces of two adjacent inner electrodes and different end surfaces of the main body.

[0016] Further, the main body further includes a ceramic layer. The ceramic layer is disposed between the adjacent dielectric layers and is in the same plane as the inner electrode, and the ceramic layer is disposed in the region between the side surface of the inner electrode and the outer peripheral surface of the main body.

[0017] Further, the void is formed by pre-filling a filler before sintering and burning out the filler during sintering.

[0018] Further, the number of the voids between two adjacent dielectric layers is multiple, and the edge of the void is at least one of the inner peripheral surface of the inner electrode, the dielectric layer, the end surface of the main body, or the part of the outer peripheral surface of the main body coated with the outer electrode.

[0019] The second object of the present invention is achieved by the following technical solutions:

[0020] A manufacturing method of a capacitor includes the following steps:

[0021] Provide a dielectric layer;

[0022] Form an inner electrode: fabricate a conductive metal layer on the dielectric layer as the inner electrode, and the outer end surface of the inner electrode is flush with one end surface of the dielectric layer;

[0023] Form a filler: fabricate a filler on at least one side of the dielectric layer corresponding to the inner electrode;

[0024] Stack: stack the multiple dielectric layers formed with the inner electrode and the filler to form the main body of the capacitor;

[0025] Sinter: sinter the main body, and the filler is burned out to form a void;

[0026] Form an outer electrode, form two outer electrodes on both end surfaces of the main body, and electrically connect the two outer electrodes to the outer end surfaces of the corresponding inner electrodes to form a capacitor.

[0027] Further, the filler is any one or a mixture of more than one of polyethylene, polyvinyl butyral / resin, a composite material of polyethylene and an oxide, and a composite material of polyvinyl butyral / resin and an oxide.

[0028] Further, when the filler is a composite material of polyethylene and an oxide or a composite material of polyvinyl butyral / resin and an oxide, in the sintering step, the polyethylene or the polyvinyl butyral / resin is burned out, and the remaining oxide serves to support the voids.

[0029] Further, the method for manufacturing a capacitor further includes a step of forming a ceramic paste. The step of forming a ceramic paste is after the step of forming the filler and before the sintering step. Specifically, the step of forming a ceramic paste is to form a ceramic paste at a place where no conductive metal and filler are formed on the dielectric layer.

[0030] Further, the thickness of the ceramic paste is 100-120% of the thickness of the conductive metal.

[0031] Further, the oxide is a barium- or titanium-containing metal oxide.

[0032] Further, in the step of forming the filler, the thickness of the filler is 100-120% of the thickness of the inner electrode. The method for manufacturing a capacitor further includes a pressing step. The pressing step is after the stacking step. After pressing, the thicknesses of the filler and the ceramic paste are the same as the thickness of the inner electrode.

[0033] Further, after sintering, the thickness of the voids is less than or equal to the thickness of the inner electrode.

[0034] Compared with the prior art, voids are provided in the main body of the capacitor of the present invention, which are formed on at least one side of the corresponding inner electrode and are located between adjacent dielectric layers. These voids can reduce noise, absorb the deformation amount of the dielectric layer, and reduce internal stress, thereby preventing cracks from occurring. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a perspective view of a first embodiment of the capacitor of the present invention;

[0036] Figure 2 is Figure 1 a cross-sectional view of the capacitor;

[0037] Figure 3 is Figure 2 an enlarged view of part A of the capacitor;

[0038] Figure 4 is Figure 1 a schematic diagram during the manufacturing process of the capacitor;

[0039] Figure 5 For Figure 4 a cross-sectional view during the manufacturing process of the capacitor;

[0040] Figure 6 For Figure 5 an enlarged view of the capacitor at location B;

[0041] Figure 7 a schematic view during the manufacturing process of the second embodiment of the capacitor of the present invention;

[0042] Figure 8 a schematic view during the manufacturing process of the third embodiment of the capacitor of the present invention;

[0043] Figure 9 a schematic view during the manufacturing process of the fourth embodiment of the capacitor of the present invention.

[0044] In the figure: 10, the main body; 11, the outer peripheral surface; 12, the end face; 13, the dielectric layer; 14, the inner electrode; 140, the outer end face; 141, the inner end face; 15, the gap; 150, the gap portion; 151, the gap extension portion; 152, the first gap; 153, the second gap; 154, the third gap; 16, the filler; 17, the ceramic paste; 20, the outer electrode; 21, the end wall; 22, the peripheral wall; 23, the shrinkage edge; 24, the first outer electrode; 25, the second outer electrode; 26, the third outer electrode. Detailed Embodiments

[0045] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0046] It should be noted that when a component is referred to as being "fixed to" another component, it can be directly on the other component or there may also be another intermediate component through which it is fixed. When a component is considered to be "connected to" another component, it can be directly connected to the other component or there may also be another intermediate component at the same time. When a component is considered to be "disposed on" another component, it can be directly disposed on the other component or there may also be another intermediate component at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this invention belongs. The terms used in the description of the present invention herein are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0048] First Embodiment

[0049] Please refer to Figures 1 to 3 , which is the first embodiment of this application. In this embodiment, the capacitor is a multilayer ceramic capacitor, which includes a body 10 and two external electrodes 20.

[0050] The body 10 is in the shape of a cuboid and includes an outer peripheral surface 11 and two end surfaces 12. The two end surfaces 12 are respectively located at both ends of the outer peripheral surface 11, and the outer peripheral surface 11 connects the two end surfaces 12. The outer peripheral surface 11 includes four surfaces, namely the top surface, the bottom surface, the front surface, and the rear surface of the body 10, and the four outer peripheral surfaces 11 are flat surfaces. The two end surfaces 12 are respectively the left surface and the right surface of the body 10, and the two end surfaces 12 are respectively flat surfaces.

[0051] The main body 10 includes a plurality of dielectric layers 13 and a plurality of internal electrodes 14 which are stacked. The dielectric layers may include ceramic powders with high dielectric constants such as barium titanate (BaTiO3) or strontium titanate (SrTiO3). The number of internal electrodes 14 is one less than the number of dielectric layers 13, such that the topmost and bottommost of the main body 10 are dielectric layers 13, and these two dielectric layers 13 are equivalent to the protective layers of the capacitor. The length of the internal electrode 14 is less than the length of the dielectric layer 13, and a gap 15 is reserved on one side of the internal electrode 14 to space the adjacent dielectric layers 13 at the position of the gap 15. The width of the internal electrode 14 is less than the width of the dielectric layer 13, such that both side edges of the internal electrode 14 are located inside the projected area of the dielectric layer 13, preventing the internal electrode 14 from being exposed outside the main body 10 after the dielectric layers 13 are pressed together. The two ends of the internal electrode 14 are respectively an outer end face 140 and an inner end face 141, and the internal electrode 14 is formed on the surface of the dielectric layer 13. The outer end face 140 of the internal electrode 14 is exposed on the end face 12, enabling the outer end face 140 to be electrically connected to the external electrode 20. The inner end face 141 of the internal electrode 14 is at a certain distance from the other end face 12, and a gap 15 is formed between the inner end face 141 and the other end face 12. The gap 15 is formed inside the capacitor (i.e., the gap 15 is covered by the inner circumferential surface of the internal electrode 14, the dielectric layer 13, the end face 12 of the main body 10, or the external electrode 20). In the volume of the capacitor, it extends in the length direction from the plane where the inner end face 141 of the internal electrode 14 is located to the plane where one end face 12 of the main body 10 is located. Between the inner end face 141 and the outer end face 140 is a side face, which connects the inner end face 141 and the outer end face 140, and the side face and the inner end face 141 form an inner circumferential surface. Along the height direction of the capacitor, the adjacent two gaps 15 are respectively formed by the inner end faces 141 of the adjacent two internal electrodes 14 and different end faces 12 of the main body 10 (that is, the gaps 15 are alternately arranged at both ends of the main body 10). During the manufacturing process of the main body 10, such as during sintering, the dielectric layer 13 or the internal electrode 14 is prone to shrinkage deformation. The setting of these gaps 15 can absorb such deformation, thereby reducing the internal stress of the main body 10; in addition, since the dielectric layer 13 has piezoelectric properties and electrostrictive properties, when the capacitor is operating, the DC voltage or AC voltage applied to the capacitor will cause piezoelectric phenomena between the internal electrodes 14, thereby generating vibrations. These gaps 15 can absorb the vibrations generated during the operation of the capacitor, greatly reducing the generation of noise. The gap 15 is formed in the length direction of the capacitor between the inner end face 141 and the end face of the main body 10, and the gap 15 communicates with the inner end face 141 of the internal electrode 14 and the inner surface of the external electrode 20. When the capacitor is operating, the internal electrode 14 will generate thermal deformation, and these gaps 15 can provide a deformation space for the internal electrode 14 to further prevent or reduce the generation of internal stress.

[0052] In this embodiment, the void 15 is a rectangular space formed within the volume of the capacitor. The length of the void 15 in the length direction of the capacitor is less than or equal to 20% of the length of the inner electrode. The width of the void 15 in the width direction of the capacitor is equal to the width of the dielectric layer 13. Specifically, the void 15 extends from the outer peripheral surface 11 (rear) to the other opposite outer peripheral surface 11 (front) in the width direction of the capacitor. The length of the void 15 on the outer peripheral surface 11 is less than the length of the outer peripheral surface 11 covered by the outer electrode 20, so as to prevent the void 15 from being exposed at the junction of the outer electrode 20 and the dielectric layer 13 or outside the outer electrode 20 after sintering, which may cause a gap on the dielectric layer 13 and avoid the sealing problem caused by the entry of water vapor.

[0053] In this embodiment, the main body 10 further includes a ceramic layer, which is formed by firing the ceramic paste 17. The ceramic layer is formed on both sides of the inner electrode 14. During forming, the height of the ceramic layer is basically the same as the height of the inner electrode 14. The ceramic layer is used to compensate for the gap difference between the dielectric layers 13 after the inner electrode 14 is formed, so as to prevent the main body 10 from deforming after voltage equalization. In this embodiment, the edges of the void 15 are respectively the inner side surface of the outer electrode 20, the inner end surface 141 of the inner electrode 14, and the end surface of the ceramic layer. The three jointly enclose a sealed space, and thus the void 15 is not exposed outside the main body 10.

[0054] The outer electrode 20 includes an end wall 21 and a peripheral wall 22. The end wall 21 and the peripheral wall 22 are integrally formed. The end wall 21 is installed on the end surface 12, and the peripheral wall 22 covers at least part of the outer peripheral surface 11 in the length direction. The length of the outer peripheral surface 11 covered by the peripheral wall 22 is greater than the length of the void 15.

[0055] Specifically, the outer electrode 20 may include a sintered electrode obtained by sintering after adhering a conductive paste such as copper paste or silver paste, and may further include a metal layer formed by electroplating or electroless plating to form a multi-layer structure. In the present embodiment, the outer electrode 20 includes a first outer electrode 24 sintered and formed at the innermost layer, a second outer electrode 25 at the middle layer, and a third outer electrode 26 at the outermost layer. The first outer electrode 24, the second outer electrode 25, and the third outer electrode 26 each include an end wall 21 and a peripheral wall 22 connected to the periphery of the end wall 21 and extending toward the same side of the end wall 21. The end wall 21 covers the end face 12 of the corresponding main body 10, and the peripheral walls 22 of two outer electrodes 20 respectively cover opposite ends of the outer peripheral face 11. It can be understood that additional layers such as a conductive resin electrode may be provided between adjacent two layers of the outer electrode 20 to reduce mechanical shock, etc., or a layer including one or more electroplated nickel, electroplated tin, etc. may be provided outside the copper paste layer to facilitate electrical welding; the above structural composition of the outer electrode 20 belongs to the prior art, and for the sake of brevity, it will not be elaborated here. In the present embodiment, one end of the peripheral wall 22 of the outer electrode 20 away from the end wall 21 also extends inward to form a shrinkage edge 23, and the shrinkage edge 23 directly covers a part of the outer peripheral face 11 of the main body 10, and the gap 15 is located on the side of the shrinkage edge 23 close to the end wall 21, that is, the area within the shrinkage edge 23 of the outer electrode 20.

[0056] Please continue to refer to Figures 4 to 6 , this application also relates to a manufacturing method of the above capacitor, specifically including the following steps:

[0057] Provide a dielectric layer 13;

[0058] Form an inner electrode 14: Form a conductive metal on the dielectric layer 13 to form an inner electrode 14 with a thickness H. The outer end face 140 of the inner electrode 14 is flush with one end face of the dielectric layer 13, and the inner end face 141 of the inner electrode 14 is within the projected area of the dielectric layer 13;

[0059] Form a filler 16: Form a filler 16 with a thickness H1 on one side area of the dielectric layer 13 adjacent to the inner end face 141 of the inner electrode 14. One end face of the filler 16 is flush with the other end face of the dielectric layer 13. The filler 16 is located outside the inner peripheral face of the inner electrode 14 and does not exceed the outer peripheral face of the dielectric layer 13 not covered by the outer electrode 20 (when forming the inner electrode 14 or the filler 16, a printing process or a spraying process may be used);

[0060] Stacking: Stack a plurality of dielectric layers 13 formed with the inner electrode 14 and the filler 16 to form the main body 10 of the capacitor;

[0061] Pressing: Press the main body 10 formed after stacking. After pressing, the thickness H2 of the filler 16 and the thickness H1 of the ceramic paste 17 are the same as the thickness H of the inner electrode 14.

[0062] Sintering: The main body 10 is sintered, and the filler 16 is burned out to form voids 15.

[0063] Forming the outer electrodes 20, two outer electrodes 20 are formed on both end faces of the main body 10, and the two outer electrodes 20 are electrically connected to the outer end faces 140 of the corresponding inner electrodes 14, thereby forming a capacitor.

[0064] Specifically, the step of forming the inner electrode 14 is implemented first, which is the first forming process. The conductive metal for forming the inner electrode 14 is any one or combination of nickel / silver / palladium or the corresponding alloy. The conductive metal is formed in the middle of the dielectric layer 13 and the conductive metal is formed from one end of the dielectric layer 13 to a position close to the other end (leaving a position for forming the filler 16). The inner electrode 14 is formed by printing, spraying or other means.

[0065] Specifically, the step of forming the filler 16 is implemented after the step of forming the inner electrode 14, which is the second forming process. The optional materials for the filler 16 are any one of polyethylene, polyvinyl butyral / resin, composite materials of polyethylene and oxides, and composite materials of polyvinyl butyral / resin and oxides. The forming thickness H1 of the filler 16 needs to reach 100-120% of the one-time forming thickness H. The density of the filler 16 is less than that of the inner electrode 14. The best implementation is that the thickness H1 of the filler 16 is greater than the thickness H of the inner electrode 14 and is 110-120% of the thickness H of the inner electrode 14. During the manufacturing process, due to the smaller density of the filler 16, the filler 16 is more easily extruded after pressing until the thickness of the filler 16 is flush with that of the inner electrode 14. The filler 16 can fill the gap difference between the dielectric layers 13 and form a support for the dielectric layer 13 to prevent the main body 10 from bulging in the middle and deflating at both ends during pressing. When the capacitor is sintered, the filler 16 will be burned out synchronously. At the same time, since the dielectric layer 13 will deform during the sintering process, part of the dielectric layer 13 will enter the voids 15 formed after the filler 16 is burned out. Therefore, the thickness of the voids 15 formed after sintering is less than or equal to the thickness H of the inner electrode 14. At the same time, since the thickness of the voids 15 is reduced, the excessive deformation of the capacitor during use can be further reduced. The filler 16 is formed from the front end to the rear end of the dielectric layer 13 in the width direction and from the end of the conductive metal to the right end of the dielectric layer 13 in the length direction.

[0066] Since the filler 16 needs to be formed on the dielectric layer by a forming process, the filler 16 is required to meet certain viscosity requirements. The specific viscosity parameter ranges are: 1) when the rotation speed is 1 RPM, the viscosity is 10-200 Pa·S; and / or 2) when the rotation speed is 10 RPM, the viscosity is 20-100 Pa·S.

[0067] In other embodiments, the method for manufacturing a capacitor further includes a step of forming a ceramic paste 17, which is the third forming process. Specifically, the step of forming the ceramic paste 17 is after the step of forming the filler 16 and before the sintering step. The step of forming the ceramic paste 17 is specifically: forming a ceramic paste 17 with a thickness of H2 at a place on the dielectric layer 13 where no conductive metal and filler 16 are formed. After the ceramic paste 17 undergoes a sintering process, a ceramic layer is formed to protect the inner electrode 14 and bridge the gaps formed between the dielectric layers 13, so as to prevent the main body 10 from deforming during pressing. In this way, the main body 10 will form a regular cuboid structure after pressing and sintering. Specifically, in this embodiment, the ceramic paste 17 is located on both sides of the inner electrode 14. The forming thickness H2 of the ceramic paste 17 is 100-120% of the forming thickness H of the inner electrode 14, and the thickness of the ceramic layer after pressing is the same as the thickness H of the inner electrode 14.

[0068] Specifically, in the sintering step, when the temperature reaches 1000 degrees, the polyethylene or polyvinyl butyral / resin formed by the secondary forming process will be burned out and voids 15 will be formed. At this time, since part of the dielectric layer 13 enters the voids 15, the height of the voids 15 is less than that of the inner electrode 14. When the filler is a composite material of high-density polyethylene or polyvinyl butyral / resin and an oxide, after high-temperature calcination, the high-density polyethylene or polyvinyl butyral / resin will be burned out, and the remaining oxide has the function of supporting the voids 15, and the amount of the remaining oxide in the voids 15 can be adjusted according to the ratio of polyethylene or polyvinyl butyral / resin to the oxide. The oxide is a barium- or titanium-containing metal oxide.

[0069] Second Embodiment

[0070] Please continue to refer to Figure 7 , in the second embodiment of the present application, the structure of the capacitor is substantially the same as that of the first embodiment, and the difference is that: the cross-section of the void 15 is T-shaped, specifically including a gap portion 150 and a gap extension portion 151. The void 15 extends from the front to the back along the width direction in the gap portion 150 of the capacitor, that is, the width of the gap portion 150 is equal to the width of the dielectric layer 13, and its length is less than the length of the outer peripheral surface 11 covered by the outer electrode 20, so as to prevent the void 15 from being exposed at the junction of the outer electrode 20 and the dielectric layer 13 or outside the outer electrode 20, avoid forming a gap on the dielectric layer 13 after sintering is completed, and avoid the sealing problem caused by the entry of water vapor. The gap extension portion 151 extends from the inner side of the gap portion 150 towards the inner electrode 14 and is connected to the inner end surface 141 of the inner electrode 14, and its width is substantially the same as the width of the inner electrode 14.

[0071] Third Embodiment

[0072] Please continue to refer to Figure 8, which is the third embodiment of the present application. The structure of the capacitor is substantially the same as that of the first embodiment, except that: the width of the gap 15 is the same as the width of the inner electrode 14, and the two are symmetrically distributed on the same straight line. The outer wall surfaces of the gap 15 are respectively the inner end surface 141 of the inner electrode 14, the ceramic layer, and the inner side surface of the outer electrode 20.

[0073] Fourth Embodiment

[0074] Please continue to refer to Figure 9 , which is the fourth embodiment of the present application. The structure of the capacitor is substantially the same as that of the first embodiment, except that: the number of the gaps 15 is multiple and they are distributed in the peripheral area of the inner electrode 14. In this embodiment, the number of the gaps 15 is set to three, namely the first gap 152, the second gap 153, and the third gap 154. The first gap 152 is located on one side of the inner end surface 141 of the inner electrode 14, and its width is the same as the width of the inner electrode 14. The first gap 152 communicates with the inner end surface 141 of the inner electrode 14 and the inner surface of the outer electrode 20. The second gap 153 and the third gap 154 are symmetrically distributed on the outer sides of the two side surfaces of the inner electrode 14, and their width W is less than the difference between the width of the dielectric layer 13 and the width of the inner electrode 14, that is, there is a certain width of the dielectric layer 13 on the side of the gap 15 away from the inner electrode 14. Thus, after the dielectric layer 13 is pressed, the gap 15 will not be exposed outside the main body 10.

[0075] It can be understood that the number of the gaps 15 in the present application can be one or multiple. The gaps 15 are integrally distributed on one side of the inner electrode 14 or are dispersedly distributed on the periphery of the inner electrode 14 (excluding the part on the periphery electrically connected to the outer electrode 20). The part of the distribution of the gap 15 within the area covered by the outer electrode 20 can extend to the outer edge of the dielectric layer 13, but for the part distributed in other areas, space for pressing the dielectric layer 13 or printing the ceramic paste 17 needs to be reserved to fill this space, so as to prevent the void space generated after sintering of this part from being exposed outside the main body 10.

[0076] During the manufacturing process of the capacitor of the present invention, a layer of filler 16 (such as high-density polyethylene or polyvinyl butyral / resin) is first filled at the position corresponding to the inner electrode 14. On the one hand, after the filler 16 is calcined at high temperature, it is burned off to form a reserved void 15. This void 15 can reduce noise, absorb the deformation amount of the dielectric layer 13, and reduce internal stress to prevent crack generation. When the filler 16 is a composite material of high-density polyethylene or polyvinyl butyral / resin and an oxide, after high-temperature calcination, the high-density polyethylene or polyvinyl butyral / resin will be burned off, and the remaining oxide has the function of supporting the void 15, and the amount of the remaining oxide in the void 15 can be adjusted according to the ratio of polyethylene or polyvinyl butyral / resin to the oxide. At the same time, the compactness of the void 15 can also be improved. On the other hand, before sintering, the filler 16 can also prevent the dielectric layer 13 from deforming during pressing, resulting in a situation where the middle bulges and the two sides are concave. The void 15 is covered by the outer electrode 20 or the void 15 is covered by the outer electrode 20 and the dielectric layer 13, avoiding exposure at the junction of the outer electrode 20 and the dielectric layer 13 or outside the outer electrode 20, and preventing the formation of voids 15 on the dielectric layer 13 after sintering, which may cause the entry of water vapor and lead to sealing problems.

[0077] The above embodiments only illustrate several implementation manners of the present invention, and the description is relatively specific and detailed. However, it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can be made. These are all equivalent modifications and evolutions of the above embodiments based on the essence of the present invention, and all belong to the protection scope of the present invention.

Claims

1. A capacitor, comprising a main body and two external electrodes. The main body is provided with an outer peripheral surface and two end surfaces. The two external electrodes are respectively disposed on the two end surfaces of the main body. The two external electrodes respectively cover the corresponding end surfaces and at least part of the outer peripheral surface. The main body includes a plurality of dielectric layers and internal electrodes stacked alternately. Adjacent internal electrodes form an internal electrode group. One end of one internal electrode in each internal electrode group is electrically connected to one of the external electrodes, and one end of the other internal electrode in each internal electrode group is electrically connected to the other external electrode. It is characterized in that: The main body further includes a void formed on at least one side of the corresponding inner electrode and located between adjacent dielectric layers. The void is formed inside the capacitor. Each inner electrode includes an outer end face exposed to the end face and electrically connected to the outer electrode, and an inner circumferential face distributed within the projected area of the dielectric layer. The inner circumferential face includes an inner end face spaced from the end face of the main body and a side face connecting the inner end face and the outer end face. The void is located on at least one side of the inner circumferential face and communicates with the inner electrode. The void includes a first gap formed between the inner end face and the end face of the main body in the length direction of the capacitor. The first gap communicates with the inner end face of the inner electrode and the inner surface of the outer electrode. The first gap includes a gap portion communicating with the outer circumferential face of the main body. The dimension of the gap portion in the length direction of the capacitor is smaller than the dimension of the outer electrode covering the outer circumferential face. The dimension of the gap portion in the width direction of the capacitor is equal to the dimension of the dielectric layer. The gap portion is covered by the outer electrode. The first gap further includes a gap extension portion extending from the gap portion towards the inner electrode and communicating with the inner electrode. The dimension of the gap extension portion in the width direction of the capacitor is equal to the dimension of the inner electrode. The gap extension portion is covered by the dielectric layer.

2. The capacitor according to claim 1, wherein: The dimension of the gap portion of the first gap in the length direction of the capacitor is less than or equal to 20% of the dimension of the inner electrode in the length direction.

3. The capacitor according to claim 1, characterized in that: The void further includes a second gap formed outside the side face of the inner electrode and communicating with the inner electrode. The dimension of the second gap in the width direction of the capacitor is smaller than the dimension of the side face of the inner electrode in the width direction from the outer circumferential face. The second gap is covered by the dielectric layer. The void further includes a third gap, and the third gap is symmetrically arranged with respect to the inner electrode with the second gap.

4. The capacitor according to claim 1, characterized in that: The thickness of the void is less than or equal to the thickness of the inner electrode.

5. The capacitor according to claim 1, wherein: In the height direction of the capacitor, adjacent two first gaps are respectively formed between the inner end faces of adjacent two inner electrodes and different end faces of the main body.

6. The capacitor according to claim 1, characterized in that: The main body further includes a ceramic layer. The ceramic layer is disposed between the adjacent dielectric layers and in the same plane as the inner electrode, and the ceramic layer is disposed in the area between the side face of the inner electrode and the outer circumferential face of the main body.

7. The capacitor according to claim 1, characterized in that: The void is formed by first filling a filler before sintering and burning out the filler during sintering.

8. The capacitor according to claim 1, characterized in that: The number of voids between adjacent two dielectric layers is multiple. The edge of the void is at least one of the inner circumferential face of the inner electrode, the dielectric layer, the end face of the main body, or the portion of the outer circumferential face of the main body covered by the outer electrode.

9. A manufacturing method of a capacitor, characterized in that, Including the following steps: Providing a dielectric layer, the dielectric layer including an opposite end face, another end face, and a peripheral face connecting the two end faces; Forming the inner electrode: A conductive metal layer is fabricated on the dielectric layer to serve as the inner electrode. The inner electrode includes an outer end face and an inner peripheral face. The inner peripheral face includes an inner end face and a side face connecting the inner end face and the outer end face. The outer end face is flush with one end face of the dielectric layer, and the inner end face is spaced apart from the other end face of the dielectric layer. Forming the filler: The filler is fabricated on at least one side of the inner peripheral face of the inner electrode corresponding to the dielectric layer. The filler communicates with the inner electrode. The filler includes a first filler formed between the inner end face and the other end face of the dielectric layer in the length direction of the dielectric layer. The first filler is distributed in a filling region. The filling region includes a first filling region communicating with the other end face and a part of the outer peripheral face of the dielectric layer. The filling region further includes a second filling region extending from the first filling region towards the inner electrode and communicating with the inner electrode. The second filling region is distributed within the projected area of the dielectric layer and is not exposed on the outer peripheral face of the dielectric layer. Stacking: A plurality of dielectric layers forming the inner electrode and the filler are stacked to form the main body of the capacitor. The main body of the capacitor includes an outer peripheral face and two end faces. Sintering: The main body is sintered. The filler is burned out to form voids. The first filling region forms a gap portion, and the second filling region forms a gap extension portion. The gap extension portion communicates with the inner peripheral face of the inner electrode. The dimension of the gap extension portion in the width direction of the capacitor is equal to the dimension of the inner electrode. The gap extension portion is covered by the dielectric layer. Forming the outer electrode: Two outer electrodes are formed on the two end faces and at least part of the outer peripheral face of the main body, and the two outer electrodes are electrically connected to the outer end faces corresponding to the inner electrode. The dimension of the gap portion in the length direction of the dielectric layer is smaller than the dimension of the outer electrode covering the outer peripheral face. The gap portion is covered by the outer electrode and communicates with the inner surface of the outer electrode, thereby forming a capacitor.

10. The method for manufacturing a capacitor according to claim 9, wherein: The filler is any one or a mixture of polyethylene, polyvinyl butyral / resin, a composite material of polyethylene and an oxide, and a composite material of polyvinyl butyral / resin and an oxide.

11. The method for manufacturing a capacitor according to claim 10, wherein: When the filler is a composite material of polyethylene and an oxide or a composite material of polyvinyl butyral / resin and an oxide, in the sintering step, the polyethylene or the polyvinyl butyral / resin is burned out, and the remaining oxide has the function of supporting the voids.

12. The method for manufacturing a capacitor according to claim 9, wherein: The method for manufacturing the capacitor further includes a step of forming a ceramic paste. The step of forming the ceramic paste is after the step of forming the filler and before the sintering step. Specifically, the ceramic paste is formed at a place on the dielectric layer where no conductive metal and filler are formed.

13. The method for manufacturing a capacitor according to claim 12, wherein: The thickness of the ceramic paste is 100 - 120% of the thickness of the conductive metal.

14. The method for manufacturing a capacitor according to claim 10, wherein: The oxide is a barium - or titanium - containing metal oxide.

15. The method for manufacturing a capacitor according to claim 13, wherein: In the step of forming the filler, the thickness of the filler is 100 to 120% of the thickness of the inner electrode. The method for manufacturing the capacitor further includes a pressing step, which is located after the stacking step. After pressing, the thicknesses of the filler and the ceramic paste are the same as the thickness of the inner electrode.

16. The method for manufacturing a capacitor according to claim 15, characterized in that: After sintering, the thickness of the void is less than or equal to the thickness of the inner electrode.

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