A method and circuit for generating high-precision second-order temperature coefficient compensation current
By designing a V-type first-order temperature drift current generation circuit and current square generator, the problem of complexity and dispersion of the second-order temperature drift compensation circuit in the existing technology is solved, and a high-precision second-order temperature drift coefficient compensation current output is realized, which is suitable for batch calibration of high-performance electronic systems.
Patent Information
- Application Number
- CN202310152686.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-10
- Publication Date
- 2025-04-15
- Estimated Expiration
- 2043-02-10
AI Technical Summary
In the prior art, the second-order temperature drift compensation method has complex circuits, high discreteness, difficult to batch calibration, and small linear range. It is impossible to achieve high-precision second-order temperature drift coefficient compensation current output while reducing the circuit complexity, and is not suitable for high-performance electronic systems.
A V-type first-order temperature drift current generation circuit is designed to judge the magnitude of current IBG and IPTAT through a hysteresis comparator, realize intelligent self-judgment of the polarity of the current difference, and generate the V-type first-order temperature drift current IV that changes with temperature drift. Then, a second-order temperature drift coefficient compensation current IOUT is generated using a current square generator, and the output is to the nonlinear compensation module for compensation.
While reducing the complexity of the circuit, it reduces the error source and improves the accuracy of the second-order temperature drift coefficient compensation current output, realizes accurate compensation of the second-order temperature drift of sensors, voltage references, and current references in electronic systems, and improves batch calibration accuracy, efficiency and compliance rate.
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Figure CN115993869B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of bandgap reference design, and mainly relates to a method and a circuit for generating a high-precision second-order temperature coefficient compensation current. Background Art
[0002] In modern high-performance electronic system applications, the requirements for sensor temperature drift nonlinearity, reference voltage reference temperature drift, and excitation current reference temperature drift performance are getting higher and higher. These module temperature drifts are mainly first-order temperature drift and second-order temperature drift. If you want to obtain low temperature drift performance, you need to compensate for the first-order and second-order temperature drift in the module. The first-order temperature drift is usually calculated using the thermal voltage V T (kT / q) is used for corresponding conversion compensation. Second-order temperature drift compensation is the key to achieving high-performance electronic systems, especially in the field of industrial control. There are three main methods for second-order temperature drift compensation: one is to use segmented compensation, the other is to use the square of absolute temperature T 2 The third is to use the Gilbert four-quadrant multiplier to generate the second-order temperature drift component to achieve second-order compensation. These solutions have complex circuits, high implementation costs, and many error sources. They are affected by process temperature drift (PVT) and other factors, resulting in large discreteness, difficulty in batch calibration, and a small linear range, which is not suitable for high-performance electronic systems.
[0003] Specifically, the existing technology uses segmented compensation, which requires a built-in temperature sensor and a digital control adjustment algorithm. The circuit is complex, the hardware overhead is large, and the cost is high. 2 Polynomial compensation, where T 2 There are first-order and second-order temperature components. The second-order temperature drift adjustment will affect the first-order temperature drift adjustment. The first-order and second-order coefficients are more sensitive to circuit error sources, resulting in large discreteness and difficulty in batch adjustment compensation. The Gilbert four-quadrant multiplier solution is adopted, such as Figure 1 As shown, to ensure the correct function of the circuit, the two differential input signals V A and V B The amplitude is small, that is, the linear range is limited. The limited current gain β of the BJT device will affect the performance of the multiplier. In addition, more devices need to be matched, which will deteriorate the discreteness of the output signal and is not conducive to batch trimming and calibration. Summary of the invention
[0004] In order to solve the problems in the prior art that the second-order temperature drift compensation method has complex circuits, large discreteness, difficulty in batch calibration, small linear range, and thus cannot achieve high-precision second-order temperature drift coefficient compensation current output while reducing circuit complexity, and is not suitable for high-performance electronic systems, the present invention provides a method and circuit for generating high-precision second-order temperature coefficient compensation current, which reduces error sources while reducing circuit complexity. The circuit for generating the second-order temperature drift coefficient compensation current can overcome the influence of the limited current gain β of the BJT on the compensation current, improve the accuracy of the second-order temperature drift coefficient compensation current output, achieve accurate compensation for the second-order temperature drift of various sensors, voltage references, and current references in the electronic system, and improve the accuracy, efficiency, and compliance rate of batch calibration.
[0005] The specific plan is as follows:
[0006] A V-type first-order temperature drift current generating circuit, comprising:
[0007] Current mirror PM1 / PM2: The PMOS tube PM1 and the PMOS tube PM2 form a common source and common gate structure to form a current mirror, and the source electrodes of the PMOS tube PM1 and the PMOS tube PM2 are connected and connected to the power supply VDD;
[0008] Switches S2 and S3: the switches S2 and S3 are connected in parallel to the drain of the PMOS tube PM1 and the gates of the PMOS tubes PM1 and PM2;
[0009] NMOS tubes NM1, NM2, NM3: The drain of the NMOS tube NM1 is connected to the power supply VDD, and the source is connected to the current source I S1 The bases of transistors Q7 and Q8 are connected to form a node VQ, the gate is connected to the switch S1 and the collector of transistor Q7; the drain of the NMOS tube NM2 is connected to the switch S2, the source is connected to the current source I BG , current source I PTAT The drain of the NMOS tube NM3 is connected to the switch S3, and the source is connected to the collector of the transistor Q8;
[0010] Current Source I BG , current source I PTAT , current source I S1 : The current source I BG The current flowing through is I BG One end of the current source I is connected to the power supply VDD; PTAT The current flowing is I PTAT One end of the current source I S1 The current flowing is I S1 And one end is connected to the power supply VSS;
[0011] Transistors Q7 and Q8: the transistors Q7 and Q8 form a current mirror, the collector of the transistor Q7 is connected to the gate of the NMOS transistor NM1, and the emitters of the transistors Q7 and Q8 are connected and connected to the power supply VSS;
[0012] Hysteresis comparator COMP: the negative input voltage of the hysteresis comparator is input with reference voltage VL; the positive input of the hysteresis comparator is connected with node VX, the output K1 of the hysteresis comparator controls switches S1 and S3, and the output K1B after the output K1 is connected with inverter INV controls switch S2.
[0013] A method to make the V-type first-order temperature drift current I V A circuit for generating a second-order temperature drift coefficient compensation current comprises:
[0014] PMOS tubes PM3 and PM4: the PMOS tubes PM3 and PM4 form a common source and common gate structure to form a current mirror: the ratio of the current mirror is 1:k, the sources of the PMOS tubes PM3 and PM4 are connected and connected to the power supply VDD, the drain of the PMOS tube PM3 and the gates of the PMOS tubes PM3 and PM4 are connected to the drain of the NMOS tube NM6;
[0015] NMOS tubes NM4, NM5, and NM6: The drain of the NMOS tube NM4 is connected to the power supply VDD, the gate is connected to the current source Iv, the collector of the transistor Q1, and the gate of the NMOS tube NM6, and the source is connected to the base of the transistor Q1, the base of the transistor Q3, and the current source Iv. S2 One end is connected to form node V Y The drain of the NMOS tube NM5 is connected to the power supply VDD, and the gate is connected to the current source I BG1 One end is connected to the collector of transistor Q3, the source is connected to the base of transistor Q5 and the current source I S3 The source of the NMOS tube NM6 is connected to the collector and base of the transistor Q6;
[0016] Current source Iv, current source I BG , current source I S2 , current source I S3 : The current source Iv flows through a current of Iv and one end of the current source Iv is connected to the power supply VDD; BG The current flowing through is I BG One end of the current source I S2 The current flowing through is I S2 One end of the current source I S3 The current flowing through is I S3And one end is connected to the power supply VSS;
[0017] Transistors Q1, Q2, Q3, Q4, Q5, Q6: The collector input current of transistor Q1 is I C1 , the base input current is I B1 , the emitter is connected to the collector of transistor Q2 and the current flowing into the collector of transistor Q2 is I C2 , connected to the base of transistor Q2 and the current flowing into the base of transistor Q2 is I B2 The current flowing into the collector of the transistor Q3 is I C3 , the emitter is connected to the collector of transistor Q5 and the base of transistor Q4, and the emitter output current of transistor Q6 is I C4 , connected to the collector of transistor Q4; the emitters of the transistors Q2, Q5, and Q4 are connected and connected to the power supply VSS.
[0018] A method for generating high-precision second-order temperature coefficient compensation current:
[0019] S1: A V-type first-order temperature drift current generator formed by the circuit of claim 1 generates a V-type first-order temperature drift current, and a zero temperature drift current I is input into the circuit. BG The current I is proportional to the absolute temperature PTAT , calculate the zero temperature drift current I BG With the current I PTAT The difference is the current I(ΔT), and then the current difference polarity is intelligently self-judged and controlled by the hysteresis comparator COMP to control switches S1, S2, and S3, and finally a V-shaped first-order temperature drift current I that changes with temperature drift is obtained. V = abs(I(ΔT)), output through the drain of PMOS tube PM2 in current mirror PM1 / PM2:
[0020] S2: V-type first-order temperature drift current I output in S1 V After the current square generator formed by the circuit described in claim 2, I C4 =I C1 I C2 / I C3 =I V 2 / I BG , and then the corresponding proportion of the second-order temperature drift coefficient compensation current I is output through the current mirror PM3 / PM4 OUT ;
[0021] S3: The second-order temperature drift coefficient compensation current I generated by S2 OUT The output is given to the nonlinear compensation module to realize compensation for the second-order temperature drift of the sensor or voltage reference or current reference.
[0022] Preferably, the method for performing intelligent self-judgment of the polarity of the current difference using the circuit of the V-type first-order temperature drift current generator in S1 is:
[0023] When the input current I BG Greater than I PTAT When the potential of the node VX rises, when the potential of the node VX is compared with the reference voltage VL of the negative input terminal of the hysteresis comparator COMP, it exceeds the threshold voltage V HT After that, the output terminal K1 of the hysteresis comparator COMP is high level, and the output terminal K1 controls the switch S1 and the switch S3 to be turned on; after the output terminal K1 passes through the inverter INV, the output terminal K1B is low level, and the output terminal K1B controls the switch S2 to be turned off, and the difference current I(ΔT) is mirrored through the current mirrors Q7 and Q8, and flows through the NMOS tube NM3 and the switch S3, and finally outputs the V-type first-order temperature drift current I through the current mirror PM1 / PM2. V ;
[0024] When the input current I BG Less than I PTAT When the potential of the node VX decreases, the potential of the node VX decreases. When the potential of the node VX is lower than the reference voltage VL at the negative input of the hysteresis comparator COMP by a threshold voltage V HT After that, the output terminal K1 of the hysteresis comparator COMP becomes low level, and the switches S1 and S3 controlled by the output terminal K1 are disconnected; after passing through the inverter INV, the output terminal K1B is high level, and the switch S2 controlled by the output terminal K1B is turned on, and the difference current I(ΔT) flows through the NMOS tube NM2 and the switch S2, and finally outputs the V-type first-order temperature drift current I through the current mirror PM1 / PM2. V .
[0025] Preferably, the upper and lower threshold voltages V of the hysteresis comparator COMP are HT The gate-source drive voltage Vgsn of the NMOS tubes NM1, NM2, and NM3 in the circuit is set to be much smaller than the gate-source drive voltage Vgsn, the negative input reference voltage VL of the hysteresis comparator is set to Vgsn, and the gate bias voltage of the NMOS tube NM2 is set to 2·(Vgsn-V HT ).
[0026] Preferably, in the process of S1 performing intelligent self-judgment of the polarity of the current difference, the method for stabilizing the potential of the node VX is:
[0027] When the input current I BG Greater than I PTAT When the potential of the node VX rises to Vgsn, the NMOS tube NM2 tends to be cut off, and the potential of the node VX continues to rise to Vgsn+V HT, the output terminal K1 of the hysteresis comparator COMP is at a high level, the output terminal K1 controls the switch S1 and the switch S3 to be turned on, the output terminal K1 passes through the inverter INV, and the output terminal K1B is at a low level, the output terminal K1B controls the switch S2 to be turned off, the potential of the node VX continues to rise to Vgsn+Vbe, the current mirror Q7 is turned on, and then the potential of the node VX tends to be stable, and the difference current I(ΔT) flows through Q7;
[0028] When I BG Less than I PTAT When the potential of node VX drops from Vgsn+Vbe, Q7 is turned off, and then VX continues to drop to Vgsn-V HT , the hysteresis comparator output K1 is low level, and the switches S1 and S3 controlled by the output terminal K1 are disconnected; after passing through the inverter INV, the output terminal K1B is high level, and the switch S2 controlled by the output terminal K1B is turned on, and the difference current I(ΔT) flows through the current mirror PM1 through the switch S2, and then the potential of the node VX tends to be stable.
[0029] Preferably, the V-type first-order temperature drift current I in S2 V Generate the second-order temperature drift coefficient compensation current I through the current square generator OUT The method is:
[0030] S1: V-type first-order temperature drift current I V and zero temperature drift current I BG As the input signal of the current square circuit, I V As the collector current of transistor Q1 I C1 , I BG As the collector current I of transistor Q3 C3 , the current relationship between transistor Q1 and transistor Q2 is I B2 +I C2 =I B1 +I C1 , the sizes of the transistors Q1, Q2, Q3, and Q4 are consistent, and the current amplification factors β of the transistors Q1 and Q2 are equal, so I B2 =I B1 , I C2 =I C1 =I V ;
[0031] S2: The relationship between the base-emitter voltage Vbe of the transistor obtained from the circuit connection structure is: (Vbe1+Vbe2)=V Y =(Vbe3+Vbe4);
[0032] S3: The collector current I of the transistor CThe exponential relationship with the base-emitter voltage Vbe is: So Vbe=V T ln(IC / IS);
[0033] S4: Substituting S3 into S2 and simplifying it, we can get the following relationship: C4 =I C1 I C2 / I C3 =I V 2 / I BG , that is I C4 is the square of the current;
[0034] S5: Then the current mirror PM3 / PM4 outputs the corresponding proportion of the second-order temperature drift coefficient output current I OUT .
[0035] The beneficial effects of the present invention are:
[0036] The present invention provides a V-type first-order temperature drift current generating circuit, which uses a hysteresis comparator COMP in the circuit to judge the current I BG and I PTAT The circuit structure is designed to make the hysteresis comparator COMP judge the current I BG and I PTAT The absolute value of the difference between the two currents I(△T) is taken and then mirrored from the PMOS tube PM2. Since the absolute value of the difference between the two currents with equal current values at room temperature is taken, a V-shaped current is obtained. The V-shaped first-order temperature drift current I V Through the zero temperature drift current I BG The current I is proportional to the absolute temperature PTAT The difference between the two pairs of I BG and I PTAT , reducing the matching term is beneficial to reduce the final output current dispersion. Set the gate bias voltage to 2·(Vgsn-V HT ), when I BG Less than I PTAT In this case, after VX drops to Vgsn-VHT, S2 is turned on, and the difference current flows through NM2 and S2. At this time, NM2 works in the saturation region, and the voltage drop from VB1 to VX is Vgsn. Here, V B1 =2·(Vgsn-V HT ), then VX will stabilize at Vgsn-2*V HT , to achieve a reasonable bias of the VX node: that is, the voltage required for the hysteresis comparator output K1 to flip (Vgsn-V HT )Small V HT , while not letting VX drop too low to affect I PTATThe value of .
[0037] At the same time, the present invention provides a circuit for generating a second-order temperature drift coefficient compensation current by using a V-type first-order temperature drift current IV, in particular, a circuit for generating a second-order temperature drift coefficient compensation current by using four core bipolar junction transistors BJT devices Q1-Q4 to form a V BE1 +V BE2 =V Y =V BE3 +V BE4 A finite current gain β translinear circuit is formed, such as Figure 4 As shown, the addition and subtraction of voltage and the multiplication and division of current can be converted into each other, that is, I C1 *I C2 =I C3 *I C4 The final I out = k*I C4 = k*I C1 *I C2 / I C3 , this equation is derived from the V BE2 +V BE1 -V BE3 -V BE4 = 0. The present invention utilizes the collector current I of BJT working in the linear region C and the base-emitter voltage V BE The exponential relationship, combined with the zero temperature drift current I BG and the V-shaped first-order temperature drift current bias I V , and finally generates a second-order temperature drift coefficient output current at the collector end of the fourth NPN. In this circuit, I C2 =I C1 , this equation is consistent with the I caused by finite β B1 (=I C1 / β)、I B2 (=I C2 / β) is irrelevant, V BE2 +V BE1 -V BE3 -V BE4 =0, so the output current Iout=k*I C4 = k*I C1 *I C2 / I C3 , the Iout equation does not contain β, which avoids the non-ideal factors of β affecting the output performance. It can be seen that the circuit for generating the second-order temperature drift coefficient compensation current can overcome the influence of the limited current gain β of the BJT on the compensation current, with fewer error sources and smaller output discreteness, which is conducive to achieving high-precision batch compensation. Thus, a high-precision, low-noise, and low-discrete second-order temperature drift coefficient current output is achieved.
[0038] Finally, by using the above two currents together, a method for generating a high-precision second-order temperature coefficient compensation current is proposed. The specific steps are: first, a V-type first-order temperature drift current generator composed of a V-type first-order temperature drift current generating circuit is used to generate a V-type first-order temperature drift current, and a zero temperature drift current I is input into the circuit. BG The current I is proportional to the absolute temperature PTAT , calculate the zero temperature drift current I BG With the current I PTAT The difference is the current I(ΔT), which is then controlled by the current difference polarity intelligent self-judgment control switches S1, S2, and S3, and finally the V-shaped first-order temperature drift current I that changes with temperature drift is obtained through the current mirror PM1 / PM2. V = abs(I(ΔT)) and output; secondly, through a V-type first-order temperature drift current I V The current square generator composed of the circuit for generating the second-order temperature drift coefficient compensation current generates the second-order temperature drift coefficient compensation current I OUT ; Ultimately, accurate compensation for the second-order temperature drift of the sensor or voltage reference or current reference is achieved. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] Figure 1 : An example diagram of a BJT structure Gilbert four-quadrant multiplier used in the prior art.
[0040] Figure 2 : A flow chart of a method for generating a high-precision second-order temperature coefficient compensation current according to an embodiment of the present invention.
[0041] Figure 3 : A V-type first-order temperature drift current generating circuit diagram according to an embodiment of the present invention.
[0042] Figure 4 :A method of making a V-type first-order temperature drift current I V Circuit diagram for generating second-order temperature drift coefficient compensation current.
[0043] Figure 5 :Input current I in a V-type first-order temperature drift current generating circuit according to an embodiment of the present invention BG and I PTAT waveform signal.
[0044] Figure 6 : A V-type first-order temperature drift current Iv waveform signal output by a V-type first-order temperature drift current generating circuit in an embodiment of the present invention.
[0045] Figure 7 :A method of making a V-type first-order temperature drift current I V The circuit that generates the second-order temperature drift coefficient compensation current outputs the waveform signal of the current Iout. DETAILED DESCRIPTION
[0046] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.
[0047] like Figure 3 As shown, a V-type first-order temperature drift current generating circuit includes:
[0048] Current mirror PM1 / PM2: The PMOS tube PM1 and the PMOS tube PM2 form a common source and common gate structure to form a current mirror, and the source electrodes of the PMOS tube PM1 and the PMOS tube PM2 are connected and connected to the power supply VDD;
[0049] Switches S2 and S3: the switches S2 and S3 are connected in parallel to the drain of the PMOS tube PM1 and the gates of the PMOS tubes PM1 and PM2;
[0050] NMOS tubes NM1, NM2, NM3: The drain of the NMOS tube NM1 is connected to the power supply VDD, and the source is connected to the current source I S1 The bases of transistors Q7 and Q8 are connected to form a node VQ, the gate is connected to the switch S1 and the collector of transistor Q7; the drain of the NMOS tube NM2 is connected to the switch S2, the source is connected to the current source I BG , current source I PTAT The drain of the NMOS tube NM3 is connected to the switch S3, and the source is connected to the collector of the transistor Q8;
[0051] Current Source I BG , current source I PTAT , current source I S1 : The current source I BG The current flowing through is I BG One end of the current source I is connected to the power supply VDD; PTAT The current flowing is I PTAT One end of the current source I S1 The current flowing is I S1 And one end is connected to the power supply VSS;
[0052] Transistors Q7 and Q8: the transistors Q7 and Q8 form a current mirror, the collector of the transistor Q7 is connected to the gate of the NMOS transistor NM1, and the emitters of the transistors Q7 and Q8 are connected and connected to the power supply VSS;
[0053] Hysteresis comparator COMP: the negative input voltage of the hysteresis comparator is input with reference voltage VL; the positive input of the hysteresis comparator is connected with node VX, the output K1 of the hysteresis comparator controls switches S1 and S3, and the output K1B after the output K1 is connected with inverter INV controls switch S2.
[0054] like Figure 4 As shown, a V-type first-order temperature drift current I V A circuit for generating a second-order temperature drift coefficient compensation current comprises:
[0055] PMOS tubes PM3 and PM4: the PMOS tubes PM3 and PM4 form a common source and common gate structure to form a current mirror: the ratio of the current mirror is 1:k, the sources of the PMOS tubes PM3 and PM4 are connected and connected to the power supply VDD, the drain of the PMOS tube PM3 and the gates of the PMOS tubes PM3 and PM4 are connected to the drain of the NMOS tube NM6;
[0056] NMOS tubes NM4, NM5, and NM6: The drain of the NMOS tube NM4 is connected to the power supply VDD, the gate is connected to the current source Iv, the collector of the transistor Q1, and the gate of the NMOS tube NM6, and the source is connected to the base of the transistor Q1, the base of the transistor Q3, and the current source Iv. S2 One end is connected to form node V Y The drain of the NMOS tube NM5 is connected to the power supply VDD, and the gate is connected to the current source I BG1 One end is connected to the collector of transistor Q3, the source is connected to the base of transistor Q5 and the current source I S3 The source of the NMOS tube NM6 is connected to the collector and base of the transistor Q6;
[0057] Current source Iv, current source I BG , current source I S2 , current source I S3 : The current source Iv flows through a current of Iv and one end of the current source Iv is connected to the power supply VDD; BG The current flowing through is I BG One end of the current source I S2 The current flowing through is I S2 One end of the current source I S3 The current flowing through is I S3 And one end is connected to the power supply VSS;
[0058] Transistors Q1, Q2, Q3, Q4, Q5, Q6: The collector input current of transistor Q1 is I C1, the base input current is I B1 , the emitter is connected to the collector of transistor Q2 and the current flowing into the collector of transistor Q2 is I C2 , connected to the base of transistor Q2 and the current flowing into the base of transistor Q2 is I B2 The current flowing into the collector of the transistor Q3 is I C3 , the emitter is connected to the collector of transistor Q5 and the base of transistor Q4, and the emitter output current of transistor Q6 is I C4 , connected to the collector of transistor Q4; the emitters of the transistors Q2, Q5, and Q4 are connected and connected to the power supply VSS.
[0059] like Figure 2 As shown in Figure 1, a method for generating a high-precision second-order temperature coefficient compensation current is:
[0060] S1: A V-type first-order temperature drift current generator formed by the circuit of claim 1 generates a V-type first-order temperature drift current, and a zero temperature drift current I is input into the circuit. BG The current I is proportional to the absolute temperature PTAT , calculate the zero temperature drift current I BG With the current I PTAT The difference is the current I(ΔT), and then the current difference polarity is intelligently self-judged and controlled by the hysteresis comparator COMP to control switches S1, S2, and S3, and finally a V-shaped first-order temperature drift current I that changes with temperature drift is obtained. V = abs(I(ΔT)), output through the drain of PMOS tube PM2 in current mirror PM1 / PM2:
[0061] S2: V-type first-order temperature drift current I output in S1 V After the current square generator formed by the circuit described in claim 2, I C4 =I C1 I C2 / I C3 =I V 2 / I BG , and then the corresponding proportion of the second-order temperature drift coefficient compensation current I is output through the current mirror PM3 / PM4 OUT ;
[0062] S3: The second-order temperature drift coefficient compensation current I generated by S2 OUT The output is given to the nonlinear compensation module to realize compensation for the second-order temperature drift of the sensor or voltage reference or current reference.
[0063] Preferably, the method for performing intelligent self-judgment of the polarity of the current difference using the circuit of the V-type first-order temperature drift current generator in S1 is:
[0064] When the input current I BG Greater than I PTAT When the potential of the node VX rises, when the potential of the node VX is compared with the reference voltage VL of the negative input terminal of the hysteresis comparator COMP, it exceeds the threshold voltage V HT After that, the output terminal K1 of the hysteresis comparator COMP is high level, and the output terminal K1 controls the switch S1 and the switch S3 to be turned on; after the output terminal K1 passes through the inverter INV, the output terminal K1B is low level, and the output terminal K1B controls the switch S2 to be turned off, and the difference current I(ΔT) is mirrored through the current mirrors Q7 and Q8, and flows through the NMOS tube NM3 and the switch S3, and finally outputs the V-type first-order temperature drift current I through the current mirror PM1 / PM2. V ;
[0065] When the input current I BG Less than I PTAT When the potential of the node VX decreases, the potential of the node VX decreases. When the potential of the node VX is lower than the reference voltage VL at the negative input of the hysteresis comparator COMP by a threshold voltage V HT After that, the output terminal K1 of the hysteresis comparator COMP becomes low level, and the switches S1 and S3 controlled by the output terminal K1 are disconnected; after passing through the inverter INV, the output terminal K1B is high level, and the switch S2 controlled by the output terminal K1B is turned on, and the difference current I(ΔT) flows through the NMOS tube NM2 and the switch S2, and finally outputs the V-type first-order temperature drift current I through the current mirror PM1 / PM2. V .
[0066] Preferably, the upper and lower threshold voltages V of the hysteresis comparator COMP are HT The gate-source drive voltage Vgsn of the NMOS tubes NM1, NM2, and NM3 in the circuit is set to be much smaller than the gate-source drive voltage Vgsn, the negative input reference voltage VL of the hysteresis comparator is set to Vgsn, and the gate bias voltage of the NMOS tube NM2 is set to 2·(Vgsn-V HT ).
[0067] Preferably, in the process of S1 performing intelligent self-judgment of the polarity of the current difference, the method for stabilizing the potential of the node VX is:
[0068] When the input current I BG Greater than I PTAT When the potential of the node VX rises to Vgsn, the NMOS tube NM2 tends to be cut off, and the potential of the node VX continues to rise to Vgsn+V HT, the output terminal K1 of the hysteresis comparator COMP is at a high level, the output terminal K1 controls the switch S1 and the switch S3 to be turned on, the output terminal K1 passes through the inverter INV, and the output terminal K1B is at a low level, the output terminal K1B controls the switch S2 to be turned off, the potential of the node VX continues to rise to Vgsn+Vbe, the current mirror Q7 is turned on, and then the potential of the node VX tends to be stable, and the difference current I(ΔT) flows through Q7;
[0069] When I BG Less than I PTAT When the potential of node VX drops from Vgsn+Vbe, Q7 is turned off, and then VX continues to drop to Vgsn-V HT , the hysteresis comparator output K1 is low level, and the switches S1 and S3 controlled by the output terminal K1 are disconnected; after passing through the inverter INV, the output terminal K1B is high level, and the switch S2 controlled by the output terminal K1B is turned on, and the difference current I(ΔT) flows through the current mirror PM1 through the switch S2, and then the potential of the node VX tends to be stable.
[0070] Preferably, the V-type first-order temperature drift current I in S2 V Generate the second-order temperature drift coefficient compensation current I through the current square generator OUT The method is:
[0071] S1: V-type first-order temperature drift current I V and zero temperature drift current I BG As the input signal of the current square circuit, I V As the collector current of transistor Q1 I C1 , I BG As the collector current I of transistor Q3 C3 , the current relationship between transistor Q1 and transistor Q2 is I B2 +I C2 =I B1 +I C1 , the sizes of the transistors Q1, Q2, Q3, and Q4 are consistent, and the current amplification factors β of the transistors Q1 and Q2 are equal, so I B2 =I B1 , I C2 =I C1 =I V ;
[0072] S2: The relationship between the base-emitter voltage Vbe of the transistor obtained from the circuit connection structure is: (Vbe1+Vbe2)=V Y =(Vbe3+Vbe4);
[0073] S3: The collector current I of the transistor CThe exponential relationship with the base-emitter voltage Vbe is: So Vbe=V T ·ln(I C / I S );
[0074] S4: Substituting S3 into S2 and simplifying it, we can get the following relationship: C4 =I C1 I C2 / I C3 =I V 2 / I BG , that is I C4 is the square of the current;
[0075] S5: Then the current mirror PM3 / PM4 outputs the corresponding proportion of the second-order temperature drift coefficient output current I OUT .
[0076] It should be noted that the above-described specific implementations can enable those skilled in the art to more fully understand the invention, but do not limit the invention in any way. Therefore, although this specification has described the invention in detail with reference to the drawings and embodiments, those skilled in the art should understand that the invention can still be modified or replaced by equivalents. In short, all technical solutions and improvements that do not deviate from the spirit and scope of the invention should be included in the protection scope of the patent for the invention.
Claims
1. A V-type first-order temperature drift current generating circuit, characterized in that: include: Current mirror PM1 / PM2: The PMOS tube PM1 and the PMOS tube PM2 form a common source and common gate structure to form a current mirror, and the source electrodes of the PMOS tube PM1 and the PMOS tube PM2 are connected and connected to the power supply VDD; Switches S2 and S3: the switches S2 and S3 are connected in parallel to the drain of the PMOS tube PM1 and the gates of the PMOS tubes PM1 and PM2; NMOS tubes NM1, NM2, NM3: The drain of the NMOS tube NM1 is connected to the power supply VDD, and the source is connected to the current source I S1 The bases of transistors Q7 and Q8 are connected to form a node VQ, the gate is connected to the switch S1 and the collector of transistor Q7; the drain of the NMOS tube NM2 is connected to the switch S2, the source is connected to the current source I BG , current source I PTAT The drain of the NMOS tube NM3 is connected to the switch S3, and the source is connected to the collector of the transistor Q8; Current Source I BG , current source I PTAT , current source I S1 : The current source I BG The current flowing through is I BG One end of the current source I is connected to the power supply VDD; PTAT The current flowing is I PTAT One end of the current source I S1 The current flowing is I S1 And one end is connected to the power supply VSS; Transistors Q7 and Q8: the transistors Q7 and Q8 form a current mirror, the collector of the transistor Q7 is connected to the gate of the NMOS transistor NM1, and the emitters of the transistors Q7 and Q8 are connected and connected to the power supply VSS; Hysteresis comparator COMP: the negative input voltage of the hysteresis comparator is input with reference voltage VL; the positive input of the hysteresis comparator is connected with node VX, the output K1 of the hysteresis comparator controls switches S1 and S3, and the output K1B after the output K1 is connected with inverter INV controls switch S2.
2. A V-type first-order temperature drift current generating circuit according to claim 1, wherein the V-type first-order temperature drift current I V A circuit for generating a second-order temperature drift coefficient compensation current, characterized in that: include: PMOS tubes PM3 and PM4: the PMOS tubes PM3 and PM4 form a common source and common gate structure to form a current mirror: the ratio of the current mirror is 1:k, the sources of the PMOS tubes PM3 and PM4 are connected and connected to the power supply VDD, the drain of the PMOS tube PM3 and the gates of the PMOS tubes PM3 and PM4 are connected to the drain of the NMOS tube NM6; NMOS tubes NM4, NM5, and NM6: The drain of the NMOS tube NM4 is connected to the power supply VDD, the gate is connected to the current source Iv, the collector of the transistor Q1, and the gate of the NMOS tube NM6, and the source is connected to the base of the transistor Q1, the base of the transistor Q3, and the current source Iv. S2 One end is connected to form node V Y The drain of the NMOS tube NM5 is connected to the power supply VDD, and the gate is connected to the current source I BG1 One end is connected to the collector of transistor Q3, the source is connected to the base of transistor Q5 and the current source I S3 The source of the NMOS tube NM6 is connected to the collector and base of the transistor Q6; Current source Iv, current source I BG , current source I S2 , current source I S3 : The current source Iv flows through a current of Iv and one end of the current source Iv is connected to the power supply VDD; BG The current flowing through is I BG One end of the current source I S2 The current flowing through is I S2 One end of the current source I S3 The current flowing through is I S3 And one end is connected to the power supply VSS; Transistors Q1, Q2, Q3, Q4, Q5, Q6: The collector input current of transistor Q1 is I C1 , the base input current is I B1 , the emitter is connected to the collector of transistor Q2 and the current flowing into the collector of transistor Q2 is I C2 , connected to the base of transistor Q2 and the current flowing into the base of transistor Q2 is I B2 The current flowing into the collector of the transistor Q3 is I C3 , the emitter is connected to the collector of transistor Q5 and the base of transistor Q4, and the emitter output current of transistor Q6 is I C4 , connected to the collector of transistor Q4; the emitters of the transistors Q2, Q5, and Q4 are connected and connected to the power supply VSS.
3. A method for generating a high-precision second-order temperature coefficient compensation current, characterized in that: S1: A V-type first-order temperature drift current generator formed by the circuit of claim 1 generates a V-type first-order temperature drift current, and a zero temperature drift current I is input into the circuit. BG The current I is proportional to the absolute temperature PTAT , calculate the zero temperature drift current I BG With the current I PTAT The difference is the current I(ΔT), and then the current difference polarity is intelligently self-judged and controlled by the hysteresis comparator COMP to control switches S1, S2, and S3, and finally a V-shaped first-order temperature drift current I that changes with temperature drift is obtained. V = abs(I(ΔT)), output through the drain of PMOS tube PM2 in current mirror PM1 / PM2; S2: V-type first-order temperature drift current I output in S1 V After the current square generator formed by the circuit described in claim 2, I C4 =I C1 I C2 / I C3 =I V 2 / I BG , and then the corresponding proportion of the second-order temperature drift coefficient compensation current I is output through the current mirror PM3 / PM4 OUT ; S3: The second-order temperature drift coefficient compensation current I generated by S2 OUT The output is given to the nonlinear compensation module to realize compensation for the second-order temperature drift of the sensor or voltage reference or current reference.
4. The method for generating a high-precision second-order temperature coefficient compensation current according to claim 3, characterized in that: The method for intelligent self-judgment of the polarity of the current difference using the circuit of the V-type first-order temperature drift current generator in S1 is: When the input current I BG Greater than I PTAT When the potential of the node VX rises, when the potential of the node VX is compared with the reference voltage VL of the negative input terminal of the hysteresis comparator COMP, it exceeds the threshold voltage V HT After that, the output terminal K1 of the hysteresis comparator COMP is at a high level, and the output terminal K1 controls the switch S1 and the switch S3 to be turned on; After the output terminal K1 passes through the inverter INV, the output terminal K1B is at a low level. At this time, the output terminal K1B controls the switch S2 to be disconnected, and the difference current I(ΔT) is mirrored by the current mirrors Q7 and Q8, and flows through the NMOS tube NM3 and the switch S3, and finally outputs the V-type first-order temperature drift current I through the current mirror PM1 / PM2. V ; When the input current I BG Less than I PTAT When the potential of the node VX decreases, the potential of the node VX decreases. When the potential of the node VX is lower than the reference voltage VL at the negative input of the hysteresis comparator COMP by a threshold voltage V HT After that, the output terminal K1 of the hysteresis comparator COMP becomes a low level, and the switches S1 and S3 controlled by the output terminal K1 are disconnected; After passing through the inverter INV, the output terminal K1B is at a high level, the switch S2 controlled by the output terminal K1B is turned on, and the difference current I(ΔT) flows through the NMOS tube NM2 and the switch S2, and finally outputs the V-type first-order temperature drift current I through the current mirror PM1 / PM2. V .
5. The method for generating a high-precision second-order temperature coefficient compensation current according to claim 4, characterized in that: The upper and lower threshold voltages V of the hysteresis comparator COMP HT The gate-source drive voltage Vgsn of the NMOS tubes NM1, NM2, and NM3 in the circuit is set to be much smaller than the gate-source drive voltage Vgsn, the negative input reference voltage VL of the hysteresis comparator is set to Vgsn, and the gate bias voltage of the NMOS tube NM2 is set to 2·(Vgsn-V HT ).
6. The method for generating a high-precision second-order temperature coefficient compensation current according to claim 3, characterized in that: In the process of S1 performing intelligent self-judgment of the polarity of the current difference, the method for the potential of the node VX to be stabilized is: When the input current I BG Greater than I PTAT When the potential of the node VX rises to Vgsn, the NMOS tube NM2 tends to be cut off, and the potential of the node VX continues to rise to Vgsn+V HT , the output terminal K1 of the hysteresis comparator COMP is at a high level, the output terminal K1 controls the switch S1 and the switch S3 to be turned on, the output terminal K1 passes through the inverter INV, and the output terminal K1B is at a low level, the output terminal K1B controls the switch S2 to be turned off, the potential of the node VX continues to rise to Vgsn+Vbe, the current mirror Q7 is turned on, and then the potential of the node VX tends to be stable, and the difference current I(ΔT) flows through Q7; When I BG Less than I PTAT When the potential of node VX drops from Vgsn+Vbe, Q7 is turned off, and then VX continues to drop to Vgsn-V HT , the hysteresis comparator output K1 is at a low level, and the switches S1 and S3 controlled by the output terminal K1 are disconnected; After passing through the inverter INV, the output terminal K1B is at a high level, the switch S2 controlled by the output terminal K1B is turned on, and the difference current I(ΔT) flows through the current mirror PM1 through the switch S2, and then the potential of the node VX tends to be stable.
7. The method for generating a high-precision second-order temperature coefficient compensation current according to claim 3, characterized in that: The V-type first-order temperature drift current I V Generate the second-order temperature drift coefficient compensation current I through the current square generator OUT The method is: S1: V-type first-order temperature drift current I V and zero temperature drift current I BG As the input signal of the current square circuit, I V As the collector current of transistor Q1 I C1 , I BG As the collector current I of transistor Q3 C3 , the current relationship between transistor Q1 and transistor Q2 is I B2 +I C2 =I B1 +I C1 , the sizes of the transistors Q1, Q2, Q3, and Q4 are consistent, and the current amplification factors β of the transistors Q1 and Q2 are equal, so I B2 =I B1 , I C2 =I C1 =I V ; S2: The relationship between the base-emitter voltage Vbe of the transistor obtained from the circuit connection structure is: (Vbe1+Vbe2)=V Y =(Vbe3+Vbe4); S3: The collector current I of the transistor C The exponential relationship with the base-emitter voltage Vbe is: So Vbe=V T ·ln(I C / I S ); S4: Substituting S3 into S2 and simplifying it, we can get the following relationship: C4 =I C1 I C2 / I C3 =I V 2 / I BG , that is I C4 is the square of the current; S5: Then the current mirror PM3 / PM4 outputs the corresponding proportion of the second-order temperature drift coefficient output current I OUT .
Citation Information
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