Integrated Chip for High-Voltage Isolation, High-Voltage Isolator, and High-Voltage Isolation Method

Abstract

Embodiments of the present invention relate to the technical field of isolation circuits, and in particular to an integrated chip for high-voltage isolation, a high-voltage isolator, and a high-voltage isolation method. The integrated chip includes: two isolation capacitors, a signal modulation unit, and a signal demodulation unit; the signal modulation unit and the signal demodulation unit are connected in parallel to form a parallel circuit, and the parallel circuit is connected in series between the two isolation capacitors; when an external current source is connected to the input end of the parallel circuit and receives an input signal, the signal modulation unit generates a differential radio frequency signal at both ends of the parallel circuit based on the input signal; the signal demodulation unit is used to demodulate the differential radio frequency signal at both ends of the parallel circuit to obtain the restored input signal. Therefore, the integrated chip of this solution includes both a signal modulation unit and a signal demodulation unit, and can be used as both a transmitting end and a receiving end of the differential radio frequency signal, so as to solve the problem of low transmission efficiency of the radio frequency signal in the traditional high-voltage isolator.

Description

Technical Field

[0001] Embodiments of the present invention relate to the technical field of isolation circuits, and in particular, to an integrated chip for high-voltage isolation, a high-voltage isolator, and a high-voltage isolation method. Background Art

[0002] A high-voltage isolator is a chip that transmits digital data between different voltage domains while preventing excessive DC voltage or uncontrolled transient voltage from passing between them. Currently, most high-voltage isolators use capacitive isolation methods.

[0003] As Figure 1 shown, it is an implementation manner of a traditional capacitive isolator based on on-off keying. In the figure, a modulation module integrated on chip 1 is used to generate a radio frequency signal, and a demodulation module integrated on chip 2 demodulates the received radio frequency signal to complete data transmission with a high-voltage isolation function between the two chips. However, due to the different circuit structures of the modulation module and the demodulation module, that is, the resonance frequencies of the radio frequency signal transmitting end and receiving end are different, this will result in a low transmission efficiency of the radio frequency signal.

[0004] Therefore, there is an urgent need for a new integrated chip for high-voltage isolation. Summary of the Invention

[0005] To solve the problem of low transmission efficiency of radio frequency signals in traditional high-voltage isolators, embodiments of the present invention provide an integrated chip for high-voltage isolation, a high-voltage isolator, and a high-voltage isolation method.

[0006] In a first aspect, embodiments of the present invention provide an integrated chip for high-voltage isolation, including: two isolation capacitors, a signal modulation unit, and a signal demodulation unit; the signal modulation unit and the signal demodulation unit are connected in parallel to form a parallel circuit, and the parallel circuit is connected in series between the two isolation capacitors;

[0007] When an input signal is received by connecting an external current source to the input end of the parallel circuit, the signal modulation unit generates a differential radio frequency signal at both ends of the parallel circuit based on the input signal;

[0008] The signal demodulation unit is used to demodulate the differential radio frequency signal at both ends of the parallel circuit to obtain the restored input signal.

[0009] In a possible design, the signal modulation unit includes: a negative resistance module and an LC resonance circuit connected in parallel with the negative resistance module; wherein, the LC resonance circuit includes a capacitor C1, an inductor L1, and an inductor L2;

[0010] The inductor L1 and the inductor L2 are connected in series, and the capacitor C1 is connected in parallel at both ends of the series-connected inductor L1 and inductor L2.

[0011] In a possible design, the negative resistance module includes: PMOS transistor M1 and PMOS transistor M2;

[0012] The gates of the PMOS transistor M1 and the PMOS transistor M2 are respectively connected to both ends of the LC resonance circuit;

[0013] For the PMOS transistor M1, the source is connected to the source of the PMOS transistor M2, and the drain is connected to the connection line between the gate of the PMOS transistor M2 and the LC resonance circuit;

[0014] The drain of the PMOS transistor M2 is connected to the connection line between the gate of the PMOS transistor M1 and the LC resonance circuit.

[0015] In a possible design, the center taps of the inductor L1 and the inductor L2 are grounded.

[0016] In a possible design, the signal demodulation unit includes: a receiving module, coupling capacitor C4, and coupling capacitor C5; the coupling capacitor C4 and the coupling capacitor C5 are used to couple the differential RF signal at both ends of the parallel circuit to the receiving module;

[0017] One end of the coupling capacitor C4 is connected to an output end of the signal modulation unit, and the other end is connected to the receiving module;

[0018] One end of the coupling capacitor C5 is connected to the other output end of the signal modulation unit, and the other end is connected to the receiving module.

[0019] In a possible design, the receiving module includes: NMOS transistor M3 and NMOS transistor M4;

[0020] For the NMOS transistor M3, the gate is connected to the connection line between the coupling capacitor C4 and the bias potential, the source is connected to the connection line between the coupling capacitor C5 and the signal modulation unit, and the drain is connected to the drain of the NMOS transistor M4;

[0021] For the NMOS transistor M4, the gate is connected to the connection line between the coupling capacitor C5 and the bias potential, and the source is connected to the connection line between the coupling capacitor C4 and the signal modulation unit.

[0022] In a second aspect, an embodiment of the present invention further provides a high-voltage isolator, including: a first integrated chip and a second integrated chip identical to the first integrated chip; wherein, the first integrated chip and the second integrated chip are the integrated chips described in any embodiment of this specification;

[0023] The parallel circuit formed by the parallel connection of the signal modulation unit and the signal demodulation unit in the first integrated chip is connected in series between two isolation capacitors to form a first series circuit; the parallel circuit formed by the parallel connection of the signal modulation unit and the signal demodulation unit in the second integrated chip is connected in series between two isolation capacitors to form a second series circuit; the first end of the first series circuit is connected to the second end of the second series circuit, and the second end of the first series circuit is connected to the first end of the second series circuit.

[0024] In a possible design, when the first integrated chip accesses an external current source to receive an input signal, the signal demodulation unit of the second integrated chip is connected to the output end to output the restored input signal;

[0025] When the second integrated chip accesses an external current source to receive an input signal, the signal demodulation unit of the first integrated chip is connected to the output end to output the restored input signal.

[0026] In a third aspect, an embodiment of the present invention further provides a high-voltage isolation method based on the high-voltage isolator described in any embodiment of this specification, including:

[0027] Determine the integrated chip as the transmitting end and the integrated chip as the receiving end in the first integrated chip and the second integrated chip;

[0028] Use an external current source to transmit the input signal to the integrated chip as the transmitting end, and use the signal modulation unit in the integrated chip as the transmitting end to generate a differential radio frequency signal at both ends of the parallel circuit in the integrated chip as the transmitting end according to the input signal;

[0029] Use two isolation capacitors connected in series at both ends of the parallel circuit to transmit the differential radio frequency signal to the integrated chip as the receiving end;

[0030] Use the signal demodulation unit in the integrated chip as the receiving end to demodulate the differential radio frequency signal to obtain the restored input signal.

[0031] In a possible design, the use of the signal demodulation unit in the integrated chip as the receiving end to demodulate the differential radio frequency signal includes:

[0032] When the signal demodulation unit in the integrated chip as the receiving end does not receive the differential radio frequency signal, the signal demodulation unit outputs a high level;

[0033] When the signal demodulation unit in the integrated chip as the receiving end receives the differential radio frequency signal, the signal demodulation unit outputs a low level.

[0034] An embodiment of the present invention provides an integrated chip for high-voltage isolation. The integrated chip includes two isolation capacitors, a signal modulation unit, and a signal demodulation unit. The signal modulation unit and the signal demodulation unit are connected in parallel to form a parallel circuit, and the parallel circuit is connected in series between the two isolation capacitors. When an external current source is connected to the input end of the parallel circuit and an input signal is received, the signal modulation unit generates a differential radio frequency signal at both ends of the parallel circuit based on the input signal; and the signal demodulation unit is used to demodulate the differential radio frequency signal at both ends of the parallel circuit to obtain the restored input signal. Therefore, the integrated chip for high-voltage isolation provided by this solution includes both a signal modulation unit and a signal demodulation unit, and can be used as both a transmitter and a receiver of differential radio frequency signals, so as to solve the problem of low transmission efficiency of radio frequency signals in traditional high-voltage isolators. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0036] Figure 1 is a schematic diagram of a traditional capacitive isolator provided by an embodiment of the present invention;

[0037] Figure 2 is a circuit diagram of an integrated chip for high-voltage isolation provided by an embodiment of the present invention;

[0038] Figure 3 is a circuit diagram of another integrated chip for high-voltage isolation provided by an embodiment of the present invention;

[0039] Figure 4 is a circuit schematic diagram of a high-voltage isolator provided by an embodiment of the present invention;

[0040] Figure 5 is a signal waveform diagram of the communication of a high-voltage isolator provided by an embodiment of the present invention;

[0041] Figure 6 is a flowchart of a high-voltage isolation method provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0042] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts fall within the scope of protection of the present invention.

[0043] As described above, traditional capacitive isolators based on on-off keying include two types of integrated chips. One type of integrated chip includes a modulation module for generating radio frequency signals, and the other type of integrated chip includes a demodulation module for demodulating the received radio frequency signals to complete data transmission with a high-voltage isolation function between the two integrated chips. However, due to the different circuit structures of the modulation module and the demodulation module, that is, the resonance frequencies of the radio frequency signal transmitting end and the receiving end are different, the transmission efficiency of the radio frequency signal will be relatively low.

[0044] There are mainly two traditional solutions. One is to increase the power of the radio frequency signal when the sensitivity of the receiving end is certain, which will increase the power consumption. The other is to add additional resonance frequency matching circuits at the transmitting end and the receiving end, but this will increase the chip area, and it is also difficult for this matching circuit to ensure good matching under changes in temperature, process, etc., making it difficult to ensure the reliability and stability of the chip.

[0045] To solve the above technical problems, the inventor can consider integrating both the modulation module and the demodulation module on a single integrated chip. Then both of the two integrated chips can serve as both the radio frequency signal transmitting end and the radio frequency signal receiving end. Since the circuit structures of the integrated chips on both sides are the same, the resonance frequencies of the radio frequency signal transmitting end and the receiving end can be made the same, thereby ensuring the transmission efficiency of the radio frequency signal.

[0046] The specific implementation of the above concept is described below.

[0047] Please refer to Figure 2 , an embodiment of the present invention provides an integrated chip for high-voltage isolation, including: two isolation capacitors, a signal modulation unit, and a signal demodulation unit; the signal modulation unit and the signal demodulation unit are connected in parallel to form a parallel circuit, and the parallel circuit is connected in series between the two isolation capacitors;

[0048] When an input signal is received by connecting an external current source to the input end of the parallel circuit, the signal modulation unit generates a differential radio frequency signal at both ends of the parallel circuit based on the input signal;

[0049] The signal demodulation unit is used to demodulate the differential radio frequency signal at both ends of the parallel circuit to obtain the restored input signal.

[0050] In an embodiment of the present invention, the integrated chip includes two isolation capacitors, a signal modulation unit, and a signal demodulation unit. The signal modulation unit and the signal demodulation unit are connected in parallel to form a parallel circuit, and the parallel circuit is connected in series between the two isolation capacitors. When an external current source is connected to the input end of the parallel circuit and receives an input signal, the signal modulation unit generates a differential radio frequency signal at both ends of the parallel circuit based on the input signal; while the signal demodulation unit is used to demodulate the differential radio frequency signal at both ends of the parallel circuit to obtain the restored input signal. Therefore, the integrated chip for high-voltage isolation provided by this solution includes both a signal modulation unit and a signal demodulation unit, which can be used as both the transmitting end and the receiving end of the differential radio frequency signal to solve the problem of low transmission efficiency of radio frequency signals in traditional high-voltage isolators.

[0051] The following will be described according to Figure 2 the circuit diagram shown.

[0052] In an embodiment of the present invention, the signal modulation unit includes: a negative resistance module and an LC resonance circuit connected in parallel with the negative resistance module; where the LC resonance circuit includes a capacitor C1, an inductor L1, and an inductor L2;

[0053] The inductor L1 and the inductor L2 are connected in series, and the capacitor C1 is connected in parallel across the series-connected inductor L1 and inductor L2.

[0054] In this embodiment, -Gm is the negative resistance module. The negative resistance module and the LC resonance circuit form an oscillator, that is, the signal modulation unit. When an external current source controlled by an input signal is connected to the input end of the signal modulation unit, the on / off of the current source will be controlled according to the input signal. When there is current in the current source, the signal modulation unit generates a differential radio frequency signal and outputs the differential radio frequency signal at the P1 and P2 terminals. When the current source is turned off, -Gm and the LC resonance circuit connected in parallel with it stop oscillating, and thus an OOK signal modulated by the input signal is generated at the P1 and P2 terminals.

[0055] It should be noted that the capacitor C1 is a capacitor device actively added as the sum of the parasitic capacitances of all devices seen from the negative resistance module (such as isolation capacitors, inductors, negative resistance modules, and loads of the same structure of the opposite integrated chip connected by wire bonding). The isolation capacitor C2 and the isolation capacitor C3 are both composed of the top layer and the second top layer metal and the silicon dioxide layer in the middle, and the thickness of the silicon dioxide determines the withstand voltage performance of the high-voltage isolation device.

[0056] In an embodiment of the present invention, the center taps of the inductor L1 and the inductor L2 are grounded.

[0057] In this embodiment, since the differential RF signal is a high-frequency signal and the common-mode transient noise is a low-frequency noise, and the internal resistance of the inductor is proportional to the magnitude of the signal frequency passing through it, the common-mode transient noise will preferentially pass through the inductors L1 and L2. Then, by grounding the center taps of the inductors L1 and L2, the common-mode transient noise can be significantly attenuated, and the common-mode transient immunity (CMTI) can be remarkably improved.

[0058] Referring to Figure 3 , in the embodiment of the present invention, the negative resistance module includes: PMOS transistor M1 and PMOS transistor M2;

[0059] The gates of PMOS transistor M1 and PMOS transistor M2 are respectively connected to both ends of the LC resonant circuit;

[0060] For PMOS transistor M1, the source is connected to the source of PMOS transistor M2, and the drain is connected to the connection line between the gate of PMOS transistor M2 and the LC resonant circuit;

[0061] The drain of PMOS transistor M2 is connected to the connection line between the gate of PMOS transistor M1 and the LC resonant circuit.

[0062] It can be understood that this embodiment is an implementation manner of the negative resistance module, and there may be other implementation manners for the negative resistance module. For example, NMOS transistors can be used to replace PMOS transistors, and the connection manner can be changed accordingly.

[0063] Referring to Figure 2 , in the embodiment of the present invention, the signal demodulation unit includes: a receiving module, coupling capacitor C4, and coupling capacitor C5; coupling capacitor C4 and coupling capacitor C5 are used to couple the differential RF signal at both ends of the parallel circuit to the receiving module;

[0064] One end of coupling capacitor C4 is connected to an output end of the signal modulation unit, and the other end is connected to the receiving module;

[0065] One end of coupling capacitor C5 is connected to the other output end of the signal modulation unit, and the other end is connected to the receiving module.

[0066] In this embodiment, Rx is the receiving module, and coupling capacitor C4 and coupling capacitor C5 are used to couple the differential RF signal at both ends (i.e., point P1 and point P2) of the parallel circuit to the receiving module. The receiving module demodulates the differential RF signal to obtain the restored input signal.

[0067] Referring to Figure 3 , in the embodiment of the present invention, the receiving module includes: NMOS transistor M3 and NMOS transistor M4;

[0068] The NMOS transistor M3 has its gate connected to the connection line between the coupling capacitor C4 and the bias potential, its source connected to the connection line between the coupling capacitor C5 and the signal modulation unit, and its drain connected to the drain of the NMOS transistor M4;

[0069] The NMOS transistor M4 has its gate connected to the connection line between the coupling capacitor C5 and the bias potential, and its source connected to the connection line between the coupling capacitor C4 and the signal modulation unit.

[0070] In this embodiment, when there is no differential RF signal at points P1 and P2, the gates of the NMOS transistors M3 and M4 are at the bias potential, and the bias potential is less than the threshold voltages of the NMOS transistors M3 and M4. At this time, neither the NMOS transistor M3 nor the NMOS transistor M4 is conducting, so the OUT port of the signal demodulation unit outputs a high potential; and when there is a differential RF signal at points P1 and P2 and the amplitude is sufficient, the differential RF signals at points P1 and P2 will alternately exceed the threshold voltages of the NMOS transistors M3 and M4. At this time, the NMOS transistors M3 and M4 will alternately conduct in a time-sharing manner, so the OUT port of the signal demodulation unit outputs a low potential.

[0071] It should be noted that it is not limited to the situation in this embodiment where when there is no differential RF signal at points P1 and P2, the OUT port of the signal demodulation unit outputs a high level; when there is a differential RF signal at points P1 and P2, the OUT port outputs a low level. It can be understood that it is also possible to achieve that when there is no differential RF signal at points P1 and P2, the OUT port of the signal demodulation unit outputs a high level; when there is a differential RF signal at points P1 and P2, the OUT port outputs a low level by changing the circuit devices or connection methods. As long as the signal demodulation unit can restore the input signal through the differential RF signal generated by the signal modulation unit.

[0072] Reference Figure 4 In this embodiment, a high-voltage isolator is further provided, including: a first integrated chip and a second integrated chip identical to the first integrated chip; wherein, both the first integrated chip and the second integrated chip are the integrated chips in any embodiment of this specification;

[0073] The parallel circuit formed by the parallel connection of the signal modulation unit and the signal demodulation unit in the first integrated chip is connected in series between two isolation capacitors to form a first series circuit; the parallel circuit formed by the parallel connection of the signal modulation unit and the signal demodulation unit in the second integrated chip is connected in series between two isolation capacitors to form a second series circuit; the first end of the first series circuit is connected to the second end of the second series circuit, and the second end of the first series circuit is connected to the first end of the second series circuit.

[0074] In the embodiment of the present invention, as Figure 4As shown, the first integrated chip (Chip 1) and the second integrated chip (Chip 2) are placed symmetrically, and the first integrated chip and the second integrated chip are the same. The isolation capacitor C2 of the first integrated chip is connected to the isolation capacitor C3 of the second integrated chip through a bonding wire, and the isolation capacitor C3 of the first integrated chip is connected to the isolation capacitor C2 of the second integrated chip through a bonding wire.

[0075] In an embodiment of the present invention, when the first integrated chip accesses an external current source to receive an input signal, the signal demodulation unit of the second integrated chip is connected to the output terminal to output the restored input signal; when the second integrated chip accesses an external current source to receive an input signal, the signal demodulation unit of the first integrated chip is connected to the output terminal to output the restored input signal.

[0076] In this embodiment, when any one of the integrated chips accesses an external current source and receives an input signal, the integrated chip that receives the input signal serves as the transmitting end of the radio frequency signal. The signal modulation unit in this integrated chip generates a differential radio frequency signal based on the input signal. The differential radio frequency signal is coupled to T1 and T2 through the isolation capacitor C2 and the isolation capacitor C3, and then transmitted to the T1 and T2 ports of the integrated chip serving as the receiving end through the bonding wire 1 and the bonding wire 2. The signal demodulation unit in the integrated chip serving as the receiving end demodulates the differential radio frequency signal to obtain the restored input signal.

[0077] It should be noted that if the first integrated chip is the transmitting end, the signal modulation unit of the first integrated chip generates a differential radio frequency signal at points P1 and P2 of the first integrated chip. At this time, the signal demodulation unit of the first integrated chip demodulates the differential radio frequency signal. At the same time, the differential radio frequency signal is transmitted to points P1 and P2 of the second integrated chip through the bonding wire. Then, the signal demodulation unit of the second integrated chip also demodulates the differential radio frequency signal. Then, it is not necessary to process the output level of the signal demodulation unit of the first integrated chip. Connecting the output terminal of the signal demodulation unit of the second integrated chip serving as the receiving end to a processor device such as an inverter can obtain the restored input signal. The same is true when the second integrated chip is the transmitting end.

[0078] As Figure 5 shown, it is the signal waveform diagram of the high-voltage isolator communication.

[0079] Since the differential radio frequency signal needs to be transmitted from the integrated chip at the transmitting end to the integrated chip at the receiving end, there is a certain time delay between the output signal waveform and the input signal waveform. The restored input signal in the integrated chip serving as the transmitting end is basically the same as the original input signal waveform.

[0080] Therefore, the embodiment of the present invention has at least the following beneficial effects:

[0081] (1) The inductive tap in the LC resonant circuit is grounded, which can significantly improve the common-mode transient immunity (CMTI).

[0082] (2) The generation unit and the receiving unit of the differential RF signal are of an integrated structure, and the integrated chips on both sides are the resonant loads of each other's oscillators. The fully symmetric structure can make the resonant frequencies of the integrated chips on both sides consistent. When the signal modulation unit of one of the integrated chips on one side is driven, the integrated chip on the other side can receive a stable and reliable oscillation signal as the resonant load to achieve signal transmission. Both integrated chips on both sides can be used as the transmitting end or the receiving end of the RF signal to achieve the duplex function.

[0083] (3) The generation unit and the receiving unit of the differential RF signal are of an integrated structure, and only one type of integrated chip needs to be produced, which reduces the production cost caused by the usually required separate production of two types of chips for the transmitting end and the receiving end.

[0084] As Figure 6 shown, this embodiment also provides a high-voltage isolation method for a high-voltage isolator based on this specification. The method includes:

[0085] Step 600, determine the integrated chip as the transmitting end and the integrated chip as the receiving end in the first integrated chip and the second integrated chip;

[0086] Step 602, use an external current source to transmit the input signal into the integrated chip as the transmitting end, and use the signal modulation unit in the integrated chip as the transmitting end to generate a differential RF signal at both ends of the parallel circuit in the integrated chip as the transmitting end according to the input signal;

[0087] Step 604, use two isolation capacitors connected in series at both ends of the parallel circuit to transmit the differential RF signal into the integrated chip as the receiving end;

[0088] Step 606, use the signal demodulation unit in the integrated chip as the receiving end to demodulate the differential RF signal to obtain the restored input signal.

[0089] In the embodiment of the present invention, the step "use the signal demodulation unit in the integrated chip as the receiving end to demodulate the differential RF signal" includes:

[0090] When the signal demodulation unit in the integrated chip as the receiving end does not receive the differential RF signal, the signal demodulation unit outputs a high level;

[0091] When the signal demodulation unit in the integrated chip as the receiving end receives the differential RF signal, the signal demodulation unit outputs a low level.

[0092] In this embodiment, when any one of the integrated chips receives an input signal from an external current source, the integrated chip that receives the input signal serves as the transmitting end of the radio frequency signal. The signal modulation unit in the integrated chip generates a differential radio frequency signal based on the input signal. The differential radio frequency signal is coupled to T1 and T2 through isolation capacitors C2 and C3, and then transmitted to the T1 and T2 ports of the integrated chip serving as the receiving end through bonding wires 1 and 2. The signal demodulation unit in the integrated chip serving as the receiving end demodulates the differential radio frequency signal to obtain the restored input signal.

[0093] It should be noted that it is not limited to the situation described in this embodiment where when the signal demodulation unit in the integrated chip serving as the receiving end does not receive the differential radio frequency signal, the signal demodulation unit outputs a high level; when the signal demodulation unit in the integrated chip serving as the receiving end receives the differential radio frequency signal, the signal demodulation unit outputs a low level. It can be understood that it can also be set that when the signal demodulation unit in the integrated chip serving as the receiving end does not receive the differential radio frequency signal, the signal demodulation unit outputs a low level; when the signal demodulation unit in the integrated chip serving as the receiving end receives the differential radio frequency signal, the signal demodulation unit outputs a high level. As long as the signal demodulation unit can restore the input signal through the differential radio frequency signal generated by the signal modulation unit at the transmitting end.

[0094] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including an..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features. And these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An integrated chip for high-voltage isolation, characterized in that, Comprising: Two isolation capacitors, a signal modulation unit, and a signal demodulation unit; the signal modulation unit and the signal demodulation unit are connected in parallel to form a parallel circuit, and the parallel circuit is connected in series between the two isolation capacitors; When an input signal is received by connecting the input terminal of the parallel circuit to an external current source, the signal modulation unit generates a differential radio frequency signal across the two ends of the parallel circuit based on the input signal; The signal demodulation unit is configured to demodulate the differential radio frequency signal across the two ends of the parallel circuit to obtain the restored input signal; The signal modulation unit includes: a negative resistance module and an LC resonance circuit connected in parallel with the negative resistance module; wherein, the LC resonance circuit includes a capacitor C1, an inductor L1, and an inductor L2; The inductor L1 and the inductor L2 are connected in series, and the capacitor C1 is connected in parallel across the series-connected inductor L1 and inductor L2; The negative resistance module includes: a PMOS transistor M1 and a PMOS transistor M2; The gates of the PMOS transistor M1 and the PMOS transistor M2 are respectively connected to the two ends of the LC resonance circuit; For the PMOS transistor M1, the source is connected to the source of the PMOS transistor M2, and the drain is connected to the connection line between the gate of the PMOS transistor M2 and the LC resonance circuit; The drain of the PMOS transistor M2 is connected to the connection line between the gate of the PMOS transistor M1 and the LC resonance circuit; The signal demodulation unit includes: a receiving module, a coupling capacitor C4, and a coupling capacitor C5; the coupling capacitor C4 and the coupling capacitor C5 are configured to couple the differential radio frequency signal across the two ends of the parallel circuit to the receiving module; One end of the coupling capacitor C4 is connected to an output terminal of the signal modulation unit, and the other end is connected to the receiving module; One end of the coupling capacitor C5 is connected to the other output terminal of the signal modulation unit, and the other end is connected to the receiving module; The receiving module includes: an NMOS transistor M3 and an NMOS transistor M4; For the NMOS transistor M3, the gate is connected to the connection line between the coupling capacitor C4 and the bias potential, the source is connected to the connection line between the coupling capacitor C5 and the signal modulation unit, and the drain is connected to the drain of the NMOS transistor M4; For the NMOS transistor M4, the gate is connected to the connection line between the coupling capacitor C5 and the bias potential, and the source is connected to the connection line between the coupling capacitor C4 and the signal modulation unit.

2. The integrated chip according to claim 1, characterized in that, The center taps of the inductor L1 and the inductor L2 are grounded.

3. A high-voltage isolator, characterized in that, Comprising: A first integrated chip and a second integrated chip identical to the first integrated chip; wherein, the first integrated chip and the second integrated chip are the integrated chips according to any one of claims 1-2. The parallel circuit formed by the parallel connection of the signal modulation unit and the signal demodulation unit in the first integrated chip is connected in series between two isolation capacitors to form a first series circuit; the parallel circuit formed by the parallel connection of the signal modulation unit and the signal demodulation unit in the second integrated chip is connected in series between two isolation capacitors to form a second series circuit; the first end of the first series circuit is connected to the second end of the second series circuit, and the second end of the first series circuit is connected to the first end of the second series circuit.

4. The high-voltage isolator according to claim 3, wherein When the first integrated chip is connected to an external current source to receive an input signal, the signal demodulation unit of the second integrated chip is connected to the output end to output the restored input signal; When the second integrated chip is connected to an external current source to receive an input signal, the signal demodulation unit of the first integrated chip is connected to the output end to output the restored input signal.

5. A high-voltage isolation method for the high-voltage isolator according to claim 3 or 4, characterized in that, Comprising: Determine the integrated chip as the transmitting end and the integrated chip as the receiving end in the first integrated chip and the second integrated chip; Use an external current source to transmit the input signal to the integrated chip as the transmitting end, and use the signal modulation unit in the integrated chip as the transmitting end to generate a differential radio frequency signal at both ends of the parallel circuit in the integrated chip as the transmitting end according to the input signal; Use two isolation capacitors connected in series at both ends of the parallel circuit to transmit the differential radio frequency signal to the integrated chip as the receiving end; Use the signal demodulation unit in the integrated chip as the receiving end to demodulate the differential radio frequency signal to obtain the restored input signal.

6. The high-voltage isolation method according to claim 5, characterized in that The using the signal demodulation unit in the integrated chip as the receiving end to demodulate the differential radio frequency signal includes: When the signal demodulation unit in the integrated chip as the receiving end does not receive the differential radio frequency signal, the signal demodulation unit outputs a high level; When the signal demodulation unit in the integrated chip as the receiving end receives the differential radio frequency signal, the signal demodulation unit outputs a low level.

Images