Manufacturing method of display panel and display panel

Abstract

The application provides a manufacturing method of a display panel and the display panel. A plurality of interval distributed columnar photoresists are formed on the surface of the ohmic contact part of the semiconductor pattern of the display panel away from the substrate, then an insulating layer is formed on the substrate and the columnar photoresists, when the columnar photoresists are removed, the insulating layer above the columnar photoresists is removed together, and the ohmic contact part is exposed, when the first metal layer and the second metal layer are formed subsequently, the source and the drain can be directly overlapped with the corresponding ohmic contact part, so that the mask required for etching the insulating layer can be saved, and meanwhile, the source or the drain can be prevented from being broken when being in contact with the ohmic contact part, so that the process yield of the display panel can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a manufacturing method of display panel and display panel. BACKGROUND

[0002] Organic Light-Emitting Diode (OLED) has the advantages of simple preparation process, low cost, high luminous efficiency, easy formation of flexible structure, low power consumption, high color saturation and wide viewing angle, and has been recognized by the industry as the most potential display technology.

[0003] The number of structural films of the existing OLED display panel is large, and more masks are needed to pattern the films, resulting in high manufacturing cost of the OLED display panel, and undercut structures are easily formed when opening the lap joints of the inorganic stack structure formed by different inorganic materials, and the metal film layer is easily broken when passing through the lap joint with undercut structure, causing lap joint failure, resulting in low process yield of the OLED display panel.

[0004] Therefore, it is necessary to provide a manufacturing method of display panel and display panel to improve this defect. SUMMARY

[0005] The embodiments of the present application provide a manufacturing method of display panel and display panel, which can not only reduce the number of masks, but also avoid metal film layer lap joint failure and improve the process yield of the display panel.

[0006] The embodiments of the present application provide a manufacturing method of display panel, comprising:

[0007] forming a semiconductor layer on a substrate;

[0008] performing a patterning process on the semiconductor layer to form a plurality of semiconductor patterns and a plurality of columnar photoresists, the semiconductor pattern having a channel portion and an ohmic contact portion, and the plurality of columnar photoresists being distributed at intervals on the surface of the ohmic contact portion away from the substrate;

[0009] forming an insulating layer on the substrate and the columnar photoresist;

[0010] removing the columnar photoresist and the insulating layer located thereon to expose the ohmic contact portion;

[0011] forming a first metal layer on the insulating layer, and performing a patterning process on the first metal layer to form a gate electrode;

[0012] forming a second metal layer on the insulating layer, and patterning the second metal layer to form a source electrode and a drain electrode, wherein the source electrode and the drain electrode are respectively in contact with the corresponding ohmic contact part.

[0013] According to an embodiment of the present application, the step of patterning the semiconductor layer to form a plurality of semiconductor patterns and a plurality of columnar photoresists comprises:

[0014] forming a first photoresist layer on the semiconductor layer;

[0015] sequentially exposing and developing the first photoresist layer to form a plurality of first photoresist patterns;

[0016] etching the semiconductor layer to form the semiconductor patterns;

[0017] sequentially thinning and etching the first photoresist patterns to form a plurality of columnar photoresists.

[0018] According to an embodiment of the present application, the thickness of the overlapping part of the first photoresist pattern and the ohmic contact part is greater than the thickness of the overlapping part of the first photoresist pattern and the channel part.

[0019] According to an embodiment of the present application, the insulating layer on the substrate is disconnected from the insulating layer on the columnar photoresist.

[0020] According to an embodiment of the present application, the thickness of the columnar photoresist is between 900 angstroms and 2000 angstroms.

[0021] According to an embodiment of the present application, the diameter of the columnar photoresist or the diameter of the circumscribed circle of the columnar photoresist is between 200 angstroms and 500 angstroms.

[0022] According to an embodiment of the present application, the distance between any two adjacent columnar photoresists on the same ohmic contact part is between 800 angstroms and 1000 angstroms.

[0023] According to an embodiment of the present application, the substrate sequentially has a light-shielding layer and a buffer layer formed thereon, the semiconductor layer is formed on the surface of the buffer layer away from the substrate, the light-shielding layer comprises a plurality of light-shielding patterns and a signal line, and the step of patterning the first metal layer to form a gate electrode comprises:

[0024] forming a second photoresist layer on the first metal layer;

[0025] sequentially exposing and developing the second photoresist layer to form an opening in the part of the second photoresist layer corresponding to the signal line, wherein the opening exposes part of the first metal layer, and the thickness of the overlapping part of the second photoresist layer and the channel part is greater than the thickness of other parts of the second photoresist layer.

[0026] The first metal layer, the insulating layer and the buffer layer exposed to the opening are etched in sequence to expose the signal line;

[0027] The second photoresist layer is thinned to form a second photoresist pattern, which overlaps the channel portion;

[0028] The first metal layer is etched to form the gate electrode.

[0029] According to the manufacturing method of the display panel provided in the above embodiments of the present application, the embodiments of the present application further provide a display panel, which is manufactured by the above manufacturing method of the display panel.

[0030] According to an embodiment of the present application, the gate electrode is arranged in the same layer as the source electrode and the drain electrode.

[0031] The embodiments of the present application have the following beneficial effects: The embodiments of the present application provide a manufacturing method of a display panel and a display panel. By forming a plurality of spaced columnar photoresists on the surface of the ohmic contact portion of the semiconductor layer pattern away from the substrate, and then forming an insulating layer on the substrate and the columnar photoresists, when the columnar photoresists are removed, the insulating layer above the columnar photoresists can be removed together, and the ohmic contact portion is exposed. When the first metal layer and the second metal layer are formed subsequently, the source electrode and the drain electrode can be directly connected to the corresponding ohmic contact portion, so that the photo mask required for etching the insulating layer can be saved, and the undercut structure formed in the area where the insulating layer exposes the ohmic contact portion can be avoided. In this way, the source electrode or the drain electrode can be prevented from being broken when it is in contact with the ohmic contact portion, so that the process yield of the display panel can be improved. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0033] Figure 1 Flowchart of the manufacturing method of the display panel provided in the embodiments of the present application;

[0034] Figures 2a to 2j Flowchart of the manufacturing method of the display panel provided in the embodiments of the present application. DETAILED DESCRIPTION

[0035] The following descriptions of the embodiments are based on the accompanying illustrations and are used to illustrate specific embodiments in which this application can be implemented. Directional terms used in this application, such as [up], [down], [front], [back], [left], [right], [inner], [outer], [side], etc., are only for reference to the accompanying drawings. Therefore, the directional terms used are for illustrative and understanding purposes and not for limiting the application. In the figures, structurally similar units are represented by the same reference numerals.

[0036] The present application will be further described below with reference to the accompanying drawings and specific embodiments.

[0037] This application provides a method for manufacturing a display panel and a display panel in general, which can not only reduce the number of photomasks, but also avoid poor overlap of metal film layers and improve the process yield of the display panel.

[0038] Combination Figure 1 , Figures 2a to 2j As shown, the method for manufacturing a display panel provided in the embodiments of this application includes the following steps:

[0039] Step S10: Form a semiconductor layer 13 on the substrate 10.

[0040] It should be noted that forming the semiconductor layer 13 on the substrate 10 can mean that the semiconductor layer 13 is formed on the substrate 10 and is in direct contact with the substrate 10; or it can mean that the semiconductor layer 13 is formed on the substrate 10 and is separated from the substrate 10 by other film layers (such as light-shielding layers, buffer layers, or barrier layers).

[0041] In the embodiments of this application, such as Figure 2a As shown, a light-shielding layer 11 and a buffer layer 12 are sequentially formed on the substrate 10. The semiconductor layer 13 is formed on the surface of the buffer layer 12 that is away from the substrate 10 and is in direct contact with the buffer layer 12.

[0042] The semiconductor layer 13 is made of an oxide semiconductor. Specifically, the semiconductor layer 13 may be made of indium gallium zinc oxide (IGZO).

[0043] The light-shielding layer 11 has multiple patterned light-shielding patterns 110 and multiple signal lines 111. The light-shielding patterns are used to shield the semiconductor layer 13 to prevent light from directly irradiating the semiconductor 13 and affecting the electrical performance of the thin-film transistor device.

[0044] Specifically, the light-shielding layer 11 can be a metallic material, such as, but not limited to, any one or a combination of at least two of the following metallic materials: copper, aluminum, molybdenum, silver, etc.

[0045] Step S20: performing a patterning process on the semiconductor layer 13 to form a plurality of semiconductor patterns 130 and a plurality of columnar photoresists 140, the semiconductor pattern 130 having a channel portion 131 and an ohmic contact portion 132, and the plurality of columnar photoresists 140 being spacedly distributed on the surface of the ohmic contact portion 132 away from the substrate 10.

[0046] As shown in Figure 2c , the semiconductor pattern 130 has two ohmic contact portions 132, and the channel portion 131 is located between the two ohmic contact portions 132 and connected with the ohmic contact portions 132. The surface of the two ohmic contact portions 132 of the semiconductor pattern 130 away from the substrate 10 is provided with a plurality of columnar photoresists 140, and the plurality of columnar photoresists 140 are arrayed on the same ohmic contact portion 132.

[0047] Specifically, in combination with Figure 2a , Figure 2b and Figure 2c , the step of performing a patterning process on the semiconductor layer 13 to form a plurality of semiconductor patterns 130 and a plurality of columnar photoresists 140 includes:

[0048] Step S201: forming a first photoresist layer on the semiconductor layer 13; Step S202: sequentially performing exposure and development on the first photoresist layer to form a plurality of first photoresist patterns 14; Step S203: performing etching on the semiconductor layer 13 to form the semiconductor pattern 130; Step S204: sequentially performing thinning and etching on the first photoresist pattern to form a plurality of columnar photoresists 140.

[0049] In the step S202, the first photoresist layer is exposed by a mask, the mask has three-section different transmittances, the transmittance of the mask corresponding to the ohmic contact portion 132 is the smallest, the transmittance of the mask corresponding to the channel portion 131 is in the middle, and the transmittance of the mask corresponding to other portions is the largest. After exposure and development by the mask, the thickness of the first photoresist pattern 14 overlapping with the ohmic contact portion 132 is the largest, the thickness of the first photoresist pattern 14 overlapping with the channel portion 131 is the second, and the first photoresist layer in other portions is completely removed in the development process to expose the semiconductor layer 13.

[0050] It should be noted that the portion of the first photoresist pattern 14 overlapping with the ohmic contact portion 132 refers to the portion where the orthographic projection of the first photoresist pattern 14 on the substrate 10 overlaps with the orthographic projection of the ohmic contact portion 132 on the substrate 10, and the portion of the first photoresist pattern 14 overlapping with the channel portion 131 refers to the portion where the orthographic projection of the first photoresist pattern 14 on the substrate 10 overlaps with the orthographic projection of the channel portion 131 on the substrate 10.

[0051] In the step 203, the semiconductor layer 13 is etched by using the first photoresist pattern 14 to remove the semiconductor layer 13 not covered by the first photoresist pattern 14, and to form the semiconductor pattern.

[0052] In the step S204, after the semiconductor pattern 130 is formed by etching, the first photoresist pattern 14 can be thinned by ashing, so that the part of the first photoresist pattern 14 overlapping the channel portion 131 is removed, and the part of the first photoresist pattern 14 overlapping the ohmic contact portion 132 can be reserved.

[0053] Further, after the thinning, the thickness of the part of the first photoresist pattern 14 overlapping the ohmic contact portion 132 is greater than 900 angstroms, and the diameter of the part of the first photoresist pattern 14 overlapping the ohmic contact portion 132, or the diameter of the circumscribed circle, or the side length is about 6 microns.

[0054] In the step S204, after the thinning of the first photoresist pattern 14, the first photoresist pattern 14 is etched to form a plurality of columnar photoresists 140 on the ohmic contact portion 132.

[0055] Specifically, in the step S204, the first photoresist pattern 14 can be etched by using the ECCP dry etching micro-processing mode, wherein the dry etching gas is a mixture of helium and oxygen, the flow ratio of helium to oxygen is between 1:3 and 1:2, the gas pressure is between 10 and 13 mt, the power is between 300 and 500 W, and the dry etching micro-processing time is between 50 and 140 seconds. It should be noted that each of the above parameter ranges includes the end point value.

[0056] Specifically, the thickness h of the columnar photoresist 140 is between 900 angstroms and 2000 angstroms, the diameter d1 of the columnar photoresist 140 or the diameter of the circumscribed circle is between 200 angstroms and 500 angstroms, and the distance d2 between any two adjacent columnar photoresists 140 on the same ohmic contact portion 132 is between 800 angstroms and 1000 angstroms. In this structure, it can be ensured that the insulating layer formed on the columnar photoresist 140 in the step S30 is disconnected from the insulating layer formed on the substrate 10.

[0057] In one embodiment, the columnar photoresist 140 is a cylinder, the thickness h of the columnar photoresist 140 is 1500 angstroms, the diameter d1 of the columnar photoresist 140 is 350 angstroms, and the distance d2 between any two adjacent columnar photoresists 140 on the same ohmic contact portion 132 is 900 angstroms.

[0058] In practical applications, the shape of the columnar photoresist 140 is not limited to the cylinder in the above embodiment, but can also be a prism or other columnar structure, which is not limited herein. The thickness h of the columnar photoresist 140 is not limited to 1500 angstroms in the above embodiment, but can also be 900 angstroms, 1200 angstroms, 1700 angstroms, 2000 angstroms, etc. The diameter d1 of the columnar photoresist 140 or the diameter of the circumscribed circle is not limited to 350 angstroms in the above embodiment, but can also be 200 angstroms, 250 angstroms, 300 angstroms, 400 angstroms, 450 angstroms, 500 angstroms, etc. The distance d2 between any two adjacent columnar photoresists 140 on the same ohmic contact 132 is not limited to 900 angstroms in the above embodiment, but can also be 800 angstroms, 850 angstroms, 950 angstroms, 1000 angstroms, etc.

[0059] Step S30: Forming an insulating layer 15 on the substrate 10 and the columnar photoresist 140.

[0060] It should be noted that forming the insulating layer 15 on the substrate 10 can mean that the insulating layer 15 is formed on the substrate 10 and directly contacts the substrate 10, or that the insulating layer 15 is formed on the substrate 10 and is spaced apart from the substrate 10 by other film layers (such as light shielding layers, buffer layers, or barrier layers, etc.).

[0061] In the embodiment of the present application, as shown in Figure 2d the insulating layer 15 is formed on the surface of the buffer layer 12 away from the substrate 10 and on the surface of the columnar photoresist 140 away from the substrate 10, and the insulating layer 15 on the columnar photoresist 140 is disconnected from the insulating layer 15 on the buffer layer 12.

[0062] Step S40: Removing the columnar photoresist and the insulating layer on the columnar photoresist to expose the ohmic contact.

[0063] As shown in Figures 2d to 2e in the step S40, the columnar photoresist 140 above the ohmic contact layer 132 can be removed by a stripping solution. When the columnar photoresist 140 is removed, the insulating layer 15 above the columnar photoresist 140 can also be removed, and a plurality of ohmic contact openings 150 can be formed on the insulating layer 15, which can expose the ohmic contact layer 132. In this way, a mask for etching the insulating layer 15 to form the ohmic contact openings 150 can be saved.

[0064] In the embodiment of the present application, the insulating layer 15 is a laminated structure formed by laminating a silicon nitride layer and a silicon oxide layer, the silicon nitride layer is located on the side of the silicon oxide layer away from the substrate 10, and the silicon oxide layer and the silicon nitride layer can be deposited on the surface of the buffer layer 12 away from the substrate 10 by physical vapor deposition. Since the insulating layer 15 is not etched when the ohmic contact opening 150 is formed in the embodiment of the present application, undercut openings can be avoided at the edges of the ohmic contact opening 150, so that the source or drain can be prevented from being broken when it is in contact with the ohmic contact, thereby improving the process yield of the display panel.

[0065] Further, the manufacturing method of the display panel further comprises:

[0066] Step S50: forming a first metal layer 16 on the insulating layer 15, and patterning the first metal layer 16 to form a gate 160.

[0067] Specifically, in combination with the display panel shown in Figure 2f , Figure 2g and Figure 2h , the step of patterning the first metal layer 16 to form a gate 160 comprises: step S501: forming a second photoresist layer 17 on the first metal layer 16; step S502: sequentially exposing and developing the second photoresist layer 17 to form an opening 170 in the part of the second photoresist layer 17 corresponding to the signal line, the opening 170 exposes part of the first metal layer 16, and the thickness of the part of the second photoresist layer 17 overlapping the channel portion 131 is greater than the thickness of the other part of the second photoresist layer 17; step S503: sequentially etching the first metal layer 16 exposed by the opening 170, the insulating layer 15, and the buffer layer 12 to expose the signal line 111; step S504: thinning the second photoresist layer 17 to form a second photoresist pattern 171, the second photoresist pattern 171 overlaps the channel portion 131; and step S505: etching the first metal layer 16 to form the gate 160.

[0068] In the step S502, the second photoresist layer 17 is exposed by a mask, the mask has three-section transmittance, the transmittance of the part of the mask corresponding to the channel portion 131 is the smallest, the transmittance of the part of the mask corresponding to the signal line 111 is the largest, and the transmittance of the other part of the mask is in the middle. After exposure and development by this mask, the thickness of the part of the second photoresist layer 17 overlapping the channel portion 131 is the largest, and the opening 170 is formed in the part corresponding to the signal line 111, the opening 170 exposes the first metal layer 16, and the thickness of the other part of the first photoresist layer 17 is less than the thickness of the part of the second photoresist layer 17 overlapping the channel portion 131.

[0069] In step S503, the first metal layer 16 exposed by the opening 170 can be removed by wet etching to expose the insulating layer 15, and then the insulating layer 15 and the buffer layer 12 exposed by the opening 170 can be removed by dry etching to expose part of the signal line 111. This can save a photomask used to etch the opening 170.

[0070] In step S504, the second photoresist layer 17 can be thinned in the same manner as in step S204, so that the portion of the second photoresist layer 17 corresponding to the channel portion 131 is retained, and all other portions of the second photoresist layer 17 are removed to form the second photoresist pattern 171. In step S505, the first metal layer 16 is etched using the second photoresist pattern 171, and then the second photoresist pattern 171 is removed to form the gate 160, which overlaps with the orthographic projection of the channel portion 131 on the substrate 10.

[0071] Furthermore, the method for manufacturing the display panel also includes:

[0072] Step S60: A second metal layer 18 is formed on the insulating layer 15. The second metal layer 18 is patterned to form a source 181 and a drain 182. The source 181 and the drain 182 are respectively in contact with the corresponding ohmic contact portion 132.

[0073] like Figure 2i As shown, the source 181 and the drain 182 are both formed on the surface of the insulating layer 15 away from the substrate 10, and are in contact with the corresponding ohmic contact portion 132 through the ohmic contact opening on the insulating layer 15. The gate 160 is disposed in the same layer as the source 181 and the drain 182, but is formed by different metal film deposition processes. This not only saves a photomask, but also reduces the interlayer dielectric layer originally used to insulate and separate the second metal layer 18 from the first metal layer 16.

[0074] The second metal layer 18 contacts the signal line 111 through an opening and transmits the data signals required for displaying the screen to the source 181 or the drain 182.

[0075] like Figure 2j As shown, the method for manufacturing the display panel further includes:

[0076] Step S60: forming a passivation layer 19, a planarization layer 20, a first electrode layer 21, a pixel definition layer 22, a light-emitting layer and a cathode layer on the second metal layer 18 in sequence. The manufacturing method of the passivation layer 19, the planarization layer 20, the first electrode layer 21, the pixel definition layer 22, the light-emitting layer and the cathode layer can refer to the manufacturing method of the existing OLED display panel, which is not described herein.

[0077] It should be noted that, Figure 2j The display panel shown is not the complete structure of the display panel provided by the embodiments of the present application, and the complete structure of the display panel can refer to the structure of the existing OLED display panel, which is not uniquely limited herein.

[0078] According to the manufacturing method of the display panel provided by the above embodiments of the present application, the embodiments of the present application also provide a display panel, which can be manufactured by the manufacturing method of the display panel provided by the above embodiments.

[0079] The structure of the display panel is as shown in Figure 2j The source electrode 181 and the drain electrode 182 are both formed on the surface of the insulating layer 15 away from the substrate 10, and are in contact with the corresponding ohmic contact part 132 through the opening on the insulating layer 15. The gate electrode 160 is provided in the same layer as the source electrode 181 and the drain electrode 182, but is prepared by different metal film forming processes. In this way, not only can one photomask be saved, but also the interlayer dielectric layer originally used to insulate and separate the second metal layer 18 from the first metal layer 16 can be reduced.

[0080] The embodiments of the present application have the following beneficial effects: The embodiments of the present application provide a manufacturing method of a display panel and a display panel. By forming a plurality of spaced columnar photoresists on the surface of the ohmic contact part of the semiconductor layer pattern away from the substrate, and then forming an insulating layer on the substrate and the columnar photoresists, when the columnar photoresists are removed, the insulating layer above the columnar photoresists can be removed together, and the ohmic contact part is exposed. In the subsequent formation of the first metal layer and the second metal layer, the source electrode and the drain electrode can be directly connected to the corresponding ohmic contact part, so that the photomask required for etching the insulating layer can be saved, and undercut structures can be avoided in the area where the insulating layer exposes the ohmic contact part, so that the source electrode or the drain electrode can be prevented from being broken when it is in contact with the ohmic contact part, thereby improving the process yield of the display panel.

[0081] To sum up, although the above preferred embodiments of the present application are disclosed, the above preferred embodiments are not used to limit the present application. Those skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application is based on the scope defined by the claims.

Claims

1. A method for manufacturing a display panel, characterized in that, The method comprises the following steps: forming a semiconductor layer on a substrate; performing a patterning process on the semiconductor layer to form a plurality of semiconductor patterns and a plurality of columnar photoresists, the semiconductor pattern having a channel portion and an ohmic contact portion, and the columnar photoresists being distributed at intervals on the surface of the ohmic contact portion away from the substrate; forming an insulating layer on the substrate and the columnar photoresists; removing the columnar photoresists and the insulating layer on the columnar photoresists to expose the ohmic contact portion; forming a first metal layer on the insulating layer, and performing a patterning process on the first metal layer to form a gate electrode; forming a second metal layer on the insulating layer, and performing a patterning process on the second metal layer to form a source electrode and a drain electrode, the source electrode and the drain electrode being in contact with the corresponding ohmic contact portion respectively; wherein the step of performing a patterning process on the semiconductor layer to form a plurality of semiconductor patterns and a plurality of columnar photoresists comprises the following steps: forming a first photoresist layer on the semiconductor layer; performing exposure and development on the first photoresist layer in sequence to form a plurality of first photoresist patterns; performing etching on the semiconductor layer to form the semiconductor pattern; performing thinning and etching on the first photoresist pattern in sequence to form a plurality of columnar photoresists; the insulating layer on the substrate is disconnected from the insulating layer on the columnar photoresists.

2. The method of manufacturing a display panel according to claim 1, wherein The thickness of the overlapping part of the first photoresist pattern and the ohmic contact portion is greater than the thickness of the overlapping part of the first photoresist pattern and the channel portion.

3. The method of manufacturing a display panel according to claim 1, wherein The thickness of the columnar photoresist is between 900 angstroms and 2000 angstroms.

4. The method of manufacturing a display panel according to claim 1, wherein The diameter of the columnar photoresist or the diameter of the circumscribed circle of the columnar photoresist is between 200 angstroms and 500 angstroms.

5. The method of manufacturing a display panel according to claim 1, wherein The distance between any two adjacent columnar photoresists on the same ohmic contact portion is between 800 angstroms and 1000 angstroms.

6. The method of manufacturing a display panel according to claim 1, wherein The substrate sequentially forms a light-shielding layer and a buffer layer, the semiconductor layer is formed on the surface of the buffer layer away from the substrate, the light-shielding layer comprises a plurality of light-shielding patterns and a signal line, and the step of performing a patterning process on the first metal layer to form a gate electrode comprises the following steps: forming a second photoresist layer on the first metal layer; performing exposure and development on the second photoresist layer in sequence to form an opening in the part of the second photoresist layer corresponding to the signal line, the opening exposes part of the first metal layer, and the thickness of the overlapping part of the second photoresist layer and the channel portion is greater than the thickness of other parts of the second photoresist layer; performing etching on the first metal layer, the insulating layer and the buffer layer exposed by the opening in sequence to expose the signal line; performing thinning on the second photoresist layer to form a second photoresist pattern, the second photoresist pattern overlaps the channel portion; performing etching on the first metal layer to form the gate electrode.

7. A display panel, characterized by, The display panel is formed by the manufacturing method of the display panel according to any one of claims 1 to 6.

8. The display panel of claim 7, wherein, The gate electrode is arranged in the same layer as the source electrode and the drain electrode.

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