A dual-slope analog-to-digital converter and a method for analog-to-digital conversion

Abstract

The present invention provides a dual-slope analog-to-digital converter and a method for analog-to-digital conversion. Among them, the dual-slope analog-to-digital converter includes: a digital-to-analog converter for outputting a ramp signal; a comparator, the positive input terminal of the comparator is connected to the output terminal of the digital-to-analog converter, and the negative input terminal of the comparator is connected to a photoelectric sensor; wherein, the photocurrent integration signal is input by the photoelectric sensor; a latch, the latch is connected to the digital-to-analog converter and the comparator, and the latch is used to latch the digital signal at the input terminal of the digital-to-analog converter when the comparison result of the comparator indicates that the photocurrent integration signal is equal to the ramp signal, and use the digital signal as the output signal of the analog-to-digital converter. The present invention can improve the conversion effect of the analog-to-digital converter.

Description

Technical Field

[0001] The present invention relates to the technical field of digital-to-analog conversion, and particularly to a dual-slope analog-to-digital converter and a method for analog-to-digital conversion. Background Art

[0002] One of the basic technologies of digital pixels is to complete the analog-to-digital conversion of optoelectronic signals within a limited pixel space. Traditional analog-to-digital converters for analog-to-digital conversion require a large number of transistors and a large area, and cannot be integrated into a limited pixel space. Therefore, it is necessary to design a pixel-level analog-to-digital converter. Existing pixel-level analog-to-digital converters need to compare the ramp signal with the optoelectronic signal multiple times, which easily reduces the frame rate of the optoelectronic sensor and has a low conversion efficiency. Summary of the Invention

[0003] In view of this, embodiments of the present invention are committed to providing a dual-slope analog-to-digital converter and a method for analog-to-digital conversion, which can improve the conversion effect of the analog-to-digital converter.

[0004] According to one aspect of the present invention, a dual-slope analog-to-digital converter provided by an embodiment of the present invention includes: a digital-to-analog converter for outputting a ramp signal; a comparator, the positive input terminal of the comparator is connected to the output terminal of the digital-to-analog converter, the negative input terminal of the comparator is connected to an optoelectronic sensor, and the comparator is used to compare the ramp signal and the photocurrent integration signal; wherein, the photocurrent integration signal is input by the optoelectronic sensor; the slope of the photocurrent integration signal is positively correlated with the illumination intensity, the photocurrent integration signal monotonically decreases with the integration time, and the ramp signal includes a single-slope voltage that monotonically increases; a latch, the latch is connected to the digital-to-analog converter and the comparator, and the latch is used to latch the digital signal at the input terminal of the digital-to-analog converter when the comparison result of the comparator indicates that the photocurrent integration signal is equal to the ramp signal, and use the digital signal as the output signal of the analog-to-digital converter.

[0005] In one embodiment, the dual-slope analog-to-digital converter is used for analog-to-digital conversion of optoelectronic signals in a pixel space, and the latch includes an external latch or an internal latch; the external latch is located outside the pixel space; or the internal latch is located inside the pixel space.

[0006] In one embodiment, the latch includes an external latch, the output terminals of multiple comparators are connected to a column bus, and the column bus is connected to multiple corresponding external latches; the digital-to-analog converter is located outside the pixel space and the comparator is located inside the pixel space.

[0007] In one embodiment, the dual-slope analog-to-digital converter further includes: a reset switch connected to the negative input terminal of the comparator.

[0008] In one embodiment, the reset switch is connected in parallel with the photoelectric sensor, and the reset switch and the photoelectric sensor are respectively connected in series with the comparator.

[0009] According to another aspect of the present invention, an embodiment of the present invention provides a method for dual-slope analog-to-digital conversion, which is applicable to the dual-slope analog-to-digital converter described in any of the above embodiments. The method for dual-slope analog-to-digital conversion includes: obtaining a photocurrent integration signal and a ramp signal; comparing the photocurrent integration signal and the ramp signal to obtain a comparison result; when the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter.

[0010] In one embodiment, the step of "when the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter" includes: when the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, latching the digital signal at the input terminal of the current digital-to-analog converter; using the latched digital signal as the output signal of the digital-to-analog converter.

[0011] In one embodiment, before obtaining the photocurrent integration signal and the ramp signal, the method for dual-slope analog-to-digital conversion further includes: obtaining a reset signal; adjusting the photocurrent integration signal to a reset voltage signal according to the reset signal.

[0012] In one embodiment, the latch includes a plurality of external latches; the step of "comparing the photocurrent integration signal and the ramp signal to obtain a comparison result" includes: obtaining the comparison result of the comparator corresponding to each external latch; wherein, the step of "when the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter" includes: when the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, outputting a latch signal to the column bus; the external latch latches the digital signal at the input terminal of the current digital-to-analog converter according to the latch signal to be used as the output signal of the analog-to-digital converter; the analog-to-digital converter uses the digital signal as the output signal.

[0013] In one embodiment, comparing the photo-generated current integration signal and the ramp signal to obtain a comparison result includes: when the photo-generated current integration signal is greater than the ramp signal, the output result of the comparator is 0; or when the photo-generated current integration signal is equal to the ramp signal, the output result of the comparator is 1; wherein, when the comparison result indicates that the photo-generated current integration signal is equal to the ramp signal, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter further includes: when the output result of the comparator changes from 0 to 1, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter.

[0014] The dual-slope analog-to-digital converter and the method for analog-to-digital conversion provided by the embodiments of the present invention adopt a dual-slope comparator, support a wide dynamic range, improve the output efficiency of the dual-slope analog-to-digital converter, and can be integrated into the pixel space to provide the core basic technology of digital pixels. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The figure shows a schematic structural diagram of a dual-slope analog-to-digital converter provided by an exemplary embodiment of the present application.

[0016] Figure 2 The figure shows a schematic principle diagram of the dual slope provided by an exemplary embodiment of the present application.

[0017] Figure 3 The figure shows a schematic flow diagram of a method for dual-slope analog-to-digital conversion provided by an exemplary embodiment of the present application.

[0018] Figure 4 It is a structural diagram of an electronic device provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0019] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0020] In addition, in the exemplary embodiments, since the same reference numerals represent the same components with the same structure or the same steps of the same method, if an embodiment is described exemplarily, only the structures or methods different from the described embodiment are described in other exemplary embodiments.

[0021] Throughout the specification and the claims, when a component is described as "connected" to another component, the one component may be "directly connected" to the other component or "electrically connected" to the other component through a third component. In addition, unless explicitly described to the contrary, the term "comprising" and its corresponding terms should be understood to include only the recited components and should not be construed to exclude any other components.

[0022] Exemplary Converter

[0023] Figure 1 The following is a schematic structural diagram of a dual-slope analog-to-digital converter provided by an exemplary embodiment of the present application. As Figure 1 shown, the dual-slope analog-to-digital converter includes: a digital-to-analog converter DAC, which is used to output a ramp signal; a comparator CMP, the positive input terminal of the comparator CMP is connected to the output terminal of the digital-to-analog converter DAC, the negative input terminal of the comparator CMP is connected to a photoelectric sensor, and the comparator CMP is used to compare the ramp signal and the photocurrent integration signal; wherein, the photocurrent integration signal is input by the photoelectric sensor; the slope of the photocurrent integration signal is positively correlated with the light intensity, the photocurrent integration signal monotonically decreases with the integration time, and the ramp signal includes a single-slope voltage that monotonically increases; a latch Latch, which is connected to the digital-to-analog converter DAC and the comparator CMP, and the latch Latch is used to latch the digital signal at the input terminal of the current digital-to-analog converter when the comparison result of the comparator CMP indicates that the photocurrent integration signal and the ramp signal are equal, and use the digital signal as the output signal of the analog-to-digital converter.

[0024] The negative input terminal of the comparator is connected to the photoelectric sensor and is used to receive the photocurrent integration signal transmitted by the photoelectric sensor. During the integration period, the photocurrent integration signal monotonically decreases with the integration time. Moreover, according to different light intensities, integration photoelectric signals with different slopes can be generated, and the integration photoelectric signals with different slopes are the first slope in the dual slope. The positive input terminal of the comparator is connected to the output terminal of a digital-to-analog converter (also called a D / A converter, abbreviated as DAC) and is used to receive the ramp signal output by the digital-to-analog converter. The ramp signal is a single-slope rising signal with a fixed slope. The digital-to-analog converter can output a single-slope voltage that monotonically increases with a fixed slope, which is used to expand the dynamic range of the analog-to-digital converter (also called an A / D converter, abbreviated as ADC). Therefore, the single-slope voltage with a fixed slope output by the digital-to-analog converter is the second slope. Figure 2 The following is a schematic principle diagram of the dual slope provided by an exemplary embodiment of the present application. As Figure 2As shown, the horizontal axis represents time and the vertical axis represents voltage values. There are a total of two photocurrent integration signals Vcint with different slopes generated according to different light intensities. Since the ramp signal Vdac is weak at the beginning and the photocurrent integration signal Vcint is pulled to the reset voltage during the reset period, the voltage value of the photocurrent integration signal Vcint is greater than that of the ramp signal Vdac at the beginning. The photocurrent integration signal Vcint decreases monotonically with the integration time, while the ramp signal Vdac increases monotonically. At a certain moment, the two oblique lines intersect, and the voltage value of the photocurrent integration signal Vcint is equal to that of the ramp signal Vdac. At this time, the comparator flips and outputs a latch signal. The latch latches the digital signal at the input end of the digital-to-analog converter (DAC) when the comparator flips, and uses the digital signal at the input end of the digital-to-analog converter (DAC) at this time as the output signal of the analog-to-digital converter (ADC). The latch simultaneously receives the comparison result output by the comparator and the digital signal at the input end of the digital-to-analog converter (DAC).

[0025] Among them, the analog-to-digital converter (ADC) is used to capture a large number of unknown signals and convert them into known descriptions. On the contrary, the digital-to-analog converter (DAC) accepts a completely known and deeply understood description and then "simply" generates an equivalent analog value. The comparator latches the input signal of the digital-to-analog converter (DAC), which can keep the input signal of the digital-to-analog converter (DAC) in a known state at this time, so as to meet the output requirements of the analog-to-digital converter (ADC).

[0026] In one embodiment, the dual-slope analog-to-digital converter is used for analog-to-digital conversion of optoelectronic signals in the pixel space. The latch can include an external latch or an internal latch; the external latch is located outside the pixel space; or the internal latch is located inside the pixel space.

[0027] Due to the limited space within the pixel space, when the latch occupies too much space, the latch can be placed outside, or the installation position of the latch can be selected according to the exposure scheme of the optoelectronic sensor. Moreover, the number of bits of the latch can be adjusted according to the design scheme. The N-bit latch can be placed outside to form an external latch, and column sharing is formed through the column bus. The comparison results are aggregated and distributed by the column bus. The column bus, that is, the common column, is a signal line for transmitting the comparison result of the comparator to the latch. For example, a comparator is built into each pixel space in the entire pixel array, and the outputs of the comparators are all connected to the column bus. The column bus is also connected to the external latch. When the analog-to-digital converter (ADC) is working, the comparator scans the pixel array row by row. When a flip occurs at a certain moment during the scanning of the first row, the comparison result can be output through the column bus. The column bus and the latch achieve latching outside the pixel space. When a flip occurs during the scanning of other rows, it is also output to the column bus, and the external latch achieves latching outside the pixel space. By using an external latch, the area ratio of the analog-to-digital converter within the pixel space can be reduced, thereby improving the fill factor. However, when global exposure is supported, the N-bit latch can also be built into the pixel space to improve the global exposure effect.

[0028] In one embodiment, the latch may include an external latch. The output ends of multiple comparators are connected to the column bus, and the column bus is connected to multiple corresponding external latches; the digital-to-analog converter is located outside the pixel space, and the comparator is located within the pixel space.

[0029] For example, the digital-to-analog converter is placed outside the pixel space. It can be multiplexed by multiple adjacent pixels, or by column pixels, or by global pixels. The comparator is placed within the pixel space. A comparator is built into each pixel space in the entire pixel array, and the outputs of the comparators are all connected to the column bus. The column bus is also connected to the external latch. When the analog-to-digital converter (ADC) is working, the comparator scans the pixel array row by row. When a flip occurs at a certain moment during the scanning of the first row, the comparison result can be output through the column bus. The column bus and the latch achieve latching outside the pixel space. When a flip occurs during the scanning of other rows, it is also output to the column bus, and the external latch achieves latching outside the pixel space. By using an external latch, the area ratio of the analog-to-digital converter within the pixel space can be reduced, thereby improving the fill factor.

[0030] As Figure 1 shown, the dual-slope analog-to-digital converter may further include: a reset switch Reset, and the reset switch Reset is connected to the negative input terminal of the comparator CMP. The reset switch Reset is in parallel with the optoelectronic sensor, and the reset switch Reset and the optoelectronic sensor are respectively connected in series with the comparator CMP.

[0031] The built-in reset switch can restore the circuit to its initial state and pull the voltage value of the photocurrent integration signal to the reset voltage for the next analog-to-digital conversion. Moreover, the reset switch is connected in parallel with the photoelectric sensor, and the reset switch and the photoelectric sensor are respectively connected in series with the comparator. When the photoelectric sensor transmits the photocurrent integration signal to the comparator, the reset switch can be disconnected to perform the normal analog-to-digital conversion process. When it is necessary to adjust the photocurrent integration signal for reset, the reset switch is connected to reset the voltage value of the photocurrent integration signal to the reset voltage. The reset switch and the photoelectric sensor can work independently of each other, or after a single analog-to-digital conversion is completed, the voltage value of the photocurrent integration signal can be reset in a timely manner, making the analog-to-digital converter work more sensitively and the conversion more accurate.

[0032] In one embodiment, each comparator has seven transistors built in. With a small number of transistors, the fill factor area can be increased.

[0033] The dual-slope analog-to-digital converter provided by the embodiment of the present invention proposes a brand-new architecture Nyquist sampling rate pixel-level analog-to-digital converter, which uses a dual-slope comparator, supports a wide dynamic range, improves the output efficiency of the dual-slope analog-to-digital converter, and can be integrated into the pixel space to provide the core basic technology of digital pixels.

[0034] Exemplary Method

[0035] Figure 3 The figure shows a schematic flow chart of the method for dual-slope analog-to-digital conversion provided by an exemplary embodiment of the present application, as Figure 3 shown. The method for dual-slope analog-to-digital conversion is applicable to the dual-slope analog-to-digital converter provided by the embodiment of the present application. The method for dual-slope analog-to-digital conversion includes:

[0036] Step 100: Obtain the photocurrent integration signal and the ramp signal.

[0037] Among them, the slope of the photocurrent integration signal is positively correlated with the light intensity, the photocurrent integration signal monotonically decreases with the integration time, and the ramp signal includes a single-slope voltage that monotonically increases.

[0038] The negative input terminal of the comparator is connected to the optoelectronic sensor and is used to receive the photocurrent integration signal transmitted by the optoelectronic sensor. During the integration period, the photocurrent integration signal monotonically decreases with the integration time. Moreover, according to different light intensities, integration optoelectronic signals with different slopes can be generated, and the integration optoelectronic signals with different slopes are the first slope in the dual slopes. The positive input terminal of the comparator is connected to the output terminal of a digital-to-analog converter (also known as a D / A converter, abbreviated as DAC) and is used to receive the ramp signal output by the digital-to-analog converter. The digital-to-analog converter can output a single-slope voltage with a fixed slope that monotonically increases and is used to expand the dynamic range of an analog-to-digital converter (also known as an A / D converter, abbreviated as ADC). Therefore, the fixed-slope single-slope voltage output by the digital-to-analog converter is the second slope.

[0039] Step 200: Compare the photocurrent integration signal with the ramp signal to obtain a comparison result.

[0040] The comparator is used to compare the voltage value of the photocurrent integration signal with the voltage value of the ramp signal. The negative input terminal of the comparator is connected to the optoelectronic sensor, and the positive input terminal of the comparator is connected to the output terminal of a digital-to-analog converter (also known as a D / A converter, abbreviated as DAC). Therefore, if the voltage value of the photocurrent integration signal is greater than the voltage value of the ramp signal, the output of the comparator is 0. If the voltage value of the photocurrent integration signal is equal to the voltage value of the ramp signal, the output of the comparator jumps and changes from 0 to 1.

[0041] Step 300: When the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, use the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter.

[0042] When the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, that is, when the comparator just flips and the output jumps, latch the current ramp signal, save the known state of the ramp signal, and use the digital signal corresponding to the ramp signal as the output signal of the analog-to-digital converter. The digital signal is the signal input to the input terminal of the digital-to-analog converter and corresponds to the ramp signal output from the output terminal of the digital-to-analog converter. Since the ramp signal is weak at the beginning and the photocurrent integration signal is pulled to the reset voltage during the reset period, the voltage value of the photocurrent integration signal is greater than the voltage value of the ramp signal at the beginning. The photocurrent integration signal monotonically decreases with the integration time, and the ramp signal monotonically increases. Then, at a certain moment, the two oblique lines intersect, and the voltage value of the photocurrent integration signal is equal to the voltage value of the ramp signal. At this time, the comparator flips and outputs a latch signal. The latch latches the digital signal of the digital-to-analog converter (DAC) when the comparator flips, and uses the digital signal at the input terminal of the digital-to-analog converter (DAC) at this time as the output signal of the analog-to-digital converter (ADC).

[0043] In one embodiment, step 300 may include: when the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, latching the digital signal at the input end of the current digital-to-analog converter; and using the latched digital signal as the output signal of the digital-to-analog converter.

[0044] A latch is a logic element with a memory function in digital circuits. Latching means temporarily storing a signal to maintain a certain level state, and in digital circuits, it can record binary digital signals "0" and "1". The state at the input is saved to the output only when there is a latch signal until the next latch signal. Usually, there are only two values, 0 and 1. A latch means that the state of the output end does not change with the state of the input end, and the state at the input is saved to the output only when there is a latch signal until the next latch signal arrives. Therefore, when the photocurrent integration signal is equal to the ramp signal, a latch signal (i.e., the latch signal) is issued, and the latch latches the digital signal at the input end of the current digital-to-analog converter, and the digital signal is used as the output signal of the digital-to-analog converter. The output signal of the digital-to-analog converter can be determined efficiently and quickly.

[0045] In one embodiment, before step 100, the dual-slope analog-to-digital conversion method may further include: obtaining a reset signal; and adjusting the photocurrent integration signal to the reset voltage signal according to the reset signal.

[0046] After completing one analog-to-digital conversion, when reset can be performed, connect the reset switch to reset the voltage value of the photocurrent integration signal to the reset voltage. Resetting the voltage value of the photocurrent integration signal in a timely manner makes the analog-to-digital converter work more sensitively and the conversion more accurate.

[0047] In one embodiment, the latch includes a plurality of external latches; step 200 may include: obtaining the comparison results of the comparators corresponding to each external latch; wherein, step 300 may include: when the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, outputting a latch signal to the column bus; the external latch latches the digital signal at the input end of the current digital-to-analog converter according to the latch signal to be used as the output signal of the analog-to-digital converter; and the analog-to-digital converter uses the digital signal as the output signal.

[0048] For example, a comparator is built into each pixel space of the entire pixel array. The outputs of multiple comparators are all connected to the column bus, and the column bus is further connected to an external latch. When the analog-to-digital converter (ADC) is operating, the comparator scans the pixel array row by row. When a flip occurs at a certain moment during the scanning of the first row, that is, when the photocurrent integration signal is equal to the ramp signal, a latch signal (i.e., the latch signal) is sent to the column bus. After receiving the latch signal (i.e., the latch signal), the external latch implements latching outside the pixel space. When a flip occurs during the scanning of other rows, it is also output to the column bus, and the external latch implements latching outside the pixel space. By using the external latch, the area occupancy of the analog-to-digital converter within the pixel space can be reduced, thereby improving the fill factor and achieving multi-bit analog-to-digital conversion.

[0049] In one embodiment, step 200 above may include: when the photocurrent integration signal is greater than the ramp signal, the output result of the comparator is 0; or when the photocurrent integration signal is equal to the ramp signal, the output result of the comparator is 1; wherein, step 300 above may further include: when the output result of the comparator changes from 0 to 1, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter.

[0050] The comparator is used to compare the voltage value of the photocurrent integration signal and the voltage value of the ramp signal. The negative input terminal of the comparator is connected to the photoelectric sensor, and the positive input terminal of the comparator is connected to the output terminal of the digital-to-analog converter (also known as the D / A converter, abbreviated as DAC). Therefore, if the voltage value of the photocurrent integration signal is greater than the voltage value of the ramp signal, the output of the comparator is 0. When the voltage value of the photocurrent integration signal is equal to the voltage value of the ramp signal, the output of the comparator jumps and changes from 0 to 1. Therefore, when changing from 0 to 1, the comparator issues a latch signal (i.e., the latch signal), and the latch latches the digital signal at the input terminal of the current digital-to-analog converter in a timely manner according to the latch signal, and uses the current digital signal as the output signal of the analog-to-digital converter.

[0051] Exemplary Electronic Device

[0052] An electronic device includes: a processor; a memory for storing processor-executable instructions; and the processor for executing the dual-slope analog-to-digital conversion method provided in the embodiments of the present application.

[0053] Next, refer to Figure 4 to describe the electronic device according to the embodiments of the present application. The electronic device may be any one or both of the first device and the second device, or a stand-alone device independent of them. The stand-alone device can communicate with the first device and the second device to receive the input signals collected from them.

[0054] Figure 4 The block diagram of an electronic device according to an embodiment of the present application is illustrated.

[0055] As Figure 4 shown, the electronic device 10 includes one or more processors 11 and a memory 12.

[0056] The processor 11 can be a central processing unit (CPU) or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and can control other components in the electronic device 10 to perform desired functions.

[0057] The memory 12 may include one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory, etc. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage media, and the processor 11 may run the program instructions to implement the dual-slope analog-to-digital conversion method of various embodiments of the present application described above and / or other desired functions. Various contents such as input signals, signal components, noise components, etc. may also be stored in the computer-readable storage media.

[0058] In one example, the electronic device 10 may further include: an input device 13 and an output device 14, and these components are interconnected through a bus system and / or other forms of connection mechanisms (not shown).

[0059] When the electronic device is a stand-alone device, the input device 13 may be a communication network connector for receiving the collected input signals from the first device and the second device.

[0060] In addition, the input device 13 may further include, for example, a keyboard, a mouse, and so on.

[0061] The output device 14 may output various information to the outside, including the determined distance information, direction information, etc. The output device 14 may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, and so on.

[0062] Of course, for simplicity, Figure 4 only some of the components related to the present application in the electronic device 10 are shown, and components such as buses, input / output interfaces, etc. are omitted. In addition, according to specific application scenarios, the electronic device 10 may further include any other appropriate components.

[0063] The computer program product may be written in any combination of one or more programming languages for executing the program code of the operations of the embodiments of the present application. The programming languages include object-oriented programming languages such as Java, C++, etc., and also include conventional procedural programming languages such as the "C" language or similar programming languages. The program code may be executed entirely on the user's computing device, partially on the user's device, executed as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0064] A computer-readable storage medium stores a computer program for executing the method of dual-slope analog-to-digital conversion described in any of the above embodiments.

[0065] The computer-readable storage medium may employ any combination of one or more readable media. The readable media may be a readable signal medium or a readable storage medium. The readable storage medium may, for example, include but is not limited to an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0066] The above description has been given for purposes of illustration and description. In addition, this description is not intended to limit the embodiments of the present application to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions, and sub-combinations thereof.

[0067] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. A dual-slope analog-to-digital converter, characterized in that, Comprising: A digital-to-analog converter for outputting a ramp signal; A comparator, the positive input terminal of the comparator is connected to the output terminal of the digital-to-analog converter, the negative input terminal of the comparator is connected to a photoelectric sensor, and the comparator is used to compare the ramp signal and the photocurrent integration signal; wherein, the photocurrent integration signal is input by the photoelectric sensor; the slope of the photocurrent integration signal is positively correlated with the illumination intensity, the photocurrent integration signal monotonically decreases with the integration time, and the ramp signal includes a single-slope voltage that monotonically increases; A latch, the latch is connected to the digital-to-analog converter and the comparator, and the latch is used to latch the digital signal at the input terminal of the digital-to-analog converter when the comparison result of the comparator indicates that the photocurrent integration signal and the ramp signal are equal, and use the digital signal as the output signal of the analog-to-digital converter.

2. The dual-slope analog-to-digital converter according to claim 1, characterized in that, The dual-slope analog-to-digital converter is used for analog-to-digital conversion of photoelectric signals in the pixel space, and the latch includes an external latch or an internal latch; The external latch is located outside the pixel space; or The internal latch is located inside the pixel space.

3. The dual-slope analog-to-digital converter according to claim 2, wherein, The latch includes an external latch, the output terminals of multiple comparators are connected to a column bus, and the column bus is connected to multiple corresponding external latches; wherein, the digital-to-analog converter is located outside the pixel space and the comparator is located inside the pixel space.

4. The dual-slope analog-to-digital converter according to claim 1, wherein The dual-slope analog-to-digital converter further includes: A reset switch, the reset switch is connected to the negative input terminal of the comparator.

5. The dual-slope analog-to-digital converter according to claim 4, wherein The reset switch is connected in parallel with the photoelectric sensor, and the reset switch and the photoelectric sensor are respectively connected in series with the comparator.

6. A method for dual-slope analog-to-digital conversion, applicable to the dual-slope analog-to-digital converter according to any one of claims 1-5, characterized in that, The method of dual-slope analog-to-digital conversion includes: Obtaining a photocurrent integration signal and a ramp signal; Comparing the photocurrent integration signal and the ramp signal to obtain a comparison result; When the comparison result indicates that the photocurrent integration signal and the ramp signal are equal, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter.

7. The method for dual-slope analog-to-digital conversion according to claim 6, wherein The step of when the comparison result indicates that the photocurrent integration signal and the ramp signal are equal, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter includes: When the comparison result indicates that the photocurrent integration signal and the ramp signal are equal, latching the digital signal at the input terminal of the digital-to-analog converter; Using the latched digital signal as the output signal of the digital-to-analog converter.

8. The method for dual-slope analog-to-digital conversion according to claim 6, wherein Before the step of obtaining the photocurrent integration signal and the ramp signal, the method of dual-slope analog-to-digital conversion further includes: Obtaining a reset signal; According to the reset signal, adjusting the photocurrent integration signal to a reset voltage signal.

9. The method for dual-slope analog-to-digital conversion according to claim 6, wherein The latch includes multiple external latches; the step of comparing the photocurrent integration signal and the ramp signal to obtain a comparison result includes: Obtaining the comparison results of the comparators corresponding to each external latch; Among them, when the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter includes: When the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, output a latch signal to the column bus; The external latch latches the digital signal at the input end of the current digital-to-analog converter according to the latch signal to be used as the output signal of the analog-to-digital converter; The analog-to-digital converter uses the digital signal as the output signal.

10. The method for dual-slope analog-to-digital conversion according to claim 6, characterized in that, Comparing the photocurrent integration signal and the ramp signal to obtain a comparison result includes: When the photocurrent integration signal is greater than the ramp signal, the output result of the comparator is 0; or When the photocurrent integration signal is equal to the ramp signal, the output result of the comparator is 1; Among them, when the comparison result indicates that the photocurrent integration signal is equal to the ramp signal, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter further includes: When the output result of the comparator changes from 0 to 1, using the digital signal corresponding to the current ramp signal as the output signal of the analog-to-digital converter.

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