Semiconductor epitaxial structure

Abstract

The present invention provides a semiconductor epitaxial structure, comprising a silicon carbide substrate, a nucleation layer, a gallium nitride buffer layer and a stacking structure. The nucleation layer is formed on the silicon carbide substrate, the gallium nitride buffer layer is arranged on the nucleation layer, and the stacking structure is formed between the nucleation layer and the gallium nitride buffer layer. The stacking structure comprises: a plurality of layers of silicon nitride (SiN) alternately stacked x ) layer and multilayer aluminum gallium nitride (Al x Ga 1‑x N) layer, wherein a first layer of the multiple silicon nitride layers is in direct contact with the nucleation layer.

Description

Technical Field

[0001] The present invention relates to a semiconductor epitaxial structure, and in particular to a semiconductor epitaxial structure formed by epitaxy on a silicon carbide substrate. Background Art

[0002] Semiconductor epitaxy technology is widely used in the fabrication of various semiconductor devices. To improve epitaxy quality, epitaxy using silicon carbide (SiC) substrates is currently a technique. Furthermore, to withstand the lattice stress caused by lattice mismatch, thicker SiC substrates are often used.

[0003] Because single-crystal silicon carbide growth is extremely difficult, product-grade (prime) silicon carbide substrates are still in short supply. Therefore, if downgraded (down-grade) substrates can be used instead of product-grade substrates, it will not only reduce costs but also increase the number of available substrates.

[0004] However, using a degraded substrate means that the substrate has more defects, which can easily lead to poor epitaxial quality. Summary of the Invention

[0005] The present invention is directed to a semiconductor epitaxial structure, which can reduce substrate costs while achieving the effects of solving epitaxial layer stress problems and improving epitaxial quality.

[0006] According to an embodiment of the present invention, a semiconductor epitaxial structure includes a silicon carbide substrate, a nucleation layer, a gallium nitride buffer layer, and a stacking structure. The nucleation layer is formed on the silicon carbide substrate, the gallium nitride buffer layer is disposed on the nucleation layer, and the stacking structure is formed between the nucleation layer and the gallium nitride buffer layer. The stacking structure includes multiple layers of silicon nitride (SiN) stacked alternately. x ) layer and multilayer aluminum gallium nitride (Al x Ga 1-x N) layer, wherein a first layer of the multiple silicon nitride layers is in direct contact with the nucleation layer.

[0007] In the semiconductor epitaxial structure according to an embodiment of the present invention, the stacked structure is composed of N or (N+1) silicon nitride layers and N aluminum gallium nitride layers, where N is an integer greater than 2.

[0008] In the semiconductor epitaxial structure according to the embodiment of the present invention, the thickness of each layer of the multi-layer silicon nitride layer gradually decreases from the nucleation layer toward the gallium nitride buffer layer.

[0009] In the semiconductor epitaxial structure according to the embodiment of the present invention, each layer of the multi-layer aluminum gallium nitride layer has a uniform aluminum content, and the aluminum content decreases layer by layer from the nucleation layer toward the gallium nitride buffer layer.

[0010] In the semiconductor epitaxial structure according to the embodiment of the present invention, the thickness of the first layer in the multi-layer silicon nitride layer is between 20 nm and 100 nm.

[0011] In the semiconductor epitaxial structure according to the embodiment of the present invention, the nucleation layer is an aluminum nitride (AlN) nucleation layer and has a thickness between 50 nm and 200 nm.

[0012] In the semiconductor epitaxial structure according to an embodiment of the present invention, the stacked structure is composed of multiple superlattice (SLs) layers, each of which is composed of a silicon nitride layer and an aluminum gallium nitride layer. The aluminum gallium nitride layer is composed of a first aluminum gallium nitride thin film and a second aluminum gallium nitride thin film, and the first aluminum gallium nitride thin film is located between the second aluminum gallium nitride thin film and the silicon nitride layer.

[0013] In the semiconductor epitaxial structure according to the embodiment of the present invention, the stacked structure accounts for 40% to 60% of the total thickness of the semiconductor epitaxial structure.

[0014] In the semiconductor epitaxial structure according to the embodiment of the present invention, the ratio of the thickness of the first aluminum gallium nitride film to the thickness of the second aluminum gallium nitride film is from 1:2 to 1:10.

[0015] In the semiconductor epitaxial structure according to the embodiment of the present invention, the aluminum content of the first aluminum gallium nitride film is higher than the aluminum content of the second aluminum gallium nitride film.

[0016] In the semiconductor epitaxial structure according to the embodiment of the present invention, the thickness of each superlattice layer is between 20 nm and 50 nm.

[0017] In the semiconductor epitaxial structure according to the embodiment of the present invention, the thickness of the silicon nitride layer in the superlattice layer is between 1 nm and 20 nm.

[0018] In the semiconductor epitaxial structure according to an embodiment of the present invention, the nucleation layer is an aluminum nitride (AlN) nucleation layer and has a thickness between 1 nm and 100 nm.

[0019] In the semiconductor epitaxial structure according to the embodiment of the present invention, the thickness of the silicon carbide substrate is between 100 μm and 350 μm.

[0020] In the semiconductor epitaxial structure according to the embodiment of the present invention, the basal plane dislocation (BPD) density of the silicon carbide substrate is 3000 cm -2 ~6000cm -2 between.

[0021] Based on the above, the present invention utilizes a thinner silicon carbide substrate with more defects, and combines it with a specific stacking structure between the nucleation layer and the gallium nitride buffer layer to prevent defects from affecting the growing epitaxial layer, thereby reducing dislocations in the epitaxial layer, thereby improving epitaxial quality, and also taking into account cost considerations.

[0022] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1A is a schematic cross-sectional view of a semiconductor epitaxial structure according to a first embodiment of the present invention;

[0024] Figure 1B is a cross-sectional schematic diagram of another semiconductor epitaxial structure of the first embodiment;

[0025] Figure 2 is a schematic cross-sectional view of a semiconductor epitaxial structure according to a second embodiment of the present invention;

[0026] Figure 3 is a schematic cross-sectional view of a semiconductor epitaxial structure according to a third embodiment of the present invention;

[0027] Figure 4A is a schematic cross-sectional view of a superlattice layer in the semiconductor epitaxial structure of the third embodiment;

[0028] Figure 4B FIG. 4 is a schematic cross-sectional view of another superlattice layer in the semiconductor epitaxial structure of the third embodiment.

[0029] Description of Reference Numerals

[0030] 10a, 10b, 20, 30: Semiconductor epitaxial structure

[0031] 100: Silicon carbide substrate

[0032] 102: Nucleation layer

[0033] 104, 200, 300: stacked structure

[0034] 106: Gallium nitride buffer layer

[0035] 1081, 108 N , 108 N+1 、2021、202 N 304: Silicon nitride layer

[0036] 1101, 110 N 306: Aluminum gallium nitride layer

[0037] 302: Superlattice layer

[0038] 308: First aluminum gallium nitride film

[0039] 310: Second aluminum gallium nitride film

[0040] t1, t2, T1, T1', T21, T2 N 、T3、T4、T5、T sub 、T total :thickness DETAILED DESCRIPTION

[0041] The following examples are described in detail with reference to the accompanying drawings. However, these examples are not intended to limit the scope of the present invention. Furthermore, the drawings are for illustrative purposes only and are not drawn to scale. For ease of understanding, identical elements will be referenced with the same reference numerals throughout the following description.

[0042] Figure 1A FIG. 1 is a schematic cross-sectional view of a semiconductor epitaxial structure according to a first embodiment of the present invention.

[0043] Please refer to Figure 1A The semiconductor epitaxial structure 10a includes a silicon carbide substrate 100, a nucleation layer 102, a stacking structure 104, and a gallium nitride buffer layer 106. The nucleation layer 102 is formed on the silicon carbide substrate 100, the gallium nitride buffer layer 106 is disposed on the nucleation layer 102, and the stacking structure 104 is formed between the nucleation layer 102 and the gallium nitride buffer layer 106. The stacking structure 104 includes multiple layers of silicon nitride (SiN) stacked alternately. x ) Layer 108 1～N Multilayer aluminum gallium nitride (AlGaN) x Ga 1-x N) layer 110 1～N , wherein the multilayer silicon nitride layer 108 1～N The first layer 1081 in the stacked structure 104 is in direct contact with the nucleation layer 102. In the first embodiment, the stacked structure 104 may be composed of N layers of silicon nitride layer 108. 1～N and the N-layer aluminum gallium nitride layer 110 1～N or Figure 1B As shown in the semiconductor epitaxial structure 10b, the stacked structure 104 is composed of (N+1) layers of silicon nitride layer 108 1～N+1 and the N-layer aluminum gallium nitride layer 110 1～N N is an integer greater than 2, such as greater than 3, greater than 4, etc. The presence of the stacked structure 104 effectively prevents defects from affecting the subsequent epitaxially grown film layer, thereby reducing dislocations in the epitaxial layer. This facilitates the application of the semiconductor epitaxial structure 10a in epitaxially grown semiconductor devices.

[0044] In this embodiment, the multi-layer aluminum gallium nitride layer 1101～N Each layer can have a uniform aluminum content, and the aluminum content decreases layer by layer from the nucleation layer 102 to the gallium nitride buffer layer 106, so that the lattice constant and the energy gap can be in a step or continuous state, so that the aluminum gallium nitride layer 110 1～N The lattice constant and energy gap of the first AlGaN layer 1101 are close to those of the upper GaN buffer layer 106. In other words, the aluminum content of the first AlGaN layer 1101 is 1～N The highest one (such as AlN), and the Nth layer of aluminum gallium nitride layer 110 N The aluminum content of the multilayer aluminum gallium nitride layer 110 1～N The lowest one (such as GaN); and so on.

[0045] Please continue to refer to Figure 1A , the thickness T of the silicon carbide substrate 100 of the first embodiment sub It can be between 100μm and 350μm, for example, between 150μm and 300μm, preferably between 175μm and 275μm. Since the first embodiment has a stacking structure 104 that can adjust stress and block defects, a substrate thinner than the previous silicon carbide substrate with a thickness of more than 500μm can be used, so that the cost can be greatly reduced. The silicon carbide substrate 100 may include a single crystal silicon carbide substrate, an N-type silicon carbide substrate or a semi-insulating (SI) silicon carbide substrate. In this embodiment, due to the existence of the stacking structure 104, a downgraded silicon carbide substrate can be selected without affecting the subsequent epitaxial growth of the film layer. Therefore, the silicon carbide substrate 100 can have a higher basal plane dislocation (BPD) density, such as at 3000cm -2 ~6000cm -2 Between, or at 3000cm -2 ~5000cm -2 Between, or even at 3000cm -2 ~4500cm -2 The nucleation layer 102 may be, for example, an aluminum nitride (AlN) nucleation layer, and may have a thickness T1 between 50 nm and 200 nm, such as between 100 nm and 200 nm, preferably between 150 nm and 200 nm. The gallium nitride buffer layer 106 may be, for example, carbon-doped gallium nitride (C:GaN) or iron-doped gallium nitride (Fe:GaN).

[0046] Figure 2 This is a cross-sectional schematic diagram of a semiconductor epitaxial structure according to the second embodiment of the present invention, in which the same figure marks as the first embodiment are used to represent the same or similar parts, structures or size definitions, and the descriptions of the same parts, structures or size definitions can refer to the first embodiment and will not be repeated here.

[0047] Please refer to Figure 2 The semiconductor epitaxial structure 20 of the second embodiment includes a silicon carbide substrate 100, a nucleation layer 102, a stacked structure 200, and a gallium nitride buffer layer 106. The silicon carbide substrate 100, the nucleation layer 102, and the gallium nitride buffer layer 106 can refer to the description of the first embodiment. The stacked structure 200 also includes multiple layers of silicon nitride (SiN) stacked alternately. x ) Layer 202 1～N Multilayer aluminum gallium nitride (AlGaN) x Ga 1-x N) layer 110 1～N , and the first silicon nitride layer 2021 is in direct contact with the nucleation layer 102. The difference between the semiconductor epitaxial structure 20 and the first embodiment is that the multilayer silicon nitride layer 202 1～N The thickness of each layer becomes thinner layer by layer from the nucleation layer 102 to the gallium nitride buffer layer 106. Since the bottom layer may have more defect problems, a thicker bottom layer can keep the flatness of the epitaxial surface unaffected, so the bottom layer is thicker and the thickness can be thinner toward the gallium nitride buffer layer 106. In other words, the thickness T21 of the first silicon nitride layer 2021 is the thickest, for example, between 20nm and 100nm, preferably between 30nm and 100nm, and more preferably between 40nm and 100nm. If the thickness T21 is greater than 100nm, there may be surface roughness problems; if the thickness T21 is less than 20nm, the defect blocking effect may be poor. However, the present invention is not limited to this, and the above-mentioned thickness T21 can be adjusted according to the total thickness of the epitaxial growth. The thinner the total thickness, the thinner the first silicon nitride layer 2021 grown. On the other hand, the Nth silicon nitride layer 202 N Thickness T2 N The thinnest is, for example, between 1 nm and 20 nm, preferably between 1 nm and 15 nm, and more preferably between 1 nm and 10 nm. In another embodiment, if the stacked structure 200 has N+1 silicon nitride layers 202 1～N+1 , then the N+1th silicon nitride layer 202 N+1 is the thinnest; and so on.

[0048] Figure 3 This is a cross-sectional schematic diagram of a semiconductor epitaxial structure according to the third embodiment of the present invention, in which the same figure marks as the first embodiment are used to represent the same or similar parts, structures or size definitions, and the descriptions of the same parts, structures or size definitions can refer to the first embodiment and will not be repeated here.

[0049] Please refer to Figure 3The semiconductor epitaxial structure 30 of the third embodiment includes a silicon carbide substrate 100, a nucleation layer 102, a stacked structure 300, and a gallium nitride buffer layer 106. The silicon carbide substrate 100, the nucleation layer 102, and the gallium nitride buffer layer 106 can refer to the description of the first embodiment. The stacked structure 300 is composed of multiple superlattice (SLs) layers 302. Each superlattice layer 302 is composed of a layer of silicon nitride (SiN x ) layer 304 and a layer of aluminum gallium nitride (Al x Ga 1-x The silicon nitride layer 304 comprises a first aluminum gallium nitride film 308 and a second aluminum gallium nitride film 310. The first aluminum gallium nitride film 308 is located between the second aluminum gallium nitride film 310 and the silicon nitride layer 304. The aluminum content of the first aluminum gallium nitride film 308 is, for example, higher than that of the second aluminum gallium nitride film 310. In other words, in each superlattice layer 302, the aluminum content of the first aluminum gallium nitride film 308 near the nucleation layer 102 is higher, while the aluminum content of the second aluminum gallium nitride film 310 near the gallium nitride buffer layer 106 is lower. The aluminum content of the first aluminum gallium nitride film 308 is, for example, between 50% and 100%, preferably between 60% and 100%, and more preferably between 70% and 100%. The aluminum content of the second aluminum gallium nitride film 310 is, for example, between 0% and 50%, preferably between 0% and 40%, and more preferably between 0% and 30%.

[0050] In this embodiment, the thickness T3 of the stacked structure 300 accounts for the total thickness T total The stack structure 300 is mainly used to provide stress adjustment and improve the pressure resistance, so the thickness T3 accounts for 40% to 60% of the total thickness T total If the ratio is less than 40%, it may impact the withstand voltage and stress; if it is greater than 60%, there is a disadvantage of too long epitaxial time. The thickness T4 of each superlattice layer 302 can be between 20nm and 50nm, and the stress control is better, for example, between 20nm and 40nm, and preferably between 20nm and 30nm. As for the thickness T5 of the silicon nitride layer 304 in each superlattice layer 302, it can be between 1nm and 20nm, for example, between 5nm and 20nm, and preferably between 10nm and 20nm. Moreover, the thickness T5 can also be reduced as it approaches the gallium nitride buffer layer 106, which is beneficial to avoid the problem of easy surface roughness. The ratio of the thickness t1 of the first aluminum gallium nitride film 308 to the thickness t2 of the second aluminum gallium nitride film 310 can be 1:2 to 1:10, for example Figure 4A The ratio of the thickness t1 to the thickness t2 of a single superlattice layer 302 is about 1:2. Figure 4BThe figure shows a ratio of thickness t1 to thickness t2 of a single superlattice layer 302 of approximately 1:10. Because the first AlGaN film 308 near the nucleation layer 102 in each superlattice layer 302 has a higher aluminum content, while the second AlGaN film 310 near the GaN buffer layer 106 has a lower aluminum content, a closer ratio of thickness t1 to thickness t2 to 1:2 indicates a thicker second AlGaN film 310 with a lower aluminum content (closer to GaN), which is beneficial for epitaxial growth quality. Conversely, a closer ratio of thickness t1 to thickness t2 to 1:10 indicates a thicker first AlGaN film 308 with a higher aluminum content, which is beneficial for stress control.

[0051] Since the stacked structure 300 is composed of multiple superlattice layers 302, and the superlattice structure has a stronger modulation capability, the semiconductor epitaxial structure 30 of the third embodiment is more suitable for using a degraded silicon carbide substrate as the silicon carbide substrate 100 compared to the structures of the first and second embodiments, and the thickness T1' of the nucleation layer 102 can also be thinner than the nucleation layer in the first and second embodiments. The thickness T1' of the nucleation layer 102 is, for example, between 1 nm and 100 nm, preferably between 5 nm and 100 nm, and more preferably between 10 nm and 100 nm.

[0052] In summary, the semiconductor epitaxial structure of the present invention can utilize thinner silicon carbide substrates with more defects, significantly reducing substrate costs. Furthermore, the semiconductor epitaxial structure of the present invention also features a specialized stacking structure between the nucleation layer and the gallium nitride buffer layer to prevent defects from affecting the subsequently grown epitaxial layer, thereby reducing dislocations in the epitaxial layer and improving epitaxial quality while also addressing cost considerations.

[0053] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A semiconductor epitaxial structure, characterized in that: include: Silicon carbide substrate, wherein the basal plane dislocation density of the silicon carbide substrate is 3000cm -2 ~6000cm -2 between; a nucleation layer formed on the silicon carbide substrate; a gallium nitride buffer layer, disposed on the nucleation layer; as well as A stacked structure is formed between the nucleation layer and the gallium nitride buffer layer, and the stacked structure includes: a multilayer silicon nitride layer, wherein a first layer of the multilayer silicon nitride layer is in direct contact with the nucleation layer; as well as Multiple aluminum gallium nitride layers are alternately stacked with the multiple silicon nitride layers.

2. The semiconductor epitaxial structure according to claim 1, wherein: The stacked structure is composed of N layers or (N+1) layers of the silicon nitride layer and N layers of the aluminum gallium nitride layer, where N is an integer greater than 2.

3. The semiconductor epitaxial structure according to claim 2, wherein: The thickness of each layer of the multi-layer silicon nitride layer gradually becomes thinner from the nucleation layer toward the gallium nitride buffer layer.

4. The semiconductor epitaxial structure according to claim 2, wherein: Each layer of the multi-layer aluminum gallium nitride layer has a uniform aluminum content, and the aluminum content decreases layer by layer from the nucleation layer to the gallium nitride buffer layer.

5. The semiconductor epitaxial structure according to claim 2, wherein: The thickness of the first layer in the multi-layer silicon nitride layer is between 20 nm and 100 nm.

6. The semiconductor epitaxial structure according to claim 2, wherein: The nucleation layer is an aluminum nitride nucleation layer and has a thickness between 50 nm and 200 nm.

7. The semiconductor epitaxial structure according to claim 1, wherein: The stacked structure is composed of multiple superlattice layers, each of which is composed of a silicon nitride layer and an aluminum gallium nitride layer. The aluminum gallium nitride layer is composed of a first aluminum gallium nitride film and a second aluminum gallium nitride film, and the first aluminum gallium nitride film is located between the second aluminum gallium nitride film and the silicon nitride layer.

8. The semiconductor epitaxial structure according to claim 7, wherein: The stacked structure accounts for 40% to 60% of the total thickness of the semiconductor epitaxial structure.

9. The semiconductor epitaxial structure according to claim 7, wherein: The ratio of the thickness of the first aluminum gallium nitride film to the thickness of the second aluminum gallium nitride film is from 1:2 to 1:

10.

10. The semiconductor epitaxial structure according to claim 7, wherein: The aluminum content of the first aluminum gallium nitride film is higher than the aluminum content of the second aluminum gallium nitride film.

11. The semiconductor epitaxial structure according to claim 7, wherein: The thickness of each superlattice layer is between 20nm and 50nm.

12. The semiconductor epitaxial structure according to claim 7, wherein: The thickness of the silicon nitride layer in the superlattice layer is between 1 nm and 20 nm.

13. The semiconductor epitaxial structure according to claim 7, wherein: The nucleation layer is an aluminum nitride nucleation layer and has a thickness between 1 nm and 100 nm.

14. The semiconductor epitaxial structure according to claim 1, wherein: The thickness of the silicon carbide substrate is between 100 μm and 350 μm.

Images