Wafer placement stage

Abstract

A wafer placement stage that prevents breakage caused by thermal stress. The wafer placement stage (10) includes: a central ceramic substrate (20) having a wafer placement surface (20a) on its upper surface and having electrodes (22) built therein; an outer peripheral ceramic substrate (25) having a focus ring placement surface (25a) on its upper surface; a cooling substrate (30) having a central portion (31) joined to the lower surface of the central ceramic substrate and an outer peripheral portion (35) joined to the lower surface of the outer peripheral ceramic substrate, and having a connecting portion (40) that connects the central portion and the outer peripheral portion. The cooling substrate has: a central refrigerant flow path (32) provided in the central portion, an outer peripheral refrigerant flow path (37) provided in the outer peripheral portion, and the connecting portion has an annular upper groove (42) that is open on the upper surface and an annular lower groove (44) that is open on the lower surface and whose top surface (44c) is higher than the bottom surface (42b) of the upper groove in a portion that is more on the outer peripheral side than the outermost edge of the central refrigerant flow path and more on the inner peripheral side than the innermost edge of the outer peripheral refrigerant flow path.

Description

Technical Field

[0001] The present invention relates to a wafer stage. Background Art

[0002] Conventionally, in order to perform CVD, etching, etc. on a wafer using plasma, a wafer stage is employed. The wafer stage includes an electrostatic chuck for adsorbing and fixing the wafer to a wafer mounting surface, and a cooling base material for cooling the electrostatic chuck. A focus ring is sometimes provided on the outer periphery of the wafer mounting surface. The focus ring is placed on a focus ring mounting surface lower than the wafer mounting surface, and has a function of stably generating plasma up to the outer peripheral edge of the wafer and a function of controlling the temperature of the outer peripheral edge of the wafer. In order to separately control the temperatures of the wafer mounting surface and the focus ring mounting surface, a central refrigerant flow path for the wafer and an outer peripheral refrigerant flow path for the focus ring are sometimes provided inside the cooling base material, and the temperatures of the refrigerants flowing through the respective refrigerant flow paths are adjusted separately. As the above-described wafer stage, there is known a wafer stage in which the electrostatic chuck is separated into a central ceramic base material having a wafer mounting surface and an outer peripheral ceramic base material having a focus ring mounting surface, and one upper groove that opens on the upper surface of the cooling base material is provided in a ring shape along the boundary between the central ceramic base material and the outer peripheral ceramic base material (for example, Patent Documents 1 to 4).

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: Japanese Patent No. 6080571

[0006] Patent Document 2: Japanese Patent No. 6452449

[0007] Patent Document 3: Japanese Patent No. 6442296

[0008] Patent Document 4: Japanese Patent No. 6741461 Summary of the Invention

[0009] However, in the cooling base material provided with one upper groove described above, at the connecting portion connecting the central portion and the outer peripheral portion of the cooling base material, only the bottom of the upper groove becomes a heat transfer path. Therefore, if a temperature difference is generated between the central portion and the outer peripheral portion of the cooling base material, the thermal stress caused by the temperature difference may be applied to the bottom of the upper groove, resulting in breakage of the connecting portion.

[0010] The present invention has been made to solve the above problems, and its main object is to prevent breakage due to thermal stress in an integrated wafer stage having a wafer mounting surface and a focus ring mounting surface.

[0011] The wafer stage of the present invention includes:

[0012] A central ceramic substrate having a wafer placement surface on its upper surface and having electrodes built therein;

[0013] A ring-shaped outer peripheral ceramic substrate having a focusing ring placement surface on its upper surface and disposed separately from the central ceramic substrate on the outer periphery of the central ceramic substrate; and

[0014] A cooling substrate having a central portion joined to the lower surface of the central ceramic substrate and an outer peripheral portion joined to the lower surface of the outer peripheral ceramic substrate, and having a connecting portion connecting the central portion and the outer peripheral portion,

[0015] The cooling substrate has: a central refrigerant flow path provided in the central portion and an outer peripheral refrigerant flow path provided in the outer peripheral portion,

[0016] The connecting portion is provided in a portion that is more on the outer peripheral side than the outermost edge of the central refrigerant flow path and more on the inner peripheral side than the innermost edge of the outer peripheral refrigerant flow path, and has one or more annular upper grooves that are open on the upper surface and annular lower grooves that are open on the lower surface and whose top surface is higher than the bottom surface of the upper groove.

[0017] In this wafer placement table, not only is there an upper groove that is open on the upper surface, but also a lower groove that is open on the lower surface, and the top surface of the lower groove is higher than the bottom surface of the upper groove. Therefore, for the heat transfer path at the connecting portion between the central portion and the outer peripheral portion, the path in the vertical direction becomes longer. Accordingly, the temperature gradient at the connecting portion becomes smaller, the thermal stress generated at the connecting portion is reduced, and thus breakage caused by thermal stress is suppressed. In addition, since this wafer placement table is an integral type, it is easier to operate compared to the case where the central portion and the outer peripheral portion are separate.

[0018] It should be noted that in this specification, the present invention is sometimes described using up and down, left and right, front and back, etc. However, up and down, left and right, front and back are merely relative positional relationships. Therefore, when the orientation of the wafer placement table is changed, up may become left and right, and left and right may become up, and this situation is also included in the technical scope of the present invention.

[0019] In the wafer placement table of the present invention, the central refrigerant flow path and the outer peripheral refrigerant flow path can supply refrigerant independently of each other. Accordingly, the temperatures of the wafer placement surface provided above the central refrigerant flow path and the focusing ring placement surface provided above the outer peripheral refrigerant flow path can be controlled independently.

[0020] In the wafer stage of the present invention, the upper groove may be provided beside at least one of the central refrigerant flow path and the outer peripheral refrigerant flow path, and the bottom surface of the upper groove is at the same height as the bottom surfaces of the central refrigerant flow path and the outer peripheral refrigerant flow path, or lower than the bottom surfaces of the central refrigerant flow path and the outer peripheral refrigerant flow path. Accordingly, since the bottom surface of the upper groove is disposed in a portion where the temperature is stabilized by refrigerant cooling, compared with the case where the bottom surface of the upper groove is disposed in a portion higher than this, breakage caused by thermal stress can be further suppressed.

[0021] In the wafer stage of the present invention, the connecting portion may have one upper groove and one lower groove each. Accordingly, since the number of upper grooves and the number of lower grooves are minimized, an increase in processing cost can be suppressed. In addition, the portion where the refrigerant flow path cannot be disposed can be reduced, and thus, the degree of freedom in arranging the refrigerant flow path can be increased.

[0022] In the wafer stage of the present invention, the connecting portion may have two upper grooves and one lower groove, and the upper grooves and the lower groove are alternately arranged. Accordingly, compared with the case where each of the upper groove and the lower groove has one, the connecting portion can be made longer, and thus, the thermal stress generated in the connecting portion can be further reduced. In addition, since the structure is such that upper grooves are provided beside both the central refrigerant flow path and the outer peripheral refrigerant flow path, compared with the case where one or both of them are provided with lower grooves beside, the central portion and the outer peripheral portion can be connected by low-position portions that are cooled by refrigerant and have relatively stable temperatures. Therefore, breakage caused by thermal stress can be further suppressed.

[0023] In the wafer stage of the present invention, the cooling base material may be made of a metal matrix composite material. Since the wafer stage of the present invention can suppress breakage caused by thermal stress, it is particularly effective for the case where a relatively brittle material such as a metal matrix composite material is used. The linear thermal expansion coefficient of the cooling base material made of a metal matrix composite material is close to the ceramic material constituting the ceramic base material. Therefore, when the ceramic base material and the cooling base material are joined, a layer (for example, a resin bonding layer) for mitigating the influence of the difference in expansion coefficient between the two is not required, and a metal bonding layer can be used. The metal bonding layer has a higher thermal conductivity than the resin bonding layer, and thus, the heat dissipation ability required when processing a wafer using high-power plasma can be achieved. Description of the Drawings

[0024] Figure 1 is a longitudinal sectional view of the wafer stage 10.

[0025] Figure 2 is a plan view of the wafer stage 10.

[0026] Figure 3 is a cross-sectional view of the wafer stage 10.

[0027] Figure 4 It is an explanatory diagram of a heat transfer path X at a connecting portion 40 between a central portion 31 and a peripheral portion 35.

[0028] Figure 5 It is a partial cross-sectional view of another example of the wafer stage 10.

[0029] Figure 6 It is a partial cross-sectional view of another example of the wafer stage 10.

[0030] Figure 7 It is a partial cross-sectional view of another example of the wafer stage 10.

[0031] Figure 8 It is a partial cross-sectional view of another example of the wafer stage 10.

[0032] Figure 9 It is a partial cross-sectional view of another example of the wafer stage 10.

[0033] Explanation of symbols

[0034] 10... wafer stage, 20... central ceramic substrate, 20a... wafer placement surface, 22... central electrode, 25... peripheral ceramic substrate, 25a... focus ring placement surface, 27... peripheral electrode, 30... cooling substrate, 31... central portion, 32... central refrigerant flow path, 32b... bottom surface, 32c... top surface, 33... inlet, 34... outlet, 35... peripheral portion, 37... peripheral refrigerant flow path, 37b... bottom surface, 37c... top surface, 38... inlet, 39... outlet, 40... connecting portion, 42... upper groove, 42b... bottom surface, 44... lower groove, 44a... low surface (upper surface), 44c... top surface, 46... upper groove, 46b... bottom surface, 50... central bonding layer, 55... peripheral bonding layer, 60... power supply terminal, 61... insulating tube, 65... power supply terminal, 66... insulating tube, 70... power supply terminal, 131... upper member, 132... lower member, 135... bonding layer, W... wafer, FR... focus ring, X... heat transfer path. Detailed implementation manners

[0035] Hereinafter, with reference to the accompanying drawings, preferred implementation manners of the present invention will be described. Figure 1 It is a longitudinal cross-sectional view of the wafer stage 10 (a cross-sectional view when cut along a plane including the central axis of the wafer stage 10), Figure 2 It is a plan view of the wafer stage 10, Figure 3 It is a cross-sectional view of the wafer stage 10 (a cross-sectional view when observing from above and cutting the wafer stage 10 along a horizontal plane passing through the refrigerant flow paths 32 and 37), Figure 4It is an explanatory diagram of the heat transfer path X at the connecting portion 40 between the central portion 31 and the outer peripheral portion 35.

[0036] The wafer stage 10 is a component used when performing CVD, etching, etc. on the wafer W using plasma. The wafer stage 10 includes: a central ceramic substrate 20, an outer peripheral ceramic substrate 25, and a cooling substrate 30. The central ceramic substrate 20 is joined to the upper surface of the cooling substrate 30 by a central joining layer 50, and the outer peripheral ceramic substrate 25 is joined to the upper surface of the cooling substrate 30 by an outer peripheral joining layer 55, thereby forming an integrated wafer stage 10.

[0037] The central ceramic substrate 20 is a disc-shaped plate formed of a ceramic material represented by alumina, aluminum nitride, etc. The central ceramic substrate 20 has a wafer placement surface 20a on the upper surface for placing the wafer W. The central ceramic substrate 20 internally has a central electrode 22 on the side closer to the wafer placement surface 20a. The central electrode 22 is a circular, plate-shaped or mesh-shaped monopolar electrostatic adsorption electrode, and is formed of a material containing W, Mo, WC, MoC, etc., for example. The layer of the central ceramic substrate 20 above the central electrode 22 functions as a dielectric layer. The central electrode 22 is connected to a DC power supply (not shown) via a power supply terminal 60. The power supply terminal 60 is arranged to pass through an insulating tube 61 disposed in a through hole penetrating the cooling substrate 30 and the central joining layer 50 in the vertical direction, and reach the central electrode 22 from the lower surface of the central ceramic substrate 20.

[0038] The outer peripheral ceramic substrate 25 is an annular plate formed of a ceramic material represented by alumina, aluminum nitride, etc. The outer peripheral ceramic substrate 25 has a focus ring placement surface 25a on the upper surface for placing the focus ring FR. The outer peripheral ceramic substrate 25 is disposed on the outer periphery of the central ceramic substrate 20, and the position of the focus ring placement surface 25a is lower than that of the wafer placement surface 20a. The outer peripheral ceramic substrate 25 internally has an outer peripheral electrode 27 on the side closer to the focus ring placement surface 25a. The outer peripheral electrode 27 is a circular, plate-shaped or mesh-shaped monopolar electrostatic adsorption electrode, and is formed of a material containing W, Mo, WC, MoC, etc., for example. The layer of the outer peripheral ceramic substrate 25 above the outer peripheral electrode 27 functions as a dielectric layer. The outer peripheral electrode 27 is connected to a DC power supply (not shown) via a power supply terminal 65. The power supply terminal 65 is arranged to pass through an insulating tube 66 disposed in a through hole penetrating the cooling substrate 30 and the outer peripheral joining layer 55 in the vertical direction, and reach the outer peripheral electrode 27 from the lower surface of the outer peripheral ceramic substrate 25.

[0039] The cooling base material 30 is a circular plate member made of a metal matrix composite (also referred to as a Metal Matrix Composite (MMC)). The cooling base material 30 has a central refrigerant flow path 32 and a peripheral refrigerant flow path 37 inside for the circulation of the refrigerant. The central refrigerant flow path 32 is spirally provided from the inlet 33 to the outlet 34 so as to cover the entire area where the central ceramic base material 20 is disposed. The inlet 33 and the outlet 34 of the central refrigerant flow path 32 are connected to a central refrigerant cooling device (not shown). The refrigerant discharged from the outlet 34 is temperature-adjusted by the central refrigerant cooling device and then returns to the inlet 33 again and is supplied into the central refrigerant flow path 32. The peripheral refrigerant flow path 37 is spirally provided from the inlet 38 to the outlet 39 so as to cover the entire area where the peripheral ceramic base material 25 is disposed. The inlet 38 and the outlet 39 of the peripheral refrigerant flow path 37 are connected to a peripheral refrigerant cooling device (not shown) different from the central refrigerant cooling device. The refrigerant discharged from the outlet 39 is temperature-adjusted by the peripheral refrigerant cooling device and then returns to the inlet 38 again and is supplied into the peripheral refrigerant flow path 37. In this way, the central refrigerant flow path 32 and the peripheral refrigerant flow path 37 are respectively connected to different refrigerant cooling devices and the refrigerant is supplied independently. Accordingly, the temperatures of the central portion 31 and the peripheral portion 35 of the cooling base material 30 are independently controlled, and further, the temperatures of the wafer mounting surface 20a and the focus ring mounting surface 25a are independently controlled. The cooling base material 30 also functions as a high-frequency (RF) electrode for plasma generation and is connected to an RF power supply (not shown) via a power supply terminal 70. The power supply terminal 70 is joined to the lower surface of the cooling base material 30.

[0040] The cooling base material 30 has a connecting portion 40 in a portion that is more on the outer peripheral side than the outermost edge of the central refrigerant flow path 32 and more on the inner peripheral side than the innermost edge of the peripheral refrigerant flow path 37. The connecting portion 40 has an upper groove 42 that is open on the upper surface and a lower groove 44 that is open on the lower surface. The upper groove 42 is annularly provided at a position adjacent to the central refrigerant flow path 32 (that is, more on the inner peripheral side than the lower groove 44) from the upper surface of the cooling base material 30 to a bottom surface 42b that is at the same height as the bottom surface 32b of the central refrigerant flow path 32 and the bottom surface 37b of the peripheral refrigerant flow path 37 or lower than the bottom surface 32b of the central refrigerant flow path 32 and the bottom surface 37b of the peripheral refrigerant flow path 37. The lower groove 44 is annularly provided at a position adjacent to the peripheral refrigerant flow path 37 (that is, more on the outer peripheral side than the upper groove 42) from the lower surface of the cooling base material 30 to a top surface 44c that is at the same height as the top surface 32c of the central refrigerant flow path 32 and the top surface 37c of the peripheral refrigerant flow path 37 or higher than the top surface 32c of the central refrigerant flow path 32 and the top surface 37c of the peripheral refrigerant flow path 37. In the present embodiment, the portion of the cooling base material 30 that is more on the inner peripheral side than the inner edge of the upper groove 42 is the central portion 31, the portion that is more on the outer peripheral side than the outer edge of the lower groove 44 is the peripheral portion 35, and the intermediate portion is the connecting portion 40.

[0041] The MMC used for the cooling substrate 30 is preferably a material having a coefficient of thermal expansion similar to that of the ceramic material used for the central ceramic substrate 20 and the ceramic material used for the outer peripheral ceramic substrate 25. Examples of the MMC include a material containing Si, SiC, and Ti, a material obtained by impregnating SiC porous body with Al and / or Si, etc. The material containing Si, SiC, and Ti is referred to as SiSiCTi, the material obtained by impregnating SiC porous body with Al is referred to as AlSiC, and the material obtained by impregnating SiC porous body with Si is referred to as SiSiC. When the central ceramic substrate 20 and the outer peripheral ceramic substrate 25 are alumina substrates, AlSiC, SiSiCTi, etc. are preferably used as the MMC for the cooling substrate 30. In addition, when the central ceramic substrate 20 and the outer peripheral ceramic substrate 25 are aluminum nitride substrates, AlSiC, SiSiC, etc. are preferably used as the MMC for the cooling substrate 30.

[0042] The central bonding layer 50 is a metal bonding layer that bonds the lower surface of the central ceramic substrate 20 and the upper surface of the central portion 31 of the cooling substrate 30. The central bonding layer 50 can be, for example, a layer formed of solder or metal brazing material. The central bonding layer 50 can also be a layer formed of, for example, an Al-Mg based bonding material, an Al-Si-Mg based bonding material. The thickness of the central bonding layer 50 is preferably about 100 μm, for example. The central bonding layer 50 is formed by, for example, TCB (Thermal compression bonding). TCB refers to a well-known method in which a metal bonding material is sandwiched between two components to be bonded, and the two components are pressure-bonded in a state where they are heated to a temperature below the solidus temperature of the metal bonding material.

[0043] The outer peripheral bonding layer 55 is a metal bonding layer that bonds the lower surface of the outer peripheral ceramic substrate 25 and the upper surface of the outer peripheral portion 35 of the cooling substrate 30. The outer peripheral bonding layer 55 can be, for example, a layer formed of solder or metal brazing material. The outer peripheral bonding layer 55 can also be a layer formed of, for example, an Al-Mg based bonding material, an Al-Si-Mg based bonding material. The thickness of the outer peripheral bonding layer 55 is preferably about 100 μm, for example. The outer peripheral bonding layer 55 is formed by, for example, TCB.

[0044] Next, a usage example of the wafer stage 10 will be described. First, with the wafer stage 10 disposed in a chamber (not shown), a wafer W is placed on the wafer placement surface 20a, and a focus ring FR is placed on the focus ring placement surface 25a. The focus ring FR has a step along the inner circumference of its upper end so as not to interfere with the wafer W. In this state, a DC voltage is applied to the central electrode 22 and the outer peripheral electrode 27 respectively, so that the wafer W is adsorbed to the wafer placement surface 20a, and the focus ring FR is adsorbed to the focus ring placement surface 25a. Then, the inside of the chamber is set to a prescribed vacuum atmosphere (or reduced pressure atmosphere), and while supplying a process gas from a shower head (not shown) provided at the top in the chamber, an RF voltage is applied to the cooling base 30. As a result, plasma is generated between the wafer W and the shower head. Then, using this plasma, CVD film formation or etching is performed on the wafer W.

[0045] During the plasma treatment of the wafer W, a coolant is independently supplied from the central coolant cooling device to the central coolant flow path 32 and from the outer peripheral coolant cooling device to the outer peripheral coolant flow path 37. Accordingly, the temperatures of the wafer placement surface 20a provided above the central coolant flow path 32 and the focus ring placement surface 25a provided above the outer peripheral coolant flow path 37 are independently controlled (cooled). At this time, in the cooling base 30, since the central portion 31 provided with the central coolant flow path 32 and the outer peripheral portion 35 provided with the outer peripheral coolant flow path 37 are connected by the connecting portion 40, heat transfer occurs between the central portion 31 and the outer peripheral portion 35 via the connecting portion 40. Figure 4The heat transfer path X (refer to the dotted line) at the connecting portion 40 (the portion surrounded by the one-dot chain line) between the central portion 31 and the outer peripheral portion 35 is schematically shown. The heat transfer path X is as follows: starting from the lower part of the outer edge of the central portion 31, passing through a horizontal path passing through the bottom of the upper groove 42 (the portion downward from the bottom surface 42b), a vertical path passing through the wall between the upper groove 42 and the lower groove 44, and a horizontal path passing through the top of the lower groove 44 (the portion upward from the top surface 44c), and reaching the upper part of the inner edge of the outer peripheral portion 35 (it can be in the reverse direction). Here, if the lower groove 44 is omitted, the heat transfer path at the connecting portion 40 is only the horizontal path passing through the bottom of the upper groove 42, and it becomes shorter. In this state, if the temperature difference between the central portion 31 and the outer peripheral portion 35 becomes large (for example, if the temperature difference between the refrigerant supplied to the central refrigerant flow path 32 and the refrigerant supplied to the outer peripheral refrigerant flow path 37 becomes large), the temperature gradient at the connecting portion 40 becomes large, and the connecting portion 40 may be damaged due to thermal stress. In contrast, in the wafer mounting stage 10 of the present embodiment, as described above, the heat transfer path X at the connecting portion 40 not only has a horizontal path but also has a vertical path, and is long. Therefore, even if the temperature difference between the central portion 31 and the outer peripheral portion 35 becomes large, the temperature gradient at the connecting portion 40 will not be too large, and it is not easily damaged due to thermal stress.

[0046] In the wafer mounting stage 10 described above, not only the upper groove 42 is provided, but also the lower groove 44 is provided. The top surface 44c of the lower groove 44 is higher than the bottom surface 42b of the upper groove 42. Therefore, as described above, the breakage caused by thermal stress is suppressed. In addition, since the wafer mounting stage 10 is an integral type, it is easier to operate than the case where the central portion 31 and the outer peripheral portion 35 are separated.

[0047] In addition, the central refrigerant flow path 32 and the outer peripheral refrigerant flow path 37 supply refrigerants independently. Therefore, the temperatures of the wafer mounting surface 20a provided above the central refrigerant flow path 32 and the focus ring mounting surface 25a provided above the outer peripheral refrigerant flow path 37 can be controlled independently.

[0048] Furthermore, the upper groove 42 is provided beside the central refrigerant flow path 32, and the bottom surface 42b of the upper groove 42 is lower than the bottom surface 32b of the central refrigerant flow path 32 and the bottom surface 37b of the outer peripheral refrigerant flow path 37. In this configuration, since the bottom surface 42b of the upper groove 42 is arranged in the portion where the temperature is stabilized by being cooled by the refrigerant, compared with the case where the bottom surface 42b of the upper groove 42 is arranged in a portion higher than this, the breakage caused by thermal stress can be further suppressed.

[0049] Furthermore, in the connecting portion 40, there is one upper groove 42 and one lower groove 44, and the numbers of the upper and lower grooves are minimized. Therefore, an increase in processing cost can be suppressed. In addition, the portion where the refrigerant flow paths 32 and 37 cannot be arranged can be reduced, and thus the degree of freedom in arranging the refrigerant flow paths 32 and 37 can be increased.

[0050] Moreover, the cooling base material 30 is made of MMC with a linear thermal expansion coefficient similar to that of the ceramic material constituting the central ceramic base material 20 and the ceramic material constituting the outer peripheral ceramic base material 25. Therefore, when joining the central ceramic base material 20, the outer peripheral ceramic base material 25, and the cooling base material 30, a metal bonding layer can be used instead of a resin bonding layer. The metal bonding layer has a higher thermal conductivity than the resin bonding layer. Therefore, the heat dissipation ability required when processing a wafer using high-power plasma can be achieved. In addition, since MMC has conductivity, the cooling base material 30 can also be used as an RF electrode without separately preparing an RF electrode. It should be noted that in this embodiment, since the central bonding layer 50 and the outer peripheral bonding layer 55 are made of metal, these bonding layers can also be used as RF electrodes.

[0051] It should be noted that the present invention is not limited to any of the above embodiments. Of course, as long as it belongs to the technical scope of the present invention, it can be implemented in various ways.

[0052] For example, in the above embodiment, the outer peripheral ceramic base material 25 is also joined to the upper surface of the top of the lower groove 44. However, it may not be joined to the upper surface of the top of the lower groove 44. In this case, the upper surface of the top of the lower groove 44 can be set as a lower surface 44a that is one level lower than the upper surface of the outer peripheral portion 35, like Figure 5 that. The lower surface 44a can be lower than the top surface (top surface 37c) of the refrigerant flow path (outer peripheral refrigerant flow path 37) adjacent to the lower groove 44, or can be at the same height or higher than it.

[0053] In the above embodiment, the upper groove 42 is provided on the inner peripheral side of the lower groove 44. However, the upper groove 42 can be provided on the outer peripheral side of the lower groove 44, like Figure 6 that. In this case, in the cooling base material 30, the portion on the inner peripheral side of the inner edge of the lower groove 44 is the central portion 31, the portion on the outer peripheral side of the outer edge of the upper groove 42 is the outer peripheral portion 35, and the portion therebetween is the connecting portion 40. Even so, the same effect as the above embodiment can be obtained. It should be noted that when using the device with the temperature of the upper surface of the central portion 31 higher than the temperature of the upper surface of the outer peripheral portion 35, the upper groove 42 can be provided on the inner peripheral side of the lower groove 44. When using the device with the temperature of the upper surface of the outer peripheral portion 35 higher than the temperature of the upper surface of the central portion 31, the upper groove 42 can be provided on the outer peripheral side of the lower groove 44. Accordingly, the temperature difference between both ends of the heat transfer path at the connecting portion 40 can be reduced. Figure 6In [the above], the central ceramic substrate 20 may not be joined to the upper surface of the top of the lower groove 44. In this case, the upper surface of the top of the lower groove 44 may be a lower-level surface that is one level lower than the upper surface of the central portion 31. The lower-level surface may be lower than the top surface (top surface 32c) of the refrigerant flow path (central refrigerant flow path 32) adjacent to the lower groove 44, or may be at the same height or higher than it.

[0054] In the above-described embodiment, one upper groove and one lower groove are provided in the connecting portion 40. However, at least one of the upper groove and the lower groove may be provided in two or more. In this case, it is preferable to alternately arrange the upper groove and the lower groove. For example, as Figure 7 shown, an upper groove 46 may be added to the outer peripheral side of the lower groove 44, and two upper grooves (upper grooves 42 and 46) and one lower groove (lower groove 44) may be provided. In this case, the portion closer to the inner peripheral side than the inner edge of the upper groove 42 is the central portion 31, the portion closer to the outer peripheral side than the outer edge of the upper groove 46 is the outer peripheral portion 35, and the portion therebetween is the connecting portion 40. Accordingly, compared with the case where there is one upper groove and one lower groove, the heat transfer path at the connecting portion 40 can be made longer, and thus the thermal stress generated at the connecting portion 40 can be further reduced. In addition, since the structure is such that the upper groove is provided beside both the central refrigerant flow path 32 and the outer peripheral refrigerant flow path 37, compared with the case where one or both of them are provided with a lower groove beside them, the central portion 31 and the outer peripheral portion 35 can be connected by the lower-level portions that are cooled by the refrigerant and have relatively stable temperatures. Therefore, breakage caused by thermal stress can be further suppressed. In addition, if the bottom surface 46b of the upper groove 46 is at the same height as or lower than the bottom surfaces 32b of the central refrigerant flow path 32 and the bottom surface 37b of the outer peripheral refrigerant flow path 37, since the bottom surface 46b of the upper groove 46 is arranged in a portion with more stable temperature, breakage caused by thermal stress is less likely to occur. It should be noted that, as Figure 8 shown, the upper surface of the top of the lower groove 44 may be set as a lower-level surface 44a that is one level lower than the upper surface of at least one of the central portion 31 and the outer peripheral portion 35. The lower-level surface 44a may be lower than the top surface of at least one of the central refrigerant flow path 32 and the outer peripheral refrigerant flow path 37, or may be at the same height or higher than it.

[0055] In the above-described embodiment, the upper surfaces of the central portion 31 and the outer peripheral portion 35 are at the same height. However, the upper surface of the central portion 31 may be made higher, or the upper surface of the outer peripheral portion 35 may be made higher. Further, the bottom surfaces 32b of the central refrigerant flow path 32 and the bottom surfaces 37b of the outer peripheral refrigerant flow path 37 are at the same height. However, the bottom surface 32b of the central refrigerant flow path 32 may be made higher, or the bottom surface 37b of the outer peripheral refrigerant flow path 37 may be made higher. Further, the top surfaces 32c of the central refrigerant flow path 32 and the top surfaces 37c of the outer peripheral refrigerant flow path 37 are at the same height. However, the top surface 32c of the central refrigerant flow path 32 may be made higher, or the top surface 37c of the outer peripheral refrigerant flow path 37 may be made higher.

[0056] In the above-described embodiment, the bottom surface 42b of the upper groove 42 is at the same height as or lower than the bottom surfaces 32b of the central refrigerant flow path 32 and the bottom surfaces 37b of the outer peripheral refrigerant flow path 37. However, this condition may not be satisfied. In this case, the bottom surface 42b of the upper groove 42 is also preferably lower than the top surfaces of the refrigerant flow paths adjacent to the upper groove 42 in the central refrigerant flow path 32 and the outer peripheral refrigerant flow path 37, and is preferably at the same height as or lower than the bottom surfaces of the refrigerant flow paths adjacent to the upper groove 42. The same applies to the bottom surface 46b of the upper groove 46.

[0057] In the above-described embodiment, the top surface 44c of the lower groove 44 is at the same height as or higher than the top surfaces 32c of the central refrigerant flow path 32 and the top surfaces 37c of the outer peripheral refrigerant flow path 37. However, this condition may not be satisfied. In this case, the top surface 44c of the lower groove 44 is also preferably higher than the bottom surfaces of the refrigerant flow paths adjacent to the lower groove 44 in the central refrigerant flow path 32 and the outer peripheral refrigerant flow path 37, and is preferably at the same height as or higher than the top surfaces of the refrigerant flow paths adjacent to the lower groove 44.

[0058] In the above-described embodiment, the cooling base 30 is made of MMC. However, it may be made of a metal material such as molybdenum, tungsten, aluminum, aluminum alloy, stainless steel (SUS material), or the like, or may be made of a resin material. Among them, since the metal material has conductivity, if the cooling base 30 is made of a metal material, the cooling base 30 can also be used as an RF electrode. Further, the linear thermal expansion coefficients of low thermal expansion metal materials such as molybdenum and tungsten are close to the ceramic materials constituting the central ceramic base 20 and the ceramic materials constituting the outer peripheral ceramic base 25. Therefore, if the cooling base 30 is made of a low thermal expansion metal material, a metal bonding layer can be used as the central bonding layer 50 and the outer peripheral bonding layer 55 instead of a resin bonding layer. It should be noted that the cooling base 30 may be made of a metal material or a resin as described above. However, since the wafer mounting stage of the present invention can suppress breakage caused by thermal stress, it is particularly effective in the case where a brittle material such as MMC is used for the cooling base 30.

[0059] In the above-described embodiment, the central electrode 22 for wafer adsorption is provided inside the central ceramic substrate 20. However, an RF electrode for plasma generation may be provided inside instead of the central electrode 22, or an RF electrode for plasma generation may be provided in addition to the central electrode 22. This RF electrode is also referred to as the central RF electrode. In this case, a high-frequency power supply is connected to the central RF electrode. In addition, a heater electrode (resistive heating element) may be provided inside the central ceramic substrate 20. This heater electrode is also referred to as the central heater electrode.

[0060] In the above-described embodiment, the outer peripheral electrode 27 for focusing ring adsorption is provided inside the outer peripheral ceramic substrate 25. However, an RF electrode for plasma generation may be provided inside instead of the outer peripheral electrode 27, or an RF electrode for plasma generation may be provided in addition to the outer peripheral electrode 27. This RF electrode is also referred to as the outer peripheral RF electrode. In this case, a high-frequency power supply is connected to the outer peripheral RF electrode. In addition, a heater electrode (resistive heating element) may be provided inside the outer peripheral ceramic substrate 25. This heater electrode is also referred to as the outer peripheral heater electrode. The outer peripheral heater electrode can be temperature-controlled independently of the central heater electrode. Accordingly, the temperatures of the wafer placement surface 20a and the focusing ring placement surface 25a can be controlled with higher precision.

[0061] In the above-described embodiment, the central refrigerant flow path 32 is provided in a spiral shape from the inlet 33 to the outlet 34. However, the planar shape of the central refrigerant flow path 32 is not particularly limited. In addition, a plurality of central refrigerant flow paths 32 may be provided. In addition, the cross-section of the central refrigerant flow path 32 is rectangular, but the cross-sectional shape of the central refrigerant flow path 32 is not particularly limited. For example, the upper corner portion in the cross-section of the central refrigerant flow path 32 may be a curved surface (R surface). Accordingly, it is possible to prevent cracks from occurring starting from the upper corner portion in the cross-section of the central refrigerant flow path 32. The same applies to the outer peripheral refrigerant flow path 37.

[0062] In the above-described embodiment, the cooling substrate 30 is described as a single component. However, it may be Figure 9 a structure in which the upper component 131 and the lower component 132 are joined by a joining layer 135 as shown. The upper component 131 and the lower component 132 are shapes obtained by cutting the cooling substrate 30 in half along a horizontal plane including the top surface of the refrigerant flow path 32. The joining layer 135 is preferably a metal joining layer. It should be noted that the cooling substrate 30 may be a structure formed by joining three or more components.

[0063] In the above-described embodiment, holes penetrating the wafer stage 10 may be provided so as to reach the wafer placement surface 20a from the lower surface of the cooling substrate 30. Examples of such holes include: a gas supply hole for supplying a heat transfer gas (e.g., He gas) to the back surface of the wafer W, and a lift pin hole through which a lift pin for moving the wafer W up and down with respect to the wafer placement surface 20a is inserted. The heat transfer gas is supplied to a space formed by a number of small protrusions (for supporting the wafer W) provided on the wafer placement surface 20a and the wafer W. The lift pin holes are provided at three locations when the wafer W is supported by, for example, three lift pins.

Claims

1. A wafer placement table, wherein, it includes: A central ceramic substrate having a wafer placement surface on its upper surface and having electrodes built therein; A ring-shaped outer peripheral ceramic substrate having a focus ring placement surface on its upper surface and disposed separately from the central ceramic substrate on the outer periphery of the central ceramic substrate; and A cooling substrate, the central portion of which is joined to the lower surface of the central ceramic substrate, the outer peripheral portion of which is joined to the lower surface of the outer peripheral ceramic substrate, and having a connecting portion connecting the central portion and the outer peripheral portion, the cooling substrate has: a central refrigerant flow path provided in the central portion and an outer peripheral refrigerant flow path provided in the outer peripheral portion, the connecting portion is provided in a portion that is more on the outer peripheral side than the outermost edge of the central refrigerant flow path and more on the inner peripheral side than the innermost edge of the outer peripheral refrigerant flow path, and has one or more ring-shaped upper grooves that are open on the upper surface and ring-shaped lower grooves that are open on the lower surface and whose top surface is higher than the bottom surface of the upper groove.

2. The wafer placement table according to claim 1, wherein, the central refrigerant flow path and the outer peripheral refrigerant flow path supply refrigerant independently of each other.

3. The wafer placement table according to claim 1 or 2, wherein, the upper groove is provided beside at least one of the central refrigerant flow path and the outer peripheral refrigerant flow path, and the bottom surface of the upper groove is at the same height as the bottom surface of the central refrigerant flow path and the outer peripheral refrigerant flow path, or lower than the bottom surface of the central refrigerant flow path and the outer peripheral refrigerant flow path.

4. The wafer placement table according to claim 1 or 2, wherein, the connecting portion has two of the upper grooves and one of the lower grooves, and the upper grooves and the lower grooves are alternately arranged.

5. The wafer placement table according to claim 1 or 2, wherein, the cooling substrate is made of a metal matrix composite material.

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