Control method of common ground type ten-switch voltage-doubled five-level single-phase photovoltaic inverter

Abstract

The application provides a control method of a common ground type ten-switch voltage-doubled five-level single-phase photovoltaic inverter. Firstly, a single-phase sine modulation wave is compared with a four-phase laminated triangular carrier, and the voltage of a flying capacitor C2 is compared with a set reference voltage to obtain five preprocessed signals, then according to the conduction relationship of each switch tube among six working modes, the control signals of ten switch tubes are obtained through logical operation on the five preprocessed signals. The control method can stabilize the voltage of two flying capacitors, and the flying capacitors C1 and C2 can maintain stable voltage Upv during the whole working period, so that the waveform quality of the output voltage is ensured. In a word, the control method of the common ground type ten-switch voltage-doubled five-level single-phase photovoltaic inverter can not only stabilize the voltage of two flying capacitors, but also eliminate the leakage current and improve the utilization rate of the direct current voltage, and the five-level technology is used to reduce the generation of harmonic voltage.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of power electronics, and particularly relates to a control method of a common-ground ten-switch voltage-doubled five-level single-phase photovoltaic inverter. BACKGROUND

[0002] With the consumption of fossil energy and the deterioration of the earth's ecological environment, the advantages of solar energy are increasingly prominent. Photovoltaic power generation, as a major form of using solar energy, is particularly focused on. Data released by the National Energy Administration shows that in the first half of 2022, the renewable energy power generation in China reached 1.25 trillion kilowatt-hours, of which the solar power generation increased by 13.5%. According to the International Energy Agency (IEA), by 2030, global renewable energy power demand will account for 80% of the global power demand growth, of which wind and photovoltaic power generation will increase from 8% in 2019 to nearly 30%. With the development of photovoltaic power generation, non-isolated photovoltaic grid-connected inverters are widely used in solar power generation at home and abroad due to their low cost and high efficiency.

[0003] The non-isolated photovoltaic grid-connected system has no effective electrical isolation with the power grid. When the high-frequency working power switch tube is switched on, a common-mode voltage is generated. The parasitic capacitance between the solar photovoltaic panel, the inverter equipment and the ground forms a loop with the non-isolated photovoltaic grid-connected system, thereby forming a common-mode current, also known as a leakage current. The generation of leakage current not only causes distortion of the grid-connected current, but more importantly, it poses a risk of electric shock to relevant personnel and a safety hazard to equipment with high reliability. In order to suppress the adverse effects of leakage current and common-mode voltage on equipment and personal safety, non-isolated photovoltaic grid-connected inverters generally use methods such as changing the topology structure and corresponding switch control logic to make the common-mode voltage constant or reduce the fluctuation range of the common-mode voltage, but they cannot completely suppress the generation of leakage current and common-mode voltage.

[0004] Therefore, it is necessary to design a new common-ground photovoltaic inverter and control method to solve the above problems. SUMMARY

[0005] The main purpose of the present application is to propose a feasible control method for a common-ground single-phase photovoltaic inverter main circuit, so that the inverter has good electrical performance and excellent leakage current suppression capability.

[0006] In order to achieve the above application purpose, the present application provides a control method of a common-ground single-phase photovoltaic inverter, which is a common-ground ten-switch voltage-doubled five-level single-phase photovoltaic inverter main circuit. The control method comprises the following steps:

[0007] The first step: the sine modulation wave ut intersects with the laminated triangular carrier uc1, uc2, uc3, uc4 respectively, when ut>uc1, output high level, when ut<uc1, output low level, thereby obtaining the preprocessed signal A, and taking the inverse to obtain the preprocessed signal a; when ut>uc2, output high level, when ut<uc2, output low level, thereby obtaining the preprocessed signal B, and taking the inverse to obtain the preprocessed signal b; when ut>uc3, output high level, when ut<uc3, output low level, thereby obtaining the preprocessed signal C, and taking the inverse to obtain the preprocessed signal c; when ut>uc4, output high level, when ut<uc4, output low level, thereby obtaining the preprocessed signal D, and taking the inverse to obtain the preprocessed signal d;

[0008] The second step: sampling the voltage of the flying capacitor C2 and defining it as ufc2, and defining a reference voltage slightly lower than Upv as ua, comparing the voltage ufc2 of the flying capacitor C2 with the set reference voltage ua through the comparator to obtain the fifth preprocessed signal E, and taking the inverse to obtain e;

[0009] The third step: the not signal a of the preprocessed signal A and the preprocessed signal B, the not signal b of the preprocessed signal B and the preprocessed signal C, the not signal c of the preprocessed signal C and the preprocessed signal D and the preprocessed signal E are respectively and operated, finally the results of the three and operations are or operated to obtain the driving signals ug1 and ug6 of the switch tubes S1 and S6; the not signal c of the preprocessed signal C and the preprocessed signal D and the not signal of the preprocessed signal E are and operated, finally the result of the and operation and the not signal of the preprocessed signal D are or operated to obtain the driving signal ug2 of the switch tube S2; the not signal a of the preprocessed signal A and the not signal b of the preprocessed signal B are and operated, finally the result of the and operation and the preprocessed signal A are or operated to obtain the driving signal ug3 of the switch tube S3; the not signal a of the preprocessed signal A and the preprocessed signal B, the not signal b of the preprocessed signal B and the preprocessed signal C, the not signal c of the preprocessed signal C and the not signal e of the preprocessed signal D and the preprocessed signal E are respectively and operated, finally the results of the three and operations are or operated to obtain the driving signal ug4 of the switch tube S4; the not signal c of the preprocessed signal C and the preprocessed signal D and the preprocessed signal E are and operated, finally the result of the and operation and the not signal d of the preprocessed signal A, the preprocessed signal D are or operated to obtain the driving signal ug5 of the switch tube S5; the not signal b of the preprocessed signal B and the preprocessed signal C, the not signal c of the preprocessed signal C and the preprocessed signal D and the preprocessed signal E are respectively and operated, finally the results of the and operations and the not signal d of the preprocessed signal D are or operated to finally obtain the driving signals ug7 and ug10 of the switch tubes S7 and S10; the not signal a of the preprocessed signal A and the preprocessed signal B, the not signal b of the preprocessed signal B and the preprocessed signal C, the not signal c of the preprocessed signal C and the not signal e of the preprocessed signal D and the preprocessed signal E are respectively and operated, finally the results of the three and operations and the preprocessed signal A are or operated to obtain the driving signal ug8 of the switch tube S8; the not signal c of the preprocessed signal C and the not signal e of the preprocessed signal D and the preprocessed signal E are and operated to obtain the driving signal ug9 of the switch tube S9.

[0010] The control method of the common ground type ten-switch voltage-doubled five-level single-phase photovoltaic inverter has the advantages that the voltage of the two flying capacitors can be kept stable, the leakage current can be eliminated, the utilization rate of the direct current voltage can be improved, the generation of harmonic voltage is reduced by using the five-level technology, and the method has good engineering application value. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 The application discloses a common ground type ten-switch voltage-doubled five-level single-phase photovoltaic inverter main circuit.

[0012] Figure 2Schematic diagram of the control method of the present invention.

[0013] Figure 3 This is a timing diagram of the control signals of the present invention.

[0014] Figure 4 Schematic diagram of Mode 1 of the present invention.

[0015] Figure 5 Schematic diagram of Mode 2 of the present invention.

[0016] Figure 6 Schematic diagram of Mode 3 of the present invention.

[0017] Figure 7 Schematic diagram of Mode 4 of the present invention.

[0018] Figure 8 Schematic diagram of Mode 5 of the present invention.

[0019] Figure 9 Schematic diagram of mode six of the present invention. DETAILED DESCRIPTION

[0020] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0021] It should be emphasized that, in the process of describing the present invention, various formulas and constraints are distinguished by using consistent labels, but it is not excluded that different labels are used to mark the same formulas and / or constraints. The purpose of this setting is to more clearly illustrate the characteristics of the present invention.

[0022] like Figure 1 As shown, the common ground type single-phase photovoltaic inverter of the present invention is a common ground type ten-switch voltage-doubler five-level single-phase photovoltaic inverter main circuit.

[0023] like Figure 2 As shown, the control method of the common ground photovoltaic inverter of the present invention mainly includes the following steps:

[0024] The first step: the sine modulation wave ut intersects with the laminated triangular carrier uc1, uc2, uc3, uc4 respectively, when ut>uc1, output high level, when ut<uc1, output low level, thereby obtaining the preprocessed signal A, and taking the inverse to obtain the preprocessed signal a; when ut>uc2, output high level, when ut<uc2, output low level, thereby obtaining the preprocessed signal B, and taking the inverse to obtain the preprocessed signal b; when ut>uc3, output high level, when ut<uc3, output low level, thereby obtaining the preprocessed signal C, and taking the inverse to obtain the preprocessed signal c; when ut>uc4, output high level, when ut<uc4, output low level, thereby obtaining the preprocessed signal D, and taking the inverse to obtain the preprocessed signal d.

[0025] The second step: sampling the voltage of the flying capacitor C2 and defining it as ufc2, and defining a reference voltage slightly lower than Upv as ua, comparing the voltage ufc2 of the flying capacitor C2 with the set reference voltage ua through the comparator to obtain the fifth preprocessed signal E, and taking the inverse to obtain e.

[0026] Third step: the inverse signal a of pre-processing signal A and pre-processing signal B, the inverse signal b of pre-processing signal B and pre-processing signal C, the inverse signal c of pre-processing signal C and pre-processing signal D and pre-processing signal E are respectively ANDed, and the results of the three AND operations are ORed to obtain the driving signal ug1 and ug6 of the switch tubes S1 and S6; the inverse signal c of pre-processing signal C and pre-processing signal D and the inverse signal of pre-processing signal E are ANDed, and the result of the AND operation and the inverse signal of pre-processing signal D are ORed to obtain the driving signal ug2 of the switch tube S2; the inverse signal a of pre-processing signal A and the inverse signal b of pre-processing signal B are ANDed, and the result of the AND operation and pre-processing signal A are ORed to obtain the driving signal ug3 of the switch tube S3; the inverse signal a of pre-processing signal A and pre-processing signal B, the inverse signal b of pre-processing signal B and pre-processing signal C, the inverse signal c of pre-processing signal C and pre-processing signal D and the inverse signal e of pre-processing signal E are respectively ANDed, and the results of the three AND operations are ORed to obtain the driving signal ug4 of the switch tube S4; the inverse signal c of pre-processing signal C and pre-processing signal D and pre-processing signal E are ANDed, and the result of the AND operation and the inverse signal d of pre-processing signal A, pre-processing signal D are ORed to obtain the driving signal ug5 of the switch tube S5; the inverse signal b of pre-processing signal B and pre-processing signal C, the inverse signal c of pre-processing signal C and pre-processing signal D and pre-processing signal E are respectively ANDed, and the result of the AND operation and the inverse signal d of pre-processing signal D are ORed to obtain the driving signal ug7 and ug10 of the switch tubes S7 and S10; the inverse signal a of pre-processing signal A and pre-processing signal B, the inverse signal b of pre-processing signal B and pre-processing signal C, the inverse signal c of pre-processing signal C and pre-processing signal D and the inverse signal e of pre-processing signal E are respectively ANDed, and the results of the three AND operations and pre-processing signal A are ORed to obtain the driving signal ug8 of the switch tube S8; the inverse signal c of pre-processing signal C and pre-processing signal D and the inverse signal e of pre-processing signal E are ANDed to obtain the driving signal ug9 of the switch tube S9.

[0027] Through the above control, the inverter control timing diagram can be obtained as shown in Figure 3 Under this control method, the inverter can obtain six working modes as shown in Figures 4 to 9 The working principle of each mode of the inverter is briefly analyzed below, wherein the control state of the inverter includes the working state of ten switch tubes, 0 indicates that the switch is off, and 1 indicates that the switch is on.

[0028] Mode one: as Figure 4As shown, the inverter control state is [0, 0, 1, 0, 1, 0, 0, 1, 0, 0], the switch S3, S5, S8 are in the on state; the switch S1, S2, S4, S6, S7, S9, S10 are in the off state. At this time, the two flying capacitors are in the discharge state, the output voltage of the common ground type ten switch five-level single-phase inverter circuit is 2Upv, and the leakage current is 0.

[0029] Mode two: as shown in Figure 5 As shown, the inverter control state is [1, 0, 1, 1, 0, 1, 0, 1, 0, 0], the switch S1, S3, S4, S6, S8 are in the on state; the switch S2, S5, S7, S9, S10 are in the off state. At this time, the flying capacitors C1 and C2 are in the charging state, the output voltage of the common ground type ten switch five-level single-phase inverter circuit is Upv, and the leakage current is 0.

[0030] Mode three: as shown in Figure 6 As shown, the inverter control state is [1, 0, 0, 1, 0, 1, 1, 1, 0, 1], the switch S1, S4, S6, S7, S8, S10 are in the on state; the switch S2, S3, S5, S9 are in the off state. At this time, the flying capacitors C1 and C2 are in the charging state, the output voltage of the common ground type ten switch five-level single-phase inverter circuit is 0, and the leakage current is 0.

[0031] Mode four: as shown in Figure 7 At this time, the voltage ufc2 sampled from the flying capacitor C2 is greater than the reference voltage ua, the inverter control state is [1, 0, 0, 0, 1, 1, 1, 0, 0, 1], the switch S1, S5, S6, S7, S10 are in the on state; the switch S2, S3, S4, S8, S9 are in the off state. At this time, the flying capacitor C1 is in the charging state, the flying capacitor C2 is in the discharging state, the output voltage of the common ground type ten switch five-level single-phase inverter circuit is -Upv, and the leakage current is 0.

[0032] Mode five: as shown in Figure 8 At this time, the voltage ufc2 sampled from the flying capacitor C2 is less than or equal to the reference voltage ua, the inverter control state is [0, 1, 0, 1, 0, 0, 0, 1, 1, 0], the switch S2, S4, S8, S9 are in the on state; the switch S1, S3, S5, S6, S7, S10 are in the off state. At this time, the flying capacitor C1 is in the discharging state, the flying capacitor C2 is in the charging state, the output voltage of the common ground type ten switch five-level single-phase inverter circuit is -Upv, and the leakage current is 0.

[0033] Mode six: as shown in Figure 9As shown, the inverter control state is [0, 1, 0, 0, 1, 0, 1, 0, 0, 1], the switch S2, S5, S7 and S10 are in the on state; the switch S1, S3, S4, S6, S8 and S9 are in the off state. At this time, the flying capacitor C1 and C2 are in the discharge state, the common ground type ten switch voltage five-level single-phase inverter output voltage is -2Upv, and the leakage current is 0.

[0034] From the above analysis, the control method of the common ground type ten switch voltage five-level single-phase photovoltaic inverter can be applied to the common ground type ten switch voltage five-level single-phase photovoltaic inverter, so that the five-level PWM waveform is output, the generation of harmonic voltage is reduced, and the utilization rate of direct current voltage is improved. The control can keep the voltage of the two flying capacitors stable, so the quality of the PWM waveform is high. In addition, the leakage current can be eliminated, and it has good engineering application value.

[0035] The above examples are only used to illustrate the technical solutions of the present application and not to limit it. Although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced by equivalents without departing from the spirit and scope of the present application.

Claims

1. A control method for a common ground type ten-switch voltage-doubling five-level single-phase photovoltaic inverter, applied to a common ground type ten-switch voltage-doubling five-level single-phase photovoltaic inverter topology, the topology comprising: Photovoltaic cell, a common-ground type ten-switch voltage-doubling five-level single-phase inverter circuit, a single-phase output LC filter circuit, and a single-phase load; the photovoltaic cell is PV; the common-ground type ten-switch voltage-doubling five-level single-phase inverter circuit includes an input filter capacitor Cdc, two flying capacitors C1, C2, and ten switching tubes S1 to S10, where S1, S2, and S9 are IGBTs without freewheeling diodes, and S3 to S8 and S10 are IGBT modules with freewheeling diodes; the single-phase output LC filter circuit and the single-phase load include a filter inductor Lf, a filter capacitor Cf, and a load Ro; the positive electrode of the photovoltaic cell PV is connected to the collector of the switching tube S1, the collector of the switching tube S4, and the positive electrode of the input filter capacitor Cdc; the emitter of the switching tube S1 is connected to the collector of the switching tube S2, the collector of the switching tube S3, and the positive electrode of the flying capacitor C1; the emitter of the switching tube S3 is connected to the collector of the switching tube S7, the collector of the switching tube S9, and one end of the filter inductor Lf; the emitter of the switching tube S4 is connected to the collector of the switching tube S5 and the positive electrode of the flying capacitor C2; the negative electrode of the flying capacitor C2 is connected to the collector of the switching tube S10 and the emitter of the switching tube S8; the emitter of the switching tube S10 is connected to the emitter of the switching tube S7; the negative electrode of the flying capacitor C1 is connected to the emitter of the switching tube S5, the collector of the switching tube S6, and the emitter of the switching tube S9; the other end of the filter inductor Lf is connected to the positive electrode of the filter capacitor Cf and one end of the load Ro; the emitters of the switching tube S2, the emitter of the switching tube S6, the collector of the switching tube S8, the input filter capacitor Cdc, the negative electrode of the filter capacitor Cf, and the other end of the load Ro are connected to the negative electrode of the photovoltaic cell PV; It is characterized in that: the control method includes the following three steps: First step: The sinusoidal modulation wave ut is respectively intercepted with the stacked triangular carrier waves uc1, uc2, uc3, uc4. When ut > uc1, a high level is output, and when ut < uc1, a low level is output, thereby obtaining a preprocessing signal A, and taking the inverse to obtain the preprocessing signal a; when ut > uc2, a high level is output, and when ut < uc2, a low level is output, thereby obtaining a preprocessing signal B, and taking the inverse to obtain the preprocessing signal b; when ut > uc3, a high level is output, and when ut < uc3, a low level is output, thereby obtaining a preprocessing signal C, and taking the inverse to obtain the preprocessing signal c; when ut > uc4, a high level is output, and when ut < uc4, a low level is output, thereby obtaining a preprocessing signal D, and taking the inverse to obtain the preprocessing signal d; Second step: Sample the voltage of the flying capacitor C2 and define it as ufc2, and then define a reference voltage ua slightly lower than the voltage Upv of the photovoltaic cell PV. The voltage ufc2 of the flying capacitor C2 and the set reference voltage ua are input to a comparator to obtain a fifth preprocessing signal E, and taking the inverse to obtain e; Step 3: Perform AND operation on the inverted signal a of preprocessing signal A and preprocessing signal B, the inverted signal b of preprocessing signal B and preprocessing signal C, the inverted signal c of preprocessing signal C and preprocessing signal D and preprocessing signal E respectively, and finally perform OR operation on the results of the three AND operations to obtain the driving signals ug1 and ug6 of the switch tubes S1 and S6; perform AND operation on the inverted signal c of preprocessing signal C and the inverted signal e of preprocessing signal D and preprocessing signal E, and finally perform OR operation on the result of the AND operation and the inverted signal d of preprocessing signal D to obtain The driving signal ug2 of the switch tube S2 is obtained; the inverted signal a of the preprocessed signal A and the preprocessed signal B are ANDed, and finally the result of the AND operation and the preprocessed signal A are ORed to obtain the driving signal ug3 of the switch tube S3; the inverted signal a of the preprocessed signal A and the preprocessed signal B, the inverted signal b of the preprocessed signal B and the preprocessed signal C, the inverted signal c of the preprocessed signal C and the preprocessed signal D and the inverted signal e of the preprocessed signal E are respectively ANDed, and finally the results of the three AND operations are ORed to obtain the driving signal of the switch tube S4. ug4; perform an AND operation on the inverted signal c of the preprocessing signal C, the preprocessing signal D, and the preprocessing signal E, and finally perform an OR operation on the result of the AND operation and the inverted signal d of the preprocessing signal A and the preprocessing signal D to obtain the driving signal of the switch tube S5; ug5; perform an AND operation on the inverted signal b of the preprocessing signal B and the preprocessing signal C, the inverted signal c of the preprocessing signal C and the preprocessing signal D and the preprocessing signal E respectively, and finally perform an OR operation on the result of the AND operation and the inverted signal d of the preprocessing signal D to obtain the driving signal of the switch tubes S7 and S10 Signals ug7 and ug10; perform an AND operation on the inverted signal a of the preprocessing signal A and the preprocessing signal B, the inverted signal b of the preprocessing signal B and the preprocessing signal C, the inverted signal c of the preprocessing signal C and the preprocessing signal D and the inverted signal e of the preprocessing signal E, respectively, and finally perform an OR operation on the results of the three AND operations and the preprocessing signal A to obtain the driving signal ug8 of the switch tube S8; perform an AND operation on the inverted signal c of the preprocessing signal C and the inverted signal e of the preprocessing signal D and the preprocessing signal E to obtain the driving signal ug9 of the switch tube S9.

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