Method and apparatus for damping oscillations on bus lines of a bus system based on differential voltage signals

Abstract

The invention relates to an attenuation device (30) for a bus (10) of a bus system (2) based on differential voltage signals, in particular a controller area network bus system, wherein the bus has a first bus line (6) and a second bus line (8), the attenuation device has an attenuation circuit (44) which provides a variable resistance value between the first bus line (6) and the second bus line (8) and which can be operated in at least three circuit states, wherein in a first circuit state the first bus line (6) and the second bus line (8) are connected with a first resistance value by means of an attenuation resistor (50, 52), wherein in a second circuit state the first bus line (6) and the second bus line (8) are connected with a second resistance value by means of the attenuation resistor (50, 52), and wherein in a third circuit state the first bus line (6) and the second bus line (8) are connected with a third resistance value by means of the attenuation resistor (50, 52), wherein the first resistance value is smaller than the second resistance value and the second resistance value is smaller than the third resistance value.

Description

TECHNICAL FIELD

[0001] The application relates to a damping device for a bus system based on a differential voltage signal and to a method for damping oscillations. BACKGROUND

[0002] In a bus system, in particular in such a bus system which transmits signals in the form of a voltage difference between two lines, the so-called bus lines, such as for example a CAN bus (CAN stands for Controller Area Network), oscillations occur at or after the edges in the profile of the voltage difference of the differential voltage signal. Such oscillations occur for example in a CAN bus after a transition from a dominant state in which a voltage difference of nominally 2 V exists to a recessive state in which a voltage difference of nominally 0 V exists. The oscillations of the bus system are caused by the switching processes of the bus signal due to the line inductance and input capacitance of the transceivers of the bus system. This voltage-oscillation is also referred to as "overshoot".

[0003] A negative effect of this oscillation is that the maximum bit rate which can be transmitted via the bus is limited, since the time interval until after the change in the differential voltage signal a signal state is assumed which can be reliably identified is enlarged due to the oscillation. This effect is for example the main reason why in a CAN-FD bus (FD: Flexible Data Rate) which is nominally designed for 5 MBit / s the bit rate which can be effectively utilized is limited to approximately 2 MBit / s.

[0004] Therefore, in order to enlarge the bit rate which can be effectively utilized, it can be attempted to suppress or dampen the oscillations or the overshoot. For example, the innovation in the CAN-FD-SIC requirement (SIC: Signal Improvement Capacity) which is presented to the transceivers in the bus system relates in particular to the damping behavior when transitioning from a dominant state to a recessive state with respect to the CAN-FD requirement. For this purpose, the two bus lines can be connected as low-impedance as possible, i.e. with as little resistance or without resistance, during the period in which the voltage oscillation occurs. This results in a greater current being required by other bus users in order to generate a voltage difference on the bus during this period. SUMMARY

[0005] According to the application, a damping device for a bus of a bus system based on a differential voltage signal, in particular a Controller Area Network bus system, a method for damping oscillations, a control device and a damping device are proposed which have the features of the independent claims. Advantageous design proposals are the dependent claims and the subject matter explained below.

[0006] According to the application, the resistance value between the bus lines can be controlled specifically during the time period after the occurrence of an edge in the differential voltage signal. Thus, on the one hand, damping of the oscillation of the differential voltage is achieved and, on the other hand, it can be ensured that even a weak bus user, that is to say a bus user who is able to provide a relatively small current in order to generate a voltage difference on the bus, is able to generate a voltage difference on the bus in order to display an error, that is to say a so-called error flag can be transmitted.

[0007] To this end, the damping device has a damping circuit which, in a first circuit state, connects the bus lines to one another, or shorts them, by means of a very low resistance value, thereby strongly damping the oscillation. In a second circuit state, the resistance value is increased, so that a weak bus user is also able to generate a differential voltage on the bus, wherein at the same time the resistance value is always sufficiently small in order to continue to damp the oscillation. In a third circuit state, the bus lines are no longer connected to one another by means of the damping circuit or are connected to one another only by means of a very high or infinite resistance value.

[0008] It is expedient for the damping device also to have a control circuit which switches the damping circuit back and forth between the individual circuit states, for example in accordance with a control signal.

[0009] It is particularly advantageous that the different resistance values can be produced by means of a circuit having at least one semiconductor switch. It is particularly advantageous that the variable resistance value is produced by means of the on resistance of at least one semiconductor switch, preferably at least two semiconductor switches connected in anti-parallel. By means of different actuation of the at least one semiconductor switch, different resistance values from a very small resistance (semiconductor switch on) up to a very high or infinite resistance (semiconductor switch off) can be produced in particular easily. DSon

[0010] According to a preferred embodiment of the application, the at least one semiconductor switch is a field effect transistor, FET, in particular a MOSFET. Field effect transistors are particularly well suited for setting a resistance value which is variable over time on account of their inherent stray capacitance.

[0011] ​Preferably, the attenuation circuit comprises a first field effect transistor FET having a predetermined gate-source-capacitance, a second FET having a predetermined gate-source-capacitance and a resistive element having a predetermined resistance value, wherein the drain connection of the first FET is connected to the connection for the first bus line and the drain connection of the second FET is connected to the connection for the second bus line, wherein the source connection of the first FET and the source connection of the second FET are connected to a common source connection point, wherein the gate connection of the first FET and the gate connection of the second FET are connected to a common gate connection point, and wherein the resistive element is connected to the source connection point and the gate connection point. Preferably, a self-locked p-channel FET is involved.

[0012] Further preferred, the control circuit is connected to the gate connection point and the source connection point of the attenuation circuit and is provided for having a voltage connection, a reference potential connection and at least one control connection, wherein the control circuit is provided for, when a voltage is applied at the voltage connection and a reference potential is applied at the reference potential connection:

[0013] 1. if at least one voltage is applied at the at least one control connection which represents a first state or a first circuit state, then connecting the source connection point to the voltage connection and connecting the gate connection point to a ground connection;

[0014] 2. if at least one voltage is applied at the at least one control connection which represents a second state or a second circuit state, then disconnecting the source connection point and the gate connection point in the control circuit; and

[0015] 3. if at least one voltage is applied at the at least one control connection which represents a third state or a third circuit state, then connecting the source connection point to the gate connection point with low impedance ("low impedance" is to be understood here as meaning that the ohmic resistance of the connection should be small in relation to the resistance value of the resistive element, for example less than 1 / 10 of the resistance value or less than 1 / 100 of the resistance value, i.e. very small or almost zero).

[0016] The expressions "connected", "has been connected", "connected to", etc. relate to an electrically conductive connection and are to be understood accordingly, unless indicated otherwise. In order to simplify and for better readability, the aforementioned shorter expressions are used in the present application instead of the expressions "electrically conductive connection", "connected electrically", etc.

[0017] The point that the source connection point and the gate connection point in the control circuit are "broken" or "broken off" means that there is no (conducting) connection between the source connection point and the gate connection point, which are thus broken off or only connected with high impedance in the control circuit, which is generated by the control circuit. Likewise, if the source connection point and the gate connection point in the control circuit are "broken", the source connection point and the gate connection point are broken off from the voltage connection, the reference potential connection and the at least one control connection, if there is a connection to these connections, that is to say, there is no (conducting) connection (or only a connection with high impedance) to these connections inside the control circuit. "Broken off" is to be understood in analogy to "connected" in that the electrical line is broken off or inhibited.

[0018] The three different states (or phases) are represented or coded by different configurations of voltage values and / or voltages at one or more control connections. For example, a single control connection can be provided, which is operated with three different voltage levels corresponding to the three states.

[0019] It is, however, preferred that two control connections are provided, that is to say, the attenuation device is designed such that the at least one control connection comprises a first and a second control connection, wherein the first state is represented by a high-level voltage signal being applied at the first control connection and no voltage signal being applied at the second control connection, wherein the second state is represented by no voltage signal being applied at the first control connection and no voltage signal being applied at the second control connection, and wherein the second state is represented by a high-level voltage signal being applied at the second control connection and no voltage signal being applied at the first control connection. In this embodiment, it is only necessary to distinguish whether or whether not a voltage is applied at the respective control connection. The expression "high-level voltage signal" means that a voltage is applied at the control connection, which is higher than the voltage at the voltage connection.

[0020] Preferably, the control circuit comprises a first switching element, which is designed to switch the connection between the voltage connection and the source connection point and the connection between the reference potential connection and the gate connection point into the on state when a high-level voltage signal is applied at the first control connection and into the off state when no voltage signal is applied at the control connection; wherein it is further preferred that the first switching element comprises a third and a fourth FET, wherein the gate connections of the third and fourth FET are connected to the first control connection; wherein it is most preferred that the source connection of the third FET is connected to the voltage connection and the drain connection of the third FET is connected to the source connection point and the source connection of the fourth FET is connected to the reference potential connection and the drain connection of the fourth FET is connected to the gate connection point.

[0021] According to this embodiment, it is possible to directly use the voltage applied at the control connection in order to actuate the first switching element, which is advantageous because it is not necessary to provide further circuit elements, such as a gate driver. This is equally true for the following design.

[0022] Furthermore, the control circuit preferably has a short-circuiting circuit, which in particular has a second switching element, which is designed to switch the connection between the source connection point and the gate connection point into the on state when a high-level voltage signal is applied at the second control connection and into the off state when no voltage signal is applied at the second control connection.

[0023] Preferably, the second switching element comprises a fifth and a sixth FET, which are connected in series, wherein the gate connections of the fifth and sixth FET are connected to the second control connection; wherein it is most preferred that the source connection of the fifth FET is connected to the source connection of the sixth FET and the drain connection of the fifth FET is connected to the source connection point and the drain connection of the sixth FET is connected to the gate connection point. Together with the previous design, it is possible to realize a particularly simple structure of the control circuit. The field effect transistors (FETs) are preferably metal oxide field effect transistors (MOSFETs), preferably self-locked n-channel FETs.

[0024] An attenuation device according to one of the preceding design variants can be used in a method according to the application for attenuating oscillations on a bus line of a bus system based on a differential voltage signal, in particular of a controller area network bus system. The method comprises the recognition of an edge in the differential voltage signal; if the edge is recognized, at least one voltage is provided at the at least one control terminal, wherein the at least one voltage is provided in a first time period according to the first state, in a second time period adjoining the first time period according to the second state, and in a third time period outside the first and second time periods according to the third state.

[0025] The method is preferably used for falling edges of the differential voltage signal, that is to say the edge is preferably a falling edge of the differential voltage signal, or the step of recognition comprises the recognition of whether the edge is a falling edge. A "falling edge" means a transition (edge) in the voltage signal from a state in which there is a voltage difference to a state in which there is no voltage difference. In a CAN bus this is the transition from the dominant state to the recessive state.

[0026] The method can be designed such that, if the edge is recognized, a high-level voltage signal is provided at the first control terminal and no voltage signal is provided at the second control terminal in the first time period, no voltage signal is provided at the first and second control terminal in the second time period, and no voltage signal is provided at the first control terminal and a high-level voltage signal is provided at the second control terminal in the third time period. Furthermore, the method can comprise the provision of a voltage at a voltage terminal and the provision of a reference potential at a reference potential terminal. Thereby, the necessary voltages or voltage signals for the previously described embodiments of the attenuation device having two control terminals can be provided or generated.

[0027] A control device according to the application for an attenuation device has connection elements for connection to a first and a second bus line and at least one output, preferably two outputs, for connection to at least one control terminal, and is designed to carry out all the method steps of the method according to the application, wherein predetermined first and second time periods are used.

[0028] The control device can be realized as a circuit having transistors and RC elements, wherein the respective switching times or time periods are determined by the time constants of the RC elements and the transistors are controlled accordingly to generate the voltage signals for the first and second control terminals. The specific design of such a circuit for the control device is within the judgment of the person skilled in the art.

[0029] The attenuation device comprises a plurality of attenuation means connected in parallel on the bus line. Here, the predetermined gate-source-capacitances and / or the predetermined resistance values of the different attenuation means preferably have different values, wherein it is further preferred that the RC time constants (i.e. the time constants of the RC elements formed by the capacitances and resistances, i.e. the products of the capacitance values and resistance values) of the different attenuation means are different. Independently thereof, the attenuation device can furthermore comprise a plurality of control means connected to one of the plurality of attenuation means, wherein the preferably first and / or second predetermined time periods of at least two different control means are different. By a corresponding selection of the gate-source-capacitances, resistance values, first and second time periods and combinations thereof, the resistance between the bus lines, i.e. the attenuation characteristic, can be set purposefully.

[0030] Further advantages and design solutions of the present application result from the description and the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0031] The present application is schematically shown in the drawings by means of embodiments and described in the following with reference to the drawings. In which:

[0032] Figure 1 A schematic structure of a bus system is shown;

[0033] Figure 2 A block diagram of an attenuation device with a connection to a bus line is shown;

[0034] Figure 3 A circuit diagram of an attenuation device according to the present application is shown, which corresponds to a preferred embodiment; and

[0035] Figures 4A-4C The influence of an attenuation device according to the present application on the differential voltage and resistance between bus lines is shown. DETAILED DESCRIPTION

[0036] Figure 1 A structure of a bus system 2, in particular a CAN bus system, based on a differential voltage signal is shown. The bus system 2 comprises a plurality of bus users 4_1, 4_2,..., 4_m, which are connected to both bus lines 6, 8 of the bus system 10 and communicate with each other via the bus lines. For this purpose, the bus users use the differential voltage between the two bus lines, which is generated and read out by means of transceivers. In this figure, one of the bus users 4_1, more precisely its transceiver 12, comprises an attenuation device 30 according to the present application, generally a plurality of or all bus users can comprise such an attenuation device. The bus lines 6, 8 are connected to each other by means of terminal resistances 14a, 14b, which represent the central impedance of the bus system.

[0037] Figure 2 A block diagram is shown in which a damping device 30 according to the application is shown in simplified form, which damping device is coupled to the bus lines 6, 8. The damping device 30 has terminals 32, 34 which are connected to the first bus line 6 or to the second bus line 8. In a CAN bus, the first bus line 6 corresponds to CAN H and the second bus line 8 corresponds to CAN L. As further terminals, the damping device has a control terminal 36, 38 for controlling the function of the damping device, a voltage terminal 40 and a reference potential terminal 42 for connection to a reference potential, in particular to a ground or to a ground line. The voltage terminal 40 is connected to the (ideal) voltage source 16 which provides a constant voltage and which is likewise connected to the bus lines via the resistor 18. In a CAN bus, the voltage provided by the voltage source is nominally 2.5 V, i.e. in the recessive state (when no bus user generates a differential voltage) the voltage which is loaded on the two bus lines or in the dominant state the common-mode voltage (i.e. the average of the two voltages on the first and second bus line).

[0038] Furthermore, a control device 20 is shown in Figure 2 which is connected to the two bus lines 6, 8 and to the two control terminals 36, 38 of the damping device 30 and which is designed to control the damping device 30 in such a way that it provides suitable voltage signals at the control terminals 36, 38 of the damping device 30. The control device 20 is designed to recognize edges, in particular falling edges, i.e. edges when a transition from a state in which there is a voltage difference to a state in which there is no voltage difference, in the differential voltage signal on the bus lines. In a CAN bus, the control device is thus designed to recognize edges in the differential voltage signal when a transition from the dominant state to the recessive state. The control device 30 is furthermore designed to provide control voltages for the damping device 30 on the respective outputs 22, 24 which are to be connected to the two control terminals 36, 38 of the damping device 30. Here, voltages are generated on the outputs 22, 24 according to three different configurations or states. During a first phase which extends over a first time period directly after a falling edge has been recognized, a voltage according to a first state is loaded, during a second phase which extends over a second time period which directly follows the first time period, a voltage according to a second state is loaded and during the remaining time, i.e. outside the first and second time period, a voltage according to a third state is loaded. The third state indicates that the damping effect of the damping device should be switched off.

[0039] In Figure 3A preferred embodiment of an attenuation device 30 according to the application is shown in Fig. 1. The attenuation device comprises an attenuation circuit 44 and a control circuit 46.

[0040] The attenuation circuit 44 has a first connection 32 for a first bus line 6 of a bus and a second connection 34 for a second bus line 8 of the bus. Furthermore, the attenuation circuit 44 comprises a resistive element 48, also referred to as resistor 48 hereinafter, a first field effect transistor (FET) 50 and a second field effect transistor 52. The two field effect transistors (FETs) 50, 52 are preferably metal oxide field effect transistors (MOSFETs), further preferably enhancement mode (i.e. self-locking) p-channel MOSFETs. The elements are connected to each other by lines as follows, such that the source connections of the first and second FETs 50, 52 are connected to a source connection point 54, the gate connections of the first and second FETs 50, 52 are connected to a gate connection point 56, the source connection point 54 is connected to the gate connection point 56 via the resistor 48, the drain connection of the first FET 50 is connected to the first connection 32 and the drain connection of the second FET 52 is connected to the second connection 34. The first and second FETs 50, 52 each have a predetermined gate-source-capacitance. For the sake of completeness, the body-drain-diodes 68, 70 of the first and second FETs 50, 52 are also drawn.

[0041] The control circuit 46 has a voltage connection 40, a reference potential connection 42, and first and second control connections 36, 38. The control circuit 46 comprises third and fourth FETs 58, 60, the gate connections of which are connected to the first control connection 36 and which are preferably MOSFETs, further preferably enhancement-mode (i.e. self-locked) n-channel MOSFETs. The third and fourth FETs represent first switching elements. The third FET 58 is arranged in such a way that it can switch the connection from the voltage connection 40 to the source connection 54 back and forth between a conducting state and a non-conducting state. The fourth FET 60 is arranged in such a way that it can switch the connection from the reference potential connection 42 to the gate connection 56 back and forth between a conducting state and a non-conducting state. In more detail, for this purpose the source connection of the third FET 58 is connected to the voltage connection 40 and the drain connection of the third FET 58 is connected to the source connection 54, or the source connection of the fourth FET 60 is connected to the reference potential connection 42 and the drain connection of the fourth FET 60 is connected to the gate connection 56. Thus, if a high-level voltage is applied at the first control connection 36, the third and fourth FETs 58, 60 are conducting. "High-level voltage" is to be understood here as being sufficiently high with respect to the voltage at the voltage connection 40 and at the reference potential connection 42 in order to conduct the third and fourth FETs 58, 60. "Conducting" or "on" is to be understood as the FETs being operated in the saturation range.

[0042] In addition, the control circuit 46 comprises fifth and sixth FETs 62, 64, the gate connections of which are connected to the second control connection 38 and which are preferably MOSFETs, further preferably enhancement-mode (i.e. self-locked) n-channel MOSFETs. The fifth and sixth FETs represent second switching elements. The fifth and sixth FETs 62, 64 are arranged in series in such a way that the connection between the source connection 54 and the gate connection 56 can be switched back and forth between a conducting state and a non-conducting state. Thus, if a high-level voltage is applied at the second control connection 38, the fifth and sixth FETs 62, 64 are conducting. In more detail, the drain connection of the fifth FET 62 is connected to the source connection 54, the drain connection of the sixth FET 64 is connected to the gate connection 56 and the source connections of the fifth and sixth FETs 62, 64 are connected to one another. Here, the body-drain-diodes 72, 74 of the fifth and sixth FETs 62, 64 are also drawn for the sake of completeness. However, it should be emphasized that various operable short circuits can be used here.

[0043] All FETs, i.e. the first to sixth FETs, are preferably designed or made as high-voltage transistors according to the maximum rated voltage of the bus, which for CAN buses, for example CAN_H, CAN_L, is a maximum rated voltage of -27 V to +40 V.

[0044] The mode of operation of the attenuation circuit shown in Figure 3 is described below with reference to the above-described configuration or state of the control voltage, wherein it is assumed that the voltage connection 40 is connected to a suitable voltage source which provides a voltage which preferably corresponds to the common-mode voltage of the two bus lines, and that the reference potential connection 42 is connected to a suitable reference potential, in particular to ground potential.

[0045] First state (or first phase): if a high-level voltage signal is applied at the first control connection 36 and no voltage is applied at the second control connection 38, the third and fourth FETs 58, 60 are switched on, so that the source connection point 54 is placed at the potential applied at the voltage connection 40 and the gate connection point 56 is placed at the potential at the reference potential point 42 (the potential is generated according to the above-mentioned assumption). At the same time, the fifth and sixth FETs 62, 64 are switched off. This results in a gate-source voltage being applied at the first and second FETs 50, 52, respectively, so that the two FETs 50, 52 are switched on, i.e. have only a very small resistance or no resistance in the drain-source interval. The two bus lines 6, 8 are accordingly short-circuited via the series-connected FETs, wherein the short-circuit resistance forming the attenuation resistance is determined by the dimensioning of the first and second FETs 50, 52. Oscillations are strongly attenuated, i.e. overshoots are suppressed, by the small resistance between the bus lines.

[0046] Second state (or second phase): If no voltage is applied at the first control connection 36 and at the second control connection 38, the drain-source- intervals of the third, fourth, fifth and sixth FETs 58, 60, 62, 64 are non-conductive. Then, no conductive connection between the source connection 54 and the gate connection 56 exists, which is generated by the control circuit 46, and the source connection and the gate connection are separated from the voltage connection 40 and the reference potential connection 42 (and, due to the circuit arrangement, from the control connections 36, 38), that is to say the source connection 54 and the gate connection 56 are open in the control circuit 46. The charge of the capacitor formed by the gate-source-capacitances of the first and second FETs 50, 52 is then discharged by the resistor 48, so that the voltage between the gate connection 56 and the source connection 54 decreases. Due to the decreasing gate-source-voltage at the first and second FETs 50, 52, the first and second FETs are no longer in the saturation range, but in the linear or active range, so that the drain-source-interval of the determining attenuation resistor between the bus lines has a resistance which depends on the gate-source-voltage. The resulting time curve of the attenuation resistor is correspondingly determined by the RC time constant which is generated by the value C of the gate-source-capacitances of the first and second FETs 50, 52 and the value R of the resistor 48.

[0047] Third state (or third phase): If no voltage is applied at the first control connection 36 and a high-level-voltage signal is applied at the second control connection 38, the fifth and sixth FETs 62, 64 are switched on, wherein at the same time the third and fourth FETs 58, 60 are switched off. This results in a low-resistance connection or no resistance connection of the source connection 54 and the gate connection 56. This connection is low-impedance in the sense that the resistance of this connection is small compared to the resistance value of the resistor 48; thus, the charge at the gate-source-capacitances of the first and second FETs 50, 52 flows off through this connection, so that the first and second FETs 50, 52 are switched off. Thus, the bus line is connected only high-impedance, that is to say with a high resistance or not conductive, by the attenuation device.

[0048] It is clear that a high-level-voltage signal should not be applied at the first and second control connections 36, 38 at the same time, because then the voltage connection 40 would be directly connected to the reference potential connection 42. The control device 20 should accordingly be set up.

[0049] In Figures 4A-4C the effect of an attenuation circuit according to the application is sketched. Here, in Figure 4AThe characteristic is first shown without the use of the damping circuit, in which the differential voltage V between the bus lines is plotted against the time t Diff In the diagram not only the ideal change curve 82 of the differential voltage is plotted but also the actual change curve 84. The ideal change curve 82 follows a step-shaped change curve, in which the differential voltage transitions from a positive value (for example 2 V in a CAN bus) to a value of 0 V. The actual change curve 84, however, has an oscillation (overshoot), which arises on the edge of the ideal change curve and which is only damped to a negligible value after several oscillation periods.

[0050] In Figure 4B The damped change curve 86, that is to say the change curve of the actual differential voltage signal when the damping circuit is used, is shown in

[0051] In Figure 4C The change curve 90 of the resistance set between the two bus lines by the damping circuit according to the application is shown in the diagram, in which only the principle change curve is sketched, that is to say it does not matter whether the resistance is greater in one phase than in another phase, and no conclusions can be drawn from the diagram about the absolute size, the resistance can also be inconstant during a phase, in particular during the second phase, in which the first and second transistors act as voltage-controlled resistors, and the gate-source voltage decreases according to an RC time constant defined by the gate-source capacitance and the resistor element. During the first phase 92 (first state or time period, that is to say the first and second transistors are on), the bus lines are connected or short-circuited to one another by the very low resistance of the damping circuit, whereby the oscillation is strongly damped (because the corresponding time constant RC is also small for the resistance R). In the second phase 94 (second state or time period, that is to say the first and second transistors behave as voltage-controlled resistors), the resistance is increased by the damping circuit, so that a weaker bus user can also generate a differential voltage on the bus, in which at the same time the resistance is always still small enough to further damp the oscillation. In a further development or in the third phase 96 (third state or time period, that is to say the first and second transistors are off), the bus lines are no longer connected to one another or are only connected to one another with a very high resistance by the damping circuit. The first to third phases correspond to the first to third states of the control voltage introduced above.

Claims

1. A method for attenuating oscillations on a bus line of a bus system based on a differential voltage signal when using an attenuation device (30) for a bus (10) of a bus system (2), wherein the bus has a first bus line (6) and a second bus line (8), wherein the attenuation device (30) has an attenuation circuit (44) that provides a variable resistance value between the first bus line (6) and the second bus line (8) and the attenuation circuit is capable of operating in at least three circuit states. In the first circuit state, the first bus line (6) and the second bus line (8) are connected by attenuation resistors (50, 52) with a first resistance value. In the second circuit state, the first bus line (6) and the second bus line (8) are connected by attenuation resistors (50, 52) with second resistance values, and In the third circuit state, the first bus line (6) and the second bus line (8) are connected by attenuation resistors (50, 52) with a third resistance value. Wherein the first resistance value is less than the second resistance value, and the second resistance value is less than the third resistance value. The attenuation device (30) further includes a control circuit (46) with first and second control connectors (36, 38), which switches the attenuation circuit between various circuit states based on voltage signals at the first and second control connectors (36, 38). The method includes the following steps: Identify the edges in the differential voltage signal; If the edge is identified, at least one voltage is provided at the first and second control terminals, wherein - Provide the at least one voltage according to the first circuit state during the first time period. - In a second time period adjacent to the first time period, the at least one voltage is provided according to the second circuit state, and - The at least one voltage is provided in accordance with the third circuit state during a third time period outside of the first and second time periods.

2. The method according to claim 1, wherein the edge is the falling edge of the differential voltage signal.

3. The method according to claim 1 or 2, wherein, If the edge is identified, a high-level voltage signal is provided at the first control connector during the first time period and no voltage signal is provided at the second control connector; no voltage signal is provided at both the first and second control connectors during the second time period; and no voltage signal is provided at the first control connector and a high-level voltage signal is provided at the second control connector during the third time period.

4. The method according to claim 1, wherein the bus system based on differential voltage signals is a controller area network bus system.

5. An attenuation device (30) for a bus (10) of a bus system (2) based on differential voltage signals, wherein the bus has a first bus line (6) and a second bus line (8), the attenuation device having an attenuation circuit (44) that provides a variable resistance value between the first bus line (6) and the second bus line (8) and is capable of operating in at least three circuit states. In the first circuit state, the first bus line (6) and the second bus line (8) are connected by attenuation resistors (50, 52) with a first resistance value. In the second circuit state, the first bus line (6) and the second bus line (8) are connected by attenuation resistors (50, 52) with second resistance values, and In the third circuit state, the first bus line (6) and the second bus line (8) are connected by attenuation resistors (50, 52) with a third resistance value. Wherein the first resistance value is less than the second resistance value, and the second resistance value is less than the third resistance value. It also includes a control circuit (46) with first and second control connectors (36, 38), which switches the attenuation circuit between various circuit states based on voltage signals at the first and second control connectors (36, 38). The device has a control unit (20) having a connection element for connection to the first and second bus lines and at least one output terminal for connection to the first and second control connectors (36, 38), and the control unit sets up all method steps for implementing the method according to any one of claims 1 to 4, wherein predetermined first and second time periods are used.

6. The attenuation device (30) according to claim 5, wherein the second resistance value increases over time.

7. The attenuation device (30) according to claim 5 or 6, wherein the attenuation resistor (50, 52) having a first resistance value and / or the attenuation resistor (50, 52) having a second resistance value and / or the attenuation resistor (50, 52) having a third resistance value is implemented as a circuit having at least one semiconductor switch.

8. The attenuation device (30) according to claim 5 or 6, wherein the attenuation device comprises: The device comprises a first field-effect transistor (FET) (50) having a predetermined gate-source capacitance, a second FET (52) having a predetermined gate-source capacitance, and a resistor element (48) having a predetermined resistance value, wherein the drain terminal of the first FET is connected to a terminal (32) for the first bus line, and the drain terminal of the second FET is connected to a terminal (34) for the second bus line, wherein the source terminals of the first FET and the second FET are connected to a common source connection point (54), wherein the gate terminals of the first FET and the second FET are connected to a common gate connection point (56), and wherein the resistor element is connected to the source connection point and the gate connection point.

9. The attenuation device (30) according to claim 8, wherein the control circuit (46) is connected to the gate connection point and the source connection point of the attenuation circuit and has a voltage connector (40) and a reference potential connector (42); wherein the control circuit is configured to, when a voltage is applied at the voltage connector and a reference potential is applied at the reference potential connector: If at least one voltage representing a first circuit state is applied at the first and second control terminals, the source connection is connected to the voltage terminal and the gate connection is connected to the reference potential terminal. If at least one voltage indicating a second circuit state is applied at the first and second control terminals, the source connection and gate connection in the control circuit are disconnected. If at least one voltage representing a third circuit state is applied at the first and second control terminals, the source connection point is connected to the gate connection point with low impedance.

10. The attenuation device according to claim 9, The first circuit state is represented by the following: a high-level voltage signal is applied at the first control connector and no voltage signal is applied at the second control connector; The second circuit state is represented by the following: no voltage signal is applied at both the first and second control terminals; and The third circuit state is characterized by applying a high-level voltage signal at the second control connector and not applying a voltage signal at the first control connector.

11. The attenuation device according to claim 10, wherein the control circuit (46) has a first switching element configured to switch the connection between the voltage connector and the source connection and the connection between the reference potential connector and the gate connection to an on state when a high-level voltage signal is applied at the first control connector, and to switch the connection between the voltage connector and the source connection and the connection between the reference potential connector and the gate connection to a non-on state when no voltage signal is applied at the first control connector; The first switching element includes a third and a fourth FET (58, 60), wherein the gate terminals of the third and fourth FETs are connected to the first control terminal; Furthermore, the source terminal of the third FET (58) is connected to the voltage terminal and the drain terminal of the third FET is connected to the source terminal, and the source terminal of the fourth FET (60) is connected to the reference potential terminal and the drain terminal of the fourth FET is connected to the gate terminal.

12. The attenuation device according to claim 10 or 11, wherein the control circuit has a second switching element configured to switch the connection between the source connection point and the gate connection point to an on state when a high-level voltage signal is applied at the second control connector, and to switch the connection between the source connection point and the gate connection point to a non-on state when no voltage signal is applied at the second control connector. The second switching element includes a fifth and a sixth FET (62, 64) connected in series, wherein the gate terminals of the fifth and sixth FETs are connected to the second control terminal; Furthermore, the source terminal of the fifth FET (62) is connected to the source terminal of the sixth FET (64), and the drain terminal of the fifth FET is connected to the source terminal, and the drain terminal of the sixth FET is connected to the gate terminal.

13. The attenuation device according to claim 5, wherein the bus system based on differential voltage signal is a controller area network bus system.

14. An attenuation device, comprising a plurality of attenuation devices connected in parallel on a bus line according to any one of claims 5 to 13.

15. The attenuation device according to claim 14, wherein the predetermined gate-source capacitance and / or predetermined resistance values ​​of different attenuation devices have different values, and wherein the RC time constants of different attenuation devices are different.

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