Sensing circuit and pixel circuit

Abstract

The present disclosure provides a sensing circuit and a pixel circuit. The sensing circuit includes a light sensing element, a first transistor, and a temperature sensing element. The light sensing element is configured to receive light and transmit a first current according to an intensity of the light. A gate terminal of the first transistor is configured to receive a first control signal. The light sensing element and the first transistor are coupled in series with each other between a first node and a second node. The temperature sensing element is coupled between the first node and the second node and is configured to generate a second current according to a temperature. The temperature sensing element includes a channel structure, a first gate, a second gate, and a light shielding structure. The channel structure is configured to transmit the second current. The first gate is disposed above the channel structure. The second gate is disposed below the channel structure. The light shielding structure is disposed above the first gate.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a sensing circuit and a pixel circuit, and particularly relates to a sensing circuit and a pixel circuit including a light sensing element and a temperature sensing element. BACKGROUND

[0002] In a current display panel with a fingerprint recognition function, the photosensitive signal generated by the light sensing element is easily disturbed by the ambient temperature, thereby affecting the accuracy of the fingerprint imaging. If the photosensitive signal is to be corrected according to the temperature by an external circuit, the temperature information of the pixel must be obtained by a temperature sensing element. However, since the temperature sensing element must exclude the influence of light, the existing light sensing element cannot be directly used as the temperature sensing element. SUMMARY

[0003] An embodiment of the present disclosure provides a sensing circuit including a light sensing element, a first transistor, and a temperature sensing element. The light sensing element is configured to receive light and transmit a first current according to an intensity of the light. A gate terminal of the first transistor is configured to receive a first control signal. The light sensing element and the first transistor are coupled in series with each other between a first node and a second node. The temperature sensing element is coupled between the first node and the second node and is configured to generate a second current according to a temperature. The temperature sensing element includes a channel structure, a first gate, a second gate, and a light shielding structure. The channel structure is configured to transmit the second current. The first gate is disposed above the channel structure and is configured to control the channel structure to operate in a closed state according to a second control signal. The second gate is disposed below the channel structure and is configured to control a magnitude of the second current in the channel structure according to a third control signal. The light shielding structure is disposed above the first gate and is configured to block light from above the temperature sensing element.

[0004] Another embodiment of the present disclosure provides a pixel circuit including a sensing circuit. The sensing circuit includes a semiconductor device. The semiconductor device is coupled between a first node and a second node. The semiconductor device includes a channel structure, a first gate, a second gate, and a light shielding structure. The channel structure is configured to transmit a first current. The first gate is disposed above the channel structure and is configured to control the channel structure to operate in a closed state according to a first control signal. The second gate is disposed below the channel structure and is configured to control a magnitude of the first current in the channel structure according to a second control signal. The light shielding structure is disposed above the first gate and is configured to block light from above the semiconductor device. When the second gate controls the channel structure to have a relatively large first current, the semiconductor device is configured to serve as a temperature sensing element. When the second gate controls the channel structure to have a relatively small first current, the semiconductor device is configured to serve as a switching element. BRIEF DESCRIPTION OF DRAWINGS

[0005] Figure 1A circuit diagram of a pixel circuit according to some embodiments of the present disclosure.

[0006] Figure 2 A schematic diagram of a semiconductor device according to some embodiments of the present disclosure.

[0007] Figure 3 A semiconductor device according to some embodiments of the present disclosure. Figure 1 and Figure 2 A current-voltage relationship diagram of the semiconductor device shown in

[0008] Figure 4 A pixel circuit according to some embodiments of the present disclosure. Figure 1 A signal timing diagram of the pixel circuit shown in

[0009] Figure 5A A circuit diagram of a pixel circuit according to different embodiments of the present disclosure.

[0010] Figure 5B A pixel circuit according to some embodiments of the present disclosure. Figure 5A A signal timing diagram of the pixel circuit shown in

[0011] Figure 6A A circuit diagram of a pixel circuit according to different embodiments of the present disclosure.

[0012] Figure 6B A pixel circuit according to some embodiments of the present disclosure. Figure 6A A signal timing diagram of the pixel circuit shown in

[0013] BRIEF DESCRIPTION OF DRAWINGS

[0014] 100: pixel circuit

[0015] 120: sensing circuit

[0016] 140: reset circuit

[0017] 160: signal amplification circuit

[0018] 122: light-sensing element

[0019] 124: semiconductor device

[0020] T1: transistor

[0021] T2: transistor

[0022] T3: transistor

[0023] N1: node

[0024] N2: node

[0025] C1: capacitor

[0026] A: control signal

[0027] B: Control signal

[0028] C: Control signal

[0029] SR_R: Control signal

[0030] SR_W: Control signal

[0031] SVSS: Reference Voltage

[0032] SVDD: Reference Voltage

[0033] SOUT: Output signal

[0034] 200: Semiconductor devices

[0035] B1: Light

[0036] 260: Light-shielding structure

[0037] 220: Gate

[0038] 225: Isolation Structure

[0039] I1: Current

[0040] 235: Isolation Structure

[0041] 230: Gate

[0042] 210: Channel Structure

[0043] 241: Conductive structure

[0044] 242: Conductive structure

[0045] B2: Semiconductor Devices

[0046] C10-C19: Curves

[0047] C21-C24: Curves

[0048] C31-C34: Curves

[0049] C41-C44: Curves

[0050] F N ,F N+1 ,F N+2 :frame

[0051] 500: Pixel circuit

[0052] 520: Sensing Circuit

[0053] 540: Reset Circuit

[0054] 560: Signal Amplification Circuit

[0055] 522: light sensing element

[0056] 524: semiconductor device

[0057] T4 to T7: transistor

[0058] N3, N4: node

[0059] C2: capacitor

[0060] VREF: reference voltage

[0061] C51 to C54: curve

[0062] C61 to C64: curve

[0063] C71 to C74: curve

[0064] 600: pixel circuit

[0065] 620: sensing circuit

[0066] 622: light sensing element

[0067] 624: semiconductor device

[0068] T8, T9: transistor

[0069] N5, N6: node

[0070] C3: capacitor

[0071] L1: control line

[0072] L2: data line

[0073] RL: control signal

[0074] SL: control signal

[0075] RI: output signal

[0076] P1, P2: period

[0077] C81 to C84: curve

[0078] C91 to C94: curve

[0079] C01 to C04: curve DETAILED DESCRIPTION

[0080] The following is a detailed description of embodiments with reference to the accompanying drawings. However, the provided embodiments are not intended to limit the scope of this disclosure, and the description of the structure's operation is not intended to limit its execution order. Any structure resulting from the recombination of elements and producing an apparatus with equivalent technical effects is within the scope of this disclosure. Furthermore, the illustrations are for illustrative purposes only and are not drawn to their original dimensions. For ease of understanding, the same or similar elements will be designated with the same symbols in the following description.

[0081] In this document, unless otherwise specified in the text, “a” and “the” may refer to one or more. Furthermore, the terms “comprising,” “including,” “having,” and similar words used herein are used to specify the described features, areas, integers, steps, operations, elements, and / or components.

[0082] In this document, when an element is described as being “connected,” “coupled,” or “electrically connected” to another element, the element may be directly connected, directly coupled, or directly electrically connected to the other element, or there may be an additional element between the two elements, and the element is indirectly connected, indirectly coupled, or indirectly electrically connected to the other element. Furthermore, although terms such as “first,” “second,” etc., are used herein to describe different elements, these terms are only used to distinguish elements or operations described using the same technical terminology.

[0083] Some embodiments of this disclosure provide a pixel circuit. Please refer to... Figure 1 . Figure 1 This is a circuit diagram of a pixel circuit 100 according to some embodiments of the present disclosure. The pixel circuit 100 includes a sensing circuit 120, a reset circuit 140, and a signal amplification circuit 160. In some embodiments, the pixel circuit 100 generates a light sensing signal and a temperature sensing signal through the sensing circuit 120, then uses the signal amplification circuit 160 to amplify and output the light sensing signal and the temperature sensing signal, and resets the sensing circuit 120 through the reset circuit 140 after the sensing is completed and / or before the sensing is prepared.

[0084] like Figure 1 As shown, sensing circuit 120 is coupled between node N1 and node N2, reset circuit 140 is coupled between the reference voltage terminal used to provide reference voltage SVSS and node N1, and signal amplification circuit 160 is coupled between the reference voltage terminal used to provide reference voltage SVDD and node N1.

[0085] like Figure 1As shown, the sensing circuit 120 includes a photosensor 122, a transistor T1, a semiconductor device 124, and a capacitor C1. The photosensor 122 and the transistor T1 are connected in series between nodes N1 and N2. The semiconductor device 124 is coupled between nodes N1 and N2. The capacitor C1 is coupled between nodes N1 and N2. In other words, the series-coupled photosensor 122, transistor T1, semiconductor device 124, and capacitor C1 are connected in parallel between nodes N1 and N2.

[0086] In some embodiments, the photosensitive element 122 is used to receive light and transmit current according to the intensity of the received light. In some embodiments, when the light received by the photosensitive element 122 has a relatively high intensity, the photosensitive element 122 is used to transmit a relatively large current; when the light received by the photosensitive element 122 has a relatively low intensity, the photosensitive element 122 is used to transmit a relatively small current.

[0087] In some embodiments, the current generated when the photosensitive element 122 receives high-intensity light is called photocurrent, and the current generated when the photosensitive element 122 receives low-intensity light or does not receive light is called dark current. In some embodiments, when the voltage across the photosensitive element 122, the ambient temperature, and other conditions remain unchanged, the photocurrent is greater than the dark current.

[0088] In some embodiments, the photosensitive element 122 is used to implement the fingerprint recognition function of the display panel. The display panel with fingerprint recognition function includes multiple pixel circuits 100 and a backlight module (not shown). Figure 1 (In the image). To perform fingerprint recognition, the backlight module of the display panel first illuminates the user's finger. When the light is reflected back by the user's finger, the photosensitive element 122 of the pixel circuit 100 receives this reflected light. Since the user's fingerprint contains peaks and valleys, and the peaks and valleys reflect light of different intensities, the photosensitive element 122 in the pixel circuit 100 corresponding to the valleys and peaks will generate a larger photocurrent and a smaller dark current, respectively. In some embodiments, the display panel further includes an integrated circuit for establishing the user's fingerprint based on the ratio and / or difference between the aforementioned photocurrent and dark current.

[0089] In some embodiments, when the ambient temperature of the photosensitive element 122 rises, the photocurrent and dark current generated by the photosensitive element 122 also increase, and the increase rates of the photocurrent and dark current are not the same, thus affecting the accuracy of fingerprint recognition. The pixel circuit 100 uses the semiconductor device 124 in the sensing circuit 120 to sense the ambient temperature, transmits the temperature sensing signal to the integrated circuit, and then the integrated circuit corrects the magnitude of the current generated by the photosensitive element 122 based on the temperature sensing signal.

[0090] In some embodiments, the light sensing element 122 is a silicon-rich oxide (SRO) light sensing element.

[0091] As shown in FIG. 1, the first end of the transistor T1 is coupled to the second end of the light sensing element 122, the second end of the transistor T1 is coupled to the node N2, and the gate end of the transistor T1 is configured to receive a control signal B. Figure 1

[0092] In some embodiments, the transistor T1 is a p-type metal-oxide-semiconductor (PMOS) transistor, and the gate end of the transistor T1 is configured to receive the control signal B. When the control signal B has a voltage level corresponding to a logic low, the transistor T1 is turned on; when the control signal B has a voltage level corresponding to a logic high, the transistor T1 is turned off.

[0093] As shown in FIG. 1, the semiconductor device 124 has two gates, and the two gates are configured to receive a control signal A and a control signal C, respectively. By applying voltages to the two gates of the semiconductor device 124, the semiconductor device 124 can be controlled to operate in an on state or an off state. Figure 1

[0094] In some embodiments, the semiconductor device 124 has an N-type channel, and when the control signal A has a voltage level corresponding to a logic low, the semiconductor device 124 operates in an off state; when the control signal A has a voltage level corresponding to a logic high, the semiconductor device 124 operates in an on, on state.

[0095] In some embodiments, the semiconductor device 124 operates in an off state during both the light sensing period and the temperature sensing period. In the off state, there is still a certain amount of current flowing through the semiconductor device 124. In some embodiments, the amount of current can be controlled by applying a different amount of the control signal C to the other gate of the semiconductor device 124.

[0096] In some embodiments, the semiconductor device 124 has a structure as shown in FIG. 2. Please refer to Figure 2 Figure 2 . Figure 2 FIG. 2 is a schematic diagram of a semiconductor device 200 according to some embodiments of the present disclosure. The semiconductor device 200 includes a channel structure 210, a gate 220, an isolation structure 225, a gate 230, an isolation structure 235, conductive structures 241 and 242, and a light shielding structure 260.

[0097] As shown in FIG. 2, the first end of the transistor T1 is coupled to the second end of the light sensing element 122, the second end of the transistor T1 is coupled to the node N2, and the gate end of the transistor T1 is configured to receive a control signal B. Figure 2 ​​​As shown, gate 220, isolation structure 225, channel structure 210, isolation structure 235, and gate 230 are stacked sequentially from top to bottom. Gate 220 is disposed above channel structure 210, and isolation structure 225 is disposed between gate 220 and channel structure 210. Gate 230 is disposed below channel structure 210, and isolation structure 235 is disposed between gate 230 and channel structure 210.

[0098] In some embodiments, the gate 220 is used to receive a control signal to control the channel structure 210 to operate in an on or off state. When the gate 220 receives the control signal, an electric field is formed between the gate 220 and the channel structure 210 and across the isolation structure 225, causing carriers in the channel structure 210, such as electrons or holes, to migrate under the influence of this electric field, thereby causing the channel structure 210 to operate in an on or off state.

[0099] In some embodiments, the gate 230 is used to receive a control signal to control the magnitude of the current I1 in the channel structure 210. When the gate 230 receives the control signal, an electric field is formed between the gate 230 and the channel structure 210 and across the isolation structure 235.

[0100] In some embodiments, the gate 220 of the semiconductor device 200 corresponds to Figure 1 The gate of semiconductor device 124 is used to receive control signal A, and the gate 230 of semiconductor device 200 corresponds to... Figure 1 The gate of the semiconductor device 124 is used to receive the control signal C.

[0101] In some embodiments, gate 220 is used to receive control signals (e.g. Figure 1 The control signal A) controls the channel structure 210 to operate in the off state according to the control signal, and the gate 230 is used to control the channel structure 210 to operate in the off state according to the control signal (e.g., control signal A), and the gate 230 is used to control the channel structure 210 to operate in the off state according to the control signal (e.g., control signal A). Figure 1 The control signal C) controls the magnitude of the current I1 in the channel structure 210.

[0102] In some embodiments, the gate 220 of the semiconductor device 200 is referred to as the top gate, and the gate 230 of the semiconductor device 200 is referred to as the bottom gate. The semiconductor device 200 is referred to as a protrusion-gate low-temperature poly-silicon (LTPS) thin-film transistor (TFT).

[0103] In some embodiments, the channel structure 210 has dopants such that carriers such as electrons or holes are filled in the channel structure 210. The channel structure 210 forms a channel through the electric field formed by the gate 220 and / or the gate 230, and the channel structure 210 is used to transmit current I1 when there is a potential difference between the left and right ends of the channel structure 210.

[0104] like Figure 2 As shown, conductive structures 241 and 242 are coupled to the left and right ends of channel structure 210, respectively. In some embodiments, conductive structure 241 receives a relatively high voltage, and conductive structure 242 receives a relatively low voltage. Current I1 will be transmitted from conductive structure 241 to channel structure 210, and then from channel structure 210 to conductive structure 242.

[0105] In some embodiments, conductive structure 241 is referred to as the source terminal of semiconductor device 200, and conductive structure 242 is referred to as the drain terminal of semiconductor device 200.

[0106] like Figure 2 As shown, the light-shielding structure 260 is disposed above the gate 220 and is used to block the light B1 from above the semiconductor device 200.

[0107] In some examples, the semiconductor device 200 does not have a light-shielding structure 260, and light B1 will penetrate the isolation structure 225 and illuminate the channel structure 210, thereby affecting the magnitude of the current I1 in the channel structure 210.

[0108] In some embodiments, the light-shielding structure 260 disposed above the semiconductor device 200 can prevent light B1 from affecting the magnitude of current I1 in the channel structure 210.

[0109] like Figure 2 As shown, gate 230 has a relatively large width, while gate 220 has a relatively small width. The wider gate 230 can prevent light B2 from passing through the isolation structure 235 and illuminating the channel structure 210, thereby affecting the magnitude of the current I1 in the channel structure 210.

[0110] In some embodiments, Figure 1 Semiconductor device 124 and Figure 2 The semiconductor device 200 has, for example Figure 3 The current-voltage relationship is shown. Figure 3 According to some embodiments of this disclosure Figure 1 and Figure 2 The current-voltage relationship diagrams for semiconductor devices 100 and 200 are shown. Figure 3 The vertical axis represents the current I1 of the semiconductor device 200. Figure 3The horizontal axis represents the voltage level of the control signal received by the gate 220 of the semiconductor device 200. This control signal corresponds to... Figure 1 The control signal C received by the semiconductor device 124.

[0111] like Figure 3 As shown, the dashed line represents the relationship between current and voltage when the semiconductor device 200 operates at a temperature of 90°C; the solid line represents the relationship between current and voltage when the semiconductor device 200 operates at room temperature. In some embodiments, the room temperature is approximately 20°C to 30°C.

[0112] In some embodiments, Figure 3 Each pair of curves corresponds to the voltage level of the control signal C received by the gate 230 of the semiconductor device 200. Curves C11-C12 correspond to a voltage level of 10V for the control signal C, curves C13-C14 correspond to a voltage level of 5V for the control signal C, curves C15-C16 correspond to a voltage level of 0V for the control signal C, curves C17-C18 correspond to a voltage level of -5V for the control signal C, and curves C19-C10 correspond to a voltage level of -10V for the control signal C.

[0113] like Figure 3 As shown, under a specific operating temperature and when the semiconductor device 200 is in the off state, when the voltage level of the control signal C received by the gate 230 is negative, the current I1 of the channel structure 210 is larger; when the voltage level of the control signal C received by the gate 230 is positive, the current I1 of the channel structure 210 is smaller. For example, when the temperature is 90°C and the gate 220 receives a control signal with a voltage level of -8.5V, as indicated by curves C19, C17, C15, C13, and C11, the gate 230 receiving a control signal C with a voltage level of -10V causes the current I1 of the channel structure 210 to have the largest magnitude; the gate 230 receiving a control signal C with a voltage level of -5V causes the current I1 of the channel structure 210 to have the second largest magnitude; the gate 230 receiving a control signal C with a voltage level of 0V causes the current I1 of the channel structure 210 to have the medium magnitude; the gate 230 receiving a control signal C with a voltage level of 5V causes the current I1 of the channel structure 210 to have the second largest magnitude; and the gate 230 receiving a control signal C with a voltage level of 10V causes the current I1 of the channel structure 210 to have the smallest magnitude.

[0114] Similarly, when the temperature is room temperature and the semiconductor device 200 is in the off state, as indicated by curves C10, C18, C16, C14, and C12, if the voltage level of the control signal C received by the gate 230 is negative, the current I1 of the channel structure 210 is larger; if the voltage level of the control signal C received by the gate 230 is positive, the current I1 of the channel structure 210 is smaller. For example, receiving a control signal C with a voltage level of -10V at the gate 230 results in the maximum current I1 of the channel structure 210, while receiving a control signal C with a voltage level of 10V at the gate 230 results in the minimum current I1 of the channel structure 210.

[0115] like Figure 3 As shown, when the semiconductor device 200 is in the off state, the channel structure 210 exhibits a larger current I1 at a temperature of 90°C compared to the case where the temperature is room temperature. For example, when the voltage level of the signal received by the gate 230 is 10V, as indicated by curves C11-C12, the channel structure 210 exhibits a larger current I1 at a temperature of 90°C compared to the case where the temperature is room temperature. Similarly, when the voltage level of the signal received by the gate 230 is greater than 10V, the current I1 will increase with increasing temperature. Through this relationship between temperature and current, the semiconductor device 200 can be used as a temperature sensing element.

[0116] It should be noted that Figure 3 The current-voltage relationship is only schematically shown at 90°C and room temperature. When the semiconductor device 200 operates at different temperatures, the current and voltage of the semiconductor device 200 will still exhibit a similar relationship. For example, when the temperature is above 90°C, the current-voltage relationship curve of the semiconductor device 200 is similar to... Figure 3 The dashed line in the diagram will carry a larger current. And when the temperature is below room temperature, the current-voltage relationship curve of semiconductor device 200 is similar to... Figure 3 The solid line in the middle will have a smaller current than the solid line in the middle.

[0117] Please refer to again Figure 1 As described above, the semiconductor device 124 has the characteristic of generating a larger current as the temperature rises, and therefore the semiconductor device 124 is used in the pixel circuit 100 to generate current according to temperature. When the semiconductor device 124 operates at a relatively high temperature, the semiconductor device 124 has a relatively large current; when the semiconductor device 124 operates at a relatively low temperature, the semiconductor device 124 has a relatively small current.

[0118] Furthermore, as mentioned above, when the voltage level of the control signal C is negative, the current of the semiconductor device 124 is relatively large; when the voltage level of the control signal C is positive, the current of the semiconductor device 124 is relatively small.

[0119] In some embodiments, by applying a control signal C with a voltage level being negative, the semiconductor device 124 has a relatively large current, in which the semiconductor device 124 is used as a temperature sensing element. When the semiconductor device 124 has a relatively large current, the current has a relatively large effect on the voltage level of the node Nl during a certain period due to the coupling of the semiconductor device 124 to the node Nl, in which the voltage level of the node Nl is suitable to be used as a temperature sensing signal.

[0120] In some embodiments, by applying a control signal C with a voltage level being positive, the semiconductor device 124 has a relatively small current, in which the semiconductor device 124 is used as a switching element. When the semiconductor device 124 has a relatively small current, the current is relatively small compared to the current generated by the light sensing element 122 due to the reception of light, in which the semiconductor device 124 is regarded as a switching element that is turned off and only generates a very small current, and the semiconductor device 124 has a negligible effect on the voltage level of the node Nl during a certain period.

[0121] In some embodiments, the pixel circuit 100 operates in a light sensing period and a temperature sensing period to obtain a light sensing signal and a temperature sensing signal of the pixel circuit 100, respectively. In the light sensing period, the transistor Tl is turned on, in which the current generated by the light sensing element 122 due to the reception of light is transmitted between the node Nl and the node N2. When the current is transmitted between the node Nl and the node N2, the voltage level of the node Nl will change with the movement of the charge. In a certain period, if the current generated by the light sensing element 122 has a stable magnitude, the voltage level of the node Nl will have a certain amount of change, in which the voltage level of the node Nl can be used as a light sensing signal to indicate the intensity of the light received by the light sensing element 122. The voltage level of the node Nl is received by the gate of the transistor T3 in the signal amplification circuit 160, in which the voltage level of the node Nl will determine the on degree of the transistor T3. The transistor T3 is used to generate an output signal SOUT according to the reference voltage SVDD received by the first end of the transistor T3 and the voltage level of the node Nl. Therefore, the light sensing signal represented by the voltage level of the node Nl is amplified by the signal amplification circuit 160 and output as the output signal SOUT.

[0122] In some embodiments, in the light sensing period, the semiconductor device 124 is operated in an off state due to the reception of the control signal A with a low voltage level, and the current of the semiconductor device 124 is controlled to have a small magnitude according to the control signal C. Therefore, the current of the semiconductor device 124 is relatively small compared to the current generated by the light sensing element 122 due to the reception of light in the light sensing period, in which the voltage level of the node Nl can be used as a light sensing signal to indicate the intensity of the light received by the light sensing element 122.

[0123] In some embodiments, during temperature sensing, transistor T1 is turned off, and the current generated by the photosensitive element 122 does not flow between nodes N1 and N2. During this period, semiconductor device 124 operates in a closed state by receiving a control signal A with a low voltage level, and the current of semiconductor device 124 is controlled to have a larger magnitude according to control signal C. When the current of semiconductor device 124 flows between nodes N1 and N2, the voltage level of node N1 will change with the movement of charge. If the current of semiconductor device 124 has a stable magnitude over a certain period, the voltage level of node N1 will have a certain amount of variation, and the voltage level of node N1 can therefore indicate the operating ambient temperature of semiconductor device 124 and be used as a temperature sensing signal.

[0124] Please refer to again Figure 2 Based on the above, during temperature sensing, the gate 230 controls the channel structure 210 with a relatively large current I1, and the semiconductor device 200 is used as a temperature sensing element; during light sensing, the gate 230 controls the channel structure 210 with a relatively small current I1, and the semiconductor device 200 is used as a switching element.

[0125] Please refer to the following at the same time Figure 1 and Figure 4 . Figure 4 According to some embodiments of this disclosure Figure 1 The signal timing diagram of pixel circuit 100 is shown. Pixel circuit 100 operates sequentially in frame F. N F N+1 and F N+2 period. Figure 4 The voltage levels of control signals A, B, C, SR_W, SR_R, node N1, and output signal SOUT are shown in different frames.

[0126] In some embodiments, in frame F N During this period, the pixel circuit 100 operates during light sensing. During this period, such as... Figure 4 As shown, logic signal A has a corresponding low logic voltage level, logic signal B has a corresponding high logic voltage level, and logic signal C has a corresponding high logic voltage level. Therefore, when transistor T1 is in the on state, the current generated by the photosensitive element 122 can be transmitted to node N1, and the gate of semiconductor device 124 controls the channel of semiconductor device 124 to have a smaller current according to the control signal C with a higher voltage level.

[0127] Following the previous embodiment, in frame F NDuring this period, when the control signal SR_R has a high logic level, transistor T2 is turned on, thereby transmitting the reference voltage SVSS to node N1 and the first terminal of capacitor C1. Therefore, transistor T2 of reset circuit 140 resets the voltage level of node N1 according to the reference voltage SVSS, so that node N1 has the same voltage level as the reference voltage SVSS; in addition, transistor T2 also charges capacitor C1 according to the reference voltage SVSS.

[0128] Following the previous embodiment, in frame F N During this period, after the reset circuit 140 resets the voltage level of node N1, as shown by curves C21 and C22, the voltage level of node N1 begins to slowly decrease. Curve C21 represents the change in the voltage level of node N1 when the photosensitive element 122 receives low-intensity light, and curve C22 represents the change in the voltage level of node N1 when the photosensitive element 122 receives high-intensity light. As described in the previous embodiment, the photosensitive element 122 generates current due to receiving light. Since transistor T1 is turned on at this time, the voltage level of node N1 decreases towards the voltage level of the control signal SR_W due to charge movement. Because the control signal SR_W has a lower voltage level at this time, curves C21 and C22 both decrease slowly.

[0129] Following the above examples, such as Figure 4 As shown, in frame F N During this period, curve C22 decreases faster and by a greater extent, while curve C21 decreases slower and by a smaller extent. As mentioned earlier, curve C22 corresponds to a larger current in the photosensitive element 122, and curve C21 corresponds to a smaller current in the photosensitive element 122. Since a larger current represents a faster movement of charge, the voltage level at node N1 will drop towards the voltage level of the control signal SR_W more quickly when the current in the photosensitive element 122 is larger. Therefore, curves C21 and C22 exhibit the aforementioned differences.

[0130] Following the previous embodiment, in frame F N During this period, after the voltage level of node N1 drops for a certain period, the voltage level of the control signal SR_W is raised from logic low to logic high. Since the two ends of capacitor C1 are coupled to nodes N1 and N2 respectively, when the voltage of the control signal SR_W at node N2 is raised, the voltage of node N1 is also raised. Therefore, as shown in the figure, when the control signal SR_W is high logic, node N1 also has a corresponding high logic voltage level. In some embodiments, as shown by curves C21 and C22, since the voltage level of node N1 drops to different levels depending on the magnitude of the current generated by the photosensitive element 122 before being raised, when the voltage level of node N1 is raised due to the rise of the control signal SR_W, the voltage level of node N1 will also rise to different levels.

[0131] Continuing with the previous embodiment, when the voltage level of node N1 is raised to the level shown by curves C21 and C22, the voltage level of node N1 will turn on transistor T3. Transistor T3 is used to generate an output signal SOUT based on the reference voltage SVDD and the voltage level of node N1. As shown by curves C21 and C22, since the voltage level of node N1 is raised to different levels under different light intensities, transistor T3 is also turned on to different levels, so the output signal SOUT generated by transistor T3 will also change according to the light intensity. Curve C23 corresponds to curve C21 and corresponds to a lower light intensity, and curve C24 corresponds to curve C22 and corresponds to a higher light intensity. Based on the output signal SOUT shown by curves C23 and C24, pixel circuit 100 can obtain information about the intensity of light received by photosensor 122 through an additional integrated circuit.

[0132] In some embodiments, in frame F N+1 During this period, the pixel circuit 100 operates during temperature sensing. During this period, such as... Figure 4 As shown, logic signal A has a corresponding low logic voltage level, logic signal B has a corresponding low logic voltage level, and logic signal C has a corresponding low logic voltage level. Therefore, with transistor T1 in the off state, the current generated by the photosensor 122 cannot be transmitted to node N1, and the gate of semiconductor device 124 controls the channel of semiconductor device 124 to have a larger current according to the control signal C, which has a lower voltage level. In other words, by changing the voltage level of the control signal C, the current of semiconductor device 124 during temperature sensing is greater than the current of semiconductor device 124 during photosensing.

[0133] like Figure 4 As shown, frame F N+1 During the period, the control signals SR_W and SR_R are related to frame F. N The control signals SR_W and SR_R during this period have similar timing diagrams. Therefore, similar to the operation of transistor T2 in the sensing circuit 140 and transistor T3 in the signal amplification circuit 160 in the aforementioned embodiments, when the logic signal SR_R is logic high, transistor T2 resets the signal of node N1 according to the reference voltage SVSS. When the logic signal SR_W is raised to logic high, the voltage level of node N1 is also raised.

[0134] Following the above embodiment, with frame F N At different times during the period, in frame F N+1 During this period, the voltage level at node N1 decreases slowly due to the current flowing between nodes N1 and N2 in the semiconductor device 124. Curve C31 shows the change in the voltage level at node N1 when the semiconductor device 124 operates at a lower temperature, and curve C32 shows the change in the voltage level at node N1 when the semiconductor device 124 operates at a higher temperature. As previously...Figure 2 and Figure 3 As described in the embodiments, the higher the operating temperature, the greater the current of the semiconductor device 124. Curve C32 corresponds to a higher temperature, and a larger current will cause the voltage level of node N1 to drop towards the voltage level of the control signal SR_W at a faster rate; curve C31 corresponds to a lower temperature, and a smaller current will cause the voltage level of node N1 to drop towards the voltage level of the control signal SR_W at a slower rate.

[0135] Following the previous embodiment, in frame F N+1 During this period, after the voltage level of node N1 drops for a certain period, the voltage level of the control signal SR_W is raised from logic low to logic high, and the voltage of node N1 is also raised. In some embodiments, as shown by curves C31 and C32, since the voltage level of node N1 drops to different levels depending on the magnitude of the current of semiconductor device 124 before being raised, the voltage level of node N1 will also rise to different levels when it is raised due to the rise of the control signal SR_W.

[0136] Continuing with the previous embodiment, when the voltage level of node N1 is raised to the level shown by curves C31 and C32, the voltage level of node N1 will turn on transistor T3. Transistor T3 generates an output signal SOUT based on the reference voltage SVDD and the voltage level of node N1. As shown by curves C31 and C32, since the voltage level of node N1 is raised to different levels at different temperatures, transistor T3 is also turned on to different levels, causing the output signal SOUT generated by transistor T3 to change according to the operating temperature of semiconductor device 124. Curve C33 corresponds to curve C31 and corresponds to a lower temperature, while curve C34 corresponds to curve C32 and corresponds to a higher temperature. Based on the output signal SOUT shown by curves C33 and C34, pixel circuit 100 can obtain information about the operating temperature of semiconductor device 124 through an additional integrated circuit.

[0137] In some embodiments, in frame F N+1 Then, pixel circuit 100 in frame F N+2 The operation is repeated during the light sensing period. In frame F... N+2 During this period, the timing of the signals of the pixel circuit 100 and the operation of each component are related to frame F. N The same period applies. Curve C41 corresponds to curve C21, curve C42 corresponds to curve C22, curve C43 corresponds to curve C23, and curve C44 corresponds to curve C24.

[0138] Please refer to Figure 5A . Figure 5AThis is a circuit diagram of a pixel circuit 500 according to different embodiments of the present disclosure. The pixel circuit 500 includes a sensing circuit 520, a reset circuit 540, and a signal amplification circuit 560. The sensing circuit 520 is coupled between nodes N3 and N4, the reset circuit 540 is coupled between a reference voltage terminal providing a reference voltage VREF and node N3, and the signal amplification circuit 560 is coupled between a reference voltage terminal providing a reference voltage SVDD and node N3.

[0139] like Figure 5A As shown, the sensing circuit 520 includes a photosensor 522, a transistor T4, a semiconductor device 524, and a capacitor C2. The reset circuit 540 includes a transistor T5. The signal amplification circuit 560 includes transistors T6 and T7.

[0140] like Figure 1 and Figure 5A As shown, pixel circuit 500 and pixel circuit 100 have similar components, and their components also have similar connection relationships. Sensing circuit 520 corresponds to sensing circuit 120, reset circuit 540 corresponds to reset circuit 140, and signal amplification circuit 560 corresponds to signal amplification circuit 160. Photosensitive element 522 corresponds to photosensitive element 122, transistor T4 corresponds to transistor T1, semiconductor device 524 corresponds to semiconductor device 124, and capacitor C2 corresponds to capacitor C1. Transistor T5 corresponds to transistor T2. Transistor T6 corresponds to transistor T3.

[0141] The difference between pixel circuit 100 and pixel circuit 500 lies in the fact that the signal amplification circuit 560 of pixel circuit 500 additionally includes transistor T7. Transistor T7 is used to control when the voltage level at the second terminal of transistor T6 is output as the output signal SOUT. The first terminal of transistor T7 is coupled to the second terminal of transistor T6, the gate terminal of transistor T7 is used to receive the control signal SR_W, and the second terminal of transistor T7 is used to output the output signal SOUT. Furthermore, since pixel circuit 500 uses transistor T7 to control when the output signal SOUT is output, the second terminal of capacitor C2 is changed to receive a fixed reference voltage SVSS, and the first terminal of transistor T5 is changed to receive a reference voltage VREF.

[0142] Please refer to the following at the same time Figure 5A and Figure 5B . Figure 5B According to some embodiments of this disclosure Figure 5A The signal timing diagram of pixel circuit 500 is shown. Pixel circuit 500 operates sequentially in frame F. N F N+1 and F N+2 period. Figure 5B The voltage levels of control signals A, B, C, SR_W, SR_R, node N3, and output signal SOUT are shown in different frames.

[0143] In some embodiments, during frame F N , F N+1 , F N+2 , the pixel circuit 500 operates in light sensing period, temperature sensing period', and light sensing period, respectively. In addition, Figure 5B The voltage levels of the control signals A, B, C in different frames are the same as Figure 4 the control signals A, B, C in the pixel circuit 100.

[0144] In the above embodiment, during frame F N , when the control signal SR_R has a high logic level, the transistor T5 is turned on and thus transmits the reference voltage VREF to the node N3 and the first end of the capacitor C2. Therefore, the transistor T5 of the reset circuit 540 resets the voltage level of the node N3 according to the reference voltage VREF, so that the node N3 has the same voltage level as the reference voltage VREF; in addition, the transistor T5 also charges the capacitor C2 according to the reference voltage VREF.

[0145] In the above embodiment, during frame F N , after the reset circuit 540 resets the voltage level of the node N3, the voltage level of the node N3 starts to slowly decrease, as shown in curves C51 and C52. Curve C51 is the change of the voltage level of the node N3 when the light sensing element 522 receives low-intensity light, and curve C52 is the change of the voltage level of the node N3 when the light sensing element 522 receives high-intensity light. Curve C52 decreases faster and more, and curve C51 decreases slower and less. Curve C52 corresponds to the current of the larger light sensing element 522, and curve C51 corresponds to the current of the smaller light sensing element 522.

[0146] In some embodiments, after the reset circuit 540 resets the voltage level of the node N3 and during the period when the voltage level of the node N3 slowly decreases, the gate of the transistor T6 receives the voltage level of the node N3 and is turned on, but since the transistor T7 is in the off state at this time, no output signal SOUT is output by the transistor T7.

[0147] In the above embodiment, during frame F NDuring this period, after the voltage level of node N3 drops for a certain period, the voltage level of the control signal SR_W is raised from logic low to logic high. At this time, transistor T7 is turned on, and the second terminal of transistor T7 outputs the output signal SOUT. In some embodiments, as shown by curves C51 and C52, since the voltage level of node N3 drops to different levels depending on the magnitude of the current generated by the photosensor 522, the amplified output signal SOUT also has different levels when transistor T7 is turned on. Curve C53 corresponds to curve C51 and corresponds to a lower light intensity, while curve C54 corresponds to curve C52 and corresponds to a higher light intensity.

[0148] In some embodiments, in frame F N+1 During this period, pixel circuit 500 operates during temperature sensing. Frame F N+1 During the period, the control signals SR_W and SR_R are related to frame F. N The control signals SR_W and SR_R during this period have similar timing diagrams. Therefore, similar to the operation of transistor T5 in the sensing circuit 540 and transistor T7 in the signal amplification circuit 560 in the aforementioned embodiments, when the logic signal SR_R is logic high, transistor T5 resets the signal at node N3 according to the reference voltage VREF. When the logic signal SR_W is raised to logic high, transistor T7 outputs the output signal SOUT.

[0149] Following the above embodiment, with frame F N At different times during the period, in frame F N+1 During this period, the voltage level of node N3 decreases slowly due to the current flowing through semiconductor device 524. Curve C61 represents the change in the voltage level of node N3 when semiconductor device 524 operates at a lower temperature, and curve C62 represents the change in the voltage level of node N3 when semiconductor device 524 operates at a higher temperature. Curve C62 corresponds to a higher temperature, where a larger current causes the voltage level of node N3 to decrease towards the reference voltage SVSS more rapidly; curve C61 corresponds to a lower temperature, where a smaller current causes the voltage level of node N3 to decrease towards the reference voltage SVSS more slowly.

[0150] Following the previous embodiment, in frame F N+1During the period, the voltage level of the control signal SR_W is lifted from logic low to logic high after the voltage level of the node N3 drops for a period. At this time, the transistor T7 is turned on, and the second end of the transistor T7 outputs the output signal SOUT. In some embodiments, as shown in curves C61 and C62, because the voltage level of the node N3 drops to different degrees according to the size of the current generated by the semiconductor device 524, when the transistor T7 is turned on, the amplified output signal SOUT also has different degrees. Curve C63 corresponds to curve C61 and corresponds to a lower temperature, and curve C64 corresponds to curve C62 and corresponds to a higher temperature. According to the output signal SOUT as shown in curves C63 and C64, the pixel circuit 500 can obtain information about the operating temperature of the semiconductor device 524 through additional integrated circuits.

[0151] In some embodiments, after the frame F N+1 , the pixel circuit 500 operates again in the light sensing period during the frame F N+2 . During the frame F N+2 , the timing of the signals of the pixel circuit 500 and the operation of each element are the same as during the frame F N . Curve C71 corresponds to curve C51, curve C72 corresponds to curve C52, curve C73 corresponds to curve C53, and curve C74 corresponds to curve C54.

[0152] Please refer to Figure 6A . Figure 6A is a circuit diagram of a pixel circuit 600 according to different embodiments of the present disclosure. The pixel circuit 600 includes a sensing circuit 620, a transistor T9, a control line L1, and a data line L2. The sensing circuit 620 is coupled between a node N5 and a node N6. The first end of the transistor T9 is coupled to the node N5, the second end of the transistor T9 is coupled to the data line L2, and the gate end of the transistor T9 is coupled to the control line L1.

[0153] In some embodiments, the pixel circuit 600 is used in a display panel that adopts a passive driving mode, and the voltage level of the node N5 in the sensing circuit 620 is read or written through the control line L1 and the data line L2.

[0154] As shown in Figure 6A , the sensing circuit 620 includes a light sensing element 622, a transistor T8, a semiconductor device 624, and a capacitor C3.

[0155] As shown in Figure 1 and Figure 6AAs shown, the sensing circuit 620 of the pixel circuit 600 has similar elements as the sensing circuit 120 of the pixel circuit 100, and the elements have similar connection relationships. The photosensitive element 622 corresponds to the photosensitive element 122, the transistor T8 corresponds to the transistor T1, the semiconductor device 624 corresponds to the semiconductor device 124, and the capacitor C3 corresponds to the capacitor C1.

[0156] Please refer to Figure 6A and Figure 6B . Figure 6B for some embodiments according to the present disclosure Figure 6A The signal timing diagram of the pixel circuit 600 is shown. The pixel circuit 600 operates in the frame F N , F N+1 , and F N+2 , respectively. Figure 6B The voltage levels of the control signals A, B, C, SL, RL, the node N5, and the output signal RI in different frames are shown.

[0157] In some embodiments, during the frames F N , F N+1 , and F N+2 , the pixel circuit 600 operates in the photosensing period, the temperature sensing period, and the photosensing period, respectively. In addition, Figure 6B the voltage levels of the control signals A, B, and C in different frames are the same as those of the pixel circuit 100, and the operations of the transistor T8 and the semiconductor device 624 of the pixel circuit 600 in different periods are also the same as those of the corresponding elements in the pixel circuit 100. Figure 4

[0158] In the above embodiment, during the frame F N , when the control signals SL and RL both have high logic levels, the control signal SL is transmitted to the gate of the transistor T9 through the control line L1, the control signal RL is transmitted to the second terminal of the transistor T9 through the data line L2, the transistor T9 is thus turned on, and the high voltage level of the control signal RL is transmitted to the node N5 and the first terminal of the capacitor C3. Therefore, the transistor T9 resets the voltage level of the node N5 according to the control signal RL, so that the node N5 has the same voltage level as the control signal RL; in addition, the transistor T9 also charges the capacitor C3 according to the control signal RL.

[0159] In the above embodiment, during the frame F N ​During the period, the voltage level of node N5 starts to decrease slowly after transistor T9 resets the voltage level of node N5, as shown in curves C81 and C82. Curve C81 is the voltage level of node N5 when the light sensor 622 receives low intensity light, and curve C82 is the voltage level of node N5 when the light sensor 622 receives high intensity light. Curve C82 decreases faster and more than curve C81. Curve C82 corresponds to a larger current of the light sensor 622, and curve C81 corresponds to a smaller current of the light sensor 622.

[0160] In some embodiments, the voltage level of node N5 decreases slowly until the end of frame F N , and before the end of frame F , both control signals SL and RL have low voltage levels, and transistor T9 is turned off.

[0161] In some embodiments, during frame F N+1 , the sensing circuit 600 first reads the voltage level of node N5, and then resets the voltage level of node N5, and then performs temperature sensing. The control signals SL and RL during frame F N+1 have similar timing diagrams as the control signals SL and RL during frame F N .

[0162] In some embodiments, during period P1 of frame F N+1 , control signal SL is first raised from a low voltage level to a high voltage level, and control signal RL remains at a low voltage level. Transistor T9 is turned on, and the voltage level of node N5 is outputted as output signal RI through transistor T9, and output signal RI is transmitted through data line RL. Thus, the pixel circuit 600 obtains a light sensing signal. In some embodiments, as shown in curves C81 and C82, the voltage level of node N5 decreases to different levels during frame F N , according to the magnitude of the current generated by the light sensor 622. When transistor T9 is turned on, output signal RI also has different voltage levels. Curve C83 corresponds to curve C81 and corresponds to a lower light intensity, and curve C84 corresponds to curve C82 and corresponds to a higher light intensity.

[0163] In some embodiments, during period P2 of frame F N+1 , control signal SL remains at a high voltage level, and control signal RL is raised from a low voltage level to a high voltage level. The high voltage level of control signal RL is transmitted to node N5 and the first end of capacitor C3 through turned-on transistor T9. Thus, transistor T9 resets the voltage level of node N5 according to control signal RL, so that node N5 has the same voltage level as control signal RL; in addition, transistor T9 also charges capacitor C3 according to control signal RL.

[0164] After the period P2 of the frame F N+1 , the voltage level of the node N5 starts to decrease slowly, as shown by the curves C91 and C92. Unlike the frame F N , during the frame F N+1 , the voltage level of the node N5 decreases slowly due to the current of the semiconductor device 624. The curve C91 is the change of the voltage level of the node N5 when the semiconductor device 624 operates at a lower temperature, and the curve C92 is the change of the voltage level of the node N5 when the semiconductor device 624 operates at a higher temperature. The curve C92 corresponds to a higher temperature, and a larger current will make the voltage level of the node N5 decrease to the ground potential received by the node N6 at a faster speed; the curve C91 corresponds to a lower temperature, and a smaller current will make the voltage level of the node N5 decrease to the ground potential received by the node N6 at a slower speed.

[0165] In some embodiments, before the voltage level of the node N5 decreases slowly until the end of the frame F N+1 , the control signals SL and RL both have a low voltage level, and the transistor T9 is turned off.

[0166] Similarly, in some embodiments, during the frame F N+2 , the sensing circuit 600 first reads the voltage level of the node N5 during the period P3, and then resets the voltage level of the node N5 during the period P4, and then performs light sensing. The frame F N+2 has a similar signal timing diagram as the frame F N , the curve C01 corresponds to the curve C81, the curve C02 corresponds to the curve C82, the curve C03 corresponds to the curve C83, and the curve C04 corresponds to the curve C84.

[0167] In summary, the pixel circuit 100, 500, 600 disclosed in the present disclosure can perform light sensing through the light sensing element 122, 522, 622, temperature sensing through the semiconductor device 124, 524, 624, and correcting the light sensing signal by using the temperature sensing signal. In addition, since the bottom gate of the semiconductor device 124, 524, 624 can control the current of the semiconductor device 124, 524, 624 in the off state, the semiconductor device 124, 524, 624 can be used as a switching element during light sensing, and can be used as a temperature sensing element during temperature sensing.

[0168] Although the present disclosure has been disclosed as above with embodiments, it is not intended to limit the present disclosure. Any person skilled in the art can make various modifications and decorations without departing from the concept and scope of the present disclosure. The protection scope of the present disclosure is subject to the claims.

Claims

1. A sensing circuit, comprising: A light-sensing element for receiving a light source and transmitting a first current according to the intensity of the light source; A first transistor, the gate of which is used to receive a first control signal, wherein the photosensitive element and the first transistor are connected in series between a first node and a second node; as well as A temperature sensing element is coupled between the first node and the second node and is used to generate a second current based on a temperature. The temperature sensing element includes: A single-channel structure is used to transmit the second current; A first gate is disposed above the channel structure and is used to control the channel structure to operate in a closed state according to a second control signal; A second gate is disposed below the channel structure and is used to control the magnitude of the second current in the channel structure according to a third control signal; as well as A light-shielding structure is disposed above the first gate and is used to block light from above the temperature sensing element.

2. The sensing circuit of claim 1, further comprising: A capacitor is coupled between the first node and the second node; in, During a photosensitive period, the first transistor is turned on, and the second gate of the temperature sensing element is used to control the channel structure to have a relatively small second current according to the third control signal; During a temperature sensing period, the first transistor is not turned on, and the second gate of the temperature sensing element is used to control the channel structure to have a relatively large second current according to the third control signal.

3. The sensing circuit as claimed in claim 1, further comprising: A second transistor, wherein a first terminal of the second transistor is used to receive a first reference voltage, a second terminal of the second transistor is coupled to the first node, and a gate terminal of the second transistor is used to receive a fourth control signal; and A third transistor, the first terminal of which is used to receive a second reference voltage, and the gate terminal of which is used to receive the voltage level of the first node.

4. The sensing circuit of claim 3, further comprising: A fourth transistor, the first terminal of which is coupled to the second terminal of the third transistor, and the gate terminal of the fourth transistor is used to receive a fifth control signal.

5. The sensing circuit of claim 1, further comprising: A second transistor, wherein a first terminal of the second transistor is coupled to the first node, a gate terminal of the second transistor is coupled to a control line, and a second terminal of the second transistor is coupled to a data line.

6. A pixel circuit, comprising: A sensing circuit, comprising: A semiconductor device coupled between a first node and a second node, the semiconductor device comprising: A single-channel structure for transmitting a first current; A first gate is disposed above the channel structure and is used to control the channel structure to operate in a closed state according to a first control signal; A second gate is disposed below the channel structure and is used to control the magnitude of the first current in the channel structure according to a second control signal; as well as A light-shielding structure is disposed above the first gate and is used to block light from above the semiconductor device; in, When the second gate controls the channel structure to have a relatively large first current, the semiconductor device is used as a temperature sensing element. When the second gate controls the channel structure to have a relatively small first current, the semiconductor device is used as a switching element.

7. The pixel circuit of claim 6, wherein the sensing circuit further comprises: A photosensitive element for receiving a light source and transmitting a second current according to the intensity of the light source; A first transistor, the gate of which is used to receive a third control signal, wherein the photosensitive element and the first transistor are connected in series between the first node and the second node; and A capacitor is coupled between the first node and the second node.

8. The pixel circuit of claim 6, further comprising: A reset circuit, coupled between a first reference voltage terminal and the first node, is used to reset the voltage level of the first node according to a first reference voltage at the first reference voltage terminal; and A signal amplification circuit is coupled between a second reference voltage terminal and the first node, and is used to generate an output signal based on a second reference voltage at the second reference voltage terminal and the voltage level of the first node.

9. The pixel circuit of claim 8, wherein the reset circuit further comprises: A first transistor, the first terminal of which is coupled to a first reference voltage terminal, the second terminal of which is coupled to the first node, and the gate terminal of a second transistor for receiving a third control signal.

10. The pixel circuit of claim 8, wherein the signal amplification circuit further comprises: A first transistor, wherein a first terminal of the first transistor is coupled to a first reference voltage terminal, and the gate terminal of the first transistor is used to receive the voltage level of the first node; and A second transistor, the first terminal of which is coupled to the second terminal of the first transistor, and the gate terminal of the second transistor is used to receive a third control signal.

Images