Composite passivated gan-based hemt device and method of fabrication

Abstract

The application discloses a compound passivated GaN-based HEMT device and a manufacturing method thereof. The device comprises a base layer, a barrier layer and a passivation layer. A cap is arranged on the barrier layer. The passivation layer comprises a first passivation part and a second passivation part. The first passivation part is arranged on the surface of the barrier layer and extends to cover the cap. The second passivation part covers the regions of the barrier layer except the covered regions of the cap and the first passivation part on the surface of the barrier layer. The defect energy level of the first passivation part is greater than that of the second passivation part. A gate is arranged on the side of the passivation layer away from the barrier layer, and the gate penetrates the passivation layer and is connected with the cap. The first passivation part with a large defect energy level covers the cap, preventing the accumulation of holes on the surface of the cap and causing the negative drift of the threshold voltage. The second passivation part with a small defect energy level covers other regions, providing electrons and avoiding the current collapse effect and the positive drift of the threshold voltage caused by the capture of the electrons of other regions by the regions of the barrier layer except the cap.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a composite passivated GaN-based HEMT device and its fabrication method. Background Technology

[0002] GaN-based HEMT devices have become an excellent solution for high-frequency and high-power switching applications due to their superior characteristics such as high electron mobility, high critical breakdown electric field strength, and high electron saturation velocity.

[0003] To reduce gate leakage current, GaN-based HEMT devices typically employ a Schottky contact between the gate metal and the cap. However, this contact structure can lead to hole accumulation at the cap interface when electrical stress is applied to the gate, causing a negative threshold voltage drift. Conversely, when off-state electrical stress is applied to the drain, the interface of the non-cap region traps electrons from other regions, resulting in current collapse and a positive threshold voltage drift. Both scenarios can negatively impact the normal operation of the device.

[0004] Therefore, GaN-based HEMT devices need to be improved to avoid the above problems. Summary of the Invention

[0005] The purpose of this application is to provide a composite passivated GaN-based HEMT device and its fabrication method to solve the above-mentioned problems.

[0006] To address the aforementioned technical problems, in a first aspect, embodiments of this application provide a GaN-based HEMT device with composite passivation, comprising: a base layer, including at least: a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; a barrier layer disposed on the channel layer; a cap disposed on the barrier layer; and a passivation layer disposed on the barrier layer; wherein the passivation layer includes a first passivation portion and a second passivation portion, the first passivation portion being disposed on the surface of the barrier layer and extending to cover the cap, and the second passivation portion covering the area of ​​the barrier layer other than the area covered by the cap and the first passivation portion on the surface of the barrier layer, and the defect energy level of the first passivation portion being greater than the defect energy level of the second passivation portion; and a gate disposed on the side of the passivation layer opposite to the barrier layer, and the gate penetrating the passivation layer and connected to the cap.

[0007] In one possible implementation, the first passivation portion is composed of a material with a defect energy level greater than 2.8 electron volts, and the second passivation portion is composed of a material with a defect energy level between 0.1 electron volts and 1.5 electron volts.

[0008] In one possible implementation, the first passivation portion is made of aluminum oxide, and the second passivation portion is made of aluminum nitride.

[0009] In one possible implementation, the cap is a P-type cap.

[0010] In one possible implementation, the second passivation portion further covers the first passivation portion; the first passivation portion and the second passivation portion, which are stacked on the side of the P-type cap facing away from the barrier layer, have a first through hole, and the gate passes through the first through hole to connect the second passivation portion, the first passivation portion and the P-type cap.

[0011] In one possible implementation, the first passivation portion further covers the second passivation portion; the first passivation portion, which is stacked on the side of the P-type cap facing away from the barrier layer, has a second through hole, and the gate is connected to the P-type cap through the second through hole, passing through the first passivation portion.

[0012] In one possible implementation, the thickness of both the first passivation portion and the second passivation portion ranges from 1 nanometer to 20 nanometers.

[0013] To address the aforementioned technical problems, in a second aspect, embodiments of this application provide a GaN-based HEMT device with composite passivation, comprising: a base layer, including at least: a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; a barrier layer disposed on the channel layer; a source, a drain, and a cap disposed at intervals on the barrier layer, the cap comprising: a sidewall facing the source and the drain, and a surface facing away from the base layer; the barrier layer comprising: a first surface portion facing away from the base layer and close to the sidewall of the cap, and a second surface portion facing away from the base layer and connected to the first surface portion. Wherein, the first surface portion and the second surface portion are both surfaces of the barrier layer; the first passivation portion is disposed on the first surface portion of the barrier layer and extends along the sidewall of the cap towards the surface of the cap and has a first notch formed on the surface of the cap; the second passivation portion is disposed on the second surface portion of the barrier layer and covers the first passivation portion, and has a second notch formed on the first passivation portion on the surface of the cap; the gate is connected to the cap through a first through hole formed by the combination of the first notch and the second notch; wherein, the defect energy level of the first passivation portion is greater than the defect energy level of the second passivation portion.

[0014] In one possible implementation, the first passivation portion is composed of a material with a defect energy level greater than 2.8 electron volts, and the second passivation portion is composed of a material with a defect energy level between 0.1 electron volts and 1.5 electron volts.

[0015] In one possible implementation, the first passivation portion is made of aluminum oxide, and the second passivation portion is made of aluminum nitride.

[0016] To address the aforementioned technical problems, in a third aspect, embodiments of this application provide a GaN-based HEMT device with composite passivation, comprising: a base layer, including at least: a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; a barrier layer disposed on the channel layer; a source, a drain, and a cap disposed at intervals on the barrier layer, the cap comprising: a sidewall facing the source and the drain, and a surface facing away from the base layer; the barrier layer comprising: a first surface portion facing away from the base layer and close to the sidewall of the cap, and a second surface portion facing away from the base layer and connected to the first surface portion, wherein the first surface portion and... The second surface portion is the surface of the barrier layer; the second passivation portion is disposed on the second surface portion of the barrier layer, and the second passivation portion includes a sidewall facing the cap; the first passivation portion is disposed on the first surface portion of the barrier layer, one end of the first passivation portion extends along the sidewall of the second passivation portion toward the surface of the second passivation portion and covers the surface of the second passivation portion, and the other end of the first passivation portion extends along the sidewall of the cap toward the surface of the cap and forms a second through hole on the surface of the cap; the gate passes through the second through hole and is connected to the cap; wherein, the defect energy level of the first passivation portion is greater than the defect energy level of the second passivation portion.

[0017] In one possible implementation, the first passivation portion is composed of a material with a defect energy level greater than 2.8 electron volts, and the second passivation portion is composed of a material with a defect energy level between 0.1 electron volts and 1.5 electron volts.

[0018] In one possible implementation, the first passivation portion is made of aluminum oxide, and the second passivation portion is made of aluminum nitride.

[0019] To address the aforementioned technical problems, in a fourth aspect, embodiments of this application provide a method for fabricating a GaN-based HEMT device with composite passivation, comprising: obtaining a substrate, the substrate including at least a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; fabricating a barrier layer on the channel layer, and fabricating a cap on the surface of the barrier layer; fabricating a passivation layer on the surface of the barrier layer; drilling through-holes in the passivation layer to expose a portion of the cap, and fabricating a gate on the side of the passivation layer away from the barrier layer, the gate being connected to the cap through the through-holes; wherein the passivation layer includes a first passivation portion and a second passivation layer, the first passivation portion being disposed on the surface of the barrier layer and extending to cover the cap, the second passivation portion covering the area of ​​the barrier layer other than the area covered by the cap and the first passivation portion on the surface of the barrier layer, and the defect energy level of the first passivation portion being greater than the defect energy level of the second passivation portion.

[0020] In one possible implementation, the first passivation portion is composed of a material with a defect energy level greater than 2.8 electron volts, and the second passivation portion is composed of a material with a defect energy level between 0.1 electron volts and 1.5 electron volts.

[0021] In one possible implementation, the first passivation portion is made of aluminum oxide, and the second passivation portion is made of aluminum nitride.

[0022] In one possible implementation, the step of fabricating the passivation layer specifically includes: depositing a first passivation material layer on the surface of the barrier layer; etching away the portion of the first passivation material layer that does not contact the cap to expose the area of ​​the barrier layer other than the area covered by the cap and the first passivation portion on the surface of the barrier layer; and depositing a second passivation material layer, the second passivation material layer covering the first passivation material layer.

[0023] In one possible implementation, the step of fabricating the passivation layer specifically includes: depositing a second passivation material layer on the surface of the barrier layer, the second passivation material layer covering the cap; etching away a portion of the cap surface and a portion of the barrier layer in contact with the cap; and depositing a first passivation material layer covering the second passivation material layer and the cap.

[0024] The beneficial effects of this application are as follows: Unlike existing technologies, this application provides a composite passivated GaN-based HEMT device and its fabrication method. The composite passivated GaN-based HEMT device includes a base layer, a barrier layer, a cap, a gate, and a passivation layer. The base layer includes at least: a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; a barrier layer disposed on the channel layer; caps disposed at intervals on the barrier layer; and a passivation layer disposed on the barrier layer. The passivation layer includes a first passivation portion and a second passivation portion. The first passivation portion is disposed on the surface of the barrier layer and extends to cover the cap, while the second passivation portion covers the area of ​​the barrier layer other than the area covered by the cap and the first passivation portion on the surface of the barrier layer. The defect energy level of the first passivation portion is greater than the defect energy level of the second passivation portion. The gate is disposed on the side of the passivation layer facing away from the barrier layer, and the gate penetrates the passivation layer and is connected to the cap. In this application, a GaN-based HEMT device with composite passivation is constructed. After a cap is placed on the surface of the barrier layer, the surfaces of the barrier layer and the cap are passivated using two materials with different defect energy levels. The first passivation part with a larger defect energy level covers the cap and is used to capture holes accumulated on the cap surface, preventing holes from accumulating on the cap surface and causing a negative threshold voltage drift. The second passivation part with a smaller defect energy level covers the area of ​​the barrier layer other than the area covered by the cap and the first passivation part on the surface of the barrier layer. It is used to provide electrons and avoid the current collapse effect and positive threshold voltage drift caused by the area on the barrier layer other than the cap area capturing electrons from other areas. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0026] Figure 1 This is a schematic diagram of the structure of the first embodiment of the GaN-based HEMT device with composite passivation according to this application;

[0027] Figure 2 This is a schematic diagram of the structure of the second embodiment of the GaN-based HEMT device with composite passivation according to this application;

[0028] Figure 3 This is a schematic diagram of the structure of the third embodiment of the GaN-based HEMT device with composite passivation according to this application;

[0029] Figure 4 This is a schematic diagram of the structure of the fourth embodiment of the GaN-based HEMT device with composite passivation according to this application;

[0030] Figure 5This is a schematic flowchart of the first embodiment of the fabrication method for a composite passivated GaN-based HEMT device;

[0031] Figures 6a-6g yes Figure 5 Schematic diagram of the device structure after each step of the manufacturing process;

[0032] Figure 7 This is a schematic flowchart of the second embodiment of the fabrication method of the composite passivated GaN-based HEMT device of this application;

[0033] Figures 8a-8g yes Figure 7 A schematic diagram of the device structure after each step of the manufacturing process.

[0034] Reference numerals: 100 / 200 / 300 / 400, GaN-based HEMT device with composite passivation; 110 / 210 / 310 / 410, barrier layer; 121 / 221 / 321 / 421, source; 122 / 222 / 322 / 422, drain; 123 / 223 / 323 / 423, cap; 124 / 224 / 324 / 424, gate; 130 / 230, passivation layer; 311 / 411, first passivation layer; 312 / 412, second passivation layer; 131 / 231 / 331 / 431, first passivation layer; 132 / 232 / 332 / 432, second passivation layer; 140, channel layer; 150, buffer layer; 160, substrate layer. Detailed Implementation

[0035] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0036] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to limit the application. The singular forms “a,” “said,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms, unless otherwise clearly indicated above. “Multiple” generally includes at least two, but does not exclude the inclusion of at least one.

[0037] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0038] It should be understood that the terms "comprising," "including," or any other variations used herein are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0039] When GaN-based HEMT devices are subjected to electrical stress, they are prone to negative or positive threshold voltage drift and current collapse effects.

[0040] To address the aforementioned problems, this application proposes a composite passivated GaN-based HEMT device and its fabrication method. By covering the barrier layer with a capping layer of a first passivation portion having a larger defect energy level, and covering the region of the barrier layer excluding the capping layer and the first passivation portion of a second passivation portion having a smaller defect energy level, the above problems can be effectively solved. The composite passivated GaN-based HEMT device and its fabrication method provided in this application will be described in detail below with reference to the accompanying drawings and embodiments.

[0041] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of a first embodiment of the GaN-based HEMT device with composite passivation according to this application. In a specific embodiment, the GaN-based HEMT device 100 with composite passivation according to this application includes a base layer (not shown), a barrier layer 110, a passivation layer 130, a gate 124, and a cap 123.

[0042] The base layer includes at least: a substrate layer 160, a buffer layer 150 disposed on the substrate layer 160, and a channel layer 140 disposed on the buffer layer 150; a barrier layer 110 disposed on the channel layer 140; a cap 123 disposed on the barrier layer 110; and a passivation layer 130 disposed on the barrier layer 110. The passivation layer 130 includes a first passivation portion 131 and a second passivation portion 132. The first passivation portion 131 is disposed on the surface of the barrier layer 110 and extends to cover the cap 123. The second passivation portion 132 covers the area of ​​the barrier layer 110 other than the area covered by the cap 123 and the first passivation portion 131 on the surface of the barrier layer 110. The defect energy level of the first passivation portion 131 is greater than the defect energy level of the second passivation portion 132. The gate 124 is disposed on the side of the passivation layer 130 facing away from the barrier layer 110, and the gate 124 penetrates the passivation layer 130 and is connected to the cap 123.

[0043] Specifically, existing GaN-based HEMT devices suffer from threshold voltage drift. When the threshold voltage drifts negatively, the device may accidentally turn on during operation, compromising safe operation. When the threshold voltage drifts positively, it increases the device's on-resistance, leading to increased losses and generating more heat, hindering heat dissipation. In this embodiment, different passivation materials are used to passivate the surface of the barrier layer 110 and its cap 123 in sections. A first passivation portion 131 covers the interface of the cap 123 on the surface of the barrier layer 110. The first passivation portion 131 is made of a material with a large defect energy level, specifically aluminum oxide. Passivation materials with larger defect energy levels provide channels for electron-hole recombination, inducing and promoting electron-hole recombination, thus trapping holes and depositing them on the cap 123. This prevents hole accumulation on the cap surface and avoids negative threshold voltage drift. The second passivation portion 132 covers the area of ​​the barrier layer 110 other than the area covered by the cap 123 and the first passivation portion 131 on the surface of the barrier layer 110. It is a passivation material with a small defect energy level, and the material used may include aluminum nitride. The defect energy level of the first passivation portion 131 is located below the conduction band, and the energy level is distributed at a distance of 0.17 eV to 1 eV from the conduction band. It is close to the conduction band and the energy is in the electron bound state. In the passivation material of this defect energy level, electrons are easily ionized into free electrons in the conduction band, which can play the role of providing electrons. Depositing it on the area of ​​the barrier layer 110 other than the area covered by the cap 123 and the first passivation portion 131 on the surface of the barrier layer 110 can prevent the area outside the area covered by the cap 123 and the first passivation portion 131 from capturing electrons from other areas, thereby avoiding the problems of current collapse effect and threshold voltage positive drift.

[0044] Unlike existing technologies, the GaN-based HEMT device 100 with composite passivation in this application has a passivation layer 130 comprising a first passivation portion 131 and a second passivation portion 132. The defect energy level of the first passivation portion 131 is greater than that of the second passivation portion 132. By using the first passivation portion 131 with a larger defect energy level to passivate the interface of the cap 123 on the barrier layer 110, negative voltage drift caused by hole accumulation on its surface is avoided. By using the second passivation portion 132 with a relatively smaller defect energy level to passivate other areas on the surface of the barrier layer 110, the increase in device on-resistance caused by current collapse effect and positive threshold voltage drift is avoided, thereby improving device performance.

[0045] In some embodiments, the first passivation portion 131 is composed of a material with a defect energy level greater than 2.8 eV, and the second passivation portion 132 is composed of a material with a defect energy level between 0.1 eV and 1.5 eV. Specifically, the first passivation portion 131 is a material with a defect energy level greater than 2.8 eV, such as materials with defect energy levels of 2.83 eV, 3 eV, 3.12 eV, etc., and may include, for example, aluminum oxide; the passivation material of this defect energy level can provide a channel for electron-hole recombination, induce and promote electron-hole recombination, and avoid the accumulation of holes on the cap surface. The second passivation portion 132 is made of a material with defect energy levels between 0.1 volt and 1.5 volt, such as materials with defect energy levels of 0.15 electron volt, 0.39 electron volt, 1.13 electron volt, 1.5 electron volt, etc., and may include, for example, aluminum nitride. The passivation material of this defect energy level is close to the conduction band, and the energy is electron-bound. Electrons in the passivation material are easily ionized into free electrons in the conduction band, which can play the role of providing electrons and prevent electrons from being captured in other areas of the surface of the barrier layer 110 except for the area covered by the cap 123 and the first passivation portion 131 on the surface of the barrier layer 110, thereby avoiding the problems of current collapse effect and threshold voltage positive drift.

[0046] In some embodiments, the thickness of the first passivation portion 131 is less than the thickness of the second passivation portion 132. Preferably, the thickness of the first passivation portion 131 is in the range of 2 nanometers to 10 nanometers, such as 2 nanometers, 5 nanometers, 8 nanometers, 10 nanometers, etc., and the thickness of the second passivation portion 132 is preferably in the range of 5 nanometers to 20 nanometers, such as 5 nanometers, 10 nanometers, 15 nanometers, 20 nanometers, etc. The first passivation portion 131 and the second passivation portion 132 provided in the above range can ensure the isolation and protection function of the passivation layer 130, avoid the current collapse effect, voltage positive and negative drift, and also conform to the development trend of device miniaturization.

[0047] In some embodiments, a source electrode 121 and a drain electrode 122 are further disposed at intervals on the barrier layer 110, wherein the source electrode 121 and the drain electrode 122 are covered by a second passivation portion 132. In this embodiment, the source electrode 121, the cap electrode 123, and the drain electrode 122 are arranged sequentially at intervals, with the cap electrode 123 located between the source electrode 121 and the drain electrode 122. In some other embodiments, the positional relationship of the source electrode 121, the cap electrode 123, and the drain electrode 122 is not specifically limited. For example, in some other embodiments, the source electrode 121 may be located between the cap electrode 123 and the drain electrode 122, or the drain electrode 122 may be located between the source electrode 121 and the cap electrode 123.

[0048] In some embodiments, the cap 123 is a P-type cap, which is grown on the barrier layer 110 under high pressure by vapor deposition. Its thickness ranges from 50 nanometers to 200 nanometers, such as 50 nanometers, 80 nanometers, 130 nanometers, 200 nanometers, etc., without specific limitation.

[0049] In some embodiments, the surface of the passivation layer 130 is covered with a silicon nitride layer, which is a chemically stable inorganic insulating material with high hardness, wear resistance, and pressure resistance, as well as good oxidation resistance and high and low temperature performance. Covering the surface of the passivation layer 130 with a layer of silicon oxide material can improve the reliability of the device.

[0050] In some embodiments, a first passivation portion 131 is disposed on the surface of the barrier layer 110 and extends to cover the cap 123. A second passivation portion 132 covers the area of ​​the barrier layer 110 other than the area covered by the cap 123 and the first passivation portion 131 on the surface of the barrier layer 110. The second passivation portion 132 also covers the first passivation portion 131. The first passivation portion 131 and the second passivation portion 132, which are stacked on the side of the P-type cap facing away from the barrier layer 110, have a first through-hole. The gate passes through the first through-hole and is connected to the second passivation portion 132 and the first passivation portion 131 and the P-type cap. The P-type cap on the barrier layer 110 is passivated by the first passivation portion 131. The area other than the area covered by the P-type cap and the first passivation portion 131 on the surface of the barrier layer 110 is covered by the second passivation portion 132. The gate 124 passes through the second passivation portion 132 of the passivation layer 130 and is connected to the first passivation portion 131 and the P-type cap. Preferably, the thickness range of the first passivation portion 131 and the second passivation portion 132 is 1 nanometer to 20 nanometers, such as 5 nanometers, 15 nanometers, 18 nanometers, etc., without specific limitation. The thickness range of the first passivation portion 131 and the second passivation portion 132 can not only ensure the insulation protection effect of the passivation layer 130, but also meet the development needs of device miniaturization.

[0051] The cap 123 is located between the source 121 and the drain 122. The second passivation portion 132 covers the first passivation portion 131 covering the cap 123. The second passivation portion 132 also covers the source 121 and the drain 122 on the barrier layer 110. In this embodiment, the second passivation portion 132 has grooves formed on its surface facing away from the substrate in the region between the source 121 and the cap 123, and in the region between the drain 122 and the cap 123. The advantage of this structural design is that it makes the thickness of the second passivation portion 132 consistent throughout, which helps to ensure the stability of the device.

[0052] In some embodiments, the base layer of the composite passivated GaN-based HEMT device 100 includes a channel layer 140, a buffer layer 150, and a substrate layer 160. The channel layer 140, buffer layer 150, and substrate layer 160 are sequentially stacked on the side of the barrier layer 110 facing away from the cap. In existing GaN-based HEMT devices, when off-state electrical stress is applied to the drain 122, the interface on the surface of the barrier layer 110, excluding the P-cap region, easily traps electrons from the channel region, resulting in a current collapse effect. In this application, a second passivation portion 132 with shallow defect energy level material is deposited on the surface of the barrier layer 110, excluding the area covered by the P-cap and the first passivation portion 131 on the surface of the barrier layer 110. The shallow defect energy level material can provide electrons, preventing the interface of the non-P-cap region from trapping electrons from other regions, thus avoiding the current collapse effect and positive drift of the threshold voltage.

[0053] Please see Figure 2 , Figure 2 This is a schematic diagram of the structure of a second embodiment of the GaN-based HEMT device with composite passivation according to this application. In this embodiment, the GaN-based HEMT device 200 with composite passivation includes a base layer (not shown), a barrier layer 210, a passivation layer 230, a source 221, a drain 222, a gate 224, and a cap 223.

[0054] In some embodiments, the cap 223 is a P-type cap, which is grown on the barrier layer 210 under high pressure by vapor deposition. Its thickness ranges from 50 nanometers to 200 nanometers, such as 50 nanometers, 80 nanometers, 130 nanometers, 200 nanometers, etc., without specific limitation.

[0055] A source electrode 221, a drain electrode 222, and a P-type cap are arranged at intervals on a barrier layer 210. A passivation layer 230 is disposed on the barrier layer 210 and covers the source electrode 221, the drain electrode 222, and the P-type cap. The passivation layer 230 includes a first passivation portion 231 and a second passivation portion 232. The first passivation portion 231 is disposed on the surface of the barrier layer 210 and extends to cover the P-type cap. The second passivation portion 232 covers the area of ​​the barrier layer 210 other than the area covered by the P-type cap and the first passivation portion 231 on the surface of the barrier layer 210. The defect energy level of the first passivation portion 231 is greater than the defect energy level of the second passivation portion 232. The first passivation portion 231 also covers the second passivation portion 232. The first passivation portion 231, stacked on the side of the P-type cap facing away from the barrier layer 210, has a second through-hole. The gate 224 passes through the second through-hole and connects to the P-type cap via the first passivation portion 231. The first passivation portion 231 is composed of a material with a defect energy level greater than 2.8 electron volts, and the second passivation portion 232 is composed of a material with a defect energy level between 0.1 electron volts and 1.5 electron volts. The gate 224 is disposed on the side of the passivation layer 230 facing away from the barrier layer 210, and the gate 224 penetrates the passivation layer 230 and connects to the P-type cap. The P-type cap is spaced between the source 221 and the drain 222.

[0056] In some embodiments, the area on the barrier layer 210, excluding the area covered by the P-type cap and the first passivation portion 231 on the surface of the barrier layer 210, is passivated by a second passivation portion 232, which covers the source 221 and the drain 222. The P-type cap is passivated by the first passivation portion 231; unlike the first embodiment, in this embodiment, the first passivation portion 231 covers the second passivation portion 232. The gate 224 connects through the first passivation portion 231 and the P-type cap of the passivation layer 230.

[0057] Furthermore, in some embodiments, the thickness of the first passivation portion 231 is less than the thickness of the second passivation portion 232. Preferably, the thickness of the first passivation portion 231 is in the range of 2 nanometers to 10 nanometers, such as 2 nanometers, 5 nanometers, 8 nanometers, 10 nanometers, etc., and the thickness of the second passivation portion 232 is preferably in the range of 5 nanometers to 20 nanometers, such as 5 nanometers, 10 nanometers, 15 nanometers, 20 nanometers, etc. The first passivation portion 231 and the second passivation portion 232 set in the above range can ensure the isolation and protection function of the passivation layer 130, avoid the current collapse effect voltage positive and negative drift, and also conform to the development trend of device miniaturization.

[0058] A cap 223 is located between the source 221 and the drain 222. A second passivation portion 232 covers the source 221 and the drain 222, and also covers the surface of the barrier layer 210 excluding the cap 223 and its surrounding area. The second passivation portion 232 protrudes in the area covering the source 221 and the drain 222. This structural design aims to ensure that the thickness of the second passivation portion 232 is equal at all points. A first passivation portion 231 covers the cap 223 and its surrounding area, and also covers the second passivation portion 232. The first passivation portion 231 forms a groove in the area of ​​the cap 223 not covered by the second passivation portion 232, and the first passivation portion 231 protrudes correspondingly in the area where the second passivation portion 232 protrudes. The purpose of this structure is to ensure that the thickness of the first passivation portion remains consistent at all points, which is beneficial for improving the stability of the device.

[0059] In summary, the GaN-based HEMT device with composite passivation of the present application avoids negative voltage drift caused by surface hole accumulation by using a material passivation cap interface with a larger defect energy level, and avoids the increase in device on-resistance caused by current collapse effect and threshold voltage positive drift by using a material passivation area with a smaller defect energy level, except for the area covered by the P-type cap and the first passivation part on the surface of the barrier layer.

[0060] Please see Figure 3 , Figure 3 This is a schematic diagram of the structure of a third embodiment of the GaN-based HEMT device with composite passivation according to this application. In this embodiment, the GaN-based HEMT device 300 with composite passivation includes a base layer (not shown), a barrier layer 310, a first passivation portion 331, a second passivation portion 332, a source 321, a drain 322, a gate 324, and a cap 323.

[0061] The base layer includes at least: a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; a barrier layer 310 disposed on the channel layer; a source electrode 321, a drain electrode 322, and a cap 323 disposed at intervals on the barrier layer 310, wherein the cap 323 includes: a sidewall facing the source electrode 321 and the drain electrode 322, and a surface facing away from the base layer; the barrier layer 310 includes: a first surface portion 311 facing away from the base layer and close to the sidewall of the cap 323, and a second surface portion 312 facing away from the base layer and connected to the first surface portion 311, wherein the first surface portion 311 and the second surface portion 312 are both part of the barrier layer 310. The surface of the cap 323 is defined as follows: a first passivation portion 331 is disposed on the first surface portion 311 of the barrier layer 310 and extends along the sidewall of the cap 323 toward the surface of the cap 323, and a first notch is formed on the surface of the cap 323; a second passivation portion 332 is disposed on the second surface portion 312 of the barrier layer 310 and covers the first passivation portion 331, and a second notch is formed on the first passivation portion 331 on the surface of the cap 323; a gate 324 is connected to the cap 323 through a first through hole formed by the combination of the first notch and the second notch; wherein the defect energy level of the first passivation portion 331 is greater than the defect energy level of the second passivation portion 332. Specifically, the surface of the barrier layer 310 includes a first surface portion 311 and a second surface portion 312. A cap 323 on the barrier layer 310 is surrounded by the first surface portion 311. A first passivation portion 331 is disposed in the region of the first surface portion 311 and extends along the surface of the cap 323, such that the cap 323 is covered by the first passivation portion 331. In addition, a source electrode 321 and a drain electrode 322 are spaced apart on the surface of the barrier layer 310, excluding the regions of the first surface portion 311 and the cap 323. The source electrode 321 and the drain electrode 322 are surrounded by the second surface portion 312. A second passivation portion 332 is disposed on the second surface portion 312, such that the second passivation portion 332 covers the source electrode 321 and the drain electrode 322, and also covers the first passivation portion 331. Through the above structure, the surface of the barrier layer 310 of the device is achieved with partitioned passivation. Furthermore, the first passivation portion 331 covers the surface of the cap 323 to form a first notch, and the second passivation portion 332 covers the position of the first notch of the first passivation portion 331 to form a second notch communicating with the first notch. The gate 324 passes through the first notch and the second notch to connect the cap 323 to the first passivation portion 331 and the second passivation portion 332. The defect energy level of the first passivation portion 331 is greater than the defect energy level of the second passivation portion 332. By covering the P-type cap interface with the first passivation portion 331, which has a larger defect energy level, negative voltage drift caused by hole accumulation on its surface is avoided. By covering the area outside the P-type cap and the area covered by the first passivation portion 331 with the second passivation portion 332, which has a relatively smaller defect energy level, the increase in device on-resistance caused by current collapse effect and threshold voltage positive drift is avoided, thereby improving device performance.

[0062] In some embodiments, the first passivation portion 331 is composed of a material with a defect energy level greater than 2.8 eV, and the second passivation portion 332 is composed of a material with a defect energy level between 0.1 eV and 1.5 eV. Specifically, the first passivation portion 331 is a material with a defect energy level greater than 2.8 eV, such as materials with defect energy levels of 2.83 eV, 3 eV, 3.12 eV, etc., and may include, for example, aluminum oxide; the passivation material of this defect energy level can provide a channel for electron-hole recombination, induce and promote electron-hole recombination, and avoid the accumulation of holes on the surface of the cap 323. The second passivation portion 332 is made of a material with defect energy levels between 0.1 volt and 1.5 volt, such as materials with defect energy levels of 0.15 electron volt, 0.39 electron volt, 1.13 electron volt, 1.5 electron volt, etc., and may include, for example, aluminum nitride. The passivation material of this defect energy level is close to the conduction band, and the energy is electron-bound. Electrons in the passivation material are easily ionized into free electrons in the conduction band, which can play the role of providing electrons and prevent electrons from being captured in other areas of the surface of the barrier layer 310 except for the area covered by the cap 323 and the first passivation portion 331 on the surface of the barrier layer 310, thereby avoiding the problems of current collapse effect and threshold voltage positive drift.

[0063] The cap 323 is located between the source 321 and the drain 322. The second passivation portion 332 covers the first passivation portion 331 of the cap 323, and also covers the source 321 and drain 322 on the barrier layer 310. In this embodiment, the second passivation portion 332 has grooves formed on its surface facing away from the substrate in the region between the source 321 and the cap 323, and in the region between the drain 322 and the cap 323. The advantage of this structural design is that it keeps the thickness of the second passivation portion 332 consistent throughout, which helps to ensure the stability of the device.

[0064] In some embodiments, the source 321 and drain 322 are located on a second surface portion 312 on the surface of the barrier layer 310. The area of ​​the second surface portion 312 is larger than the areas of the source 321 and drain 322, and the area of ​​the second surface portion 312 is larger than the area of ​​the first surface portion 311. In this embodiment, a cap 323 is spaced between the source 321 and drain 322, and the second surface portion 312 on the surface of the barrier layer 310 surrounds the first surface portion 311. In some other embodiments, the cap 323 may not be located between the source 321 and drain 322, and the second surface portion 312 may be in edge contact with the first surface portion 311.

[0065] Please see Figure 4 , Figure 4This is a schematic diagram of the structure of the fourth embodiment of the GaN-based HEMT device with composite passivation according to this application. In this embodiment, the GaN-based HEMT device 400 with composite passivation includes a base layer (not shown), a barrier layer 410, a first passivation portion 431, a second passivation portion 432, a source 421, a drain 422, a gate 424, and a cap 423.

[0066] The base layer includes at least: a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; a barrier layer 410 disposed on the channel layer; a source electrode 421, a drain electrode 422, and a cap 423 disposed at intervals on the barrier layer 410, the cap 423 including: a sidewall facing the source electrode 421 and the drain electrode 422 and a surface facing away from the base layer; the barrier layer 410 includes: a first surface portion 411 facing away from the base layer and close to the sidewall of the cap 423, and a second surface portion 412 facing away from the base layer and connected to the first surface portion 411, wherein the first surface portion 411 and the second surface portion 412 are both surfaces of the barrier layer 410; a second passivation portion 432 disposed on the barrier layer. The second surface portion 412 of the barrier layer 410 includes a second passivation portion 432 with a sidewall facing the cap 423; a first passivation portion 431 is disposed on the first surface portion 411 of the barrier layer 410, one end of the first passivation portion 431 extends along the sidewall of the second passivation portion 432 toward the surface of the second passivation portion 432 and covers the surface of the second passivation portion 432, and the other end of the first passivation portion 431 extends along the sidewall of the cap 423 toward the surface of the cap 423 and forms a second through hole on the surface of the cap 423; a gate 424 passes through the second through hole and is connected to the cap 423; wherein, the defect energy level of the first passivation portion 431 is greater than the defect energy level of the second passivation portion 432. Specifically, unlike the third embodiment, in this embodiment, in addition to extending along the side wall of the cap 423 to cover the cap 423, the first passivation portion 431 also extends along the second passivation portion 432 to cover the second passivation portion 432. In this embodiment, the gate 424 passes through the second through hole opened on the first passivation portion 431 and connects to the cap 423.

[0067] In some embodiments, the first passivation portion 431 is composed of a material with a defect energy level greater than 2.8 eV, and the second passivation portion 432 is composed of a material with a defect energy level between 0.1 eV and 1.5 eV. Specifically, the first passivation portion 431 is a material with a defect energy level greater than 2.8 eV, such as materials with defect energy levels of 2.83 eV, 3 eV, 3.12 eV, etc., and may include, for example, aluminum oxide; the passivation material of this defect energy level can provide a channel for electron-hole recombination, induce and promote electron-hole recombination, and avoid the accumulation of holes on the surface of the cap 423. The second passivation portion 432 is made of a material with defect energy levels between 0.1 volt and 1.5 volt, such as materials with defect energy levels of 0.15 electron volt, 0.39 electron volt, 1.13 electron volt, 1.5 electron volt, etc., and may include, for example, aluminum nitride. The passivation material of this defect energy level is close to the conduction band, and the energy is electron-bound. Electrons in the passivation material are easily ionized into free electrons in the conduction band, which can play the role of providing electrons and prevent electrons from being captured in other areas of the surface of the barrier layer 410 except for the area covered by the cap 423 and the first passivation portion 431 on the surface of the barrier layer 410, thereby avoiding the problems of current collapse effect and threshold voltage positive drift.

[0068] A cap 423 is located between the source 421 and the drain 422. A second passivation portion 432 covers both the source 421 and the drain 422, and also covers the surface of the barrier layer 410 excluding the cap 423 and its surrounding area. The second passivation portion 432 protrudes in the area covering the source 421 and the drain 422. This structural design aims to ensure that the thickness of the second passivation portion 432 is uniform throughout. A first passivation portion 431 covers the cap 423 and its surrounding area, and also covers the second passivation portion 432. The first passivation portion 431 forms a groove in the area of ​​the cap 423 not covered by the second passivation portion 432, and the first passivation portion 431 protrudes correspondingly in the area where the second passivation portion 432 protrudes. The purpose of this structure is to ensure that the thickness of the first passivation portion 421 remains consistent throughout, which is beneficial for improving the stability of the device.

[0069] In this embodiment, the source 421 and drain 422 are located on a second surface portion 412 on the surface of the barrier layer 410. The area of ​​the second surface portion 412 is larger than the areas of the source 421 and drain 422, and the area of ​​the second surface portion 412 is larger than the area of ​​the first surface portion 411. In this embodiment, a cap 423 is spaced between the source 421 and drain 422, and the second surface portion 412 on the surface of the barrier layer 410 surrounds the first surface portion 411. In some other embodiments, the cap 423 may not be located between the source 421 and drain 422, and the second surface portion 412 may be in edge contact with the first surface portion 411.

[0070] Correspondingly, this application also provides a method for fabricating a composite passivated GaN-based HEMT device; please refer to [link to relevant documentation]. Figure 5 , Figure 5 This is a flowchart illustrating the first embodiment of the fabrication method for the composite passivated GaN-based HEMT device of this application. In a specific embodiment, the fabrication method for the composite passivated GaN-based HEMT device includes:

[0071] S11: Obtain a base layer, which includes at least a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; fabricate a barrier layer on the channel layer, and fabricate a cap on the surface of the barrier layer.

[0072] Please refer to the following: Figure 6a and Figure 6b .

[0073] Specifically, in this embodiment, the base layer includes a substrate layer, a buffer layer, a channel layer, and a barrier layer stacked sequentially. The source, drain, and cap are arranged at intervals, with the cap spaced between the source and drain.

[0074] In some embodiments, the cap is a P-type cap, which is grown on the barrier layer under high pressure by vapor deposition. Its thickness ranges from 50 nanometers to 200 nanometers, such as 50 nanometers, 80 nanometers, 130 nanometers, 200 nanometers, etc., without specific limitation.

[0075] S12: Deposit a first passivation material layer on the surface of the barrier layer, and etch away the portion of the first passivation material layer that does not contact the cap, so as to expose the area of ​​the barrier layer other than the area covered by the cap and the first passivation part on the surface of the barrier layer.

[0076] Please refer to the following: Figure 6c and Figure 6d .

[0077] Existing GaN-based HEMT devices suffer from threshold voltage drift. Negative threshold voltage drift can cause the device to turn on unnecessarily, compromising safe operation. Positive threshold voltage drift increases on-resistance, leading to increased losses and generating more heat, hindering heat dissipation. This application's fabrication method uses different passivation materials to passivate the source, drain, and cap regions on the barrier layer surface in sections. First, a first passivation material layer is deposited on the barrier layer surface. The portion of the first passivation material layer that does not contact the cap is etched away, ensuring that the first passivation material layer only passivates the cap interface region on the barrier layer. The deposited material for the first passivation material layer is a deep defect energy level material, specifically a material with defect energy levels greater than 2.8 electron volts, such as materials with defect energy levels of 2.83 electron volts, 3 electron volts, or 3.12 electron volts. Passivation materials for deep defect energy levels can provide channels for electron-hole recombination, inducing and promoting electron-hole recombination and thus trapping holes. In this embodiment, alumina is preferably used as the material, and its deposition on the cap interface can prevent the accumulation of holes on its surface, thereby avoiding negative threshold voltage drift.

[0078] S13: Deposit a second passivation material layer, which covers the first passivation material layer.

[0079] Please see Figure 6e .

[0080] The second passivation material layer passivates the uncapped region. This passivation material is for shallow defect energy levels, specifically materials with defect energy levels between 0.1 volt and 1.5 volt, such as materials with defect energy levels of 0.15 eV, 0.39 eV, and 1.13 eV. In this embodiment, aluminum nitride is preferably used. Its energy level is located below the conduction band, distributed at a distance of 0.17 eV to 1 eV from the conduction band. Being close to the conduction band, its energy is in an electron-bound state. In passivation materials with shallow defect energy levels, electrons are easily ionized into free electrons in the conduction band, thus providing electrons. Depositing this material on the uncapped region of the barrier layer prevents the uncapped region from capturing electrons from other regions. This avoids the current collapse effect and the increase in device on-resistance caused by threshold voltage drift, thereby improving device performance.

[0081] By performing partitioned passivation on the surface of the barrier layer as described above, the non-capped area is covered and passivated by the second passivation layer, and the capped interface is covered and passivated by the first passivation part. By passivating the capped interface with materials of deep defect energy levels, the accumulation of holes on its surface is avoided, which would cause negative voltage drift. By passivating the non-capped area of ​​the barrier layer surface with materials of shallow defect energy levels, the current collapse effect and the increase in device on-resistance caused by positive threshold voltage drift are avoided, thereby improving the performance of the device.

[0082] When depositing the first passivation portion and the second passivation layer, it is preferable that the thickness of the first passivation portion and the second passivation layer is in the range of 1 nanometer to 20 nanometers, such as 5 nanometers, 15 nanometers, 18 nanometers, etc., without specific limitation. The first passivation portion and the second passivation layer within this thickness range can not only ensure the insulation protection effect of the passivation layer, but also meet the development needs of device miniaturization.

[0083] S14: Drill through-holes in the passivation layer to expose the cap portion, and fabricate the gate on the side of the passivation layer away from the barrier layer. The gate is connected to the cap through the through-hole.

[0084] Please see Figure 6f and 6g .

[0085] In some embodiments, the second passivation layer covers the first passivation portion, and when drilling through the hole, both the second passivation portion and the first passivation portion are drilled through simultaneously, so that the cap portion is exposed.

[0086] In some embodiments, a first passivation material layer and a second passivation material layer are deposited in two separate steps. After drilling through-holes in the passivation layers, a first passivation portion covering a cap is formed, and a second passivation portion covering the area excluding the cap and the area covered by the first passivation portion is formed. The first passivation portion is disposed on the surface of the barrier layer and extends to cover the cap, while the second passivation portion covers the area of ​​the barrier layer excluding the area covered by the cap and the first passivation portion on the surface of the barrier layer. The defect energy level of the first passivation portion is greater than the defect energy level of the second passivation portion.

[0087] Please see Figure 7 , Figure 7 This is a flowchart illustrating a second embodiment of the fabrication method for a composite passivated GaN-based HEMT device according to this application. In a specific embodiment, the fabrication method for the composite passivated GaN-based HEMT device includes:

[0088] S21: Obtain a base layer, which includes at least a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; fabricate a barrier layer on the channel layer, and fabricate a cap on the surface of the barrier layer.

[0089] Please refer to the following: Figure 8a and Figure 8b This step is described in S11 and will not be repeated here.

[0090] In some other embodiments, the cap is a P-type cap, which is grown on the barrier layer under high pressure by vapor deposition, and its thickness ranges from 50 nanometers to 200 nanometers, such as 50 nanometers, 80 nanometers, 130 nanometers, 200 nanometers, etc., without specific limitation.

[0091] S22: Deposit a second passivation material layer on the surface of the barrier layer, the second passivation material layer covering the cap; etch away part of the cap surface in the second passivation material layer and part of the barrier layer that is in contact with the cap.

[0092] Please refer to the following: Figure 8c and Figure 8d .

[0093] The second passivation material layer passivates the uncapped region. This passivation material is for shallow defect energy levels, specifically materials with defect energy levels between 0.1 volt and 1.5 volt. In this embodiment, aluminum nitride is preferred. Its energy levels are located below the conduction band, distributed at a distance of 0.17 eV to 1 eV from the conduction band. Being close to the conduction band, these energy levels are in an electron-bound state. Electrons in shallow defect energy level passivation materials are easily ionized into free electrons in the conduction band, thus providing electrons. Depositing this material on the uncapped region of the barrier layer prevents the uncapped region from trapping electrons from other regions. This avoids the current collapse effect and the increase in device on-resistance caused by threshold voltage drift, thereby improving device performance.

[0094] S23: Deposit a first passivation material layer, which covers the second passivation material layer and the cap.

[0095] Please refer to the following: Figure 8e .

[0096] The first passivation layer is deposited using a material with deep defect energy levels, specifically a material with defect energy levels greater than 2.8 electron volts. This deep defect energy level passivation material provides a channel for electron-hole recombination, inducing and promoting recombination and thus trapping holes. In this embodiment, alumina is preferably used as the material, and depositing it at the cap interface prevents the accumulation of holes on its surface, thereby avoiding negative threshold voltage drift.

[0097] S24: Drill through-holes in the passivation layer to expose the cap portion, and fabricate the gate on the side of the passivation layer away from the barrier layer. The gate is connected to the cap through the through-hole.

[0098] Please see Figure 8f and Figure 8g .

[0099] Unlike the embodiments described above, the first passivation portion covers the second passivation layer. The gate passes through the first passivation portion of the passivation layer and is connected to the cap.

[0100] In summary, the fabrication method of the GaN-based HEMT device with composite passivation in this application avoids negative voltage drift caused by surface hole accumulation by using a material passivation cap interface with a larger defect energy level, and avoids the increase in device on-resistance caused by current collapse effect and threshold voltage positive drift by using a material passivation barrier layer surface with a smaller defect energy level excluding the cap and the first passivation part. This improves the performance of the device.

[0101] The above are merely embodiments of this application and do not limit the scope of this patent application. Any equivalent structural or principle transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A GaN-based HEMT device with composite passivation, characterized in that, include: The base layer includes at least: a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; A barrier layer is disposed on the channel layer; A cap is disposed on the barrier layer; A passivation layer is disposed on the barrier layer; The barrier layer includes: a first surface portion facing away from the base layer and close to the sidewall of the cap, and a second surface portion facing away from the base layer and connected to the first surface portion, wherein the first surface portion and the second surface portion are both surfaces of the barrier layer; the passivation layer includes a first passivation portion and a second passivation portion, the first passivation portion is disposed on the first surface portion of the barrier layer and extends to cover the cap, and the second passivation portion is disposed on the second surface portion to cover the area of ​​the barrier layer other than the area covered by the cap and the first passivation portion on the surface of the barrier layer, wherein the defect energy level of the first passivation portion is greater than the defect energy level of the second passivation portion; A gate is disposed on the side of the passivation layer opposite to the barrier layer, and the gate penetrates the passivation layer and is connected to the cap.

2. The GaN-based HEMT device with composite passivation according to claim 1, characterized in that, The first passivation part is composed of a material with a defect energy level greater than 2.8 electron volts, and the second passivation part is composed of a material with a defect energy level between 0.1 electron volts and 1.5 electron volts.

3. The GaN-based HEMT device with composite passivation according to claim 1, characterized in that, The first passivation part uses aluminum oxide as its material, and the second passivation part uses aluminum nitride as its material.

4. The GaN-based HEMT device with composite passivation according to claim 1, characterized in that, The cap is a P-type cap.

5. The GaN-based HEMT device with composite passivation according to claim 4, characterized in that, The second passivation portion also covers the first passivation portion; The first passivation portion and the second passivation portion, which are stacked on the side of the P-type cap facing away from the barrier layer, have a first through hole. The gate passes through the first through hole, penetrates the second passivation portion, the first passivation portion, and is connected to the P-type cap.

6. The GaN-based HEMT device with composite passivation according to claim 4, characterized in that, The first passivation portion also covers the second passivation portion; The first passivation portion of the P-type cap, which is stacked on the side opposite to the barrier layer, has a second through hole. The gate passes through the second through hole and is connected to the P-type cap through the first passivation portion.

7. The GaN-based HEMT device with composite passivation according to claim 5 or 6, characterized in that, The thickness of both the first passivation portion and the second passivation portion ranges from 1 nanometer to 20 nanometers.

8. A composite passivated GaN-based HEMT device, characterized in that, include: The base layer includes at least: a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; A barrier layer is disposed on the channel layer; A source, a drain, and a cap are disposed at intervals on the barrier layer. The cap includes a sidewall facing the source and the drain and a surface facing away from the base layer. The barrier layer includes a first surface facing away from the base layer and close to the sidewall of the cap, and a second surface facing away from the base layer and connected to the first surface. The first surface and the second surface are both surfaces of the barrier layer. A first passivation portion is disposed on the first surface of the barrier layer and extends along the sidewall of the cap toward the surface of the cap and has a first notch formed on the surface of the cap. The second passivation portion is disposed on the second surface of the barrier layer and covers the first passivation portion, and a second notch is formed on the first passivation portion on the surface of the cap; The gate is connected to the cap through a first through-hole formed by the combination of the first notch and the second notch; wherein the defect energy level of the first passivation portion is greater than the defect energy level of the second passivation portion.

9. The GaN-based HEMT device with composite passivation according to claim 8, characterized in that, The first passivation part is composed of a material with a defect energy level greater than 2.8 electron volts, and the second passivation part is composed of a material with a defect energy level between 0.1 electron volts and 1.5 electron volts.

10. The GaN-based HEMT device with composite passivation according to claim 9, characterized in that, The first passivation part uses aluminum oxide as its material, and the second passivation part uses aluminum nitride as its material.

11. A composite passivated GaN-based HEMT device, characterized in that, include: The base layer includes at least: a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; A barrier layer is disposed on the channel layer; A source, a drain, and a cap are disposed at intervals on the barrier layer. The cap includes a sidewall facing the source and the drain and a surface away from the base layer. The barrier layer includes a first surface portion facing away from the base layer and close to the sidewall of the cap, and a second surface portion facing away from the base layer and connected to the first surface portion, wherein the first surface portion and the second surface portion are both surfaces of the barrier layer. A second passivation portion is disposed on the second surface of the barrier layer, and the second passivation portion includes a sidewall facing the cap; A first passivation portion is disposed on the first surface of the barrier layer. One end of the first passivation portion extends along the sidewall of the second passivation portion toward the surface of the second passivation portion and covers the surface of the second passivation portion. The other end of the first passivation portion extends along the sidewall of the cap toward the surface of the cap and forms a second through hole on the surface of the cap. A gate is connected to the cap through the second via; wherein the defect energy level of the first passivation portion is greater than the defect energy level of the second passivation portion.

12. The GaN-based HEMT device with composite passivation according to claim 11, characterized in that, The first passivation part is composed of a material with a defect energy level greater than 2.8 electron volts, and the second passivation part is composed of a material with a defect energy level between 0.1 electron volts and 1.5 electron volts.

13. The GaN-based HEMT device with composite passivation according to claim 11, characterized in that, The first passivation part uses aluminum oxide as its material, and the second passivation part uses aluminum nitride as its material.

14. A method for fabricating a composite passivated GaN-based HEMT device, characterized in that, include: Obtain a base layer, wherein the base layer includes at least a substrate layer, a buffer layer disposed on the substrate layer, and a channel layer disposed on the buffer layer; A barrier layer is fabricated on the channel layer, and a cap is fabricated on the surface of the barrier layer. A passivation layer is formed on the surface of the barrier layer; A through-hole is drilled in the passivation layer to expose the cap portion. A gate is fabricated on the side of the passivation layer away from the barrier layer, and the gate is connected to the cap through the through-hole. The passivation layer includes a first passivation portion and a second passivation layer. The first passivation portion is disposed on the surface of the barrier layer and extends to cover the cap. The second passivation portion covers the area of ​​the barrier layer other than the area covered by the cap and the first passivation portion on the surface of the barrier layer. The defect energy level of the first passivation portion is greater than the defect energy level of the second passivation portion.

15. The method for fabricating a GaN-based HEMT device with composite passivation according to claim 14, characterized in that, The first passivation part is composed of a material with a defect energy level greater than 2.8 electron volts, and the second passivation part is composed of a material with a defect energy level between 0.1 electron volts and 1.5 electron volts.

16. The method for fabricating a GaN-based HEMT device with composite passivation according to claim 14, characterized in that, The first passivation part uses aluminum oxide as its material, and the second passivation part uses aluminum nitride as its material.

17. The method for fabricating a GaN-based HEMT device with composite passivation according to claim 14, characterized in that, The step of fabricating the passivation layer specifically includes: A first passivation material layer is deposited on the surface of the barrier layer; The portion of the first passivation material layer that does not contact the cap is etched away to expose the area of ​​the barrier layer other than the area covered by the cap and the first passivation portion on the surface of the barrier layer. A second passivation material layer is deposited, which covers the first passivation material layer.

18. The method for fabricating a GaN-based HEMT device with composite passivation according to claim 14, characterized in that, The step of fabricating the passivation layer specifically includes: A second passivation material layer is deposited on the surface of the barrier layer, and the second passivation material layer covers the cap; Etch away a portion of the cap surface in the second passivation material layer and a portion of the barrier layer that contacts the cap. A first passivation material layer is deposited, which covers the second passivation material layer and the cap.

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