Pcie integrated control method and system for double-end wire bonding machine

By using the PCIE integrated control method and the instruction parsing of the PL and PS core modules of the ZYNQ chip, efficient multi-resource collaborative control of the dual-head wire bonding machine is realized. This solves the problem of insufficient real-time response and data interaction speed of stepper motors and DC motors in the existing technology, and improves production efficiency and equipment utilization.

CN116160157BActive Publication Date: 2026-04-21GUANGDONG ADA SEMICON EQUIP CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
GUANGDONG ADA SEMICON EQUIP CO LTD
Filing Date
2023-02-13
Publication Date
2026-04-21

AI Technical Summary

Technical Problem

Existing technologies cannot meet the requirements of dual-head wire bonding machines for multi-axis controllers, especially the insufficient real-time response and data interaction speed of stepper motors and DC motors, resulting in low production efficiency.

Method used

Employing a PCIE integrated control method, the ZYNQ chip's PL and PS core modules parse instructions to achieve 20-axis stepper motor control, 16-axis DC motor control, and 72-bit extended input/output. High-speed data interaction is achieved using the PCIE X4 interface, with a transmission rate of up to 4GB/s.

Benefits of technology

It achieves efficient multi-resource collaborative control of the dual-head wire bonding machine, meets the control requirements of 18 axes, improves production efficiency, and reduces the number of operators.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention relates to the field of industrial control technology, and discloses a PCIE integrated control method, system, device, and medium for a dual-head wire bonder. The method includes the following steps: During operation, when controlling multiple stepper motors, the host computer writes a first instruction to the BRAM corresponding to the PL pin of the ZYNQ via PCIE, and notifies the PS core inside the ZYNQ to receive the first instruction; after receiving the first instruction from the BRAM, the PS core inside the ZYNQ reads and parses the instruction; after parsing the first instruction, the PS core outputs a first instruction to control the movement of the corresponding stepper motor. This invention achieves a transmission rate of up to 4GB / s and integrates 20-axis stepper motor control, 16-axis DC motor control, 72-bit extended input / output, and 4 coded signal wheel inputs.
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Description

Technical Field

[0001] This invention relates to the field of industrial control technology, and in particular to the technology of automated equipment in the semiconductor packaging industry. Specifically, it relates to a PCIE integrated control method, system, device, and computer-readable storage medium for a dual-head wire bonding machine. Background Technology

[0002] In recent years, with the rapid development of the national semiconductor industry, semiconductor packaging plants have an increasing demand for wire bonding machines. At the same time, in the fierce market competition, packaging plants have also put forward higher requirements for the UPH and cost of wire bonding machines. For example, a workshop with 400 single-head wire bonding machines requires more than 20 operators. However, using a double-head wire bonding machine can not only reduce the number of operators by half, but also the production efficiency of the double-head wire bonding machine is higher than that of the single-head wire bonding machine.

[0003] Compared to single-head wire bonding machines, dual-head wire bonding machines require the control and processing of more stepper motors, DC motors, electromagnets, and input sensors. This necessitates that the control system can meet the demands of these system resources, and also places higher demands on the real-time response of the coordinated control of multiple resources.

[0004] Currently, there are no integrated controllers on the market that can meet these control requirements. For example, some 8-axis and 16-axis motion controllers only provide stepper motor control, and the number of axes they control is also difficult to meet the needs of our dual-head machine (which requires 18 axes). Other embedded modules that use Ethernet network communication (100MB / s) have slow communication speeds and communication delays when performing a large amount of data interaction during multi-resource collaborative control, and the real-time control effect is not very good.

[0005] In view of this, the present invention is proposed. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and provide a PCIE integrated control method, system, device and computer-readable storage medium for a dual-head wire bonding machine, which has a transmission rate of up to 4GB / s and integrates 20-axis stepper motor control, 16-axis DC motor control, 72-bit extended input / output, and 4 coded signal wheel inputs.

[0007] Firstly, to solve the above-mentioned technical problems, the basic concept of the technical solution adopted by this invention is as follows:

[0008] A PCIE integrated control method for a dual-head wire bonding machine, the method comprising the following steps:

[0009] During operation, when controlling the movement of multiple stepper motors, the host computer writes the first instruction to the BRAM corresponding to the PL terminal of the ZYNQ via PCIE and notifies the PS core inside the ZYNQ to receive the first instruction.

[0010] When the PS core inside the ZYNQ receives the first instruction from the BRAM, it reads the instruction and parses it.

[0011] After the PS core inside the ZYNQ parses the first instruction, it outputs the first instruction to control the movement of the corresponding stepper motor.

[0012] In a preferred embodiment of any of the above schemes, the instructions include basic instructions and motor control instructions. The basic instructions are used to set and read various parameters of the control card, as well as control the I / O. The motor control instructions are used to read and set motor parameters and control the motor movement.

[0013] In a preferred embodiment of any of the above schemes, after the PS core inside the ZYNQ parses the instructions, it outputs control to move the corresponding stepper motor, including:

[0014] After the PS core inside the ZYNQ parses the instructions, it outputs control to move the corresponding stepper motor, including:

[0015] When the PS core inside ZYNQ parses the instructions and receives the motion descriptors corresponding to multiple stepper motor axes, it writes the motion descriptors corresponding to multiple stepper motor axes to the BRAM corresponding to the PL terminal of ZYNQ.

[0016] The ZYNQ's PL terminal outputs pulse, direction, and enable signals to the 16-axis stepper motor control processing circuit.

[0017] After being isolated by the 16-axis stepper motor control processing circuit, the signal is transmitted to the 72-bit input or output interface circuit via signal cable 1 to output the command to control the movement of the corresponding stepper motor.

[0018] In a preferred embodiment of any of the above schemes, after the stepper motor corresponding to the output control moves, the method further includes:

[0019] After the first command to control the movement of the corresponding stepper motor is output, it also includes:

[0020] When it is necessary to control the movement of the DC motor, the host computer writes the second instruction to the BRAM corresponding to the PL terminal of the ZYNQ via PCIE and notifies the PS core inside the ZYNQ to receive the second instruction.

[0021] After receiving the second instruction from the BRAM, the PS core inside ZYNQ reads the second instruction and parses it to obtain the parsing result;

[0022] The corresponding DC motor is driven to move based on the analysis results.

[0023] In a preferred embodiment of any of the above solutions, driving the corresponding DC motor to move according to the analysis result includes:

[0024] When the PS core inside the ZYNQ parses the second instruction, it obtains the motion descriptor corresponding to the DC motor and writes the motion descriptor corresponding to the DC motor to the BRAM corresponding to the PL terminal of the ZYNQ.

[0025] The ZYNQ's PL terminal outputs PWM and direction signals to the 16-axis DC motor control processing circuit.

[0026] After the signal level is converted by the 16-axis DC motor control processing circuit, it is output to the DC motor control interface circuit of the integrated expansion terminal board via signal cable 2;

[0027] The DC motor control interface circuit drives the corresponding DC motor to move.

[0028] In a preferred embodiment of any of the above solutions, after the DC motor control interface circuit drives the corresponding DC motor to move, the method further includes:

[0029] After the DC motor control interface circuit drives the corresponding DC motor to move, it also includes:

[0030] During the operation of the dual-head wire bonding machine, the input of each sensor status is converted into levels by the 72-bit extended input or output processing circuit of the integrated extended terminal board;

[0031] After level conversion by the 16-axis DC motor control processing circuit, the signal is transmitted through signal cable 1 to the 72-bit input or output interface circuit for filtering before entering the PL terminal of the ZYNQ.

[0032] The PL terminal processes the input status of each sensor accordingly.

[0033] Secondly, a PCIE integrated control system for a dual-head wire bonding machine includes:

[0034] The control module is used to control the movement of multiple stepper motors during the operation of the dual-head wire bonding machine. The host computer writes the instructions to the BRAM corresponding to the PL terminal of ZYNQ through PCIE and notifies the PS core inside ZYNQ to receive the instructions.

[0035] The parsing module is used to read and parse instructions received by the PS core inside the ZYNQ from the BRAM.

[0036] The output module is used to output control commands for the corresponding stepper motor movement after the PS core inside the ZYNQ parses the commands. The commands include basic commands and motor control commands. The basic commands are used to set and read various parameters of the control card, as well as control the I / O. The motor control commands are used to read and set motor parameters and control the motor movement.

[0037] In a preferred embodiment of any of the above solutions, the following further includes:

[0038] The processing module is used to write motion descriptors corresponding to multiple stepper motor axes to the BRAM corresponding to the PL terminal of the ZYNQ. The PL terminal of the ZYNQ outputs pulse, direction, and enable signals to the 16-axis stepper motor control processing circuit. After the signals are isolated by the 16-axis stepper motor control processing circuit, they are transmitted to the 72-bit input or output interface circuit through signal cable 1 to realize the output control of the corresponding stepper motor movement.

[0039] Thirdly, a PCIE integrated control device for a dual-head wire bonding machine includes:

[0040] One or more processors;

[0041] A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the PCIE integrated control method for a dual-head wire bonder.

[0042] Fourthly, a computer-readable storage medium storing a program that, when executed by a processor, implements the PCIE integrated control method for a dual-head wire bonder.

[0043] Compared with the prior art, the PCIE integrated control method for a dual-head wire bonder in this application embodiment has a transmission rate of up to 4GB / s, integrates 20-axis stepper motor control, 16-axis DC motor control, and 72-bit extended input / output, which can meet the control requirements of a dual-head wire bonder. It can achieve a read / write speed of up to 2GB / s for large-scale data interaction using the PCIE X4 interface, with fast communication speed and fast real-time response for multi-resource collaborative control.

[0044] The specific embodiments of the present invention will now be described in further detail with reference to the accompanying drawings. Attached Figure Description

[0045] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. Some specific embodiments of this application will be described in detail below with reference to the accompanying drawings in an exemplary and non-limiting manner. The same reference numerals in the drawings designate the same or similar parts or components. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:

[0046] Figure 1 This is a schematic flowchart of the PCIE integrated control method for a dual-head wire bonding machine according to an embodiment of this application.

[0047] Figure 2 This is a schematic diagram of a PCIE integrated control system for a dual-head wire bonding machine according to an embodiment of this application.

[0048] Figure 3 This is a schematic diagram of a PCIE integrated control device for a dual-head wire bonding machine according to an embodiment of this application.

[0049] It should be noted that these accompanying drawings and textual descriptions are not intended to limit the scope of the invention in any way, but rather to illustrate the concept of the invention to those skilled in the art by referring to specific embodiments. The elements in the drawings are schematic and not drawn to scale. Detailed Implementation

[0050] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some, not all, of the embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative effort should fall within the scope of protection of the present application.

[0051] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0052] The following embodiments of this application use a PCIE integrated control method for a dual-head wire bonding machine as an example to illustrate the solution of this application in detail. However, this embodiment does not limit the scope of protection of this application.

[0053] like Figure 1As shown, the present invention provides a PCIE integrated control method for a dual-head wire bonding machine, the method comprising the following steps:

[0054] During operation, when controlling the movement of multiple stepper motors, the host computer writes instructions to the BRAM (block memory) corresponding to the PL (Programmable Logic) terminal of the ZYNQ7015 chip via PCIE, and notifies the PS (Processing System) core inside the ZYNQ7015 chip to receive the instructions.

[0055] When the PS core inside the ZYNQ receives an instruction from the BRAM, it reads the instruction and parses it.

[0056] After the PS core inside the ZYNQ parses the instructions, it outputs control of the corresponding stepper motor movement. By designing a PCIE X4 dual-head wire bonder integrated control system, its transmission rate can reach 4GB / s, integrating 20-axis stepper motor control, 16-axis DC motor control, and 72-bit extended input / output, which can meet the control requirements of the dual-head wire bonder. Utilizing the PCIE X4 interface, the read / write speed for large-scale data interaction can reach 2GB / s, with fast communication speed and fast real-time response for multi-resource collaborative control.

[0057] In the PCIE integrated control method for a dual-head wire bonder described in this embodiment of the invention, the instructions include basic instructions and motor control instructions. The basic instructions are used to set and read various parameters of the control card, as well as control the I / O. The motor control instructions are used to read and set motor parameters and control motor movement. First, the PCIE integrated control system of the dual-head wire bonder includes a dual-head wire bonder PCIE X4 control card and an integrated expansion terminal board (with 20-axis stepper motor control, 16-axis DC motor control, 72-bit expansion input / output, and 4 encoder wheel signal inputs).

[0058] In the PCIE integrated control method for a dual-head wire bonding machine described in this embodiment of the invention, after the PS core inside the ZYNQ parses the instruction, it outputs control of the corresponding stepper motor movement, including:

[0059] Write the motion descriptors corresponding to multiple stepper motor axes (e.g., DC motor: PWM, direction; stepper motor: pulse, direction, enable, etc.) to the BRAM corresponding to the PL terminal of the ZYNQ;

[0060] The ZYNQ's PL terminal outputs pulse, direction, and enable signals to the 16-axis stepper motor control processing circuit.

[0061] After being isolated by the 16-axis stepper motor control processing circuit, the signal is transmitted to the 72-bit input or output interface circuit via signal cable 1 to realize the output control of the corresponding stepper motor movement.

[0062] In the PCIE integrated control method for a dual-head wire bonding machine described in this embodiment of the invention, after the stepper motor corresponding to the output control moves, the method further includes:

[0063] After the first command to control the movement of the corresponding stepper motor is output, it also includes:

[0064] When it is necessary to control the movement of the DC motor, the host computer writes the second instruction to the BRAM corresponding to the PL terminal of the ZYNQ via PCIE and notifies the PS core inside the ZYNQ to receive the second instruction.

[0065] After receiving the second instruction from the BRAM, the PS core inside ZYNQ reads the second instruction and parses it to obtain the parsing result;

[0066] The corresponding DC motor is driven to move based on the analysis results.

[0067] In the PCIE integrated control method for a dual-head wire bonding machine described in this embodiment of the invention, driving the corresponding DC motor to move according to the analysis result includes:

[0068] After the PS core inside the ZYNQ parses the instruction, it writes the motion descriptor (pulse, direction, enable) corresponding to the DC motor to the BRAM corresponding to the PL terminal of the ZYNQ.

[0069] The ZYNQ's PL terminal outputs PWM and direction signals to the 16-axis DC motor control processing circuit.

[0070] After the signal level is converted by the DC motor control processing circuit, it is output to the DC motor control interface circuit of the integrated expansion terminal board via signal cable 2;

[0071] The DC motor control interface circuit drives the corresponding DC motor to move.

[0072] In the PCIE integrated control method for a dual-head wire bonding machine described in this embodiment of the invention, after the DC motor control interface circuit drives the corresponding DC motor to move, the method further includes:

[0073] During the operation of the dual-head wire bonding machine, the input of each sensor status is converted into levels by the 72-bit extended input or output processing circuit of the integrated extended terminal board;

[0074] After level conversion by the processing circuit, the signal is transmitted through signal cable 1 to the 72-bit input or output interface circuit for filtering before entering the PL terminal of the ZYNQ.

[0075] The PL terminal processes the input status of each sensor accordingly. This invention not only meets the system control resource requirements but also uses a PCIe x4 interface for large-scale data interaction with a read / write speed of up to 2GB / s. It also enables fast real-time response for multi-resource collaborative control.

[0076] Figure 3 The PCIE integrated control device shown for a dual-head wire bonder is merely an example and should not be construed as limiting the functionality and scope of the embodiments of the present invention.

[0077] like Figure 3 As shown, the PCIe integrated control device for a dual-head wire bonder is presented in the form of a general-purpose computing device. Components of the PCIe integrated control device for a dual-head wire bonder may include, but are not limited to: one or more processors or processing units, memory, and buses connecting different system components (including memory and processing units).

[0078] A bus refers to one or more of several bus architectures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor, or a local bus using any of the various bus architectures. Examples of these architectures include, but are not limited to, the Industry Standard Architecture (ISA) bus, the Micro Channel Architecture (MAC) bus, the Enhanced ISA bus, the Video Electronics Standards Association (VESA) local bus, and the Peripheral Component Interconnect (PCI) bus.

[0079] PCIe integrated control devices for dual-head wire bonders typically include a variety of computer system readable media. These media can be any available media that can be accessed by the PCIe integrated control devices used with dual-head wire bonders, including volatile and non-volatile media, removable and non-removable media.

[0080] The memory may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 30 and / or cache memory. The PCIe integrated control device for a dual-head wire bonder may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, the storage system may be used to read and write non-removable, non-volatile magnetic media (…). Figure 3 Not shown; usually referred to as a "hard drive"). Although Figure 3Not shown, disk drives for reading and writing to removable non-volatile disks (e.g., "floppy disks") and optical disc drives for reading and writing to removable non-volatile optical discs (e.g., CD-ROMs, DVD-ROMs, or other optical media) may be provided. In these cases, each drive may be connected to a bus via one or more data media interfaces. The memory may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments of the present invention.

[0081] A program / utility having a set (at least one) of program modules can be stored, for example, in memory. Such program modules include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. The program modules typically perform the functions and / or methods described in the embodiments of this invention.

[0082] The PCIe integrated control device for a dual-head wire bonder can also communicate with one or more external devices (e.g., keyboard, pointing device, monitor, etc.), one or more devices that enable a user to interact with the PCIe integrated control device, and / or any device that enables the PCIe integrated control device to communicate with one or more other computing devices (e.g., network card, modem, etc.). This communication can be performed via input / output (I / O) interfaces. Furthermore, the PCIe integrated control device for a dual-head wire bonder can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via a network adapter. As shown in the figure, the network adapter communicates with other modules of the PCIe integrated control device for a dual-head wire bonder via a bus. It should be understood that, although not shown in the figure, other hardware and / or software modules can be used in conjunction with the PCIe integrated control device for a dual-head wire bonder, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0083] The processing unit executes various functional applications and data processing by running programs stored in memory, such as implementing the stack splitting processing method provided in any embodiment of the present invention. That is, during the operation of the dual-head wire bonder, when controlling the movement of multiple stepper motors, the host computer writes instructions to the BRAM corresponding to the PL pin of the ZYNQ via PCIE, and notifies the PS core inside the ZYNQ to receive the instructions; when the PS core inside the ZYNQ receives the instructions from the BRAM, it reads the instructions and parses them; after parsing the instructions, the PS core inside the ZYNQ outputs control to move the corresponding stepper motor.

[0084] This invention also provides a computer-readable storage medium storing a program that, when executed by a processor, implements the stack splitting processing method as described in any embodiment of this invention. The method includes:

[0085] During operation, when controlling the movement of multiple stepper motors, the host computer writes instructions to the BRAM corresponding to the PL terminal of the ZYNQ via PCIE and notifies the PS core inside the ZYNQ to receive the instructions.

[0086] When the PS core inside the ZYNQ receives an instruction from the BRAM, it reads the instruction and parses it.

[0087] When the PS core inside the ZYNQ parses the instructions, it outputs control to move the corresponding stepper motor.

[0088] The computer storage medium of this invention can be any combination of one or more computer-readable media. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0089] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of sending, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0090] Program code contained on a computer-readable medium may be transmitted using any suitable medium, including but not limited to wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0091] Computer program code for performing the operations of this invention can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as "C" or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0092] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A PCIE integrated control method for a dual-head wire bonding machine, characterized in that, The method includes the following steps: During operation, when controlling the movement of multiple stepper motors, the host computer writes the first instruction to the BRAM corresponding to the PL terminal of the ZYNQ via PCIE and notifies the PS core inside the ZYNQ to receive the first instruction. When the PS core inside the ZYNQ receives the first instruction from the BRAM, it reads the instruction and parses it. After the PS core inside the ZYNQ parses the first instruction, it outputs the first instruction to control the movement of the corresponding stepper motor; after the PS core inside the ZYNQ parses the instruction, it outputs the instruction to control the movement of the corresponding stepper motor, including: When the PS core inside ZYNQ parses the instructions and receives the motion descriptors corresponding to multiple stepper motor axes, it writes the motion descriptors corresponding to multiple stepper motor axes to the BRAM corresponding to the PL terminal of ZYNQ. The ZYNQ's PL terminal outputs pulse, direction, and enable signals to the 16-axis stepper motor control processing circuit. After being isolated by the 16-axis stepper motor control processing circuit, the signal is transmitted via signal cable 1 to the 72-bit input or output interface circuit to output a command to control the movement of the corresponding stepper motor; after outputting the first command to control the movement of the corresponding stepper motor, the following is also included: When it is necessary to control the movement of the DC motor, the host computer writes the second instruction to the BRAM corresponding to the PL terminal of the ZYNQ via PCIE and notifies the PS core inside the ZYNQ to receive the second instruction. After receiving the second instruction from the BRAM, the PS core inside ZYNQ reads the second instruction and parses it to obtain the parsing result; Drive the corresponding DC motor to move according to the analysis results; drive the corresponding DC motor to move according to the analysis results, including: When the PS core inside the ZYNQ parses the second instruction, it obtains the motion descriptor corresponding to the DC motor and writes the motion descriptor corresponding to the DC motor to the BRAM corresponding to the PL terminal of the ZYNQ. The ZYNQ's PL terminal outputs PWM and direction signals to the 16-axis DC motor control processing circuit. After the signal level is converted by the 16-axis DC motor control processing circuit, it is output to the DC motor control interface circuit of the integrated expansion terminal board via signal cable 2; The DC motor control interface circuit drives the corresponding DC motor to move; after the DC motor control interface circuit drives the corresponding DC motor to move, it also includes: During the operation of the dual-head wire bonding machine, the input of each sensor status is converted into levels by the 72-bit extended input or output processing circuit of the integrated extended terminal board; After level conversion by the 16-axis DC motor control processing circuit, the signal is transmitted through signal cable 1 to the 72-bit input or output interface circuit for filtering before entering the PL terminal of the ZYNQ. The PL terminal processes the input status of each sensor accordingly.

2. The PCIE integrated control method for a dual-head wire bonding machine according to claim 1, characterized in that, The instructions include basic instructions and motor control instructions. The basic instructions are used to set and read various parameters of the control card, as well as control the I / O. The motor control instructions are used to read and set motor parameters and control the motor movement.

3. A PCIE integrated control system for a dual-head wire bonding machine, characterized in that: include: The control module is used to control the movement of multiple stepper motors during the operation of the dual-head wire bonding machine. The host computer writes the instructions to the BRAM corresponding to the PL terminal of the ZYNQ via PCIE and notifies the PS core inside the ZYNQ to receive the instructions. The parsing module is used to read and parse instructions received by the PS core inside the ZYNQ from the BRAM. The output module is used to output control commands for the corresponding stepper motor after the PS core inside the ZYNQ parses the commands. These commands include basic commands and motor control commands. The basic commands are used to set and read various parameters of the control card, as well as control I / O. The motor control commands are used to read and set motor parameters and control motor movement. When the PS core inside the ZYNQ parses the commands, it outputs control commands for the corresponding stepper motor, including: When the PS core inside ZYNQ parses the instructions and receives the motion descriptors corresponding to multiple stepper motor axes, it writes the motion descriptors corresponding to multiple stepper motor axes to the BRAM corresponding to the PL terminal of ZYNQ. The ZYNQ's PL terminal outputs pulse, direction, and enable signals to the 16-axis stepper motor control processing circuit. After being isolated by the 16-axis stepper motor control processing circuit, the signal is transmitted via signal cable 1 to the 72-bit input or output interface circuit to output a command to control the movement of the corresponding stepper motor; after outputting the first command to control the movement of the corresponding stepper motor, the following is also included: When it is necessary to control the movement of the DC motor, the host computer writes the second instruction to the BRAM corresponding to the PL terminal of the ZYNQ via PCIE and notifies the PS core inside the ZYNQ to receive the second instruction. After receiving the second instruction from the BRAM, the PS core inside ZYNQ reads the second instruction and parses it to obtain the parsing result; Drive the corresponding DC motor to move according to the analysis results; drive the corresponding DC motor to move according to the analysis results, including: When the PS core inside the ZYNQ parses the second instruction, it obtains the motion descriptor corresponding to the DC motor and writes the motion descriptor corresponding to the DC motor to the BRAM corresponding to the PL terminal of the ZYNQ. The ZYNQ's PL terminal outputs PWM and direction signals to the 16-axis DC motor control processing circuit. After the signal level is converted by the 16-axis DC motor control processing circuit, it is output to the DC motor control interface circuit of the integrated expansion terminal board via signal cable 2; The DC motor control interface circuit drives the corresponding DC motor to move; after the DC motor control interface circuit drives the corresponding DC motor to move, it also includes: During the operation of the dual-head wire bonding machine, the input of each sensor status is converted into levels by the 72-bit extended input or output processing circuit of the integrated extended terminal board; After level conversion by the 16-axis DC motor control processing circuit, the signal is transmitted through signal cable 1 to the 72-bit input or output interface circuit for filtering before entering the PL terminal of the ZYNQ. The PL terminal processes the input status of each sensor accordingly.

4. The PCIE integrated control system for a dual-head wire bonding machine according to claim 3, characterized in that: include: The processing module is used to write motion descriptors corresponding to multiple stepper motor axes to the BRAM corresponding to the PL terminal of the ZYNQ. The PL terminal of the ZYNQ outputs pulse, direction, and enable signals to the 16-axis stepper motor control processing circuit. After the signals are isolated by the 16-axis stepper motor control processing circuit, they are transmitted to the 72-bit input or output interface circuit through signal cable 1 to realize the output control of the corresponding stepper motor movement.

5. A PCIE integrated control device for a dual-head wire bonding machine, characterized in that, include: One or more processors; A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the PCIE integrated control method for a dual-head wire bonder as described in claim 1.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a program that, when executed by a processor, implements the PCIE integrated control method for a dual-head wire bonder as described in claim 1.

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