PCB Signal Line Length and VIA Stub Length Inspection Tool and Method

Abstract

This application relates to a tool and method for inspecting the length of PCB signal lines and the length of via stubs. The tool includes: a signal line selection unit, a routing rule unit, a routing inspection unit, an inspection result display unit, an inspection result reporting unit, and a database. The routing inspection unit is used to calculate the length of the signal line and the length of the via stub on the signal line based on the selected signal line; compare the calculated length of the signal line and the length of the via stub on the signal line with the corresponding relationship table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link, and obtain the inspection result after comparison. This application can be applied to the PCB wiring inspection of products such as servers and memories, and can inspect whether the via stubs allowed for different line lengths of high-speed lines meet the requirements, ensuring good signal integrity. Using this tool can reduce a large amount of man-hours, shorten the development cycle, and there will be no missed detections.

Description

Technical Field

[0001] This application relates to the technical field of PCB signal line length and via stub length inspection, and particularly to a tool, method, computer device, and storage medium for inspecting PCB signal line length and via stub length. Background Art

[0002] As the signal rate on server & memory system boards is getting faster and faster, the requirements for PCB design are becoming more and more strict, and the details of each interconnected component need to be treated strictly. For high-speed signal traces, if the length of the via stub is too long, it will cause the SI index of this high-speed signal link to decline. Therefore, SI engineers will simulate the allowable range of via stub length based on the signal line length for layout engineers to refer to. Then, layout engineers import the reference rules into the PCB design. After the PCB design is completed, SI engineers will conduct inspections to confirm whether the SI rules have been imported. Manual inspection is time-consuming and laborious, and there may be missed inspections. By developing this inspection tool, a large amount of man-hours can be reduced, the development cycle can be shortened, and there will be no missed inspections. This can greatly improve the quality of PCB design and thus improve the performance of cloud computing products. Summary of the Invention

[0003] Based on this, in view of the above technical problems, it is necessary to provide a tool, method, computer device, and storage medium for inspecting PCB signal line length and via stub length, which can ensure that the SI performance of the high-speed signal link meets the index requirements by automatically inspecting the high-speed signal line length and via stub length.

[0004] On the one hand, a tool for inspecting PCB signal line length and via stub length is provided. The tool includes:

[0005] A signal line selection unit for inputting a signal line network name or keyword for quick filtering and selecting the filtered signal lines;

[0006] A routing rule unit for importing a correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link;

[0007] A routing inspection unit for calculating the signal line length and the via stub length on the signal line according to the selected signal line; comparing the calculated signal line length and the via stub length on the signal line with the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison;

[0008] An inspection result display unit for setting a qualified mark or an unqualified mark for the corresponding signal line according to the inspection result and displaying the signal lines with marks set; when any signal line is clicked, switching to the PCB routing interface and displaying the corresponding signal line;

[0009] An inspection result reporting unit for generating an inspection report based on the inspection result;

[0010] A database for storing the PCB routing interface, signal lines in the PCB routing interface, a correspondence table of signal line lengths and stub lengths of vias that meet the SI specifications of high-speed signal links, the inspected results after comparison, the inspection report, and the signal line lengths and stub lengths of vias during the routing inspection process.

[0011] In one embodiment, the signal line selection unit includes:

[0012] A signal line selection button for, when clicked, inputting a signal line network name or keyword according to user requirements;

[0013] A signal line filter for quickly filtering from the signal line file according to the input signal line network name or keyword and displaying the filtered signal lines;

[0014] A signal line selection module for selecting signal lines to be measured from the filtered signal lines; and

[0015] A display window for the list of selected signal lines for displaying all selected signal lines to be measured.

[0016] In one embodiment, the routing rule unit includes:

[0017] A browse button for, when clicked, selecting the path for importing a correspondence table of signal line lengths and stub lengths of vias that meet the SI specifications of high-speed signal links through browsing;

[0018] An SI specification display window for displaying the path or name of the SI specification of the high-speed signal link when the path of the SI specification of the high-speed signal link is selected;

[0019] An import button for, when clicked, importing a correspondence table of signal line lengths and stub lengths of vias that meet the SI specifications of high-speed signal links according to the selected path;

[0020] An open button for, when clicked, opening a correspondence table of signal line lengths and stub lengths of vias that meet the SI specifications of high-speed signal links.

[0021] In one embodiment, the routing inspection unit includes:

[0022] A PCB stack-up thickness calculation unit for obtaining the stack-up structure of the PCB where the signal lines to be measured are located, obtaining the names and thickness values of the constituent film layers of the stack-up structure, and recording them in the database for backup;

[0023] A signal line length calculation unit for calculating the signal line length based on the selected signal line;

[0024] A via stub length calculation unit for extracting the coordinate (ID) information of the selected signal line, finding the start layer and the arrival layer of the via with a via stub on the signal line, and calculating the via length and the via stub length by comparing the component film layer names and thickness values of the PCB stack-up structure according to the start layer and the arrival layer of the via with a via stub;

[0025] A comparison and judgment unit for comparing the calculated signal line length and the via stub length on the signal line with the corresponding relationship table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link; if it is greater than the rule given by the SI specification of the high-speed signal link, then it is determined to be unqualified, and the via stub length value is recorded; if it is less than the rule given by the SI specification of the high-speed signal link, then it is determined to be qualified, and the via stub length value is recorded.

[0026] In one embodiment, the trace inspection unit includes:

[0027] A PCB material insertion loss calculation unit for obtaining the PCB material of the PCB board where the signal line to be measured is located and the loss amounts of PCB materials with various energy loss levels, where the PCB materials with various energy loss levels include medium-loss PCB materials, low-loss PCB materials, and ultra-low-loss PCB materials; the signal line length is in inches, and for PCB materials with different energy loss levels, their losses per inch are different at different frequency points; the loss amount is the per-inch insertion loss data of PCB materials with various energy loss levels at each frequency point; the total insertion loss of each signal line = per-inch insertion loss data * signal line length;

[0028] A via loss calculation unit for obtaining the via size and the spacing between two adjacent vias for PCB materials with different energy loss levels; obtaining the film layer where the via in-and-out line is located according to the coordinate values of the signal layer in the stack-up structure, and calculating the effective via length by combining the thicknesses of each layer of the stack-up structure; calculating the single via loss and the total via loss according to the effective via length, and the total via loss = single via loss * number of vias;

[0029] A back drill depth calculation unit for identifying whether the via has a back drill process. If there is a back drill, determining the maximum back drill depth, then the via stub length is determined by combining the maximum back drill depth and the effective via length; if there is no back drill, the via stub length calculation unit obtains the corresponding via stub length according to the effective via length.

[0030] On the other hand, a method for inspecting the signal line length and the via stub length of a PCB is provided, and the method includes:

[0031] Enter the signal line network name or keyword for quick filtering, and select the filtered signal lines;

[0032] Import the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link;

[0033] Based on the selected signal lines, calculate the signal line length and the via stub length on the signal lines; compare the calculated signal line length and the via stub length on the signal lines with the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison;

[0034] Based on the inspection result, set the corresponding signal lines with qualified marks or unqualified marks, and display the signal lines with the set marks; when any signal line is clicked, switch to the PCB routing interface and display the corresponding signal line;

[0035] Generate an inspection report from the inspection result;

[0036] Store the PCB routing interface, the signal lines in the PCB routing interface, the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link, the inspection result after comparison, the inspection report, and the signal line length and via stub length data during the trace inspection process.

[0037] In one embodiment, the step of entering the signal line network name or keyword for quick filtering and selecting the filtered signal lines includes:

[0038] According to the user's requirements, enter the signal line network name or keyword;

[0039] Based on the entered signal line network name or keyword, quickly filter from the signal line file and display the filtered signal lines;

[0040] Select the signal lines to be tested from the filtered signal lines; and

[0041] Display all the selected signal lines to be tested.

[0042] In one embodiment, the step of importing the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link includes:

[0043] Through browsing, select the path to import the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link;

[0044] When the path of the SI specification of the high-speed signal link is selected, display the path or name of the SI specification of the high-speed signal link;

[0045] Import the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link according to the selected path; and

[0046] Open the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link.

[0047] In one embodiment, the steps of calculating the signal line length and the via stub length on the signal line according to the selected signal line; comparing the calculated signal line length and the via stub length on the signal line with the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison include:

[0048] Obtain the stack-up structure of the PCB board where the signal line to be measured is located, and obtain the names and thickness values of the constituent film layers of the stack-up structure;

[0049] Calculate the signal line length according to the selected signal line;

[0050] Extract the coordinate (ID) information of the selected signal line, find the start layer and the arrival layer of the via where the via stub is set on the signal line, and calculate the via length and the via stub length according to the start layer and the arrival layer of the via where the via stub is set, and compare the names and thickness values of the constituent film layers of the stack-up structure of the PCB board;

[0051] Compare the calculated signal line length and the via stub length on the signal line with the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link; if it is greater than the rule given by the SI specification of the high-speed signal link, then it is determined as unqualified, and record the value of the via stub length; if it is less than the rule given by the SI specification of the high-speed signal link, then it is determined as qualified, and record the value of the via stub length.

[0052] In one embodiment, the steps of calculating the signal line length and the via stub length on the signal line according to the selected signal line; comparing the calculated signal line length and the via stub length on the signal line with the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison further include:

[0053] Obtain the PCB material of the PCB board where the signal line to be measured is located and the loss amounts of PCB materials with various energy loss levels, where the PCB materials with various energy loss levels include medium-loss PCB materials, low-loss PCB materials, and ultra-low-loss PCB materials; the signal line length is in inches, and for PCB materials with different energy loss levels, their losses per inch are different at different frequency points; the loss amount is the per-inch insertion loss data of PCB materials with various energy loss levels at each frequency point; the total insertion loss of each signal line = per-inch insertion loss data * signal line length;

[0054] Obtain the via hole size and the distance between two adjacent vias for PCB materials with different energy loss levels; obtain the film layer where the via hole access line is located according to the coordinate values of the signal layers in the stack structure, and calculate the effective length of the via hole in combination with the thickness of each layer of the stack structure; calculate the loss of a single via hole and the total via hole loss according to the effective length of the via hole, where the total via hole loss = the loss of a single via hole * the number of via holes;

[0055] Identify whether the via hole has backdrilling treatment. If there is backdrilling, determine the maximum backdrilling depth, and then determine the via hole stub length by combining the maximum backdrilling depth with the effective length of the via hole; if there is no backdrilling, obtain the corresponding via hole stub length according to the effective length of the via hole.

[0056] On the other hand, a computer device is provided, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the following steps are implemented:

[0057] Input the signal line network name or keyword for quick filtering, and select the filtered signal lines;

[0058] Import the correspondence table of signal line length and via hole stub length that meets the SI specification of the high-speed signal link;

[0059] According to the selected signal lines, calculate the signal line length and the via hole stub length on the signal lines; compare the calculated signal line length and the via hole stub length on the signal lines with the correspondence table of signal line length and via hole stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison;

[0060] According to the inspection result, set the corresponding signal lines with qualified marks or unqualified marks, and display the signal lines with marks set; when any signal line is clicked, switch to the PCB routing interface and display the corresponding signal line;

[0061] Generate an inspection report for the inspection result;

[0062] Store the PCB routing interface, the signal lines in the PCB routing interface, the correspondence table of signal line length and via hole stub length that meets the SI specification of the high-speed signal link, the inspection result after comparison, the inspection report, and the data of the signal line length and the via hole stub length during the trace inspection.

[0063] On another hand, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented:

[0064] Input the signal line network name or keyword for quick filtering, and select the filtered signal lines;

[0065] Import a correspondence table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link;

[0066] According to the selected signal line, calculate the signal line length and the via stub length on the signal line; compare the calculated signal line length and the via stub length on the signal line with the correspondence table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison;

[0067] According to the inspection result, set a qualified mark or an unqualified mark for the corresponding signal line and display the signal line with the mark set; when any signal line is clicked, switch to the PCB routing interface and display the corresponding signal line;

[0068] Generate an inspection report for the inspection result;

[0069] Store the PCB routing interface, the signal lines in the PCB routing interface, the correspondence table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link, the inspection result after comparison, the inspection report, and the data of the signal line length and the via stub length during the trace inspection.

[0070] The above PCB signal line length and via stub length inspection tool, method, computer device, and storage medium can be applied to the PCB routing inspection of products such as servers and memories. It can check whether the via stubs allowed for different line lengths of high-speed lines meet the requirements, ensuring good signal integrity. Using this tool can reduce a large amount of man-hours, shorten the development cycle, and there will be no missed detections. In addition, this tool has a wide range of applications and a high degree of promotion. Description of the Drawings

[0071] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0072] Figure 1 It is a schematic structural diagram of a PCB signal line length and via stub length inspection tool in an embodiment;

[0073] Figure 2 It is a structural block diagram of a PCB signal line length and via stub length inspection tool in an embodiment;

[0074] Figure 3 It is a structural block diagram of a signal line selection unit in an embodiment;

[0075] Figure 4It is a structural block diagram of a routing rule unit in an embodiment;

[0076] Figure 5 It is a structural block diagram of a routing inspection unit in an embodiment;

[0077] Figure 6 In an embodiment Figure 2 It is a state diagram when the signal line button is clicked and selected in the structural block diagram;

[0078] Figure 7 In an embodiment Figure 2 It is a state diagram when the browse button is clicked in the structural block diagram to import the high-speed signal line length and via stub length rule table given by SI;

[0079] Figure 8 In an embodiment Figure 2 It is a state diagram when routing inspection and inspection report generation are performed in the structural block diagram;

[0080] Figure 9 It is an application environment diagram of the PCB signal line length and via stub length inspection method in an embodiment;

[0081] Figure 10 It is a flow schematic diagram of the PCB signal line length and via stub length inspection method in an embodiment;

[0082] Figure 11 It is a flow schematic diagram of the steps of quickly filtering by inputting the signal line network name or keyword and selecting the filtered signal lines in an embodiment;

[0083] Figure 12 It is a flow schematic diagram of the steps of importing the corresponding relationship table of signal line length and via stub length that meets the SI specification of the high-speed signal link in an embodiment;

[0084] Figure 13 It is a flow schematic diagram of the steps of calculating the signal line length and the via stub length on the signal line according to the selected signal line in an embodiment; comparing the calculated signal line length and the via stub length on the signal line with the corresponding relationship table of signal line length and via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison;

[0085] Figure 14 It is an internal structure diagram of a computer device in an embodiment. Specific embodiments

[0086] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0087] In one embodiment, as Figure 1 , Figure 2 shown, a PCB signal line length and via stub length inspection tool 10 (hereinafter referred to as the tool for short) is provided, including: a signal line selection unit 1, a routing rule unit 2, a routing inspection unit 3, an inspection result display unit 4, an inspection result reporting unit 5, and a database 6.

[0088] The signal line selection unit 1 is used to input a signal line network name or keyword for quick filtering and select the filtered signal lines.

[0089] The routing rule unit 2 is used to import a corresponding relationship table of signal line length and via stub length that meets the SI specification of the high-speed signal link for subsequent inspection and comparison.

[0090] The routing inspection unit 3 is used to calculate the signal line length and the via stub length on the signal line according to the selected signal line; compare the calculated signal line length and the via stub length on the signal line with the corresponding relationship table of signal line length and via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison.

[0091] The inspection result display unit 4 is used to set a qualified mark or an unqualified mark for the corresponding signal line according to the inspection result and display the signal line with the set mark; when any signal line is clicked, switch to the PCB routing interface and display the corresponding signal line.

[0092] The inspection result reporting unit 5 is used to generate an inspection report based on the inspection result.

[0093] The database 6 is used to store the PCB routing interface, the signal lines in the PCB routing interface, the corresponding relationship table of signal line length and via stub length that meets the SI specification of the high-speed signal link, the inspection result after comparison, the inspection report, and the signal line length and via stub length data during the routing inspection process.

[0094] When any signal line is clicked, it can be switched to the PCB routing interface, which is convenient for the layout engineer to make corresponding modifications. This invention conducts PCB routing inspection according to the length information of high-speed signal lines and via stubs given by SI engineer simulation. In order to ensure that the SI rules are implemented in the PCB routing, ensure the signal SI quality, and further ensure the reliability and stability of the system.

[0095] The tool 10 of the present invention can be applied to the PCB wiring inspection of products such as servers and memories. It can check whether the via stubs allowed for different line lengths of high-speed lines meet the requirements, ensuring good signal integrity. By using this tool 10, a large amount of man-hours can be reduced, the development cycle can be shortened, and there will be no missed detections. In addition, this tool 10 has a wide range of applications and a high degree of promotion.

[0096] As Figure 3 shown, in this embodiment, the selected signal line unit 1 includes: a selected signal line button 11, a signal line filter 12, a signal line selection module 13, and a displayed window 14 of the selected signal line list. The selected signal line button 11 is used to input a signal line network name or keyword according to user requirements when clicked; the signal line filter 12 is used to quickly filter from the signal line file according to the input signal line network name or keyword and display the filtered signal lines; the signal line selection module 13 is used to select the signal lines to be measured from the filtered signal lines; the displayed window 14 of the selected signal line list is used to display all the selected signal lines to be measured.

[0097] As Figure 4 shown, in this embodiment, the routing rule unit 2 includes: a browsing button 21, an SI specification display window 22, an import button 23, and an open button 24. The browsing button 21 is used to select the path for importing the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link when clicked; the SI specification display window 22 is used to display the path or name of the SI specification of the high-speed signal link when the path of the SI specification of the high-speed signal link is selected; the import button 23 is used to import the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link according to the selected path when clicked; the open button 24 is used to open the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link when clicked. By clicking the open button 24, the specific content of the rule table of high-speed signal line length and via stub length given by SI can be viewed.

[0098] As Figure 5 shown, in this embodiment, the routing inspection unit 3 includes: a PCB stack-up thickness calculation unit 31, a signal line length calculation unit 32, a via stub length calculation unit 33, and a comparison and judgment unit 34.

[0099] The PCB stack-up thickness calculation unit 31 is configured to obtain the stack-up structure of the PCB board where the signal line to be measured is located, obtain the names and thickness values of the constituent film layers of the stack-up structure, and record them in the database 6 for backup. The signal line length calculation unit 32 is configured to calculate the signal line length based on the selected signal line. The via stub length calculation unit 33 is configured to extract the coordinate (ID) information of the selected signal line, find the start layer and the arrival layer of the via with a via stub on the signal line, and calculate the via length and the via stub length by comparing the names and thickness values of the constituent film layers of the PCB board stack-up structure according to the start layer and the arrival layer of the via with a via stub. The comparison and judgment unit 34 is configured to compare the calculated signal line length and the via stub length on the signal line with the corresponding relationship table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link; if it is greater than the rule given by the SI specification of the high-speed signal link, then it is determined as unqualified, and the via stub length value is recorded; if it is less than the rule given by the SI specification of the high-speed signal link, then it is determined as qualified, and the via stub length value is recorded.

[0100] For those that are less than the rule given by the SI specification of the high-speed signal link, it can also be passed to the SI engineer for confirmation to determine whether back drilling is required, and whether the signal line length can be further increased according to some special routing situations (such as shortening the line length and reducing the routing spacing, etc.).

[0101] As Figure 5 shown, in this embodiment, the routing inspection unit 3 further includes: a PCB material insertion loss calculation unit 35, a via loss calculation unit 36, and a back drill depth calculation unit 37.

[0102] The PCB material insertion loss calculation unit 35 is configured to obtain the PCB material of the PCB board where the signal line to be measured is located and the loss amounts of PCB materials with various energy loss levels, where the PCB materials with various energy loss levels include medium-loss PCB materials, low-loss PCB materials, and ultra-low-loss PCB materials; the signal line length is in inches, and for different energy loss level PCB materials, their losses per inch are different at different frequency points; the loss amount is the per-inch insertion loss data of PCB materials with various energy loss levels at each frequency point; the total insertion loss of each signal line = per-inch insertion loss data * signal line length.

[0103] The via loss calculation unit 36 is configured to obtain the via size and the spacing between two adjacent vias for different energy loss level PCB materials; obtain the film layer where the via in-out line is located according to the coordinate values of the signal layer in the stack-up structure, and calculate the effective via length in combination with the thickness of each layer of the stack-up structure; calculate the single via loss and the total via loss according to the effective via length, and the total via loss = single via loss * number of vias.

[0104] The backdrill depth calculation unit 37 is used to identify whether a via has backdrilling treatment. If there is backdrilling, the maximum backdrill depth is determined. Then, the via stub length is determined by combining the maximum backdrill depth with the effective length of the via. If there is no backdrilling, the via stub length calculation unit 1 obtains the corresponding via stub length according to the effective length of the via.

[0105] The above PCB signal line length and via stub length inspection tool 10 can be applied to the PCB wiring inspection of products such as servers and memories. When using the PCB signal line length and via stub length inspection tool 10, the specific implementation process is as Figures 6 to 8 shown.

[0106] 1) Select the signal line unit

[0107] As Figure 6 shown, click the select signal line button. According to user needs, enter the signal line network name. You can enter keywords for quick filtering and select the filtered signal lines. You can also enter the complete signal line network name for one-by-one selection.

[0108] 2) Routing rule unit

[0109] As Figure 7 shown, in the routing rule unit, by browsing, import the high-speed signal line length and via stub length rule table given by SI for subsequent inspection and comparison.

[0110] Click to open to view the specific content of the high-speed signal line length and via stub length rule table given by SI.

[0111] 3) Routing inspection unit

[0112] a. First, extract the stack-up information of the PCB, obtain the names of each signal layer and plane layer, the thickness of each layer, and the thickness between layers, and record them in the database 6 for backup.

[0113] b. According to the selected signal line, the program extracts its ID information, finds the start layer and arrival layer of its via, and based on the two layers connected by the via of the signal line, compares with the stack-up information of the PCB to calculate the via length, via stub length; whether there is backdrilling treatment. If there is backdrilling, determine how the maximum backdrill depth is, and how the via stub is after backdrilling, so as to determine the via stub length; if there is no backdrilling, then the via stub length is the via stub length calculated previously;

[0114] c. Compare the via stub length calculated in b) and the length of the high-speed signal line provided by SI in the 2) routing rule unit with the via stub length rule table. If it is greater than the rule given by SI, then judge as fail (unqualified) and record the via stub length value. If it is less than the rule given by SI, then judge as Pass (qualified) and record the via stub length value; for those less than the rule given by SI, it can also be passed to the SI engineer for confirmation to determine whether backdrilling is required and whether the line length can be further increased according to certain special routing situations (such as shortening the line length and reducing the routing spacing, etc.).

[0115] 4) Inspection result display unit

[0116] As Figure 8 shown, according to the inspection results, those marked as pass and those marked as fail are recorded respectively and displayed on the display unit. Clicking on any one can switch to the PCB routing interface to facilitate the layout engineer to make corresponding modifications.

[0117] 5) Inspection result reporting unit

[0118] As Figure 8 shown, the inspection results can be generated into an inspection report, which is convenient for engineers in other fields to view and also convenient for data archiving.

[0119] It is possible to check whether the via stubs allowed for different line lengths of high-speed lines meet the requirements to ensure good signal integrity. Using this tool can reduce a large amount of man-hours, shorten the development cycle, and there will be no missed detections. In addition, this tool has a wide range of applications and a high degree of promotion.

[0120] Each module in the above PCB signal line length and via stub length inspection tool 10 can be implemented in whole or in part by software, hardware, and their combinations. The above modules can be embedded in the processor of the computer device in hardware form or independent of it, or stored in the memory of the computer device in software form to facilitate the processor to call and execute the operations corresponding to the above respective modules.

[0121] Based on the PCB signal line length and via stub length inspection tool 10 described above, the PCB signal line length and via stub length inspection method provided by this application can be applied to an application environment such as Figure 9 shown. Among them, the terminal 102 communicates with the server 104 through the network. Among them, the terminal 102 can be but is not limited to various personal computers, laptop computers, smart phones, tablet computers, and portable wearable devices, and the server 104 can be implemented by an independent server or a server cluster composed of multiple servers.

[0122] In one embodiment, asFigure 10 As shown, a method for checking the length of PCB signal lines and the length of via stubs is provided. Taking the server 104 in Figure 9 as an example for illustration, the method includes the following steps:

[0123] Step S1: Input the signal line network name or keyword for quick filtering, and select the filtered signal lines;

[0124] Step S2: Import the correspondence table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link for subsequent inspection and comparison;

[0125] Step S3: Calculate the signal line length and the via stub length on the signal line according to the selected signal line; compare the calculated signal line length and the via stub length on the signal line with the correspondence table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison;

[0126] Step S4: According to the inspection result, set the qualified mark or unqualified mark for the corresponding signal line and display the signal line with the set mark; when any signal line is clicked, switch to the PCB routing interface and display the corresponding signal line;

[0127] Step S5: Generate an inspection report based on the inspection result;

[0128] Step S6: Store the PCB routing interface, the signal lines in the PCB routing interface, the correspondence table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link, the inspection result after comparison, the inspection report, and the signal line length and via stub length data during the routing inspection process.

[0129] In step S4, by clicking on any one, it can be switched to the PCB routing interface, which is convenient for the layout engineer to make corresponding modifications. This invention conducts PCB routing inspection based on the length information of high-speed signal lines and via stubs given by the SI engineer's simulation. In order to ensure that the SI rules are implemented in the PCB routing, to ensure the signal SI quality, and further to ensure the reliability and stability of the system.

[0130] This method can be applied to the PCB routing inspection of products such as servers and memories. It can check whether the via stubs allowed for different lengths of high-speed lines meet the requirements, ensuring good signal integrity. Using this method, a large amount of man-hours can be reduced, the development cycle can be shortened, and there will be no missed detections. In addition, this method has a wide range of applications and a high degree of promotion.

[0131] Such as Figure 11As shown, in this embodiment, step S1 of quickly filtering the input signal line network name or keyword and selecting the filtered signal lines includes:

[0132] Step S11, according to user requirements, input the signal line network name or keyword;

[0133] Step S12, quickly filter according to the input signal line network name or keyword from the signal line file, and display the filtered signal lines;

[0134] Step S13, select the signal lines to be measured from the filtered signal lines; and

[0135] Step S14, display all selected signal lines to be measured.

[0136] As Figure 12 shown, in this embodiment, step S2 of importing the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link includes:

[0137] Step S21, through browsing, select the path to import the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link;

[0138] Step S22, when the path of the SI specification of the high-speed signal link is selected, display the path or name of the SI specification of the high-speed signal link;

[0139] Step S23, import the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link according to the selected path; and

[0140] Step S24, open the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link. Click to open to view the specific content of the high-speed signal line length and via stub length rule table given by SI.

[0141] As Figure 13 shown, in this embodiment, step S3 of calculating the signal line length and the via stub length on the signal line according to the selected signal lines; comparing the calculated signal line length and the via stub length on the signal line with the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison includes:

[0142] Step S31, obtain the stack-up structure of the PCB board where the signal lines to be measured are located, and obtain the names and thickness values of the constituent film layers of the stack-up structure;

[0143] Step S32, calculate the signal line length according to the selected signal lines;

[0144] Step S36: Extract the coordinate (ID) information of the selected signal line, find the start layer and the arrival layer of the via with via stubs on the signal line, and compare the names and thickness values of the constituent film layers of the PCB stack-up structure according to the start layer and the arrival layer of the via with via stubs, and calculate the via length and the via stub length.

[0145] Step S37: Compare the calculated signal line length and the via stub length on the signal line with the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link. If it is greater than the rule given by the SI specification of the high-speed signal link, then it is determined to be unqualified, and record the value of the via stub length. If it is less than the rule given by the SI specification of the high-speed signal link, then it is determined to be qualified, and record the value of the via stub length.

[0146] For those less than the rule given by the SI specification of the high-speed signal link, it can also be passed to the SI engineer for confirmation to determine whether backdrilling is required, and whether the line length can be further increased according to some special routing situations (such as shortening the line length and reducing the routing spacing, etc.).

[0147] As Figure 13 shown, in this embodiment, the step S3 of calculating the signal line length and the via stub length on the signal line according to the selected signal line; comparing the calculated signal line length and the via stub length on the signal line with the correspondence table of signal line length and via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison, further includes:

[0148] Step S33: Obtain the PCB material of the PCB board where the signal line to be measured is located and the loss amounts of PCB materials with various energy loss levels. The PCB materials with various energy loss levels include medium-loss PCB materials, low-loss PCB materials, and ultra-low-loss PCB materials. The signal line length is in inches. For PCB materials with different energy loss levels, their losses per inch are different at different frequency points. The loss amount is the per-inch insertion loss data of PCB materials with various energy loss levels at each frequency point. The total insertion loss of each signal line = per-inch insertion loss data * signal line length.

[0149] Step S34: Obtain the via size and the spacing between two adjacent vias for PCB materials with different energy loss levels. According to the coordinate values of the signal layer in the stack-up structure, obtain the film layer where the via enters and exits the line, and calculate the effective via length in combination with the thickness of each layer of the stack-up structure. Calculate the single via loss and the total via loss according to the effective via length. The total via loss = single via loss * number of vias.

[0150] Step S35: Identify whether the via has backdrilling. If there is backdrilling, determine the maximum backdrilling depth, and then determine the via stub length based on the maximum backdrilling depth and the effective length of the via. If there is no backdrilling, obtain the corresponding via stub length according to the effective length of the via.

[0151] The above PCB signal line length and via stub length inspection method can be applied to the PCB wiring inspection of products such as servers and memories. It can check whether the via stubs allowed for different line lengths of high-speed lines meet the requirements, ensuring good signal integrity. Using this method, a large amount of man-hours can be reduced, the development cycle can be shortened, and there will be no missed detections. In addition, this method has a wide range of applications and a high degree of promotion.

[0152] It should be understood that although Figures 10 - 13 the steps in the flowchart of Figures 10 - 13 are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise clearly stated in this article, the execution of these steps has no strict order restriction, and these steps can be executed in other orders. Moreover,

[0153] In one embodiment, a computer device is provided. The computer device can be a server, and its internal structure diagram can be as Figure 14 shown. The computer device includes a processor, a memory, a network interface, and a database connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store PCB signal line length and via stub length inspection data. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, it implements a method for inspecting the PCB signal line length and via stub length.

[0154] Those skilled in the art can understand that Figure 14The structure shown is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the computer device to which the solution of this application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0155] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the following steps are implemented:

[0156] Input the signal line network name or keyword for quick filtering, and select the filtered signal lines;

[0157] Import the corresponding relationship table of signal line length and via stub length that meets the SI specification of the high-speed signal link for subsequent inspection and comparison;

[0158] According to the selected signal lines, calculate the signal line length and the via stub length on the signal lines; compare the calculated signal line length and the via stub length on the signal lines with the corresponding relationship table of signal line length and via stub length that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison;

[0159] According to the inspection result, set a qualified mark or an unqualified mark for the corresponding signal lines, and display the signal lines with marks set; when any signal line is clicked, switch to the PCB routing interface and display the corresponding signal line;

[0160] Generate an inspection report based on the inspection result;

[0161] Store the PCB routing interface, the signal lines in the PCB routing interface, the corresponding relationship table of signal line length and via stub length that meets the SI specification of the high-speed signal link, the inspection result after comparison, the inspection report, and the signal line length and via stub length data during the routing inspection process.

[0162] For the specific limitations on the steps implemented when the processor executes the computer program, reference can be made to the limitations on the method for checking the signal line length and via stub length of the PCB signal lines in the above text, which will not be elaborated here.

[0163] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented:

[0164] Input the signal line network name or keyword for quick filtering, and select the filtered signal lines;

[0165] Import the corresponding relationship table of signal line length and via stub length that meets the SI specification of the high-speed signal link for subsequent inspection and comparison;

[0166] Calculate the length of the signal line and the length of the stub of the via on the signal line according to the selected signal line; compare the calculated length of the signal line and the length of the stub of the via on the signal line with the correspondence table of the length of the signal line and the length of the stub of the via that meets the SI specification of the high-speed signal link to obtain the inspection result after comparison;

[0167] Set a qualified mark or an unqualified mark for the corresponding signal line according to the inspection result, and display the signal line with the set mark; when any signal line is clicked, switch to the PCB routing interface and display the corresponding signal line;

[0168] Generate an inspection report based on the inspection result;

[0169] Store the PCB routing interface, the signal lines in the PCB routing interface, the correspondence table of the length of the signal line and the length of the stub of the via that meets the SI specification of the high-speed signal link, the inspection result after comparison, the inspection report, and the data of the length of the signal line and the length of the stub of the via during the routing inspection.

[0170] For the specific limitations on the steps implemented when the computer program is executed by the processor, reference may be made to the limitations on the method for inspecting the length of the PCB signal line and the length of the stub of the via in the foregoing text, which will not be elaborated herein.

[0171] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to the memory, storage, database 6 or other media used in the various embodiments provided in the present application can include non-volatile and / or volatile memories. Non-volatile memories can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memories can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0172] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0173] The above-described embodiments merely represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A PCB signal line length and via stub length inspection tool, characterized in that, The tool includes: A signal line selection unit for inputting a signal line network name or keyword for quick filtering and selecting the filtered signal lines; A routing rule unit for importing a correspondence table of signal line lengths and stub lengths of vias that meets the SI specification of high-speed signal links; A routing inspection unit for calculating the signal line length and the stub length of vias on the signal line based on the selected signal line; comparing the calculated signal line length and the stub length of vias on the signal line with the correspondence table of signal line lengths and stub lengths of vias that meets the SI specification of high-speed signal links. If it is greater than the rule given by the SI specification of high-speed signal links, it is determined as unqualified and the value of the stub length of the via is recorded; if it is less than the rule given by the SI specification of high-speed signal links, it is determined as qualified and the value of the stub length of the via is recorded; obtaining the inspection result after comparison; An inspection result display unit for setting a qualified mark or an unqualified mark for the corresponding signal line according to the inspection result and displaying the signal line with the mark set; when any signal line is clicked, switching to the PCB routing interface and displaying the corresponding signal line; An inspection result report unit for generating an inspection report from the inspection result; and A database for storing the PCB routing interface, the signal lines in the PCB routing interface, the correspondence table of signal line lengths and stub lengths of vias that meets the SI specification of high-speed signal links, the inspection result after comparison, the inspection report, and the data of the signal line length and the stub length of vias during the routing inspection process.

2. The PCB signal line length and via stub length inspection tool according to claim 1, wherein The signal line selection unit includes: A signal line selection button for inputting a signal line network name or keyword according to user requirements when clicked; A signal line filter for quickly filtering from the signal line file according to the input signal line network name or keyword and displaying the filtered signal lines; A signal line selection module for selecting the signal lines to be tested from the filtered signal lines; and A display window for the list of selected signal lines for displaying all the selected signal lines to be tested.

3. The PCB signal line length and via stub length inspection tool according to claim 2, wherein, The routing rule unit includes: A browse button for selecting the path to import the correspondence table of signal line lengths and stub lengths of vias that meets the SI specification of high-speed signal links by browsing when clicked; An SI specification display window for displaying the path or name of the SI specification of high-speed signal links when the path of the SI specification of high-speed signal links is selected; An import button for importing the correspondence table of signal line lengths and stub lengths of vias that meets the SI specification of high-speed signal links according to the selected path when clicked; and An open button for opening the correspondence table of signal line lengths and stub lengths of vias that meets the SI specification of high-speed signal links when clicked.

4. The PCB signal line length and via stub length inspection tool according to claim 3, characterized in that, The routing inspection unit includes: A PCB stack-up thickness calculation unit for obtaining the stack-up structure of the PCB where the signal line to be tested is located, obtaining the names and thickness values of the constituent film layers of the stack-up structure, and recording them in the database for future use; A signal line length calculation unit for calculating the signal line length based on the selected signal line; The via stub length calculation unit is used to extract the coordinate information of the selected signal line, find the start layer and the arrival layer of the via with a via stub on the signal line, and calculate the via length and the via stub length by comparing the names and thickness values of the component film layers in the stack-up structure of the PCB board according to the start layer and the arrival layer of the via with the via stub; and The comparison and judgment unit is used to compare the calculated signal line length and the via stub length on the signal line with the corresponding relationship table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link; if it is greater than the rule given by the SI specification of the high-speed signal link, then it is judged as unqualified, and the via stub length value is recorded; if it is less than the rule given by the SI specification of the high-speed signal link, then it is judged as qualified, and the via stub length value is recorded.

5. The PCB signal line length and via stub length inspection tool according to claim 4, characterized in that The trace inspection unit includes: The PCB material insertion loss calculation unit is used to obtain the PCB material of the PCB board where the signal line to be measured is located and the loss amounts of PCB materials with various energy loss levels, where the PCB materials with various energy loss levels include medium-loss PCB materials, low-loss PCB materials, and ultra-low-loss PCB materials; the signal line length is in inches, and for PCB materials with different energy loss levels, their per-inch losses are different at different frequency points; the loss amount is the per-inch insertion loss data of PCB materials with various energy loss levels at each frequency point; the total insertion loss of each signal line = per-inch insertion loss data * signal line length; The via loss calculation unit is used to obtain the via size and the distance between two adjacent vias for PCB materials with different energy loss levels; obtain the film layer where the via in and out lines are located according to the coordinate values of the signal layer in the stack-up structure, and calculate the effective via length in combination with the thickness of each layer in the stack-up structure; calculate the single via loss and the total via loss according to the effective via length, and the total via loss = single via loss * number of vias; and The back drill depth calculation unit is used to identify whether the via has a back drill treatment. If there is a back drill, determine the maximum back drill depth, and then the via stub length is determined by combining the maximum back drill depth with the effective via length; if there is no back drill, the via stub length calculation unit obtains the corresponding via stub length according to the effective via length.

6. A method for inspecting the length of a PCB signal line and the length of a via stub, characterized in that, It includes: Input the signal line network name or keyword for quick filtering and select the filtered signal lines; Import the corresponding relationship table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link; According to the selected signal line, calculate the signal line length and the via stub length on the signal line; compare the calculated signal line length and the via stub length on the signal line with the corresponding relationship table of the signal line length and the via stub length that meets the SI specification of the high-speed signal link. If it is greater than the rule given by the SI specification of the high-speed signal link, then it is judged as unqualified, and the via stub length value is recorded; if it is less than the rule given by the SI specification of the high-speed signal link, then it is judged as qualified, and the via stub length value is recorded; obtain the inspection result after comparison; According to the inspection results, set qualified marks or unqualified marks for the corresponding signal lines and display the signal lines with marks set; When any signal line is clicked, switch to the PCB routing interface and display the corresponding signal line; Generate an inspection report based on the inspection results; And Save the PCB routing interface, the signal lines in the PCB routing interface, the correspondence table of the signal line lengths and via stub lengths of the signal lines that meet the SI specification of the high-speed signal link, the inspected results after comparison, the inspection report, and the signal line lengths and via stub lengths data during the trace inspection process.

7. The method for inspecting the length of a PCB signal line and the length of a via stub according to claim 6, wherein The steps of quickly filtering by the input signal line network name or keyword and selecting the filtered signal lines include: According to the user's requirements, input the signal line network name or keyword; Quickly filter from the signal line file according to the input signal line network name or keyword and display the filtered signal lines; Select the signal lines to be tested from the filtered signal lines; and Display all the selected signal lines to be tested.

8. The method for checking the length of PCB signal lines and the length of via stubs according to claim 7, wherein The steps of importing the correspondence table of the signal line lengths and via stub lengths of the signal lines that meet the SI specification of the high-speed signal link include: Select the path for importing the correspondence table of the signal line lengths and via stub lengths of the signal lines that meet the SI specification of the high-speed signal link through browsing; When the path of the SI specification of the high-speed signal link is selected, display the path or name of the SI specification of the high-speed signal link; Import the correspondence table of the signal line lengths and via stub lengths of the signal lines that meet the SI specification of the high-speed signal link according to the selected path; and Open the correspondence table of the signal line lengths and via stub lengths of the signal lines that meet the SI specification of the high-speed signal link.

9. The method for inspecting the length of PCB signal lines and the length of via stubs according to claim 8, wherein, The steps of calculating the signal line length and the via stub length on the signal line according to the selected signal line; comparing the calculated signal line length and the via stub length on the signal line with the correspondence table of the signal line lengths and via stub lengths of the signal lines that meet the SI specification of the high-speed signal link to obtain the inspected results after comparison include: Obtain the stack-up structure of the PCB board where the signal lines to be tested are located, and obtain the names and thickness values of the constituent film layers of the stack-up structure; Calculate the signal line length according to the selected signal line; Extract the coordinate information of the selected signal line, find the start layer and arrival layer of the via with a via stub set on the signal line, and compare the names and thickness values of the constituent film layers of the stack-up structure of the PCB board according to the start layer and arrival layer of the via with a via stub set, and calculate the via length and the via stub length.

10. The method for checking the length of the PCB signal line and the length of the via stub according to claim 9, wherein The steps of calculating the signal line length and the via stub length on the signal line according to the selected signal line; comparing the calculated signal line length and the via stub length on the signal line with the correspondence table of the signal line lengths and via stub lengths of the signal lines that meet the SI specification of the high-speed signal link to obtain the inspected results after comparison further include: Obtain the PCB material of the PCB board where the signal line to be measured is located and the loss amounts of PCB materials with various energy loss levels. The PCB materials with various energy loss levels include medium-loss PCB materials, low-loss PCB materials, and ultra-low-loss PCB materials. The length of the signal line is in inches. For PCB materials with different energy loss levels, their losses per inch are different at different frequency points. The loss amount is the insertion loss data per inch of PCB materials with various energy loss levels at each frequency point. The total insertion loss of each signal line = insertion loss data per inch * signal line length. Obtain the via size and the distance between two adjacent vias for PCB materials with different energy loss levels. According to the coordinate values of the signal layer in the stack-up structure, obtain the film layer where the via enters and exits the line, and calculate the effective length of the via by combining the thicknesses of each layer in the stack-up structure. Calculate the loss of a single via and the total via loss based on the effective length of the via. The total via loss = loss of a single via * number of vias. Identify whether the via has backdrilling treatment. If there is backdrilling, determine the maximum backdrilling depth, and then determine the via stub length by combining the maximum backdrilling depth with the effective length of the via. If there is no backdrilling, obtain the corresponding via stub length according to the effective length of the via.

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