An inductorless chaotic circuit based on locally active memristor

By designing a non-inductor locally active memristor chaotic circuit, and utilizing parallel circuits and DC biasing technology, the problem of bulky circuits caused by inductive components is solved, realizing an easily integrated chaotic circuit suitable for the field of electronic communication.

CN116169991BActive Publication Date: 2025-10-28HANGZHOU DIANZI UNIV
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Patent Information

Application Number
CN202310184029.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-24
Publication Date
2025-10-28
Estimated Expiration
2043-02-24

AI Technical Summary

Technical Problem

Existing chaotic circuits based on local active memristors contain inductive components, which makes the circuits bulky and difficult to integrate, limiting their practical applications.

Method used

Design an inductor-free chaotic circuit consisting of an N-type locally active memristor, an S-type locally active memristor, a capacitor, and a resistor. Through a parallel circuit structure and a suitable DC bias, the S-type and N-type memristors are made to operate in the negative differential resistance and negative differential conductance regions, respectively, thus generating a chaotic phenomenon.

Benefits of technology

A simple and easily integrated chaotic circuit was realized, which is applicable to fields such as electronic communication, and exhibits the phenomenon of coexistence of initial value sensitive chaotic attractors and stable point attractors.

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Abstract

This invention relates to an inductorless chaotic circuit based on a local active memristor, comprising an N-type local active memristor, an S-type local active memristor, a capacitor C, a resistor R, and a DC voltage source V. D Composition. Both S-type and N-type local active memristors are types of overall passive local active memristors. The former exhibits S-type negative differential resistance in the DC V-I characteristic curve, while the latter exhibits N-type negative differential conductance. By applying a suitable DC bias to a parallel circuit consisting of an S-type local active memristor, an N-type local active memristor, and a capacitor, and simultaneously causing the S-type and N-type local active memristors to operate in the negative differential resistance and negative differential conductance regions, respectively, a chaotic phenomenon is generated in the circuit. This fills the gap in existing research on inductor-free chaotic circuits based on local active memristors.
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Description

Technical Field

[0001] This invention relates to an inductorless chaotic circuit based on a local active memristor, belonging to the field of chaotic circuit technology. Background Technology

[0002] Chaos refers to the irregular, stochastic behavior of deterministic dynamical systems. Although it is unpredictable, with the continuous deepening of research on chaos theory, it has been found that chaotic systems can also be controlled and utilized. Currently, chaos theory has broad application prospects in neural networks, power system engineering, mechanical control, and other fields.

[0003] Locally active characteristics are the origin of all complexity, possessing the ability to amplify weak energy signals. A locally active memristor refers to a memristor with negative differential resistance or conductance. If the memristor's DC-VI characteristic curve shows an S-type negative differential resistance, it is called an S-type memristor. Similarly, if the memristor's DC-VI characteristic curve shows an N-type negative differential conductance, it is called an N-type memristor. Utilizing the nonlinear and locally active characteristics of locally active memristors, they have been widely used in chaotic circuit design. Generally, chaotic circuits constructed with locally active memristors mostly contain inductors; however, due to the large size of inductors, chaotic circuits are bulky and difficult to integrate, hindering practical applications.

[0004] Currently, there is limited research on inductorless chaotic circuits based on locally active memristors. Summary of the Invention

[0005] To overcome the shortcomings of existing research, this invention provides an inductor-free chaotic circuit based on a locally active memristor.

[0006] An inductorless chaotic circuit based on a local active memristor consists of an N-type local active memristor, an S-type local active memristor, a capacitor C, a resistor R, and a DC voltage source V. D Composition. An S-type local active memristor and an N-type local active memristor are connected in parallel, and then further connected in parallel with a capacitor C to form a third-order system. A DC voltage source V... D It is connected in series with resistor R to provide bias for the third-order circuit. DC source V D The negative terminal is grounded, and the positive terminal is connected to one end of resistor R. The other end of resistor R is connected to one end of capacitor C, the positive terminal of the S-type local active memristor, and the positive terminal of the N-type local active memristor. The other end of capacitor C is connected to the DC source V. D The negative terminal of the N-type local active memristor and the negative terminal of the S-type local active memristor are connected.

[0007] The mathematical model of the S-type local active memristor is as follows:

[0008]

[0009] Where i1, v1, and x1 are the current flowing through the S-type local active memristor, the voltage across the S-type local active memristor, and the state variables of the S-type local active memristor, respectively; d2, d0, α1, α'0, and β0' are constants; R M This is a memristor function.

[0010] The mathematical model of the N-type local active memristor is as follows:

[0011]

[0012] Where i2, v2, and x2 are the current flowing through the N-type local active memristor, the voltage across the N-type local active memristor, and the state variables of the N-type local active memristor, respectively; G0 is a constant; and GM is the memristor derivative function.

[0013] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0014] This invention proposes a simple and easily implemented chaotic circuit comprising an S-type locally active memristor, an N-type locally active memristor, a capacitor, a DC voltage source, and a resistor. Compared to existing technologies, the circuit in this invention does not contain an inductor. Combined with the advantages of memristors, such as nonlinearity and nanoscale characteristics, this chaotic circuit is easier to integrate and can be applied in fields such as electronic communications. Furthermore, this circuit is sensitive to initial values; depending on the initial value, the system exhibits a coexistence of chaotic attractors and stable-point attractors.

[0015] Both S-type and N-type local active memristors are types of overall passive local active memristors. The former exhibits an S-type negative differential resistance in its DC-VI characteristic curve, while the latter exhibits an N-type negative differential conductance. By applying a suitable DC bias to a parallel circuit consisting of an S-type local active memristor, an N-type local active memristor, and a capacitor, and simultaneously causing the S-type and N-type local active memristors to operate in the negative differential resistance and negative differential conductance regions, respectively, a chaotic phenomenon is generated in the circuit. This fills the gap in existing research on inductor-free chaotic circuits based on local active memristors. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the inductorless chaotic circuit based on a local active memristor according to the present invention.

[0018] Figure 2 In diagram (a), the state variables x1 of the S-type memristor, x2 of the N-type memristor, and the voltage v across the memristor are shown in the diagram. C (a) shows the time-domain waveform of the S-type memristor in the chaotic circuit, and (b) shows the state variable x1 and the voltage v across it. C The phase diagram (c) shows the state variable x2 of the N-type memristor in the chaotic circuit and the voltage v across it. C The phase diagram is shown in (d), which is the phase diagram of the state variables x1 of the S-type memristor and x2 of the N-type memristor in the chaotic circuit.

[0019] Figure 3 In the figure, (a) and (b) are the time-domain waveforms and phase diagrams of the state variables x1 of the S-type memristor and x2 of the N-type memristor when the initial values ​​of the system are (0,0,0) and (0,0,2), respectively. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] like Figure 1 The diagram shows a non-inductor chaotic circuit based on a locally active memristor, consisting of an N-type locally active memristor, an S-type locally active memristor, a capacitor C, a resistor R, and a DC voltage source V. D Composition. An S-type local active memristor and an N-type local active memristor are connected in parallel, and then further connected in parallel with a capacitor C to form a third-order system. A DC voltage source V... D It is connected in series with resistor R to provide bias for the third-order circuit. DC source V D The negative terminal is grounded, and the positive terminal is connected to one end of resistor R. The other end of resistor R is connected to one end of capacitor C, the positive terminal of the S-type local active memristor, and the positive terminal of the N-type local active memristor. The other end of capacitor C is connected to the DC source V. D The negative terminal of the N-type local active memristor and the negative terminal of the S-type local active memristor are connected.

[0022] The mathematical model of the S-type locally active memristor is:

[0023]

[0024] Where α'0, β1', α1, d0, and d2 are all constants, and α1 is the expansion coefficient, reflecting the rate of change of the state variable x1.

[0025] The process of establishing the mathematical model of the N-type locally active memristor includes the following steps:

[0026] Step 1: Based on Ohm's law of state dependence and the mathematical model of the universal memristor proposed by Chua, the mathematical model of the universal voltage-controlled memristor is obtained as follows:

[0027]

[0028] Where i2, v2, and x2 are the current flowing through the memristor, the voltage across the memristor, and the state variables of the memristor, respectively, and G... M (x2) is the derivative function, and g is the differential function of the state variable x2.

[0029] Step 2: Let the memorized derivative G M (x2)=G0x 2 g(x2,v2)=-5-x2+2.5v2, thus obtaining the mathematical model of the N-type locally active memristor proposed in this invention:

[0030]

[0031] Based on the appendix Figure 1 Combining equations (1) and (3), we can obtain Figure 1 State equations of chaotic circuits:

[0032]

[0033] The mathematical model parameters are set as α1 = -1 × 10 4 , α'0=-9, β1'=2500, d2=100, d0=300, G0=1×10 -4 ,make Figure 1 DC voltage source V in D =12V, resistor R=3.2kΩ, capacitor C=150nF, system initial value (0,0,0), obtained through numerical simulation using Matlab. Figure 2 The chaotic waveform shown Figure 2 Figure (a) shows the state variables x1 of the S-type memristor, x2 of the N-type memristor, and the voltage v across the memristor in the chaotic circuit. C The time-domain waveform, Figure 2 Figure (b) shows the state variable x1 of an S-type memristor in a chaotic circuit and the voltage v across it. C Phase diagram, Figure 2 Figure (c) shows the state variable x2 of an N-type memristor in a chaotic circuit and the voltage v across it.C Phase diagram, Figure 2 Figure (d) shows the phase diagram of the state variables x1 of the S-type memristor and x2 of the N-type memristor in the chaotic circuit. By calculating the Lyapunov exponents LE1 = 384.69, LE2 = -0.06, and LE3 = -2605.89, it is proven that a chaotic attractor has been generated in the system. Keeping other parameters constant, when the initial values ​​of the system are (0,0,0) and (0,0,2) respectively, the following results are obtained: Figure 3 The time-domain waveforms shown in Figure (a) and Figure 3 Figure (b) shows x1-v C The phase diagram in the plane shows that the system exhibits a coexistence of chaotic attractors and stable point attractors.

[0034] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and these variations still fall within the protection scope of the present invention.

Claims

1. An inductorless chaotic circuit based on a local active memristor, characterized in that: It consists of an N-type local active memristor, an S-type local active memristor, a capacitor C, a resistor R, and a DC voltage source V. D The circuit consists of an S-type local active memristor and an N-type local active memristor connected in parallel, which are then connected in parallel with a capacitor C to form a third-order system circuit. The DC voltage source V... D The DC voltage source V, connected in series with resistor R, provides bias for the third-order system circuit. D The negative terminal is grounded, and the positive terminal is connected to one end of resistor R. The other end of resistor R is connected to one end of capacitor C, the positive terminal of the S-type local active memristor, and the positive terminal of the N-type local active memristor. The other end of capacitor C is connected to DC voltage source V. D The negative terminal of the N-type local active memristor and the negative terminal of the S-type local active memristor are connected together. The mathematical model of the S-type local active memristor is as follows: Where i1, v1, and x1 are the current flowing through the S-type local active memristor, the voltage across the S-type local active memristor, and the state variables of the S-type local active memristor, respectively. α'0, β1', α1, d0, and d2 are all constants, and α1 is the expansion coefficient, which reflects the rate of change of the state variable x1. The process of establishing the mathematical model of the N-type local active memristor includes the following steps: Step 1: Based on Ohm's law of state dependence and the mathematical model of the universal memristor proposed by Chua, the mathematical model of the universal voltage-controlled memristor is obtained as follows: Where i2, v2, and x2 are the current flowing through the memristor, the voltage across the memristor, and the state variables of the memristor, respectively, and G... M (x2) is the derivative function, and g is the differential function of the state variable x2; Step 2: Let the memorized derivative function be... g(x2,v2)=-5-x2+2.5v2, the resulting mathematical model of the N-type locally active memristor is: Where G0 = 1 x 10 -4 Combining equations (1) and (3), the state equation of the chaotic circuit can be obtained:

Citation Information

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