Capacitance compensation circuit, capacitance detection circuit, chip and electronic device

Abstract

The application discloses a capacitor compensation circuit, a capacitor detection circuit, a chip and an electronic device. In the capacitor compensation circuit, the capacitor module comprises N compensation capacitors and corresponding first double-channel switches. The first ends of the N compensation capacitors are respectively connected to the inverting input ends of the operational amplifier of the capacitor compensation circuit, the second ends are respectively connected to the first ends of the corresponding first double-channel switches, the second ends of each first double-channel switch are respectively connected to the first internal driving voltage of the capacitor detection circuit through the first resistance module, and the third ends are respectively connected to the second internal driving voltage of the capacitor detection circuit through the second resistance module. The capacitor module is used for offsetting the stray capacitance of the measurement pin of the capacitor detection circuit. The first resistance module and the second resistance module are used for preventing the capacitor detection circuit from leaking electric charges. The application can improve the accuracy of the determined to-be-measured capacitor.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit, in particular to a capacitor compensation circuit, a capacitor detection circuit, a chip and an electronic device. BACKGROUND

[0002] The capacitor detection chip is usually applied in SAR sensor, touch detection and in-ear detection products, and self-capacitance and mutual capacitance detection schemes are used for different application scenarios. The self-capacitance detection scheme usually applies an excitation voltage on a measurement pin to detect the capacitance between the pin and the ground, and the mutual capacitance detection scheme usually applies an excitation voltage on an electrode to detect the mutual capacitance between two electrodes. If the external input capacitance (including parasitic capacitance) of the chip is too large, it is easy to cause the saturation of the capacitor detection circuit. Therefore, the parasitic capacitance compensation function is usually provided in the capacitor sensing device.

[0003] In the capacitor detection process, the voltage on the external input capacitance and the internal compensation capacitance will change periodically. Considering that the charge on the capacitor will not change abruptly, when the voltage of the lower plate of the capacitor is switched, the voltage of the upper plate of the capacitor (i.e. the intermediate node of the charge transfer path) will also change in the same direction, and in the extreme case, it will be higher than the supply voltage and / or lower than the ground voltage. When the voltage exceeds the conduction voltage of the pn junction, the charge transfer process will leak, thereby causing the inaccuracy of the capacitor detection result. SUMMARY

[0004] In view of this, the present application provides a capacitor compensation circuit, a capacitor detection circuit, a chip and an electronic device to solve the problem that the charge transfer process between the poles of the capacitor in the traditional scheme may leak.

[0005] The capacitor compensation circuit provided by the present application is used to compensate the parasitic capacitance in the capacitor detection circuit, and the capacitor detection circuit comprises an operational amplifier. The capacitor compensation circuit comprises a capacitor module, a first resistance module and a second resistance module. The capacitor module comprises N compensation capacitors and first double-channel switches corresponding to the N compensation capacitors, respectively.

[0006] The first end of each of the N compensation capacitors is connected to the inverting input end of the operational amplifier of the capacitor detection circuit, the second end of each of the N compensation capacitors is connected to the first end of the corresponding first double-channel switch, the second end of each of the first double-channel switches is connected to the first internal driving voltage of the capacitor detection circuit through the first resistance module, and the third end of each of the first double-channel switches is connected to the second internal driving voltage of the capacitor detection circuit through the second resistance module.

[0007] The capacitor module is used to offset the parasitic capacitance of the measurement pin of the capacitor detection circuit.

[0008] The first resistance module and the second resistance module are used to prevent the charge leakage of the capacitance detection circuit.

[0009] Optionally, the capacitance module further comprises a first control switch corresponding to each of the N compensation capacitors, and each first control switch is connected between the inverting input terminal of the operational amplifier and the first end of the corresponding compensation capacitor; the N first control switches are used to turn on at least one compensation capacitor to provide a charge amount for offsetting the parasitic capacitance.

[0010] Optionally, the first resistance module comprises a first adjustment unit, and the second resistance module comprises a second adjustment unit; the first adjustment unit is used to adjust the equivalent impedance of the first resistance module according to the voltage of the inverting input terminal of the operational amplifier; and the second adjustment unit is used to adjust the equivalent impedance of the second resistance module according to the voltage of the inverting input terminal of the operational amplifier.

[0011] Optionally, the first adjustment unit comprises a first comparator, a second control switch and a first transistor; the positive input terminal of the first comparator is connected to the inverting input terminal of the operational amplifier, the negative input terminal is connected to the first internal driving voltage, the output terminal is connected to the gate of the first transistor through the second control switch, the source of the first transistor is connected to the first internal driving voltage, and the drain of the first transistor is connected to one channel of the first double-channel switch.

[0012] Optionally, the first adjustment unit further comprises a first capacitor; the first capacitor is connected between the positive input terminal and the output terminal of the first comparator; and the first capacitor is used to adjust the voltage change slope of the gate of the first transistor.

[0013] Optionally, the second adjustment unit comprises a second comparator, a third control switch and a second transistor; the positive input terminal of the second comparator is connected to the inverting input terminal of the operational amplifier, the negative input terminal is connected to the second internal driving voltage, the output terminal is connected to the gate of the second transistor through the third control switch, the source of the second transistor is connected to the second internal driving voltage, and the drain of the second transistor is connected to one channel of the first double-channel switch.

[0014] Optionally, the second adjustment unit further comprises a second capacitor; the second capacitor is connected between the positive input terminal and the output terminal of the second comparator; and the second capacitor is used to adjust the voltage change slope of the gate of the second transistor.

[0015] Optionally, the first adjustment unit and the second adjustment unit form a differential structure.

[0016] Optionally, the first resistance module further comprises a first adjustable resistance and a second double-channel switch; a first end of the second double-channel switch is connected to each channel of each first double-channel switch respectively, a second end is connected to the first internal driving voltage through the first adjustment unit, and a third end is connected to the first internal driving voltage through the first adjustable resistance.

[0017] Optionally, the second resistance module further comprises a second adjustable resistance and a third double-channel switch; a first end of the third double-channel switch is connected to each channel of each first double-channel switch respectively, a second end is connected to the second internal driving voltage through the second adjustment unit, and a third end is connected to the second internal driving voltage through the second adjustable resistance.

[0018] The application further provides a capacitance detection circuit, which comprises any one of the above capacitance compensation circuits.

[0019] Optionally, the capacitance detection circuit further comprises an operational amplifier; a non-inverting input end of the operational amplifier is connected to an upper plate of a compensation capacitor in the capacitance compensation circuit.

[0020] Optionally, the capacitance detection circuit further comprises a feedback capacitor; the feedback capacitor is connected between the non-inverting input end and the output end of the operational amplifier.

[0021] The application further provides a chip comprising any one of the above capacitance detection circuits.

[0022] The application further provides an electronic device comprising any one of the above capacitance detection circuits or any one of the above chips.

[0023] In the above capacitance compensation circuit, capacitance detection circuit, chip and electronic device provided by the application, the capacitance module can offset the stray capacitance of the measurement pin of the capacitance detection circuit, the first resistance module and the second resistance module can prevent the capacitance detection circuit from leaking electric charge, so that the output voltage of the operational amplifier is more stable and accurate, thereby improving the accuracy of the to-be-measured capacitance determined according to the output voltage.

[0024] Further, the first resistance module comprises a first adjustment unit, the second resistance module comprises a second adjustment unit, and the first adjustment unit and the second adjustment unit can automatically adjust the size of the equivalent impedance in series with the compensation capacitor according to the real-time voltage of the non-inverting input end of the operational amplifier, thereby avoiding the risk of electric charge leakage; and the values of the variable resistances such as the pull-up resistance and the pull-down resistance can also be controlled respectively, thereby simplifying the control process.

[0025] Further, the control timing of the second control switch in the first adjusting unit and the control timing of the third control switch in the second adjusting unit can match the control timing of the related switch components in the process of switching from the reset stage to the detection stage of the capacitance detection circuit, without frequent switching, so that the control timing is simpler and the corresponding control process can be further simplified.

[0026] It can be seen that the above-mentioned capacitance compensation circuit can simplify the control process in compensating the parasitic capacitance in many aspects on the basis of improving the accuracy of the determined to-be-detected capacitance. BRIEF DESCRIPTION OF DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort on the basis of these drawings.

[0028] Figure 1 is a structure schematic diagram of a capacitance detection circuit in a research process;

[0029] Figure 2 is a structure schematic diagram of a capacitance compensation circuit in an embodiment of the present application;

[0030] Figure 3 is a structure schematic diagram of a capacitance compensation circuit in another embodiment of the present application;

[0031] Figure 4 is a structure schematic diagram of a capacitance compensation circuit in another embodiment of the present application;

[0032] Figure 5 is a structure schematic diagram of an adjusting unit in an embodiment of the present application;

[0033] Figure 6 is a structure schematic diagram of an adjusting unit in another embodiment of the present application;

[0034] Figure 7 is a control timing schematic diagram in an embodiment of the present application;

[0035] Figure 8 is a structure schematic diagram of a capacitance compensation circuit in another embodiment of the present application;

[0036] Figure 9 is a structure schematic diagram of a capacitance detection circuit in an embodiment of the present application;

[0037] Figure 10 is a structure schematic diagram of a capacitance detection circuit in another embodiment of the present application. DETAILED DESCRIPTION

[0038] REFERENCE Figure 1As shown, the capacitance detection circuit includes an operational amplifier OPAMP, the reset voltage of the operational amplifier OPAMP is VCM, the voltage of the inverting input end is VIN, and the output voltage is Vo; Figure 1 The externally input test capacitance and parasitic capacitance are reflected in the circuit structure of the capacitance detection circuit, and the circuit structure further includes a parasitic capacitance Cp, a test capacitance Cx, a feedback capacitance Cfb, a capacitance compensation module 200, a fourth control switch Φ11, a fifth control switch Φ12, a sixth control switch Φ13, and a seventh control switch Φ21. The first internal driving voltage VP and the second internal driving voltage VN are also provided in the capacitance detection circuit. The value range of the first internal driving voltage VP and the second internal driving voltage VN is between the ground voltage and the power supply voltage of the capacitance detection circuit respectively; optionally VP>VN. Figure 1 The connection relationship of the capacitance detection circuit includes that the first end of the fourth control switch Φ11 is used to access the first internal driving voltage VP, the second end is connected to the ground through the parasitic capacitance Cp, connected to the ground through the test capacitance Cx, and connected to the inverting input end of the operational amplifier OPAMP through the seventh control switch Φ21; the inverting input end of the operational amplifier OPAMP is connected to the non-inverting input end of the operational amplifier OPAMP and the second internal driving voltage VN through the fifth control switch Φ12 respectively, the inverting input end of the operational amplifier OPAMP is also connected to the output end of the operational amplifier OPAMP through the feedback capacitance Cfb, and the output end of the operational amplifier OPAMP is connected to the reset voltage VCM through the sixth control switch Φ13. The capacitance compensation module 200 is arranged at the inverting input end of the operational amplifier OPAMP, and the capacitance compensation module 200 is provided with a compensation capacitance Coff and a dual-channel switch, the first channel Φ1 of the dual-channel switch accesses the first internal driving voltage VP, and the second channel Φ2 accesses the second internal driving voltage VN.

[0039] Specifically, the working process of the capacitance detection circuit includes a reset phase and a detection phase. In the reset phase, the fourth control switch Φ11, the fifth control switch Φ12, the sixth control switch Φ13 and the first channel Φ1 of the double-channel switch are closed, the seventh control switch Φ21 and the second channel Φ2 of the double-channel switch are disconnected, and the capacitance detection circuit is reset. In the detection phase, the seventh control switch Φ21 and the second channel Φ2 of the double-channel switch are closed, the fourth control switch Φ11, the fifth control switch Φ12, the sixth control switch Φ13 and the first channel Φ1 of the double-channel switch are disconnected, and the charges on the parasitic capacitance Cp, the to-be-detected capacitance Cx, the feedback capacitance Cfb and the compensation capacitance Coff in the capacitance compensation module 200 are redistributed. Ideally, the charges stored on the compensation capacitance Coff and the parasitic capacitance Cp cancel each other out, and the changed amount of the charge on the to-be-detected capacitance Cx all flows into or out of the feedback capacitance Cfb. However, at the moment when the seventh control switch Φ21 and the second channel Φ2 of the double-channel switch are closed in the detection phase, the charges on the capacitances do not change suddenly, and the to-be-detected capacitance Cx and the compensation capacitance Coff both cause the voltage VIN at the inverting input terminal of the operational amplifier OPAMP to deviate from VN. If VN is close to the power supply voltage or the ground voltage, the voltage VIN at the inverting input terminal of the operational amplifier OPAMP is prone to be higher than the power supply voltage or lower than the ground voltage, and in an extreme case, the voltage exceeds the forward conduction voltage of the pn junction of the related transistor, thereby causing the inverting input terminal of the operational amplifier OPAMP to leak charges. Since the lower plates of the parasitic capacitance Cp, the to-be-detected capacitance Cx and the feedback capacitance Cfb are all strongly driven, the charge leakage does not affect the charges stored on these three capacitances, but affects the charge stored on the feedback capacitance Cfb, that is, affects the output voltage Vo of the operational amplifier OPAMP, thereby affecting the accuracy of the to-be-detected capacitance Cx determined according to the output voltage Vo.

[0040] To solve the above problems, the present application can prevent the capacitance detection circuit from leaking charges, so that the output voltage Vo of the operational amplifier OPAMP is more stable and accurate, thereby improving the accuracy of the to-be-detected capacitance Cx determined according to the output voltage Vo.

[0041] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application. In the case of no conflict, each of the following embodiments and technical features can be combined with each other.

[0042] The first aspect of the present application provides a capacitance compensation circuit for compensating a parasitic capacitance in a capacitance detection circuit. The structure of the above-mentioned capacitance detection circuit can be referred toFigure 1 As shown, the operational amplifier OPAMP has a reset voltage VCM, an inverting input voltage VIN, and an output voltage Vo.

[0043] Reference Figure 2 As shown, the capacitance compensation circuit includes a capacitance module 110, a first resistance module 120, and a second resistance module 130. The capacitance module 110 includes N compensation capacitors and N first double-channel switches corresponding to the N compensation capacitors, for example Figure 2 N compensation capacitors with capacitance parameters C, 2 1 C, 2 2 C, …, 2 N-1 C, a0, a1, a2, …, a n-1 N first double-channel switches.

[0044] The first ends of the N compensation capacitors are respectively connected to the inverting input ends of the operational amplifier OPAMP of the capacitance detection circuit, and the second ends are respectively connected to the first ends of the corresponding first double-channel switches. The second ends of each first double-channel switch are respectively connected to the first internal driving voltage VP of the capacitance detection circuit through the first resistance module 120, and the third ends of each first double-channel switch are respectively connected to the second internal driving voltage VN of the capacitance detection circuit through the second resistance module 130. Specifically, the first end of each first double-channel switch is connected to its second end, which can form a first channel of the first double-channel switch. The first end of each first double-channel switch is connected to its third end, which can form a second channel of the first double-channel switch.

[0045] The capacitance module 110 is used to offset the parasitic capacitance Cp at the detection pin of the capacitance detection circuit. Specifically, the N compensation capacitors of the capacitance module 110 can form a capacitance array. By setting the first control signals of the N first double-channel switches, the capacitance parameters of the capacitance array can be adjusted so that the capacitance parameters can offset the parasitic capacitance Cp to accurately obtain the to-be-measured capacitance Cx. Here, the first control signals of the N first double-channel switches can include signals for turning on a certain channel of the first double-channel switch, for example, the first control signal a i = 1, indicating that the first double-channel switch a i turns on its first channel, i.e., the first end of the first double-channel switch a i is connected to the second end, and the first internal driving voltage VP of the capacitance detection circuit is connected through the first resistance module 120. The first control signal a i = -1, indicating that the first double-channel switch a i turns on its second channel, i.e., the first end of the first double-channel switch a iThe first end of the first resistor module 120 is connected to the third end, and the second internal driving voltage VN,i can be sequentially taken from 1 to N through the second resistor module 130 connected to the capacitor detection circuit.

[0046] The first resistor module 120 and the second resistor module 130 are used to prevent the capacitor detection circuit from leaking charges, so that the output voltage Vo of the operational amplifier OPAMP is more stable and accurate, thereby improving the accuracy of the to-be-measured capacitor Cx determined according to the output voltage Vo. Specifically, the first resistor module 120 can be used to determine the resistance parameter of the first internal driving voltage VP connection according to the inverting input voltage VIN of the operational amplifier OPAMP, and the second resistor module 130 can be used to determine the resistance parameter of the second internal driving voltage VN connection according to the inverting input voltage VIN of the operational amplifier OPAMP, so that the inverting input voltage VIN of the operational amplifier OPAMP can be kept in a relatively stable range, that is, the above-mentioned inverting input voltage VIN will not be much higher than the power supply voltage or much lower than the ground voltage.

[0047] Specifically, the first resistor module 120 and the second resistor module 130 can respectively include adjustable resistors and / or equivalent impedances that can be adjusted according to the switching operation of each stage in the capacitor detection circuit and other factors, so as to adjust the resistance parameters of the first resistor module 120 and the second resistor module 130, so that the inverting input voltage VIN of the operational amplifier OPAMP will not be much higher than the power supply voltage or much lower than the ground voltage, preventing the inverting input of the operational amplifier OPAMP from leaking charges, thereby preventing the capacitor detection circuit from leaking charges.

[0048] In one embodiment, referring to Figure 3 As shown, the capacitor module further includes N first control switches corresponding to the N compensation capacitors, Figure 3 b0, b1, b2, …, b n-1 N first control switches. Each of the first control switches is connected between the inverting input of the operational amplifier and the first end of the corresponding compensation capacitor, and is used to control the on-off of the corresponding compensation capacitor. The N first control switches are used to connect at least one of the compensation capacitors to provide a charge amount for offsetting the parasitic capacitance Cp.

[0049] Optionally, during the detection process, the capacitance detection circuit can first try to turn on part of the compensation capacitors, and determine the size relationship between the provided charge amount and the charge amount of the parasitic capacitor Cp by observing the relationship between the output voltage Vo and the preset voltage; if the provided charge amount is less than the charge amount of the parasitic capacitor Cp, then other compensation capacitors can be turned on in sequence until the output voltage Vo represents that the provided charge amount is consistent with the charge amount of the parasitic capacitor Cp; if the provided charge amount is greater than the charge amount of the parasitic capacitor Cp, then the turned-on compensation capacitors can be turned off in sequence until the output voltage Vo represents that the provided charge amount is consistent with the charge amount of the parasitic capacitor Cp. Optionally, the second control signal b i controls the first control switch, and the second control signal b i may be a simple control signal such as the second control signal b i = 1, representing turning on the first control switch b i , the second control signal b i = 0, representing turning off the first control switch b i , i can take values from 1 to N in sequence.

[0050] In one embodiment, the first resistance module 120 includes a first adjustment unit Ra_P, and the second resistance module 130 includes a second adjustment unit Ra_N. The first end of the first adjustment unit Ra_P is connected to each channel of each first double-channel switch, the second end is connected to a first internal driving voltage VP, and the third end is connected to the inverting input voltage VIN of the operational amplifier OPAMP; the first end of the second adjustment unit Ra_N is connected to each channel of each first double-channel switch, the second end is connected to a second internal driving voltage VN, and the third end is connected to the inverting input voltage VIN of the operational amplifier OPAMP.

[0051] The first adjustment unit Ra_P is configured to adjust the equivalent impedance of the first resistance module according to the inverting input voltage VIN of the operational amplifier OPAMP; and the second adjustment unit Ra_N is configured to adjust the equivalent impedance of the second resistance module according to the inverting input voltage VIN of the operational amplifier OPAMP.

[0052] Specifically, the capacitance detection circuit comprises a reset stage and a detection stage; the first adjustment unit Ra_P and the second adjustment unit Ra_N can assist each other, and simultaneously adjust the equivalent impedance corresponding to the first resistance module 120 and the second resistance module 130 respectively according to the switching operation from the reset stage to the detection stage, so that the inverting input voltage VIN of the operational amplifier OPAMP is kept in a relatively stable range, and the inverting input voltage VIN of the operational amplifier OPAMP will not be far higher than the power supply voltage or far lower than the ground voltage, so as to prevent the inverting input of the operational amplifier OPAMP from leaking charges.

[0053] Optionally, the first adjustment unit Ra_P and the second adjustment unit Ra_N can be realized by MOS tubes with controllable gate voltages respectively, and the gate voltage of each MOS tube can be adjusted by a comparator, so as to simplify the structure of the first adjustment unit Ra_P and the second adjustment unit Ra_N and ensure the stability in the equivalent impedance adjustment process.

[0054] In the embodiment, the first adjustment unit Ra_P and the second adjustment unit Ra_N can automatically adjust the size of the equivalent impedance in series to the compensation capacitor according to the real-time voltage VIN of the inverting input of the operational amplifier OPAMP, so as to avoid the risk of charge leakage; and the values of the variable resistors such as the pull-up resistor and the pull-down resistor can be controlled respectively, so as to simplify the control process.

[0055] In one example, referring to Figure 5 The first adjustment unit Ra_P comprises a first comparator CMP1, a second control switch S1 and a first transistor MP; optionally, the first transistor MP is a PMOS tube and can be used as a pull-up transistor.

[0056] The positive input end of the first comparator CMP1 is connected to the inverting input end of the operational amplifier OPAMP to access the inverting input voltage VIN thereof, the negative input end of the first comparator CMP1 accesses the first internal driving voltage VP, the output end of the first comparator CMP1 is connected to the gate of the first transistor MP through the second control switch S1, the source of the first transistor MP accesses the first internal driving voltage VP, and the drain is connected to one channel of the first double-channel switch respectively, the drain voltage of the first transistor MP is the lower plate voltage of the compensation capacitor accessed in the capacitance module 110, which is denoted as VC.

[0057] Optionally, referring to Figure 6As shown, the first adjusting unit Ra_P further comprises a first capacitor CL1; the first capacitor CL1 is connected between the positive input terminal and the output terminal of the first comparator CMP1, that is, the first terminal of the first capacitor CL1 is connected to the inverting input terminal of the operational amplifier OPAMP to access the inverting input terminal voltage VIN thereof, and the second terminal of the first capacitor CL1 is connected to the gate of the first transistor MP. The first capacitor CL1 is used to adjust the slope of the change of the gate voltage of the first transistor MP, so as to make the equivalent impedance adjustment process of the first adjusting unit Ra_P more smooth.

[0058] In one example, as shown in FIG. 2, the second adjusting unit Ra_N comprises a second comparator CMP2, a third control switch S2 and a second transistor MN; optionally, the second transistor MN is an NMOS transistor and can be used as a pull-down transistor. Figure 5 As shown, the second adjusting unit Ra_N further comprises a second capacitor CL2; the second capacitor CL2 is connected between the positive input terminal and the output terminal of the second comparator CMP2, that is, the first terminal of the second capacitor CL2 is connected to the inverting input terminal of the operational amplifier OPAMP to access the inverting input terminal voltage VIN thereof, and the second terminal of the second capacitor CL2 is connected to the gate of the second transistor MN. The second capacitor CL2 is used to adjust the slope of the change of the gate voltage of the second transistor MN, so as to make the equivalent impedance adjustment process of the second adjusting unit Ra_N more smooth.

[0059] The positive input terminal of the second comparator CMP2 is connected to the inverting input terminal of the operational amplifier OPAMP to access the inverting input terminal voltage VIN thereof, the negative input terminal of the second comparator CMP2 is connected to the second internal driving voltage VN, the output terminal of the second comparator CMP2 is connected to the gate of the second transistor MN through the third control switch S2, the source of the second transistor MN is connected to the second internal driving voltage VN, and the drain of the second transistor MN is connected to one channel of the first double-channel switch. The drain voltage of the second transistor MN is the lower plate voltage of the compensation capacitor connected in the capacitor module 110, which is denoted as VC.

[0060] Optionally, as shown in FIG. 2, the second adjusting unit Ra_N further comprises a second capacitor CL2; the second capacitor CL2 is connected between the positive input terminal and the output terminal of the second comparator CMP2, that is, the first terminal of the second capacitor CL2 is connected to the inverting input terminal of the operational amplifier OPAMP to access the inverting input terminal voltage VIN thereof, and the second terminal of the second capacitor CL2 is connected to the gate of the second transistor MN. The second capacitor CL2 is used to adjust the slope of the change of the gate voltage of the second transistor MN, so as to make the equivalent impedance adjustment process of the second adjusting unit Ra_N more smooth. Figure 6 Further, as shown in FIG. 2, the first adjusting unit Ra_P further comprises a first capacitor CL1; the first capacitor CL1 is connected between the positive input terminal and the output terminal of the first comparator CMP1, that is, the first terminal of the first capacitor CL1 is connected to the inverting input terminal of the operational amplifier OPAMP to access the inverting input terminal voltage VIN thereof, and the second terminal of the first capacitor CL1 is connected to the gate of the first transistor MP. The first capacitor CL1 is used to adjust the slope of the change of the gate voltage of the first transistor MP, so as to make the equivalent impedance adjustment process of the first adjusting unit Ra_P more smooth.

[0061] Figure 5 and Figure 6 ​The first adjustment unit Ra_P and the second adjustment unit Ra_N can form a differential structure to simplify the control timing of each control signal and make the control process relatively simple and stable. The control timing of the second control switch S1 in the first adjustment unit Ra_P and the control timing of the third control switch S2 in the second adjustment unit Ra_N can match the control timing of the related switch components in the switching process from the reset stage to the detection stage of the capacitor detection circuit, and frequent switching is not required, so that the control timing is simpler and the corresponding control process can be further simplified.

[0062] Specifically, referring to Figure 1 The control timing of the fourth control switch Φ11, the fifth control switch Φ12, the sixth control switch Φ13, and the first channel Φ1 of the double-channel switch is represented by Φ1, and the control timing of the seventh control switch Φ21 and the second channel Φ2 of the double-channel switch is represented by Φ2. The double-channel switch can include a first double-channel switch. Referring to Figure 7As shown, the control timing of the second control switch S1 can be consistent with Φ1, and the control timing of the third control switch S2 can be consistent with Φ2. In the reset stage of the capacitor detection circuit, the second control switch S1 is closed, the third control switch S2 is opened, the first comparator CMP1 is controlled to control the gate of the first transistor MP. Since the positive input terminal of the first comparator CMP1 is connected to the inverted input terminal voltage VIN, and the negative input terminal is connected to the first internal driving voltage VP, VP>VIN, the output of the first comparator CMP1 is low, the first transistor MP is turned on, and the lower plate voltage VC of the connected compensation capacitor is finally pulled up to the first internal driving voltage VP. In the detection stage of the capacitor detection circuit, the second control switch S1 is opened, the third control switch S2 is closed, the first comparator CMP1 is opened, and the second comparator CMP2 is controlled to control the gate of the second transistor MN. The inverted input terminal of the second comparator CMP2 is connected to the second internal driving voltage VN, and if the positive input terminal VIN of the second comparator CMP2 (i.e. the inverted input terminal of the operational amplifier OPAMP, the upper plate of the connected compensation capacitor) appears a transient voltage higher than the second internal driving voltage VN, the gate voltage VG of the second transistor MN will quickly rise, and the second transistor MN will start to conduct, and its on-resistance will decrease with the increase of the gate voltage VG. If the positive input terminal VIN of the second comparator CMP2 appears a transient voltage lower than the second internal driving voltage VN, the gate voltage VG of the second transistor MN will remain unchanged or start to decrease (will not decrease below the ground voltage), thereby gradually increasing the on-resistance of the second transistor MN. When the second transistor MN is turned on, the lower plate voltage VC of the connected compensation capacitor will be pulled down, and the upper plate voltage VIN of the compensation capacitor will also decrease. If VIN decreases to far below the second internal driving voltage VN, resulting in the complete shutdown of the second transistor MN, the lower plate voltage VC of the compensation capacitor will no longer decrease. According to the virtual short characteristic of the operational amplifier, with the establishment of the working point of the operational amplifier OPAMP, VIN will be slowly clamped to the second internal driving voltage VN, and with the recovery of the VIN voltage, the second transistor MN will be turned on again, and the lower plate of the compensation capacitor will be finally pulled down to VN. In this way, during the entire detection stage, the inverted input terminal VIN of the operational amplifier OPAMP can dynamically maintain in the range from the difference between the ground voltage and the corresponding pn junction on-voltage to the power supply voltage.

[0063] Preferably, the input tube size corresponding to the positive input end of the second comparator CMP2 is larger than the input tube size corresponding to the negative input end, so that the bias current of the positive input end of the second comparator CMP2 is larger, and the output voltage VG of the second comparator CMP2 can be ensured to be low when VIN=VN. Here, by adjusting the ratio of the input pair tubes of the second comparator CMP2, the input tube size corresponding to the positive input end of the second comparator CMP2 is made larger than the input tube size corresponding to the negative input end of the second comparator CMP2, and the size of the corresponding VIN voltage when the second transistor MN is turned off is controlled. At this time, as long as the difference between the VIN voltage and the ground voltage does not exceed the on voltage of the pn junction, the charge leakage of the capacitor detection circuit will not occur.

[0064] In one example, referring to Figure 8 As shown, the first resistance module 120 further includes a first adjustable resistance RP and a second dual-channel switch Sp. The first end of the second dual-channel switch Sp is connected to each channel of each first dual-channel switch, respectively, the second end is connected to the first internal driving voltage VP through the first adjustment unit Ra_P, and the third end is connected to the first internal driving voltage VP through the first adjustable resistance RP. Specifically, the first end of the second dual-channel switch Sp is connected to the second end, which can form a first channel of the second dual-channel switch Sp, and the first end of the second dual-channel switch Sp is connected to the third end, which can form a second channel of the second dual-channel switch Sp.

[0065] Optionally, the first adjustable resistance RP can be a single resistance or a resistance array. If the first adjustable resistance RP is an N bit resistance array, the second dual-channel switch Sp is an N bit switch array, and each bit switch can be independently controlled by a register to access the corresponding resistance.

[0066] The present example can pre-configure or configure the third control signal corresponding to the second dual-channel switch Sp through a register, so that the second dual-channel switch Sp connects the first channel and accesses the first internal driving voltage VP through the first adjustment unit Ra_P, or the second dual-channel switch Sp connects the second channel and accesses the first internal driving voltage VP through the first adjustable resistance RP, to contribute to preventing charge leakage.

[0067] In one example, as Figure 8As shown, the second resistance module 130 further comprises a second adjustable resistance RN and a third dual-channel switch Sn; the first end of the third dual-channel switch Sn is connected to each channel of the first dual-channel switch respectively, the second end is connected to the second internal driving voltage VN through the second adjustment unit Ra_N, and the third end is connected to the second internal driving voltage VN through the second adjustable resistance RN. Specifically, the first end of the third dual-channel switch Sn is connected to the second end, which can form the first channel of the third dual-channel switch Sn, and the first end of the third dual-channel switch Sn is connected to the third end, which can form the second channel of the third dual-channel switch Sn.

[0068] Optionally, the second adjustable resistance RN can be a single resistance or a resistance array. If the second adjustable resistance RN is an N bit resistance array, the third dual-channel switch Sn is an N bit switch array, and each bit switch can be independently controlled by a register to access the corresponding resistance.

[0069] The present example can pre-configure or configure the fourth control signal of the third dual-channel switch Sn through a register to make the third dual-channel switch Sn connect the first channel to access the second internal driving voltage VN through the second adjustment unit Ra_N, or make the third dual-channel switch Sn connect the second channel to access the second internal driving voltage VN through the second adjustable resistance RN, so as to contribute to preventing charge leakage.

[0070] Figure 8 The capacitor compensation circuit shown can connect the first adjustment unit Ra_P corresponding to the first channel or the first adjustable resistance RP corresponding to the first channel by setting the second dual-channel switch Sp, and can connect the second adjustment unit Ra_N corresponding to the first channel or the second adjustable resistance RN corresponding to the first channel by setting the third dual-channel switch Sn, so as to provide multiple charge leakage prevention schemes for the capacitor compensation circuit and have higher flexibility. Optionally, Figure 8In the capacitor compensation circuit shown, the third control signal corresponding to the second dual-channel switch Sp and the fourth control signal corresponding to the third dual-channel switch Sn can also be determined according to the type of compensation capacitor in the capacitor module 110. For example, when the compensation capacitor is a signed capacitor, the third control signal can turn on the first channel of the second dual-channel switch Sp, so that the resistor connected to the first internal driving voltage VP is selected as the first adjustment unit Ra_P, and the fourth control signal can turn on the second channel of the third dual-channel switch Sn, so that the resistor connected to the second internal driving voltage VN is selected as the second adjustable resistor RN; or when the compensation capacitor is a signed capacitor, the third control signal can turn on the second channel of the second dual-channel switch Sp, so that the resistor connected to the first internal driving voltage VP is selected as the first adjustable resistor RP, and the fourth control signal can turn on the first channel of the third dual-channel switch Sn, so that the resistor connected to the second internal driving voltage VN is selected as the second adjustment unit Ra_N. When the compensation capacitor is an unsigned capacitor, the third control signal can turn on the first channel of the second dual-channel switch Sp, causing the resistor connected to the first internal drive voltage VP to select the first adjustment unit Ra_P. The fourth control signal can turn on the first channel of the third dual-channel switch Sn, causing the resistor connected to the second internal drive voltage VN to select the second adjustment unit Ra_N. At this time, the structures of the first resistor module 120 and the second resistor module 130 can be as follows: Figure 5 and Figure 6 As shown, the equivalent impedance is automatically adjusted according to the voltage VIN at the inverting input of the operational amplifier OPAMP, simplifying the control process.

[0071] The above capacitor compensation circuit, the capacitor module 110 can offset the parasitic capacitance Cp of the measurement pin of the capacitor detection circuit, the first resistance module 120 and the second resistance module 130 can prevent the capacitor detection circuit from leaking charge, so that the output voltage Vo of the operational amplifier OPAMP is more stable and accurate, thereby improving the accuracy of the to-be-measured capacitor Cx determined according to the output voltage Vo. Further, the first resistance module 120 includes the first adjustment unit Ra_P, and the second resistance module 130 includes the second adjustment unit Ra_N. The first adjustment unit Ra_P and the second adjustment unit Ra_N can automatically adjust the size of the equivalent impedance of the compensation capacitor in series according to the real-time voltage VIN of the inverting input terminal of the operational amplifier OPAMP, respectively, thereby avoiding the risk of charge leakage; it can also avoid controlling the values of the pull-up resistor and the pull-down resistor and other variable resistors, respectively, and simplify the control process. Further, the control timing of the second control switch S1 in the first adjustment unit Ra_P and the control timing of the third control switch S2 in the second adjustment unit Ra_N can match the control timing of the related switch components in the switching process of the capacitor detection circuit from the reset stage to the detection stage, without frequent switching, so that the control timing is simpler and the corresponding control process can be further simplified. It can be seen that the above capacitor compensation circuit can simplify the control process when compensating for the parasitic capacitance in many aspects on the basis of improving the accuracy of the to-be-measured capacitor Cx determined.

[0072] The application provides a capacitor detection circuit in a second aspect, as shown in Figure 9 The capacitor detection circuit includes the capacitor compensation circuit of any of the above embodiments. The capacitor compensation circuit can compensate for the parasitic capacitance generated inside the capacitor detection circuit when detecting an external capacitor.

[0073] In one embodiment, as shown in Figure 9 The capacitor detection circuit further includes an operational amplifier OPAMP. The inverting input terminal of the operational amplifier OPAMP is connected to the upper plate of the compensation capacitor in the capacitor compensation circuit 100. Specifically, the inverting input terminal of the operational amplifier OPAMP can be connected to the upper plate of one compensation capacitor through each first control switch in the capacitor compensation circuit 100.

[0074] Optionally, as shown in Figure 9 The capacitor detection circuit further includes a feedback capacitor Cfb. The feedback capacitor Cfb is connected between the inverting input terminal and the output terminal of the operational amplifier OPAMP.

[0075] Specifically, if the to-be-measured capacitor and the parasitic capacitor are embodied in the capacitor detection circuit, the circuit structure of the capacitor detection circuit can refer to Figure 10As shown, the circuit structure further comprises a parasitic capacitor Cp, a to-be-measured capacitor Cx, a fourth control switch Φ11, a fifth control switch Φ12, a sixth control switch Φ13, and a seventh control switch Φ21, and the capacitor detection circuit further comprises a first internal driving voltage VP and a second internal driving voltage VN. The first internal driving voltage VP and the second internal driving voltage VN are respectively within a range between a ground voltage and a power supply voltage of the capacitor detection circuit; optionally, VP > VN. Figure 10 The connection relationship of the capacitor detection circuit shown includes that a first end of the fourth control switch Φ11 is used to access the first internal driving voltage VP, a second end of the fourth control switch Φ11 is respectively connected to the ground through the parasitic capacitor Cp and connected to the ground through the to-be-measured capacitor Cx and connected to an inverting input end of an operational amplifier OPAMP through the seventh control switch Φ21; the inverting input end of the operational amplifier OPAMP is respectively connected to a non-inverting input end of the operational amplifier OPAMP and the second internal driving voltage VN through the fifth control switch Φ12, the inverting input end of the operational amplifier OPAMP is further connected to an output end of the operational amplifier OPAMP through a feedback capacitor Cfb, and the output end of the operational amplifier OPAMP is connected to a reset voltage VCM through the sixth control switch Φ13. The capacitor compensation circuit 100 is arranged at the inverting input end of the operational amplifier OPAMP, and the capacitor compensation circuit 100 comprises N compensation capacitors and N first double-channel switches corresponding to the N compensation capacitors, respectively. The first channel of each first double-channel switch is respectively connected to the first internal driving voltage VP of the capacitor detection circuit through the first resistance module 120, and the second channel of each first double-channel switch is respectively connected to the second internal driving voltage VN of the capacitor detection circuit through the second resistance module 130.

[0076] In the following, the charge variation of each part of the capacitor is described when the reset stage is switched to the detection stage. Figure 10 As shown in the capacitor detection circuit, the charge variation Q1 of the to-be-measured capacitor Cx and the parasitic capacitor Cp from the reset stage to the detection stage is: Q1 = -(Cx+Cp)*(VP-VN), Cx represents a capacitor parameter corresponding to the to-be-measured capacitor Cx, and Cp represents a capacitor parameter corresponding to the parasitic capacitor Cp. The charge variation Q2 of the connected compensation capacitor is: Q2 = Coff*(VP-VN), Coff represents a capacitor parameter corresponding to the connected compensation capacitor. The first control signal a i and the second control signal b iThe switched-on compensation capacitor can be made to correspond to a capacitance parameter Coff equal to a capacitance parameter Cp corresponding to the parasitic capacitor Cp, and the amount of charge change on the switched-on compensation capacitor and the parasitic capacitor Cp cancels each other out, and for the entire capacitance detection circuit, the capacitance parameter Cx of the to-be-detected capacitance Cx can be simplified as: Qx = -Cx * (VP-VN), Qx is an intermediate parameter determined according to the output voltage Vo, and the first internal driving voltage VP and the second internal driving voltage VN are both known quantities set in advance, and the capacitance parameter Cx of the to-be-detected capacitance Cx can be accurately calculated according to the above formula, and the capacitance detection is realized.

[0077] The above-described capacitance detection circuit includes the capacitance compensation circuit 100 described in any of the above embodiments, and has all the beneficial effects of the capacitance compensation circuit 100 described in any of the above embodiments, which will not be repeated here.

[0078] The chip provided in the third aspect of the present application includes the capacitance detection circuit described in any of the above embodiments, and can accurately detect the corresponding external capacitance, the control logic in the capacitance detection process is relatively simple, and can simultaneously support both signed and unsigned capacitance compensation schemes, and has strong applicability.

[0079] The electronic device provided in the fourth aspect of the present application includes the capacitance detection circuit described in any of the above embodiments or the chip described in any of the above embodiments, and can accurately detect the corresponding external capacitance, the control logic in the capacitance detection process is relatively simple, and can simultaneously support both signed and unsigned capacitance compensation schemes, and has strong applicability.

[0080] Although the present application has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based on the foregoing description and accompanying drawings. The present application includes all such modifications and alterations and is limited only by the scope of the following claims. In particular, with respect to the various functions performed by the above-described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function (e.g., is functionally equivalent), even if not structurally equivalent to the disclosed structure which performs the function in the exemplary implementations illustrated by the present specification. As used herein, the term "exemplary" is used in the sense of serving as an example, instance, or illustration.

[0081] That is, the above description is only an embodiment of the present application, and does not limit the patent scope of the present application, and any equivalent structure or equivalent process transformation using the content of the specification and drawings of the present application, such as the mutual combination of technical features between embodiments, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.

[0082] In addition, for structural elements with identical or similar properties, the same or different reference labels can be used in the present application. In addition, the terms "first", "second", etc. are used only for the purpose of description and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise expressly and specifically limited.

[0083] In the present application, the word "exemplary" is used to mean "serving as an example, instance, or illustration." Any implementation described as "exemplary" in the present application is not necessarily to be construed as preferred or advantageous over other implementations. The present application is given only by way of illustrative example. In the above description, various details are set forth to provide an understanding of the present application. It should be apparent to one of ordinary skill in the art that numerous other implementations can be practiced under the scope of the present application without departing from the spirit and scope of the present application. In other implementations, not all of the described features necessarily would be present in every implementation. Thus, the present application is not intended to be limited to the implementations described herein, but rather, is to be accorded the widest scope consistent with the principles and features presented herein.

Claims

1. A capacitance compensation circuit, characterized by, The capacitor compensation circuit is used for compensating the parasitic capacitance in the capacitance detection circuit, and the capacitance detection circuit comprises an operational amplifier; the capacitor compensation circuit comprises a capacitor module, a first resistor module and a second resistor module, and the capacitor module comprises N compensation capacitors and first double-channel switches corresponding to the N compensation capacitors respectively; first ends of the N compensation capacitors are connected to the inverting input terminals of the operational amplifier of the capacitance detection circuit respectively, second ends are connected to first ends of the corresponding first double-channel switches respectively, second ends of each first double-channel switch are connected to a first internal driving voltage of the capacitance detection circuit through the first resistor module respectively, and third ends are connected to a second internal driving voltage of the capacitance detection circuit through the second resistor module respectively; the capacitor module is used for offsetting the parasitic capacitance of a measurement pin of the capacitance detection circuit; the first resistor module and the second resistor module are used for preventing charge leakage of the capacitance detection circuit; the first resistor module and the second resistor module respectively comprise an adjustable resistor and / or an equivalent impedance adjusted according to switching operations of each stage in the capacitance detection circuit, so that the voltage at the inverting input terminal of the operational amplifier is not much higher than the power supply voltage or much lower than the ground voltage by adjusting the resistance parameters of the first resistor module and the second resistor module.

2. The capacitance compensation circuit of claim 1, wherein, the capacitor module further comprises first control switches corresponding to the N compensation capacitors respectively, and each first control switch is connected between the inverting input terminal of the operational amplifier and the first end of the corresponding compensation capacitor; N first control switches are used for turning on at least one compensation capacitor to provide a charge amount for offsetting the parasitic capacitance.

3. The capacitance compensation circuit of claim 1, wherein, the first resistor module comprises a first adjustment unit, and the second resistor module comprises a second adjustment unit; the first adjustment unit is used for adjusting the equivalent impedance of the first resistor module according to the voltage at the inverting input terminal of the operational amplifier; the second adjustment unit is used for adjusting the equivalent impedance of the second resistor module according to the voltage at the inverting input terminal of the operational amplifier.

4. The capacitance compensation circuit of claim 3, wherein, the first adjustment unit comprises a first comparator, a second control switch and a first transistor; a positive input terminal of the first comparator is connected to the inverting input terminal of the operational amplifier, a negative input terminal is connected to the first internal driving voltage, an output terminal is connected to a gate of the first transistor through the second control switch, a source is connected to the first internal driving voltage, and a drain is connected to one channel of the first double-channel switch respectively.

5. The capacitance compensation circuit of claim 4, wherein, the first adjustment unit further comprises a first capacitor; the first capacitor is connected between the positive input terminal and the output terminal of the first comparator; and the first capacitor is used for adjusting the voltage change slope of the gate of the first transistor.

6. The capacitance compensation circuit of claim 4, wherein, the second adjustment unit comprises a second comparator, a third control switch and a second transistor; The positive input terminal of the second comparator is connected to the inverting input terminal of the operational amplifier, the negative input terminal is connected to the second internal driving voltage, and the output terminal is connected to the gate of the second transistor through the third control switch, the source of the second transistor is connected to the second internal driving voltage, and the drain is connected to one channel of the first double-channel switch.

7. The capacitance compensation circuit of claim 6, wherein, The second adjustment unit further comprises a second capacitor, which is connected between the positive input terminal and the output terminal of the second comparator, and is used to adjust the slope of the change of the gate voltage of the second transistor.

8. The capacitance compensation circuit of claim 6, wherein, The first adjustment unit and the second adjustment unit form a differential structure.

9. The capacitance compensation circuit of claim 3, wherein, The first resistance module further comprises a first adjustable resistance and a second double-channel switch. The first end of the second double-channel switch is connected to each channel of the first double-channel switch, the second end is connected to the first internal driving voltage through the first adjustment unit, and the third end is connected to the first internal driving voltage through the first adjustable resistance.

10. The capacitance compensation circuit of claim 3, wherein, The second resistance module further comprises a second adjustable resistance and a third double-channel switch. The first end of the third double-channel switch is connected to each channel of the first double-channel switch, the second end is connected to the second internal driving voltage through the second adjustment unit, and the third end is connected to the second internal driving voltage through the second adjustable resistance.

11. A capacitance detection circuit, characterized by, The capacitance detection circuit comprises the capacitance compensation circuit of any one of claims 1 to 10.

12. The capacitance detection circuit of claim 11, wherein, The capacitance detection circuit further comprises an operational amplifier, and the inverting input terminal of the operational amplifier is connected to the upper plate of the compensation capacitor in the capacitance compensation circuit.

13. The capacitance detection circuit of claim 11, wherein, The capacitance detection circuit further comprises a feedback capacitor, which is connected between the inverting input terminal and the output terminal of the operational amplifier.

14. A chip, characterized by The capacitance detection circuit comprises the capacitance detection circuit of any one of claims 11 to 13.

15. An electronic device, comprising: The chip comprises the capacitance detection circuit of any one of claims 11 to 13 or the chip of claim 14.

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