Pixel driving circuit and driving method

Abstract

This invention discloses a pixel driving circuit and its driving method. The pixel driving circuit includes a current adjustment unit, a first driving unit, a data writing unit, a second driving unit, and a light-emitting unit. The current adjustment unit is connected to the first driving unit and is used to adjust the driving current generated by the first driving unit. The data writing unit is connected to the second driving unit and is used to provide a data voltage to the second driving unit, which generates a light-emitting driving current based on the data voltage. The second driving unit is also connected to the first driving unit and is used to adjust the light-emitting driving current based on the driving current. The light-emitting unit is connected to the second driving unit and is used to emit light in response to the light-emitting driving current. This invention can adjust the magnitude and output time of the light-emitting driving current, thereby achieving finer grayscale display and improving the sense of depth in the displayed image.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel driving circuit and its driving method. Background Technology

[0002] In existing technology, the pixel driving circuit in the display panel provides driving current to the light-emitting device, causing the light-emitting device to emit light. When the pixel driving circuit uses different driving modes to generate driving current, the control signal controlling the pixel driving circuit to generate driving current has discreteness, or the generated driving current differs from the theoretical driving current value corresponding to the displayed grayscale. This results in poor continuity or uniformity of brightness when the display panel displays different grayscales, reducing the display effect of the display panel. Summary of the Invention

[0003] This invention provides a pixel driving circuit and its driving method to improve the grayscale display effect of a display panel.

[0004] In a first aspect, embodiments of the present invention provide a pixel driving circuit, including a current adjustment unit, a first driving unit, a data writing unit, a second driving unit, and a light-emitting unit;

[0005] The current adjustment unit is connected to the first driving unit and is used to adjust the driving current generated by the first driving unit; the data writing unit is connected to the second driving unit and is used to provide a data voltage to the second driving unit, and the second driving unit is used to generate a light-emitting driving current according to the data voltage; the second driving unit is connected to the first driving unit and is also used to adjust the light-emitting driving current according to the driving current; the light-emitting unit is connected to the second driving unit and is used to emit light in response to the light-emitting driving current.

[0006] Optionally, the first driving unit includes a data writing module, a first storage module, a first light emission control module, and a first driving module;

[0007] The current adjustment unit is connected to the data writing module, which provides a driving voltage to the first driving module. The current adjustment unit is used to adjust the driving voltage. The first storage module is connected to the first driving module to maintain the driving voltage. The first driving module is connected to the first voltage input terminal and the second driving unit through the first light-emitting control module. The first driving module is used to generate the driving current according to the driving voltage. The first light-emitting control module is used to provide a current path for the driving current to be transmitted to the second driving unit.

[0008] Optionally, the current regulating unit includes a first transistor and a second transistor;

[0009] The gate of the first transistor is connected to the first control signal input terminal, the first electrode of the first transistor is connected to the first reference signal input terminal, and the second electrodes of the first transistor and the second electrodes of the second transistor are connected and serve as the output terminal of the current adjustment unit; the gate of the second transistor is connected to the second control signal input terminal, and the first electrode of the second transistor is connected to the second reference signal input terminal; wherein, the level of the first reference signal provided by the first reference signal input terminal is opposite to the level of the level of the second reference signal provided by the second reference signal input terminal.

[0010] Optionally, the data writing module includes a third transistor and a fourth transistor, the first storage module includes a first storage capacitor, the first driving module includes a first driving transistor, and the first light-emitting control module includes a fifth transistor and a sixth transistor.

[0011] The gates of the third transistor and the fourth transistor are connected to the output terminal of the current adjustment unit. The first terminal of the third transistor is connected to the first data signal input terminal. The second terminal of the third transistor is connected to the first terminal of the first driving transistor and the second terminal of the fifth transistor. The gate of the first driving transistor is connected to the second terminal of the fourth transistor and the second terminal of the first storage capacitor. The second terminal of the first driving transistor is connected to the first terminal of the fourth transistor and the first terminal of the sixth transistor. The first terminal of the fifth transistor and the first terminal of the first storage capacitor are connected to the first voltage input terminal. The second terminal of the sixth transistor is connected to the second driving unit. The gates of the fifth transistor and the sixth transistor are connected to the first light emission control signal input terminal.

[0012] Optionally, the pixel driving circuit further includes a first capacitor; the first terminal of the first capacitor is connected to a first signal input terminal, and the second terminal of the first capacitor is connected to the gate of the first driving transistor; wherein, the first signal provided by the first signal input terminal is a ramp signal.

[0013] Optionally, the second driving unit includes a second storage module, a second light-emitting control module, and a second driving module;

[0014] The data writing unit is connected to the second driving module and is used to provide a data voltage to the second driving module; the second storage module is connected to the second driving module and is used to maintain the data voltage; the second driving module is used to generate the light-emitting driving current according to the data voltage; the second driving module is connected to the second terminal of the sixth transistor and is also used to adjust the light-emitting driving current according to the driving current; the second driving module is connected to the first voltage input terminal and the light-emitting unit respectively through the second light-emitting control module, and the second light-emitting control module is used to provide a current path for the light-emitting driving current to be transmitted to the light-emitting unit.

[0015] Optionally, the data writing unit includes a seventh transistor and an eighth transistor; the second storage module includes a second storage capacitor; the second light-emitting control module includes a ninth transistor and a tenth transistor; the second driving module includes a second driving transistor; and the light-emitting unit includes a light-emitting diode.

[0016] The gates of the seventh transistor and the eighth transistor are connected to the scan signal input terminal. The first terminal of the seventh transistor is connected to the second data signal input terminal. The second terminal of the seventh transistor is connected to the first terminal of the second driving transistor and the second terminal of the ninth transistor. The gate of the second driving transistor is connected to the second terminal of the eighth transistor and the second terminal of the second storage capacitor. The second terminal of the second driving transistor is connected to the first terminal of the eighth transistor and the first terminal of the tenth transistor. The first terminal of the ninth transistor and the first terminal of the second storage capacitor are connected to the first voltage input terminal. The second terminal of the tenth transistor is connected to the anode of the light-emitting diode. The gates of the ninth transistor and the tenth transistor are connected to the second light-emitting control signal input terminal. The cathode of the light-emitting diode is connected to the second voltage signal input terminal.

[0017] Optionally, the pixel driving circuit further includes a second capacitor; the first terminal of the second capacitor is connected to the second signal input terminal, and the second terminal of the second capacitor is connected to the gate of the second driving transistor; wherein the second signal provided by the second signal input terminal is a ramp signal.

[0018] Optionally, the pixel driving circuit also includes an eleventh transistor, a twelfth transistor, and a thirteenth transistor;

[0019] The gates of the eleventh transistor, the twelfth transistor, and the thirteenth transistor are connected to the reset signal input terminal. The first terminals of the eleventh transistor, the twelfth transistor, and the thirteenth transistor are connected to the third reference signal input terminal. The second terminal of the eleventh transistor is connected to the gate of the first driving transistor. The second terminal of the twelfth transistor is connected to the gate of the second driving transistor. The second terminal of the thirteenth transistor is connected to the anode of the light-emitting diode.

[0020] Secondly, embodiments of the present invention also provide a driving method for a pixel driving circuit, used to drive the pixel driving circuit provided in any embodiment of the first aspect; comprising:

[0021] In the first stage, the current regulating unit regulates the driving current generated by the first driving unit;

[0022] In the second stage, the data writing unit provides data voltage to the second driving unit;

[0023] In the third stage, the second driving unit generates a light-emitting driving current based on the data voltage, and adjusts the light-emitting driving current according to the driving current, and the light-emitting unit emits light in response to the light-emitting driving current.

[0024] The technical solution of this invention uses a current adjustment unit to control the driving voltage of the input first driving unit, thereby adjusting the driving current generated by the first driving unit based on the driving voltage. During the light-emitting phase, the driving current can adjust the control point potential of the second driving unit based on the data voltage. This allows adjustment of the magnitude and output time of the light-emitting driving current generated by the second driving unit, and consequently, the brightness of the light-emitting unit can be adjusted by regulating the magnitude and output time of the light-emitting driving current. In other words, by adjusting the driving current through the current adjustment unit, the brightness of the display grayscale corresponding to the data voltage is adjusted, achieving finer grayscale display and improving the sense of depth in the displayed image. Simultaneously, by adjusting the potential of the control point of the second driving unit through the driving current, the phenomenon of insufficient grayscale expansion caused by threshold voltage within the second driving unit and leakage current within the data writing unit can be reduced, improving the display effect of the grayscale. Furthermore, since both the data voltage and the driving current are analog signals, the second driving unit provides the light-emitting driving current under the control of the analog signal, thus ensuring the continuity of different display grayscale levels. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention;

[0026] Figure 2This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0027] Figure 3 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0028] Figure 4 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0029] Figure 5 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0030] Figure 6 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0031] Figure 7 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0032] Figure 8 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0033] Figure 9 for Figure 8 A timing diagram corresponding to the provided pixel driving circuit;

[0034] Figure 10 A flowchart illustrating a driving method for a pixel driving circuit provided in an embodiment of the present invention;

[0035] Figure 11 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Detailed Implementation

[0036] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0037] In existing technologies, pixel driving circuits employ both digital and analog driving modes. When the pixel driving circuit of a display panel uses digital driving mode, high and low level digital signals control the output driving current to the light-emitting device. The duration of the output driving current varies depending on the digital signal corresponding to different grayscale levels. The discreteness of digital signals leads to poor continuity between different grayscale levels, resulting in uneven brightness and sudden changes in grayscale brightness. When the pixel driving circuit of a display panel uses analog driving mode, the driving current is generated based on the magnitude of the data signal. Since the data signal is analog, it can improve the continuity between different grayscale levels. However, the drift of the driving transistor characteristics and leakage current in the switching transistor cause a difference between the driving current generated by the pixel driving circuit and the driving current generated based on the data voltage theory. In other words, the actual driving current generated by the pixel driving circuit differs from the driving current corresponding to the grayscale level, preventing the grayscale from fully expanding and affecting the brightness uniformity of the display panel. In summary, when the pixel driving circuit uses different driving modes, the grayscale display effect of the display panel is relatively poor, which reduces the display effect of the display panel.

[0038] To address the aforementioned technical problems, embodiments of the present invention provide a pixel driving circuit. Figure 1 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention. Figure 1 As shown, the pixel driving circuit includes a current adjustment unit 10, a first driving unit 20, a data writing unit 30, a second driving unit 40, and a light-emitting unit 50. The current adjustment unit 10 is connected to the first driving unit 20 and is used to adjust the driving current generated by the first driving unit 20. The data writing unit 30 is connected to the second driving unit 40 and is used to provide a data voltage to the second driving unit 40. The second driving unit 40 is used to generate a light-emitting driving current according to the data voltage. The second driving unit 40 is connected to the first driving unit 20 and is also used to adjust the light-emitting driving current according to the driving current. The light-emitting unit 50 is connected to the second driving unit 40 and is used to emit light in response to the light-emitting driving current.

[0039] Specifically, a driving voltage is input to the first driving unit 20, which generates a driving current based on the driving voltage. The current adjustment unit 10 can control the magnitude of the driving voltage input to the first driving unit 20, thereby adjusting the driving current generated by the first driving unit 20. The second driving unit 40 is connected to the first voltage input terminal VDD. After the first driving unit 20 generates a driving current, the data writing unit 30 provides a threshold-compensated data voltage to the control point of the second driving unit 40, so that the second driving unit 40 generates a light-emitting driving current based on the data voltage at the control point and the first voltage provided by the first voltage input terminal VDD. Different display grayscale levels correspond to different data voltages. By setting the data voltage value, the light-emitting unit 50 can emit light in response to the light-emitting driving current generated by the corresponding data voltage, which corresponds to the display grayscale level. Then, during the light-emitting stage, the light-emitting driving current generated by the second driving unit 40 is transmitted to the light-emitting unit 50, while the driving current generated by the first driving unit 20 is transmitted to the second driving unit 40. The driving current adjusts the potential of the control point of the second driving unit 40, causing the control point potential to change based on the threshold-compensated data voltage. This allows adjustment of the magnitude of the light-emitting driving current generated by the second driving unit 40, thereby controlling the brightness of the light-emitting unit 50 and adjusting the brightness of the display grayscale corresponding to the data voltage, achieving finer grayscale display. Simultaneously, by adjusting the potential of the control point of the second driving unit 40, the threshold voltage within the second driving unit 40 and leakage current within the data writing unit 30 can be reduced, reducing insufficient grayscale expansion caused by these phenomena and improving the grayscale display effect. Furthermore, since both the data voltage and the driving current are analog signals, the second driving unit 40 provides the light-emitting driving current under the control of the analog signal, ensuring the continuity of different display grayscale levels. Moreover, with the first voltage constant, adjusting the potential of the control point of the second driving unit 40 with the driving current is equivalent to adjusting the voltage difference between the control point potential of the second driving unit 40 and the first voltage. When the voltage difference between the control point of the second driving unit 40 and the first voltage is less than a preset voltage, the second driving unit 40 can be controlled to stop outputting the light-emitting driving current. The magnitude of the driving current is related to the rate of change of the potential of the control point of the second driving unit 40. Therefore, the time for the voltage difference between the control point of the second driving unit 40 and the first voltage to reach a value less than the preset voltage can be adjusted according to the magnitude of the driving current, thereby controlling the time for the second driving unit 40 to output the light-emitting driving current. When the pixel driving circuit adopts digital driving mode, the light-emitting time of the display unit 50 corresponding to different display grayscales is different. A frame includes multiple subframes, and different subframes correspond to different frame lengths. The light-emitting time corresponding to different display grayscales can be adjusted by adjusting whether the light-emitting unit 50 in different subframes emits light.Within each subframe, the pixel driving circuit can also adjust the timing of the second driving unit 40 outputting the light-emitting driving current by adjusting the magnitude of the driving current. This allows for adjustment of the time it takes for the light-emitting unit 50 to emit light in response to the light-emitting driving current within each subframe, thereby further adjusting the light-emitting time corresponding to the grayscale display. This enables finer grayscale display and improves the sense of depth in the displayed image.

[0040] Figure 2 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention. Figure 1 and Figure 2 As shown, the first driving unit 20 includes a data writing module 210, a first storage module 220, a first light-emitting control module 230, and a first driving module 240. The current adjustment unit 10 is connected to the data writing module 210, which provides a driving voltage to the first driving module 240. The current adjustment unit 10 is used to adjust the driving voltage. The first storage module 220 is connected to the first driving module 240 and is used to maintain the driving voltage. The first driving module 240 is connected to the first voltage input terminal VDD and the second driving unit 40 through the first light-emitting control module 230. The first driving module 240 is used to generate a driving current according to the driving voltage, and the first light-emitting control module 230 is used to provide a current path for the driving current to be transmitted to the second driving unit 40.

[0041] Specifically, the data writing module 210 provides a driving voltage to the first driving module 240 by charging it. The charging time of the data writing module 210 directly affects the driving voltage value written to the first driving module 240. The current adjustment unit 10 can control the time for the data writing module 210 to write the driving voltage to the first driving module 240, thus the driving voltage written by the data writing module 210 to the first driving module 240 can be adjusted through the current adjustment unit 10. The first driving module 240 is connected to the first voltage input terminal VDD through the first light-emitting control module 230. During the light-emitting stage, the first light-emitting control module 230 controls the first voltage input terminal VDD to provide a first voltage to the first driving module 240, and the first driving module 240 forms a driving current based on the first voltage and the driving voltage. The driving current is related to the driving voltage, and the driving current can be adjusted by adjusting the driving voltage through the current adjustment unit 10.

[0042] Figure 3 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention. Figure 3As shown, the current regulating unit 10 includes a first transistor T1 and a second transistor T2; the gate of the first transistor T1 is connected to the first control signal input terminal CTRL1, the first electrode of the first transistor T1 is connected to the first reference signal input terminal VREF1, and the second electrode of the first transistor T1 is connected to the second electrode of the second transistor T2, serving as the output terminal of the current regulating unit 10; the gate of the second transistor T2 is connected to the second control signal input terminal CTRL2, and the first electrode of the second transistor T2 is connected to the second reference signal input terminal VREF2; wherein, the first reference signal provided by the first reference signal input terminal VREF1 has an opposite level to the second reference signal provided by the second reference signal input terminal VREF2.

[0043] Specifically, the first control signal provided by the first control signal input terminal CTRL1 can control the conduction or cutoff of the first transistor T1, and the second control signal provided by the second control signal input terminal CTRL2 can control the conduction or cutoff of the second transistor T2. When the first control signal controls the first transistor T1 to conduct and the second control signal controls the second transistor T2 to cut off, the first reference signal provided by the first reference signal input terminal VREF1 is output through the first transistor T1. When the first control signal controls the first transistor T1 to cut off and the second control signal controls the second transistor T2 to conduct, the second reference signal provided by the second reference signal input terminal VREF2 is output through the second transistor T2. Since the levels of the first reference signal and the second reference signal are opposite, the state of the data writing module 210 can be controlled by the first reference signal and the second reference signal, thereby controlling the transmission time of the driving voltage of the data writing module 210 by controlling the state of the first transistor T1 and the second transistor T2. For example, when the first reference signal is low and the second reference signal is high, the data writing module 210 can transmit the driving voltage under the low level. The first control signal controls the on-time of the first transistor T1, and simultaneously the second control signal controls the off-time of the second transistor T2, thereby controlling the duration of the data writing module 210's driving voltage transmission under the low level. Then, the second control signal controls the second transistor T2 to turn on, and the first control signal controls the first transistor T1 to turn off, thereby controlling the data writing module 210 to stop transmitting the driving voltage under the high level. Thus, the duration of the data writing module 210's driving voltage transmission can be controlled through the cooperation of the first transistor T1 and the second transistor T2.

[0044] It should be noted that when the first transistor T1 and the second transistor T2 are of the same type, the first control signal and the second control signal can be signals with opposite levels. For example, both the first transistor T1 and the second transistor T2 are P-type transistors, or both are N-type transistors. In other embodiments, the first transistor T1 and the second transistor T2 can be transistors of different types. For example, the first transistor T1 is an N-type transistor, and the second transistor T2 is a P-type transistor. In this case, the timing of the first control signal and the second control signal can be the same. When the first reference signal is low, setting the first transistor T1 to an N-type transistor is beneficial for the transmission of low-level signals.

[0045] Continue to refer to Figure 3 The data writing module 210 includes a third transistor T3 and a fourth transistor T4; the first storage module 220 includes a first storage capacitor Cs1; the first driving module 240 includes a first driving transistor DT1; the first light-emitting control module 230 includes a fifth transistor T5 and a sixth transistor T6; the gates of the third transistor T3 and the fourth transistor T4 are connected to the output terminal of the current adjustment unit 10; the first terminal of the third transistor T3 is connected to the first data signal input terminal VD1; the second terminal of the third transistor T3 is connected to the first terminal of the first driving transistor DT1 and the second terminal of the fifth transistor T5; the gate of the first driving transistor DT1 is connected to the second terminal of the fourth transistor T4 and the second terminal of the first storage capacitor Cs1; the second terminal of the first driving transistor DT1 is connected to the first terminal of the fourth transistor T4 and the first terminal of the sixth transistor T6; the first terminal of the fifth transistor T5 and the first terminal of the first storage capacitor Cs1 are connected to the first voltage input terminal VDD; the second terminal of the sixth transistor T6 is connected to the second driving unit 40; and the gates of the fifth transistor T5 and the sixth transistor T6 are connected to the first light-emitting control signal input terminal EM1.

[0046] Specifically, Figure 3The example diagram illustrates that the third transistor T3, the fourth transistor T4, the first driving transistor DT1, the fifth transistor T5, and the sixth transistor T6 are P-type transistors. The second terminals of the first transistor T1 and the second transistor T2 serve as the output terminals of the current regulation unit 10. That is, the gates of the third transistor T3 and the fourth transistor T4 are connected to the second terminals of the first transistor T1 and the second transistor T2. Therefore, when the first transistor T1 and the second transistor T2 output a low level, they can control the third transistor T3 and the fourth transistor T4 to conduct; when they output a high level, they can control the third transistor T3 and the fourth transistor T4 to turn off. Before the first transistor T1 and the second transistor T2 control the third transistor T3 and the fourth transistor T4 to conduct, the gate potential of the first driving transistor DT1 is initialized to a low level, and the first driving transistor DT1 is in a conducting state. When the first transistor T1 and the second transistor T2 control the third transistor T3 and the fourth transistor T4 to turn on, the driving voltage provided by the first data signal input terminal VD1 is transmitted to the gate of the first driving transistor DT1 through the third transistor T3, the first driving transistor DT1, and the fourth transistor T4, realizing the writing of the driving voltage and simultaneously completing the threshold compensation of the first driving transistor DT1. Then, when the first light emission control signal provided by the first light emission control signal input terminal EM1 controls the fifth transistor T5 and the sixth transistor T6 to turn on, the first voltage provided by the first voltage input terminal VDD is transmitted to the first terminal of the first driving transistor DT1. The first driving transistor DT1 forms a driving current based on the first voltage at the first terminal and the driving voltage at the gate, and transmits it to the second driving unit 40 through the sixth transistor T6. Here, the first voltage is a fixed potential, so the magnitude of the driving current can be adjusted by the driving voltage. Moreover, the first light emission control signal controls the time when the driving current is transmitted to the second driving unit 40 by controlling the turning on or off of the sixth transistor T6.

[0047] Figure 4 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention. Figure 4 As shown, the pixel driving circuit also includes a first capacitor C1; the first terminal of the first capacitor C1 is connected to the first signal input terminal V1, and the second terminal of the first capacitor C1 is connected to the gate of the first driving transistor DT1; wherein, the first signal provided by the first signal input terminal V1 is a ramp signal.

[0048] Specifically, the first signal is a ramp signal. When the first signal changes, the coupling effect of the first capacitor C1 causes a change in the gate potential of the first driving transistor DT1. Therefore, the threshold voltage of the first driving transistor DT1 can be compensated by the first signal, thereby reducing the influence of the characteristics of the first driving transistor DT1 on the driving current and improving the stability of the driving current. When the first driving transistor DT1 forms the driving current based on its gate potential, fine-tuning the gate potential of the first driving transistor DT1 by the first signal can reduce the influence of the leakage current of the fourth transistor T4 on the gate potential of the first driving transistor DT1, further improving the stability of the driving current.

[0049] Figure 5 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention. Figure 5 As shown, the second driving unit 40 includes a second storage module 410, a second light-emitting control module 420, and a second driving module 430; the data writing unit 30 is connected to the second driving module 430 and is used to provide data voltage to the second driving module 430; the second storage module 410 is connected to the second driving module 430 and is used to maintain the data voltage; the second driving module 430 is used to generate a light-emitting driving current according to the data voltage; the second driving module 430 is connected to the second terminal of the sixth transistor T6, and the second driving module 430 is also used to adjust the light-emitting driving current according to the driving current; the second driving module 430 is connected to the first voltage input terminal VDD and the light-emitting unit 50 respectively through the second light-emitting control module 420, and the second light-emitting control module 420 is used to provide a current path for the light-emitting driving current to be transmitted to the light-emitting unit 50.

[0050] Specifically, the control terminal of the second driving module 430 serves as the control point of the second driving unit 40. During the data writing phase, the data writing unit 30 is in a conducting state, providing data voltage to the control terminal of the second driving module 430. During the light-emitting phase, the driving current provided by the first driving transistor DT1 is transmitted to the control terminal of the second driving module 430 through the sixth transistor T6. The driving current writes charge to the control terminal of the second driving module 430, adjusting the potential of the control terminal of the second driving module 430 based on the data voltage. Simultaneously, the second light-emitting control module 420 controls the first voltage input terminal VDD to provide a first voltage to the first terminal of the second driving module 430. The second driving module 430 forms a light-emitting driving current based on the first voltage at the first terminal and the potential of the control terminal, and transmits it to the light-emitting unit 50 through the second light-emitting control module 420. The light-emitting unit 50 responds to the light-emitting driving current and emits light. Since the potential of the control terminal of the second driving module 430 is adjusted based on the data voltage according to the driving current, the phenomenon of insufficient grayscale expansion caused by threshold voltage in the second driving module 430 and leakage current in the data writing unit 30 can be reduced, thus improving the display effect of grayscale. Furthermore, since both the data voltage and driving current are analog signals, the second driving module 430 provides the light-emitting driving current under the control of the analog signals, thus ensuring the continuity of different display grayscale levels. Additionally, by adjusting the magnitude of the driving current, the rate of change of the potential at the control terminal of the second driving module 430 can be adjusted, thereby controlling the time it takes for the control terminal of the second driving module 430 to reach the potential corresponding to when the second driving module 430 stops outputting the light-emitting driving current, and thus controlling the duration of the light-emitting driving current output by the second driving module 430. When the pixel driving current adopts a digital driving mode, the light-emitting time corresponding to different display grayscale levels can be further adjusted, thereby achieving finer grayscale display and improving the sense of depth in the displayed image.

[0051] Figure 6 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention. Figure 6As shown, the data writing unit 30 includes a seventh transistor T7 and an eighth transistor T8; the second storage module 410 includes a second storage capacitor Cs2; the second light-emitting control module 420 includes a ninth transistor T9 and a tenth transistor T10; the second driving module 430 includes a second driving transistor DT2; the light-emitting unit 50 includes a light-emitting diode D1; the gates of the seventh transistor T7 and the eighth transistor T8 are connected to the scan signal input terminal S1; the first terminal of the seventh transistor T7 is connected to the second data signal input terminal VD2; and the second terminal of the seventh transistor T7 is connected to the first terminal of the second driving transistor DT2 and the second terminal of the ninth transistor T9. The gate of the second driving transistor DT2 is connected to the second terminal of the eighth transistor T8 and the second terminal of the second storage capacitor Cs2. The second terminal of the second driving transistor DT2 is connected to the first terminal of the eighth transistor T8 and the first terminal of the tenth transistor T10. The first terminal of the ninth transistor T9 and the first terminal of the second storage capacitor Cs2 are connected to the first voltage input terminal VDD. The second terminal of the tenth transistor T10 is connected to the anode of the light-emitting diode D1. The gates of the ninth transistor T9 and the tenth transistor T10 are connected to the second light-emitting control signal input terminal EM2. The cathode of the light-emitting diode D1 is connected to the second voltage signal input terminal VSS.

[0052] Specifically, Figure 6The example diagram illustrates that the seventh transistor T7, the eighth transistor T8, the second driving transistor DT2, the ninth transistor T9, and the tenth transistor T10 are P-type transistors. Before the seventh transistor T7 and the eighth transistor T8 are turned on, the gate potential of the second driving transistor DT2 is initialized to a low level, and the second driving transistor DT2 is in the on state. During the data writing stage, the scan signal provided by the scan signal input terminal S1 controls the seventh transistor T7 and the eighth transistor T8 to turn on. The data voltage provided by the second data signal input terminal VD2 is transmitted to the gate of the second driving transistor DT2 through the seventh transistor T7, the second driving transistor DT2, and the eighth transistor T8 to realize the writing of the data voltage. At the same time, the threshold compensation of the second driving transistor DT2 is completed, and the second storage capacitor Cs2 maintains the gate potential of the second driving transistor DT2. During the light-emitting phase, the first light-emitting control signal provided by the first light-emitting control signal input terminal EM1 controls the fifth transistor T5 and the sixth transistor T6 to conduct, while the second light-emitting control signal provided by the second light-emitting control signal input terminal EM2 controls the ninth transistor T9 and the tenth transistor T10 to conduct. The driving current is transmitted through the sixth transistor T6 to the gate of the second driving transistor DT2, providing charge to the gate of DT2 and thus adjusting the gate potential of DT2 based on the data voltage. Simultaneously, the first voltage provided by the first voltage input terminal VDD is transmitted through the ninth transistor T9 to the first electrode of DT2. DT2 generates a light-emitting driving current based on the first voltage at its first electrode and the changing potential of its gate, and this current is transmitted through the tenth transistor T10 to the light-emitting diode D1. The light-emitting diode D1 emits light in response to the light-emitting driving current. Since the gate potential of DT2 changes according to the driving current, the magnitude of the light-emitting driving current and the duration for which DT2 provides the light-emitting driving current can be adjusted. Therefore, the brightness of the displayed grayscale can be adjusted simultaneously by regulating both the magnitude and duration of the light-emitting driving current, achieving a finer grayscale display.

[0053] It should be noted that the second light-emitting control signal provided by the second light-emitting control signal input terminal EM2 can be a signal with the same timing as the first light-emitting control signal. In this case, the first light-emitting signal input terminal EM1 and the second light-emitting control signal input terminal EM2 can share a single signal line, thereby reducing the number of signal lines and improving the pixel density of the display panel. In other embodiments, the timing of the second light-emitting control signal and the first light-emitting control signal can be different. By additionally setting the second light-emitting control signal, the time when the light-emitting driving current is transmitted to the light-emitting diode D1 can be controlled, thereby further adjusting the light-emitting time of the light-emitting diode D1, and thus adjusting the light-emitting brightness corresponding to the grayscale, achieving a finer grayscale display and further improving the sense of layering of the displayed image.

[0054] Furthermore, the timing of the current regulation unit 10 controlling the data writing module 210 to transmit the driving voltage can precede the timing of the data writing unit 30 providing the data voltage to the second driving unit 40. That is, the timing of the first transistor T1 and the second transistor T2 controlling the third transistor T3 and the fourth transistor T4 to turn on can precede the timing of the scan signal controlling the seventh transistor T7 and the eighth transistor T8 to turn on, so that before the data voltage is written to the second driving transistor DT2, the first driving transistor DT1 forms a driving current based on the driving voltage. In other embodiments, the current regulation unit 10 controlling the data writing module 210 to transmit the driving voltage and the data writing unit 30 providing the data voltage to the second driving unit 40 are performed simultaneously. That is, the first transistor T1 and the second transistor T2 control the third transistor T3 and the fourth transistor T4 to turn on to write the driving voltage to the first driving transistor DT1, and at the same time, the scan signal controls the seventh transistor T7 and the eighth transistor T8 to turn on to write the data voltage to the second driving transistor DT2. This is not limited here, as long as the first driving transistor DT1 forms a driving current based on the driving voltage before the light emission stage.

[0055] Figure 7 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention. Figure 7 As shown, the pixel driving circuit also includes a second capacitor C2; the first terminal of the second capacitor C2 is connected to the second signal input terminal V2, and the second terminal of the second capacitor C2 is connected to the gate of the second driving transistor DT2; wherein, the second signal provided by the second signal input terminal V2 is a ramp signal.

[0056] Specifically, the second signal is a ramp signal. When the second signal changes, the coupling effect of the second capacitor C2 causes a change in the gate potential of the second driving transistor DT2. Therefore, the threshold voltage of the second driving transistor DT2 can be compensated by the second signal, thereby reducing the influence of the characteristics of the second driving transistor DT2 on the light-emitting driving current and improving the stability of the light-emitting driving current. When the second driving transistor DT2 forms the light-emitting driving current according to its gate potential, fine-tuning the gate potential of the second driving transistor DT2 by the second signal can reduce the influence of the leakage current of the eighth transistor T8 on the gate potential of the second driving transistor DT2, further improving the stability of the light-emitting driving current. Simultaneously, when the eighth transistor T8 is turned on, the light-emitting driving current can charge the second capacitor C2 through the eighth transistor T8, thereby changing the gate potential of the second driving transistor DT2. This allows adjustment of the on-state of the second driving transistor DT2, further adjusting the light-emitting driving current formed by the second driving transistor DT2, and thus adjusting the brightness of the light-emitting diode D1. This, in turn, adjusts the brightness corresponding to the grayscale level, further achieving finer grayscale display and improving the sense of layering of the displayed image.

[0057] It should be noted that both the first signal and the second signal are ramp signals, the timing of the first signal and the second signal can be the same, and the first signal input terminal V1 and the second signal input terminal V2 can share the same signal line.

[0058] Figure 8 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention. Figure 8 As shown, the pixel driving circuit also includes an eleventh transistor T11, a twelfth transistor T12, and a thirteenth transistor T13; the gates of the eleventh transistor T11, the twelfth transistor T12, and the thirteenth transistor T13 are connected to the reset signal input terminal RES; the first terminals of the eleventh transistor T11, the twelfth transistor T12, and the thirteenth transistor T13 are connected to the third reference signal input terminal VREF3; the second terminal of the eleventh transistor T11 is connected to the gate of the first driving transistor DT1; the second terminal of the twelfth transistor T12 is connected to the gate of the second driving transistor DT2; and the second terminal of the thirteenth transistor T13 is connected to the anode of the light-emitting diode D1.

[0059] Specifically, Figure 8The diagram exemplarily illustrates that the eleventh transistor T11, twelfth transistor T12, and thirteenth transistor T13 are P-type transistors. The third reference signal provided by the third reference signal input terminal VREF3 can be low. When the reset signal provided by the reset signal input terminal RES is low, the eleventh transistor T11, twelfth transistor T12, and thirteenth transistor T13 are turned on. The third reference signal provided by the third reference signal input terminal VREF3 is transmitted through the eleventh transistor T11 to the gate of the first driving transistor DT1, through the twelfth transistor T12 to the gate of the second driving transistor DT2, and through the thirteenth transistor T13 to the anode of the light-emitting diode D1, thereby initializing the gates of the first driving transistor DT1, the second driving transistor DT2, and the anode of the light-emitting diode D1, respectively.

[0060] Figure 9 for Figure 8 A timing diagram corresponding to the provided pixel driving circuit is given. The example uses a first reference signal at a low level, a second reference signal at a high level, and a third reference signal at a low level, with the first transistor being an N-type transistor and the others being P-type transistors. Here, res represents the timing of the reset signal, s1 represents the timing of the scan signal, ctrl1 represents the timing of the first control signal, ctrl2 represents the timing of the second control signal, em1 represents the timing of the first light emission control signal, and em2 represents the timing of the second light emission control signal. Additionally, the first voltage is high, and the second voltage provided by the second voltage input terminal VSS is low. (Combined with...) Figure 8 and Figure 9 Explain the working principle of the pixel driving circuit.

[0061] During the initialization phase t1, res is low, s1 is high, ctrl1 is low, ctrl2 is low, em1 is high, and em2 is high. The reset signal turns on the eleventh transistor T11, twelfth transistor T12, and thirteenth transistor T13. The third reference signal initializes the gates of the first driving transistor DT1, the second driving transistor DT2, and the anode of the light-emitting diode D1 through the eleventh transistor T11, twelfth transistor T12, and thirteenth transistor T13, respectively, turning on the first driving transistor DT1 and the second driving transistor DT2. Simultaneously, the first control signal turns off the first transistor T1, and the second control signal turns on the second transistor T2, allowing the second reference signal to be transmitted through the second transistor T2 to the gates of the third transistor T3 and the fourth transistor T4, turning off the third transistor T3 and the fourth transistor T4.

[0062] During the current regulation phase t2, res is high, s1 is high, ctrl1 is high, ctrl2 is high, em1 is high, and em2 is high. The reset signal controls the eleventh transistor T11, the twelfth transistor T12, and the thirteenth transistor T13 to be off. The first control signal controls the first transistor T1 to be on, and the second control signal controls the second transistor T2 to be off. The first reference signal is transmitted through the first transistor T1 to the gate of the third transistor T3 and the gate of the fourth transistor T4, so that the driving voltage is transmitted through the third transistor T3, the first driving transistor DT1, and the fourth transistor T4 to the gate of the first driving transistor DT1, realizing the writing of the driving voltage and the threshold compensation of the first driving transistor DT1. At the same time, the first storage capacitor Cs1 maintains the gate potential of the first driving transistor DT1. During the current regulation stage t2, the conduction time of the first transistor T1 and the second transistor T2 can be adjusted by the first control signal and the second control signal, so that the signals input to the gate of the third transistor T3 and the gate of the fourth transistor T4 are pulse width adjustable signals. This allows the time for the driving voltage to be written to the gate of the first driving transistor DT1 through the third transistor T3, the first driving transistor DT1 and the fourth transistor T4, and thus the average value of the driving current formed by the first driving transistor DT1 according to the gate potential can be adjusted.

[0063] During the data writing phase t3, res is high, s1 is low, ctrl1 is low, ctrl2 is low, em1 is high, and em2 is high. The reset signal controls the eleventh transistor T11, twelfth transistor T12, and thirteenth transistor T13 to be off. The first control signal controls the first transistor T1 to be off, and the second control signal controls the second transistor T2 to be on, allowing the second reference signal to be transmitted through the second transistor T2 to the gates of the third transistor T3 and the fourth transistor T4, thus controlling the third transistor T3 and the fourth transistor T4 to be off. Simultaneously, the scan signal controls the seventh transistor T7 and the eighth transistor T8 to be on. The data voltage provided by the second data signal input terminal VD2 is transmitted through the seventh transistor T7, the second driving transistor DT2, and the eighth transistor T8 to the gate of the second driving transistor DT2, realizing the writing of the data voltage and simultaneously completing the threshold compensation of the second driving transistor DT2. The second storage capacitor Cs2 maintains the gate potential of the second driving transistor DT2.

[0064] During the light-emitting phase t4, res is high, s1 is high, ctrl1 is low, ctrl2 is low, em1 is low, and em2 is low. The reset signal controls the eleventh transistor T11, twelfth transistor T12, and thirteenth transistor T13 to be off. The first control signal controls the first transistor T1 to be off, and the second control signal controls the second transistor T2 to be on, allowing the second reference signal to be transmitted through the second transistor T2 to the gates of the third transistor T3 and the fourth transistor T4, thus controlling the third transistor T3 and the fourth transistor T4 to be off. The scan signal controls the seventh transistor T7 and the eighth transistor T8 to be off. Simultaneously, the first light-emitting control signal controls the fifth transistor T5 and the sixth transistor T6 to be on, changing the first electrode potential of the first driving transistor DT1 from the driving voltage to the first voltage. The voltage difference between the first electrode potential and the gate potential of the first driving transistor DT1 is greater than the threshold voltage of the first driving transistor DT1, causing the first driving transistor DT1 to be on. A driving current is formed based on the voltage difference between the first electrode potential and the gate potential, i.e., a driving current is formed based on the first voltage and the driving voltage. The second light-emitting control signal turns on the ninth transistor T9 and the tenth transistor T10. The driving current is transmitted to the gate of the second driving transistor DT2 through the sixth transistor T6, providing charge to the gate of the second driving transistor DT2, thereby adjusting the gate potential of the second driving transistor DT2 based on the data voltage. At the same time, the first voltage provided by the first voltage input terminal VDD is transmitted to the first terminal of the second driving transistor DT2 through the ninth transistor T9. The potential of the first terminal of the second driving transistor DT2 changes from the data voltage to the first voltage. The voltage difference between the first terminal potential and the gate potential of the second driving transistor DT2 is greater than the threshold voltage of the second driving transistor DT2, so the second driving transistor DT2 turns on and forms a light-emitting driving current based on the first terminal potential and the current gate potential. This current is transmitted to the light-emitting diode D1 through the tenth transistor T10, and the light-emitting diode D1 emits light in response to the light-emitting driving current. Since the gate potential of the second driving transistor DT2 changes according to the driving current, and the rate of change of the gate potential of the second driving transistor DT2 is adjusted according to the magnitude of the driving current, the magnitude of the light-emitting driving current and the duration for which the second driving transistor DT2 provides the light-emitting driving current can be adjusted by the driving current. In turn, the brightness of the light emission corresponding to the grayscale can be adjusted by adjusting the magnitude and duration of the light-emitting driving current, thereby achieving a finer grayscale display.

[0065] It should be noted that when the pixel driving circuit is in digital driving mode, Figure 9 The provided timing diagram can be the timing diagram corresponding to a subframe. In other subframes, the timing diagram corresponding to the pixel driving circuit is... Figure 9The timing diagrams provided are similar and are not limited here. Furthermore, in different subframes, the first control signal can control the on-time of the first transistor T1 to be different, and the corresponding second control signal can control the off-time of the second transistor T2 to be different, resulting in different pulse widths for the gate input signals of the third transistor T3 and the fourth transistor T4, thus achieving different emission times for different subframes.

[0066] This invention also provides a method for driving a pixel driving circuit, used to drive the pixel driving circuit provided in any embodiment of this invention. Figure 10 This is a flowchart illustrating a pixel driving circuit driving method provided in an embodiment of the present invention. Figure 10 As shown, the method includes:

[0067] S201. In the first stage, the current regulating unit regulates the driving current formed by the first driving unit.

[0068] S202, In the second stage, the data writing unit provides data voltage to the second driving unit;

[0069] S203. In the third stage, the second driving unit generates a light-emitting driving current based on the data voltage and adjusts the light-emitting driving current according to the driving current, and the light-emitting unit emits light in response to the light-emitting driving current.

[0070] In this embodiment of the invention, the current adjustment unit controls the driving voltage input to the first driving unit, thereby adjusting the driving current generated by the first driving unit based on the driving voltage. In the third stage, the driving current can adjust the control point potential of the second driving unit based on the data voltage. This allows adjustment of the magnitude and output time of the light-emitting driving current generated by the second driving unit, and consequently, the brightness of the light-emitting unit can be adjusted by regulating the magnitude and output time of the light-emitting driving current. In other words, by adjusting the driving current through the current adjustment unit, the brightness of the display grayscale corresponding to the data voltage is adjusted, achieving finer grayscale display and improving the sense of depth in the displayed image. Simultaneously, by adjusting the potential of the control point of the second driving unit through the driving current, the phenomenon of insufficient grayscale expansion caused by threshold voltage within the second driving unit and leakage current within the data writing unit can be reduced, improving the display effect of the grayscale. Furthermore, since both the data voltage and the driving current are analog signals, the second driving unit provides the light-emitting driving current under the control of the analog signal, thus ensuring the continuity of different display grayscale levels.

[0071] This invention also provides a display panel. Figure 11 This is a schematic diagram of a display panel provided in an embodiment of the present invention. Figure 11 As shown, the display panel 100 includes a pixel driving circuit 101 provided in any embodiment of the present invention.

[0072] Specifically, the pixel driving circuit 101 is the pixel driving circuit provided in any embodiment of the present invention. Since the display panel includes the pixel driving circuit provided in any embodiment of the present invention, it has the beneficial effects of the pixel driving circuit provided in the embodiments of the present invention, which will not be elaborated further here. The display panel can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, etc.

[0073] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A pixel driving circuit, characterized in that, It includes a current regulation unit, a first driving unit, a data writing unit, a second driving unit, and a light-emitting unit; The current adjustment unit is connected to the first driving unit and is used to adjust the driving current generated by the first driving unit; the data writing unit is connected to the second driving unit and is used to provide a data voltage to the second driving unit, and the second driving unit is used to generate a light-emitting driving current according to the data voltage; the second driving unit is connected to the first driving unit and is also used to adjust the light-emitting driving current according to the driving current; the light-emitting unit is connected to the second driving unit and is used to emit light in response to the light-emitting driving current; The first driving unit includes a data writing module, a first storage module, a first light emission control module, and a first driving module; The current regulating unit is connected to the control terminal of the data writing module. The input terminal of the data writing module is connected to the first data signal input terminal. The first transmission terminal of the data writing module is connected to the first terminal of the first driving module. The second transmission terminal of the data writing module is connected to the second terminal of the first driving module. The third transmission terminal of the data writing module is connected to the control terminal of the first driving module. The data writing module is used to provide a driving voltage to the control terminal of the first driving module. The current regulating unit is used to control the time for the data writing module to write the driving voltage to the control terminal of the first driving module, so as to regulate the driving voltage. The first storage module is connected to the first driving module and is used to maintain the driving voltage. The first driving module is connected to the first voltage input terminal and the second driving unit respectively through the first light-emitting control module. The first driving module is used to generate the driving current according to the driving voltage, and the first light-emitting control module is used to provide a current path for the driving current to be transmitted to the second driving unit.

2. The pixel driving circuit according to claim 1, characterized in that, The current regulation unit includes a first transistor and a second transistor; The gate of the first transistor is connected to the first control signal input terminal, the first electrode of the first transistor is connected to the first reference signal input terminal, and the second electrodes of the first transistor and the second electrodes of the second transistor are connected and serve as the output terminal of the current adjustment unit; the gate of the second transistor is connected to the second control signal input terminal, and the first electrode of the second transistor is connected to the second reference signal input terminal; wherein, the level of the first reference signal provided by the first reference signal input terminal is opposite to the level of the level of the second reference signal provided by the second reference signal input terminal.

3. The pixel driving circuit according to claim 1, characterized in that, The data writing module includes a third transistor and a fourth transistor; the first storage module includes a first storage capacitor; the first driving module includes a first driving transistor; and the first light-emitting control module includes a fifth transistor and a sixth transistor. The gates of the third transistor and the fourth transistor are connected to the output terminal of the current adjustment unit. The first terminal of the third transistor is connected to the first data signal input terminal. The second terminal of the third transistor is connected to the first terminal of the first driving transistor and the second terminal of the fifth transistor. The gate of the first driving transistor is connected to the second terminal of the fourth transistor and the second terminal of the first storage capacitor. The second terminal of the first driving transistor is connected to the first terminal of the fourth transistor and the first terminal of the sixth transistor. The first terminal of the fifth transistor and the first terminal of the first storage capacitor are connected to the first voltage input terminal. The second terminal of the sixth transistor is connected to the second driving unit. The gates of the fifth transistor and the sixth transistor are connected to the first light emission control signal input terminal.

4. The pixel driving circuit according to claim 3, characterized in that, It also includes a first capacitor; the first terminal of the first capacitor is connected to the first signal input terminal, and the second terminal of the first capacitor is connected to the gate of the first driving transistor; wherein, the first signal provided by the first signal input terminal is a ramp signal.

5. The pixel driving circuit according to claim 3 or 4, characterized in that, The second driving unit includes a second storage module, a second light-emitting control module, and a second driving module; The data writing unit is connected to the second driving module and is used to provide data voltage to the second driving module; the second storage module is connected to the second driving module and is used to maintain the data voltage; the second driving module is used to generate the light-emitting driving current according to the data voltage; The second driving module is connected to the second terminal of the sixth transistor, and the second driving module is also used to adjust the light-emitting driving current according to the driving current; The second driving module is connected to the first voltage input terminal and the light-emitting unit respectively through the second light-emitting control module. The second light-emitting control module is used to provide a current path for the light-emitting driving current to be transmitted to the light-emitting unit.

6. The pixel driving circuit according to claim 5, characterized in that, The data writing unit includes a seventh transistor and an eighth transistor; the second storage module includes a second storage capacitor; the second light-emitting control module includes a ninth transistor and a tenth transistor; the second driving module includes a second driving transistor; the light-emitting unit includes a light-emitting diode. The gates of the seventh transistor and the eighth transistor are connected to the scan signal input terminal. The first terminal of the seventh transistor is connected to the second data signal input terminal. The second terminal of the seventh transistor is connected to the first terminal of the second driving transistor and the second terminal of the ninth transistor. The gate of the second driving transistor is connected to the second terminal of the eighth transistor and the second terminal of the second storage capacitor. The second terminal of the second driving transistor is connected to the first terminal of the eighth transistor and the first terminal of the tenth transistor. The first terminal of the ninth transistor and the first terminal of the second storage capacitor are connected to the first voltage input terminal. The second terminal of the tenth transistor is connected to the anode of the light-emitting diode. The gates of the ninth transistor and the tenth transistor are connected to the second light-emitting control signal input terminal. The cathode of the light-emitting diode is connected to the second voltage signal input terminal.

7. The pixel driving circuit according to claim 6, characterized in that, It also includes a second capacitor; the first terminal of the second capacitor is connected to the second signal input terminal, and the second terminal of the second capacitor is connected to the gate of the second driving transistor; wherein, the second signal provided by the second signal input terminal is a ramp signal.

8. The pixel driving circuit according to claim 6, characterized in that, It also includes the eleventh, twelfth, and thirteenth transistors; The gates of the eleventh transistor, the twelfth transistor, and the thirteenth transistor are connected to the reset signal input terminal. The first terminals of the eleventh transistor, the twelfth transistor, and the thirteenth transistor are connected to the third reference signal input terminal. The second terminal of the eleventh transistor is connected to the gate of the first driving transistor. The second terminal of the twelfth transistor is connected to the gate of the second driving transistor. The second terminal of the thirteenth transistor is connected to the anode of the light-emitting diode.

9. A method for driving a pixel driving circuit, used to drive the pixel driving circuit according to any one of claims 1-8; characterized in that, include: In the first stage, the current regulating unit regulates the driving current generated by the first driving unit; In the second stage, the data writing unit provides data voltage to the second driving unit; In the third stage, the second driving unit generates a light-emitting driving current based on the data voltage, and adjusts the light-emitting driving current according to the driving current, and the light-emitting unit emits light in response to the light-emitting driving current.

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