A battery protection chip and protection system

Abstract

The invention discloses a battery protection chip and a protection system, which relate to the technical field of battery protection, and include: three ends of a sampling MOS tube are respectively used to correspond to the three ends of an external power tube; a current mirror circuit includes a first mirror branch and a second mirror branch of a current mirror setting, a current input end of the first mirror branch is connected to a connection line between a first resistor and the sampling MOS tube through a second resistor, and a current input end of the second mirror branch is connected to a connection line between the first resistor and the external power tube through a third resistor; one end of a sampling output circuit is connected to the current input end of the second mirror branch, and the other end of the sampling output circuit is connected to a reference current output end of a reference current output circuit, so as to generate an overcurrent control signal when the sampling current output by the sampling output circuit is greater than the reference current output by the reference current output end, and the overcurrent control signal is used to control the external power tube to be turned off, thereby improving the sampling accuracy.

Description

Technical Field

[0001] The present invention relates to the technical field of battery protection, and in particular to a battery protection chip and a protection system. Background Art

[0002] In overcurrent protection chips, in order to meet high power requirements or for chip cost considerations, high-power power tube devices need to be external. For external power tube devices, since there may be some differences in process, structure and materials between the internal sampling tube of the chip and the external power tube, it is difficult to obtain a fixed sampling ratio, which in turn brings difficulties to current sampling.

[0003] At present, current sampling of external power tube devices is mainly achieved in the following way: a high-precision current sampling resistor is connected in series with the external power tube, and the voltage of the resistor is detected to reflect the current corresponding to the power tube; however, this solution requires an additional high-precision current sampling resistor to be added outside the chip, and the circuit hardware cost is relatively high. Summary of the invention

[0004] Based on this, it is necessary to provide a battery protection chip and protection system to address the above technical problems, so as to solve the problem that the existing protection solution requires an additional high-precision current sampling resistor to be added outside the chip, resulting in high hardware costs.

[0005] In a first aspect, an embodiment of the present invention provides a battery protection chip, including:

[0006] Sampling MOS tube, first resistor, current mirror circuit, sampling output circuit and reference current output circuit;

[0007] The three ends of the sampling MOS tube are respectively used to connect to the three ends of the external power tube;

[0008] The current mirror circuit includes a first mirror branch and a second mirror branch of a current mirror setting, the current input end of the first mirror branch is connected to the connection line between the first resistor and the sampling MOS tube through a second resistor, and the current input end of the second mirror branch is connected to the connection line between the first resistor and the external power tube through a third resistor;

[0009] One end of the sampling output circuit is connected to the current input end of the second mirror branch, and the other end of the sampling output circuit is connected to the reference current output end of the reference current output circuit, so as to generate an overcurrent control signal when the sampling current output by the sampling output circuit is greater than the reference current output by the reference current output end, and the overcurrent control signal is used to control the external power tube to shut down.

[0010] The above scheme has the following beneficial effects:

[0011] In the battery protection chip of the present invention, the sampling power tube collects the on-current of the external power tube, reduces the on-current in the sampling power tube by a preset multiple through the first mirror branch and the second mirror branch, outputs it to the sampling output circuit for comparison with the reference current output by the reference current output circuit, thereby outputting an overcurrent control signal to control the on-off of the external power tube; on the one hand, it avoids the use of high-precision current sampling resistors, reducing the hardware cost of the circuit; on the other hand, the sampling output circuit calibrates the difference between the on-resistance of the external power tube and the on-resistance of the internal sampling tube, thereby improving the current sampling accuracy.

[0012] Optionally, the reference current output circuit includes:

[0013] A third mirror branch, a fourth mirror branch, a fifth mirror branch, a fourth resistor, a fifth resistor and a sixth resistor;

[0014] The reference current output circuit is used to output a reference current with an adjustable positive and negative temperature coefficient; wherein the power supply end of the third mirror branch is used to connect to a power supply, the control end of the third mirror branch is connected to the control end of the fourth mirror branch, the mirror current output end of the third mirror branch is connected to one end of the fourth resistor and one end of the fifth resistor, the other end of the fourth resistor is connected to the first output end of the fourth mirror branch, and the other end of the fifth resistor is grounded;

[0015] The power supply end of the fourth mirror branch is used to connect to the power supply, the first output end of the fourth mirror branch is connected to the first control end of the fifth mirror branch, the second output end of the fourth mirror branch is respectively connected to the second control end of the fifth mirror branch and one end of the sixth resistor, and the other end of the sixth resistor is grounded;

[0016] The power supply end of the fifth mirror branch is used to connect to the power supply, the input end of the fifth mirror branch is connected to the control end of the third mirror branch, and the calibration current output end of the fifth mirror branch and the calibration current output end of the third mirror branch are respectively connected to the reference current input end of the sampling output circuit to output the reference current.

[0017] Optionally, the third mirror branch includes:

[0018] a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, N1 sixth MOS tubes and a seventh resistor, where N1 is an integer greater than 0;

[0019] The input end of the first MOS tube and the input end of the second MOS tube are respectively used to connect to the power supply, and the control end of the first MOS tube is respectively connected to the control end of the second MOS tube and the control end of the fourth mirror branch; the output end of the first MOS tube is connected to the input end of the third MOS tube, the output end of the third MOS tube is connected to the connection end of the second resistor and the third resistor, and the control end of the third MOS tube is connected to the control end of the fourth MOS tube;

[0020] The output end of the second MOS tube is connected to the input end of the fourth MOS tube and the control end of the fourth MOS tube, the output end of the fourth MOS tube is connected to one end of the seventh resistor, and the other end of the seventh resistor is grounded;

[0021] The input end of the fifth MOS tube and the input ends of each of the sixth MOS tubes are respectively used to connect to the power supply, the control end of the fifth MOS tube is connected to the control end of each of the sixth MOS tubes and the input end of the fourth MOS tube, the output end of the fifth MOS tube is connected to the output end of the fourth MOS tube, and the output end of each of the sixth MOS tubes is respectively connected to the calibration current output end of the fifth mirror branch.

[0022] Optionally, the fourth mirror branch includes:

[0023] a seventh MOS tube, an eighth MOS tube, N2 ninth MOS tubes, N3 tenth MOS tubes and an eighth resistor, wherein the ratio of N2 to N3 is a preset value, and N2 and N3 are integers greater than 0;

[0024] The input end of the seventh MOS tube and the input end of the eighth MOS tube are respectively used to connect to the power supply, and the control end of the seventh MOS tube is respectively connected to the control end of the eighth MOS tube and the control end of the third mirror branch;

[0025] The output end of the seventh MOS tube is respectively connected to the input end of each of the ninth MOS tubes and the first control end of the fifth mirror branch, the control end and the input end of each of the ninth MOS tubes are connected, and the output end of each of the ninth MOS tubes is respectively grounded;

[0026] The output end of the eighth MOS tube is connected to one end of the eighth resistor and the second control end of the fifth mirror branch, the other end of the eighth resistor is respectively connected to the input end of each of the tenth MOS tubes, the control end and the input end of each of the tenth MOS tubes are connected, and the output end of each of the tenth MOS tubes is respectively grounded.

[0027] Optionally, the fifth mirror branch includes:

[0028] an eleventh MOS tube, a twelfth MOS tube, N4 thirteenth MOS tubes, a fourteenth MOS tube and a fifteenth MOS tube, where N4 is an integer greater than 0;

[0029] The input end of the eleventh MOS tube, the input end of the twelfth MOS tube and the input end of each of the thirteenth MOS tubes are respectively used to connect to the power supply, and the control end of the eleventh MOS tube, the control end of the twelfth MOS tube and the control end of each of the thirteenth MOS tubes are connected;

[0030] The output end of the eleventh MOS tube is connected to the input end of the fourteenth MOS tube and the control end of the third mirror branch, the control end of the fourteenth MOS tube is connected to the first output end of the fourth mirror branch, and the output end of the fourteenth MOS tube is grounded;

[0031] The output end of the twelfth MOS tube is connected to the control end, the output end of the twelfth MOS tube is connected to the input end of the fifteenth MOS tube, the control end of the fifteenth MOS tube is connected to the second output end of the fourth mirror branch, and the output end of the fifteenth MOS tube is grounded; the output ends of each of the thirteenth MOS tubes are respectively connected to the reference current output end of the third mirror branch.

[0032] Optionally, the first mirror branch includes:

[0033] a sixteenth MOS tube and a seventeenth MOS tube, wherein the input end of the sixteenth MOS tube is connected to the input end of the sampling MOS tube through the second resistor, the control end of the sixteenth MOS tube is connected to the first control end of the second mirror branch, the output end of the sixteenth MOS tube is respectively connected to the control end of the sampling output circuit and the input end of the seventeenth MOS tube, the control end of the seventeenth MOS tube is connected to the second control end of the second mirror branch, and the output end of the seventeenth MOS tube is grounded.

[0034] Optionally, the second mirror branch includes:

[0035] An eighteenth MOS tube, a nineteenth MOS tube, a twentieth MOS tube and a constant current source;

[0036] The input end of the eighteenth MOS tube is used to connect the input end of the external power tube through the third resistor, the input end of the eighteenth MOS tube is connected to one end of the sampling output circuit, the control end of the eighteenth MOS tube is connected to the output end, the control end of the eighteenth MOS tube is connected to the first control end of the first mirror branch, the output end of the eighteenth MOS tube is connected to the input end of the nineteenth MOS tube, the control end of the nineteenth MOS tube is connected to the second control end of the first mirror branch, and the output end of the nineteenth MOS tube is grounded;

[0037] The power supply end of the constant current source is used to connect to a power supply, the output end of the constant current source is connected to the input end and the control end of the 20th MOS tube, the control end of the 20th MOS tube is connected to the control end of the 19th MOS tube, and the output end of the 20th MOS tube is grounded.

[0038] Optionally, the sampling output circuit includes:

[0039] N5 twenty-first MOS tubes, twenty-second MOS tubes, and twenty-third MOS tubes, where N5 is an integer greater than 0;

[0040] The input end of each of the twenty-first MOS tubes is respectively connected to the output end of the reference current output circuit, the input end of each of the twenty-first MOS tubes is connected to the control end, the control end of each of the twenty-first MOS tubes is connected to the control end of the twenty-second MOS tube, and the output end of each of the twenty-first MOS tubes is respectively grounded;

[0041] The input end of the twenty-third MOS tube is connected to the current input end of the second mirror branch, the control end of the twenty-third MOS tube is connected to the output end of the first mirror branch, the output end of the twenty-third MOS tube is connected to the input end of the twenty-second MOS tube, and the output end of the twenty-second MOS tube is grounded; the connection end between the output end of the twenty-third MOS tube and the input end of the twenty-second MOS tube is used to output the overcurrent control signal.

[0042] Optionally, the ratio of N2 to N3 is 8.

[0043] In a second aspect, an embodiment of the present invention provides a battery protection system, comprising the battery protection chip and an external power tube as described in any one of the first aspect, wherein the external power tube is arranged in series in a battery power supply circuit, an input end of the external power tube is connected to an input end of the battery protection chip, a control end of the external power tube is connected to a control end of the battery protection chip, an output end of the external power tube is connected to an output end of the battery protection chip, and the protection chip is used to output an overcurrent control signal when the current of the external power tube is greater than a preset value, and the overcurrent control signal is used to control the external power tube to shut down.

[0044] The above scheme has the following beneficial effects:

[0045] The battery protection system of the present invention utilizes the battery protection chip, which, on the one hand, avoids the use of high-precision current sampling resistors and reduces the circuit hardware cost; on the other hand, the sampling output circuit inside the protection chip calibrates the difference between the on-resistance of the external power tube and the on-resistance of the internal sampling tube, thereby improving the current sampling accuracy. When the external power tube is overcurrent, the external power tube can be more accurately controlled to be shut down, thereby avoiding battery damage due to overcurrent. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0047] Figure 1 is a schematic diagram of a circuit structure of a battery protection chip provided in one embodiment of the present invention;

[0048] Figure 2 is a schematic diagram of the circuit structure of another battery protection chip provided in one embodiment of the present invention;

[0049] Figure 3 is a schematic diagram of the structure of a reference current output circuit provided in one embodiment of the present invention;

[0050] The symbols are explained as follows:

[0051] 1. Current mirror circuit; 11. First mirror branch; 12. Second mirror branch; 2. Sampling output circuit; 3. Reference current output circuit; 31. Third mirror branch; 32. Fourth mirror branch; 33. Fifth mirror branch; K1, control signal; Vout, overcurrent control signal; VCC, power supply; B100, battery protection chip; I3, sampling current; I4, reference current. DETAILED DESCRIPTION

[0052] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments.

[0053] In one embodiment, a method is provided as follows Figure 1 The circuit structure of the battery protection chip shown in the figure, the battery protection chip B100 includes: a sampling MOS tube M101, a resistor R100, a current mirror circuit 1, a sampling output circuit 2 and a reference current output circuit 3; wherein the current mirror circuit 1 includes a first mirror branch 11 and a second mirror branch 12, the current input end of the first mirror branch 11 is connected to the connection line between the resistor R100 and the sampling MOS tube M101 through the resistor R102, and the current input end of the second mirror branch 12 is connected to the connection line between the resistor R100 and the external power tube M100 through the resistor R101; the first control end of the first mirror branch 11 is connected to the first control end of the second mirror branch 12, and the second control end of the first mirror branch 11 is connected to the second control end of the second mirror branch 12.

[0054] One end of the sampling output circuit 2 is connected to the current input end of the second mirror branch 12, and the other end of the sampling output circuit 2 is connected to the reference current output end of the reference current output circuit 3, so as to generate an overcurrent control signal Vout when the sampling current I3 input to the sampling output circuit 2 is greater than the reference current I4 output from the reference current output end. The overcurrent control signal Vout is used to control the external power tube M100 to shut down.

[0055] The working principle of the above battery protection chip is as follows:

[0056] When the external power tube M100 works normally, the current flowing through the external power tube M100 is Ipower, and the current flowing through the sampling power tube M101 is Isense. The ratio of the on-resistance of the external power tube M100 to the on-resistance of the sampling power tube M101 is 1:k, and the resistance value of the set resistor R101 is much smaller than the on-resistance of the sampling power tube M101 and can be ignored. Then, Ipower=Isense×k can be obtained, and then the sampling power tube M101 is connected to the first mirror branch 11, the second mirror branch 12, the resistor R101 and the resistor R102. The current Isense of the MOS tube M101 decreases at a preset ratio, and outputs a sampling current I3 to the sampling output circuit 2. The sampling output circuit 2 compares the sampling current I3 with the reference current I4. When the sampling current I3 is greater than the reference current I4, a high-level overcurrent control signal Vout is output. The control circuit can output a control signal K1 according to the signal to control the external power tube M100 to disconnect. At the same time, a mirror circuit with an adjustable ratio is provided in the sampling output circuit 2 to correct the difference between the on-resistance of the external power tube M100 and the on-resistance of the sampling MOS tube M101 at normal temperature.

[0057] In the battery protection chip of this embodiment, the sampling MOS tube collects the on-current of the external power tube, reduces the on-current in the sampling MOS tube by a preset multiple and outputs it to the sampling output circuit for comparison with the reference current output by the reference current output circuit, thereby outputting a sampling signal to control the on-off of the external power tube; on the one hand, it avoids the use of high-precision current sampling resistors and reduces costs; on the other hand, the sampling output circuit calibrates the difference between the on-resistance of the external power tube and the on-resistance of the internal sampling tube at room temperature, thereby improving the current sampling accuracy.

[0058] In one embodiment, a method is provided as follows Figure 2 The circuit structure of the battery protection chip shown in FIG. Figure 1 Based on the battery protection chip in the embodiment, specific circuits of the first mirror branch 11, the second mirror branch 12, the sampling output circuit 2 and the reference current output circuit 3 are provided.

[0059] like Figure 3 As shown, the reference current output circuit 3 includes: a third mirror branch 31, a fourth mirror branch 32, a fifth mirror branch 33, a resistor R2, a resistor R3 and a resistor R4; the power supply end of the third mirror branch 31 is used to connect to the power supply VCC, the control end of the third mirror branch 31 is connected to the control end of the fourth mirror branch 32, the mirror current output end of the third mirror branch 31 is connected to one end of the resistor R3 and one end of the resistor R4, the other end of the resistor R3 is connected to the first output end of the fourth mirror branch 32, and the other end of the resistor R4 is grounded.

[0060] The power supply end of the fourth mirror branch 32 is used to connect to the power supply VCC, the first output end of the fourth mirror branch 32 is connected to the first control end of the fifth mirror branch 33, the second output end of the fourth mirror branch 32 is respectively connected to the second control end of the fifth mirror branch 33 and one end of the resistor R2, and the other end of the resistor R2 is grounded.

[0061] The power supply end of the fifth mirror branch 33 is used to connect to the power supply VCC, the input end of the fifth mirror branch 33 is connected to the control end of the third mirror branch 31, and the calibration current output end of the fifth mirror branch 33 and the calibration current output end of the third mirror branch 31 are respectively connected to the reference current input end of the sampling output circuit 2 to output the reference current I4 to the sampling output circuit.

[0062] Further, the third mirror branch 31 includes: MOS tube M5, MOS tube M6, MOS tube M7, MOS tube M8, MOS tube M9, N1 MOS tubes MP1 and resistor R5, N1 is an integer greater than 0; wherein, the input end of the MOS tube M5 and the input end of the MOS tube M6 are respectively used to connect to the power supply VCC, and the control end of the MOS tube M5 is respectively connected to the control end of the MOS tube M6 and the control end of the third mirror branch 31; the output end of the MOS tube M5 is connected to the input end of the MOS tube M7, the output end of the MOS tube M7 is connected to the connection end of the resistor R3 and the resistor R4, and the control end of the MOS tube M7 is connected to the control end of the MOS tube M8.

[0063] The output end of the MOS tube M6 is connected to the input end of the MOS tube M8 and the control end of the MOS tube M8, the output end of the MOS tube M8 is connected to one end of the resistor R5, and the other end of the resistor R5 is grounded; the input end of the MOS tube M9 and the input ends of each MOS tube MP1 are respectively used to connect to the power supply VCC, the control end of the MOS tube M9 is connected to the control end of each MOS tube MP1 and the input end of the MOS tube M8, the output end of the MOS tube M9 is connected to the output end of the MOS tube M8, and the output ends of each MOS tube MP1 are respectively connected to the calibration current output end of the fifth mirror branch 33.

[0064] Further, the fourth mirror branch 32 includes: a MOS tube M4, a MOS tube M3, N2 MOS tubes Q1, N3 MOS tubes Q2 and a resistor R1, the ratio of N2 to N3 is a preset value, and N2 and N3 are integers greater than 0; wherein the input end of the MOS tube M4 and the input end of the MOS tube M3 are respectively used to connect to the power supply VCC, and the control end of the MOS tube M3 is respectively connected to the control end of the MOS tube M4 and the control end of the third mirror branch 31.

[0065] The output end of the MOS tube M3 is respectively connected to the input end of each MOS tube Q1 and the first control end of the fifth mirror branch 33, the control end of each MOS tube Q1 is connected to the input end, and the output end of each MOS tube Q1 is respectively grounded; the output end of the MOS tube M3 is connected to one end of the resistor R1 and the second control end of the fifth mirror branch 33, the other end of the resistor R1 is respectively connected to the input end of each MOS tube Q2, the control end of each MOS tube Q2 is connected to the input end, and the output end of each MOS tube Q2 is respectively grounded.

[0066] Furthermore, the ratio of the number of MOS transistors Q1 to that of MOS transistors Q2, that is, the ratio of N2 to N3, is 8; and the resistance value of the resistor R2 is equal to the sum of the resistance values ​​of the resistors R3 and R4.

[0067] Further, the fifth mirror branch 33 includes: a MOS tube M1, a MOS tube M2, N4 MOS tubes MP2, a MOS tube Q3 and a MOS tube Q4, where N4 is an integer greater than 0; wherein the input end of the MOS tube M1, the input end of the MOS tube M2 and the input ends of each MOS tube MP2 are respectively used to connect to the power supply VCC, and the control end of the MOS tube M1, the control end of the MOS tube M2 and the control end of each MOS tube MP2 are connected.

[0068] The output end of the MOS transistor M1 is connected to the input end of the MOS transistor Q3 and the control end of the third mirror branch 31. The control end of the MOS transistor Q3 is connected to the first output end of the fourth mirror branch 32, that is, the connection end A1 of the MOS transistor M4 and the MOS transistor Q1, to receive the control signal of the MOS transistor Q3. The output end of the MOS transistor Q3 is grounded.

[0069] The output end of the MOS tube M2 is connected to the control end, the output end of the MOS tube M2 is connected to the input end of the MOS tube Q4, the control end of the MOS tube Q4 is connected to the second output end of the fourth mirror branch 32, that is, the connection end B1 of the resistor R1 and the MOS tube M3, and the output end of the MOS tube Q4 is grounded; the output ends of each MOS tube MP2 are respectively connected to the reference current output end of the third mirror branch 31, that is, the output end of each MOS tube MP1, and each MOS tube MP1 and each MOS tube MP2 jointly output the reference current I4.

[0070] The working principle of the above reference current output circuit is as follows:

[0071] The number ratio of MOS tubes Q1 and Q2 is 1:8, the resistance value of resistor R2 is equal to the sum of the resistance values ​​of resistors R3 and R4, the resistance value of resistor R5 is equal to the resistance value of resistor R4, and the amplifier composed of MOS tubes Q3, MOS tubes Q4, MOS tubes M1 and MOS tubes M2 clamps the voltages of A1 and B1 in the fourth mirror branch to be equal, then the difference between the base-emitter voltage VBE1 of MOS tube Q1 and the base-emitter voltage VBE2 of MOS tube Q2 is added to the resistor R1, so that the current flowing through the resistor R1 and the MOS tube Q2 is:

[0072]

[0073] Among them, k is the Boltzmann constant, q is the electron charge constant, ln is the natural logarithm, and T is the temperature.

[0074] It can be seen that the current IQ2 of the MOS tube Q2 is proportional to the temperature T, and the temperature coefficient is positive. Since R2=R3+R4, the MOS tube M4 and the MOS tube M3 are mirror images, so the current IQ1 flowing through the MOS tube Q1 is equal to the current IQ2 flowing through the MOS tube Q2, and the MOS tubes Q3, MOS tubes Q4 and MOS tube Q1 are also mirror images. Therefore, the current of the MOS tube MP2 is the current IQ2 of the MOS tube Q2 multiplied by K2, and K2 is an adjustable coefficient; since the voltage applied to the resistors R3 and R4 is the base-emitter voltage VBE1 of the MOS tube Q1, this voltage is inversely proportional to the temperature T, the temperature coefficient is negative, then, by designing the proportional relationship among the resistors R1, R2, R3 and R4, the current temperature coefficients of the MOS tubes M4 and M3 can be made zero. Since the voltages of A1 and B1 in the fourth mirror branch are equal, the current IR5=VBE1 / (R3+R4) flowing through the resistor R5 is a negative temperature coefficient, and the current flowing through the MOS tube MP1 is IR5 multiplied by K1, and K1 can be adjusted; then, as long as the currents flowing through the MOS tubes MP1 and MP2 are combined, the reference current I4 with a positive and negative adjustable temperature coefficient can be output by adjusting the values ​​of K1 and K2.

[0075] Furthermore, the first mirror branch 11 includes: a MOS tube M105 and a MOS tube M107, wherein the input end of the MOS tube M105 is connected to the input end of the sampling MOS tube M101 through a resistor R102, the control end of the MOS tube M105 is connected to the first control end of the second mirror branch 12, the output end of the MOS tube M105 is respectively connected to the control end of the sampling output circuit 2 and the input end of the MOS tube M107, the control end of the MOS tube M107 is connected to the second control end of the second mirror branch 12, and the output end of the MOS tube M107 is grounded.

[0076] Further, such as Figure 2 As shown, the second mirror branch 12 includes: a MOS tube M104, a MOS tube M106, a MOS tube M108 and a constant current source IB100; wherein, the input end of the MOS tube M104 is connected to the input end of the external power tube M100 through a resistor R101, the input end of the MOS tube M104 is connected to the sampling current input end of the sampling output circuit 2, the control end of the MOS tube M104 is connected to the output end, the control end of the MOS tube M104 is connected to the first control end of the first mirror branch 11, the output end of the MOS tube M104 is connected to the input end of the MOS tube M106, the control end of the MOS tube M106 is connected to the second control end of the first mirror branch 11, and the output end of the MOS tube M106 is grounded.

[0077] The power supply end of the constant current source IB100 is used to connect to the power supply VCC, the output end of the constant current source IB100 is connected to the input end and the control end of the MOS tube M108, the control end of the MOS tube M108 is connected to the control end of the MOS tube M106, and the output end of the MOS tube M108 is grounded.

[0078] Further, the sampling output circuit 2 includes: N5 MOS tubes M102, MOS tube M109 and MOS tube M103, N5 is an integer greater than 0; wherein, the input end of each MOS tube M102 is respectively connected to the output end of the reference current output circuit 3, the input end of each MOS tube M102 is connected to the control end, the control end of each MOS tube M102 is connected to the control end of the MOS tube M109, and the output end of each MOS tube M102 is respectively grounded.

[0079] The input end of the MOS tube M103 is connected to the current input end of the second mirror branch 12, the control end of the MOS tube M103 is connected to the output end of the first mirror branch 11, the output end of the MOS tube M103 is connected to the input end of the MOS tube M109, and the output end of the MOS tube M109 is grounded; the connection end between the output end of the MOS tube M103 and the input end of the MOS tube M109 is used to output the overcurrent control signal Vout; the number of MOS tubes M102 is adjustable, and can be used to calibrate the deviation of the proportional coefficient between the current M101 of the sampling MOS tube and the current of the external power tube M100 at room temperature, and then adjust the difference due to the on-resistance of the external power tube M100 and the on-resistance of the internal sampling MOS tube M101.

[0080] The working principle of the above battery protection chip is as follows:

[0081] The current flowing through the external power tube M100 is Ipower, the current flowing through the sampling MOS tube M101 is Isense, and the ratio of the on-resistance Ron of the external power tube M100 and the on-resistance Rsense of the sampling MOS tube is 1:k. Then, according to Figure 2From the circuit, we can know that Ipower=Isense×Ron / (Rsense+R101). During design, the resistance of resistor R101 is much smaller than the on-resistance of sampling MOS tube M101 and can be ignored. Therefore, we can get Ipower=Isense×k.

[0082] The resistance values ​​of the resistor R101 and the resistor R102 are equal, and the current Is flowing through the MOS tube M103 is the current Isense flowing through M101 multiplied by a proportionality coefficient k1:1, thereby obtaining Is=(Ib+Isense) / k1, wherein Ib is the current output by the constant current source IB100. During design, Ib is much smaller than Isense and can be ignored. Therefore, Is=Ipower / k / k1, thereby reducing the current of the sampling MOS tube M101 by a certain proportion and outputting it as the current Is of the MOS tube M103; the reference current output circuit 3 can output a temperature coefficient that can be adjusted, and the maximum The reference current I4 can be set as small as possible, and the sampled current, i.e., the current Is flowing through the MOS tube M103, is compared with the set reference current, i.e., the current Ir flowing through the MOS tube M109, and then an overcurrent control signal Vout is output; when Is is greater than Ir, a high-level overcurrent control signal Vout is output, and when Is is less than Ir, a low-level overcurrent control signal Vout is output; the MOS tube M102 is a MOS tube with adjustable number, which can be used to calibrate the deviation of the proportional coefficient k at room temperature, and then adjust the difference between the on-resistance of the external power tube M100 and the on-resistance of the internal sampling MOS tube M101.

[0083] The battery protection chip of this embodiment has the following characteristics:

[0084] (1) The MOS tube M102 is set to be an adjustable number of MOS tubes, which can be used to calibrate the deviation of the proportional coefficient k at room temperature, and then adjust the difference between the on-resistance of the external power tube and the on-resistance of the internal sampling MOS tube to improve the current sampling accuracy.

[0085] (2) The reference current output circuit can make the current temperature coefficient of the MOS transistors M4 and M3 zero by designing the proportional relationship among the resistors R1, R2, R3 and R4, thereby outputting a reference current with an adjustable positive and negative temperature coefficient.

[0086] (3) High-precision current sampling resistors are not used, thereby reducing hardware costs.

[0087] In one embodiment, a battery protection system is provided. The battery protection system includes the battery protection chip in the above embodiment. The battery protection system also includes:

[0088] An external power tube is arranged in series in a battery power supply circuit, an input end of the external power tube is connected to an input end of a battery protection chip, a control end of the external power tube is connected to a control end of the battery protection chip, an output end of the external power tube is connected to an output end of the battery protection chip, and the protection chip is used to output an overcurrent control signal when the current of the external power tube is greater than a preset value, and the overcurrent control signal is used to control the external power tube to shut down.

[0089] The battery protection system of this embodiment utilizes the above-mentioned battery protection chip, which, on the one hand, avoids the use of high-precision current sampling resistors and reduces costs; on the other hand, the sampling output circuit inside the above-mentioned protection chip calibrates the difference between the on-resistance of the external power tube and the on-resistance of the internal sampling tube, thereby improving the current sampling accuracy. When the external power tube is overcurrent, the external power tube can be more accurately controlled to be shut down, thereby avoiding battery damage due to overcurrent.

[0090] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A battery protection chip, characterized in that: include: Sampling MOS tube, first resistor, current mirror circuit, sampling output circuit and reference current output circuit; The three ends of the sampling MOS tube are respectively used to connect to the three ends of the external power tube; The current mirror circuit includes a first mirror branch and a second mirror branch of a current mirror setting, the current input end of the first mirror branch is connected to the connection line between the first resistor and the sampling MOS tube through a second resistor, and the current input end of the second mirror branch is connected to the connection line between the first resistor and the external power tube through a third resistor; One end of the sampling output circuit is connected to the current input end of the second mirror branch, and the other end of the sampling output circuit is connected to the reference current output end of the reference current output circuit, so as to generate an overcurrent control signal when the sampling current input to the sampling output circuit is greater than the reference current output from the reference current output end, and the overcurrent control signal is used to control the external power tube to shut down; The sampling output circuit comprises: N5 twenty-first MOS tubes, twenty-second MOS tubes, and twenty-third MOS tubes, where N5 is an integer greater than 0; The input end of each of the twenty-first MOS tubes is respectively connected to the output end of the reference current output circuit, the input end of each of the twenty-first MOS tubes is connected to the control end, the control end of each of the twenty-first MOS tubes is connected to the control end of the twenty-second MOS tube, and the output end of each of the twenty-first MOS tubes is respectively grounded; The input end of the twenty-third MOS tube is connected to the current input end of the second mirror branch, the control end of the twenty-third MOS tube is connected to the output end of the first mirror branch, the output end of the twenty-third MOS tube is connected to the input end of the twenty-second MOS tube, and the output end of the twenty-second MOS tube is grounded; the connection end between the output end of the twenty-third MOS tube and the input end of the twenty-second MOS tube is used to output the overcurrent control signal.

2. The battery protection chip according to claim 1, characterized in that: The reference current output circuit comprises: A third mirror branch, a fourth mirror branch, a fifth mirror branch, a fourth resistor, a fifth resistor and a sixth resistor; The reference current output circuit is used to output a reference current with an adjustable positive and negative temperature coefficient; wherein the power supply end of the third mirror branch is used to connect to a power supply, the control end of the third mirror branch is connected to the control end of the fourth mirror branch, the mirror current output end of the third mirror branch is connected to one end of the fourth resistor and one end of the fifth resistor, the other end of the fourth resistor is connected to the first output end of the fourth mirror branch, and the other end of the fifth resistor is grounded; The power supply end of the fourth mirror branch is used to connect to the power supply, the first output end of the fourth mirror branch is connected to the first control end of the fifth mirror branch, the second output end of the fourth mirror branch is respectively connected to the second control end of the fifth mirror branch and one end of the sixth resistor, and the other end of the sixth resistor is grounded; The power supply end of the fifth mirror branch is used to connect to the power supply, the input end of the fifth mirror branch is connected to the control end of the third mirror branch, and the calibration current output end of the fifth mirror branch and the calibration current output end of the third mirror branch are respectively connected to the reference current input end of the sampling output circuit to output the reference current.

3. The battery protection chip according to claim 2, characterized in that: The third mirror branch includes: a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, N1 sixth MOS tubes and a seventh resistor, where N1 is an integer greater than 0; The input end of the first MOS tube and the input end of the second MOS tube are respectively used to connect to the power supply, and the control end of the first MOS tube is respectively connected to the control end of the second MOS tube and the control end of the fourth mirror branch; the output end of the first MOS tube is connected to the input end of the third MOS tube, the output end of the third MOS tube is connected to the connection end of the second resistor and the third resistor, and the control end of the third MOS tube is connected to the control end of the fourth MOS tube; The output end of the second MOS tube is connected to the input end of the fourth MOS tube and the control end of the fourth MOS tube, the output end of the fourth MOS tube is connected to one end of the seventh resistor, and the other end of the seventh resistor is grounded; The input end of the fifth MOS tube and the input ends of each of the sixth MOS tubes are respectively used to connect to the power supply, the control end of the fifth MOS tube is connected to the control end of each of the sixth MOS tubes and the input end of the fourth MOS tube, the output end of the fifth MOS tube is connected to the output end of the fourth MOS tube, and the output end of each of the sixth MOS tubes is respectively connected to the calibration current output end of the fifth mirror branch.

4. The battery protection chip according to claim 2, characterized in that: The fourth mirror branch includes: a seventh MOS tube, an eighth MOS tube, N2 ninth MOS tubes, N3 tenth MOS tubes and an eighth resistor, wherein the ratio of N2 to N3 is a preset value, and N2 and N3 are integers greater than 0; The input end of the seventh MOS tube and the input end of the eighth MOS tube are respectively used to connect to the power supply, and the control end of the seventh MOS tube is respectively connected to the control end of the eighth MOS tube and the control end of the third mirror branch; The output end of the seventh MOS tube is respectively connected to the input end of each of the ninth MOS tubes and the first control end of the fifth mirror branch, the control end and the input end of each of the ninth MOS tubes are connected, and the output end of each of the ninth MOS tubes is respectively grounded; The output end of the eighth MOS tube is connected to one end of the eighth resistor and the second control end of the fifth mirror branch, the other end of the eighth resistor is respectively connected to the input end of each of the tenth MOS tubes, the control end and the input end of each of the tenth MOS tubes are connected, and the output end of each of the tenth MOS tubes is respectively grounded.

5. The battery protection chip according to claim 2, characterized in that: The fifth mirror branch includes: an eleventh MOS tube, a twelfth MOS tube, N4 thirteenth MOS tubes, a fourteenth MOS tube and a fifteenth MOS tube, where N4 is an integer greater than 0; The input end of the eleventh MOS tube, the input end of the twelfth MOS tube and the input end of each of the thirteenth MOS tubes are respectively used to connect to the power supply, and the control end of the eleventh MOS tube, the control end of the twelfth MOS tube and the control end of each of the thirteenth MOS tubes are connected; The output end of the eleventh MOS tube is connected to the input end of the fourteenth MOS tube and the control end of the third mirror branch, the control end of the fourteenth MOS tube is connected to the first output end of the fourth mirror branch, and the output end of the fourteenth MOS tube is grounded; The output end of the twelfth MOS tube is connected to the control end, the output end of the twelfth MOS tube is connected to the input end of the fifteenth MOS tube, the control end of the fifteenth MOS tube is connected to the second output end of the fourth mirror branch, and the output end of the fifteenth MOS tube is grounded; the output ends of each of the thirteenth MOS tubes are respectively connected to the reference current output end of the third mirror branch.

6. The battery protection chip according to claim 1, characterized in that: The first mirror branch includes: a sixteenth MOS tube and a seventeenth MOS tube, wherein the input end of the sixteenth MOS tube is connected to the input end of the sampling MOS tube through the second resistor, the control end of the sixteenth MOS tube is connected to the first control end of the second mirror branch, the output end of the sixteenth MOS tube is respectively connected to the control end of the sampling output circuit and the input end of the seventeenth MOS tube, the control end of the seventeenth MOS tube is connected to the second control end of the second mirror branch, and the output end of the seventeenth MOS tube is grounded.

7. The battery protection chip according to claim 1, characterized in that: The second mirror branch includes: An eighteenth MOS tube, a nineteenth MOS tube, a twentieth MOS tube and a constant current source; The input end of the eighteenth MOS tube is used to connect the input end of the external power tube through the third resistor, the input end of the eighteenth MOS tube is connected to one end of the sampling output circuit, the control end of the eighteenth MOS tube is connected to the output end, the control end of the eighteenth MOS tube is connected to the first control end of the first mirror branch, the output end of the eighteenth MOS tube is connected to the input end of the nineteenth MOS tube, the control end of the nineteenth MOS tube is connected to the second control end of the first mirror branch, and the output end of the nineteenth MOS tube is grounded; The power supply end of the constant current source is used to connect to a power supply, the output end of the constant current source is connected to the input end and the control end of the 20th MOS tube, the control end of the 20th MOS tube is connected to the control end of the 19th MOS tube, and the output end of the 20th MOS tube is grounded.

8. The battery protection chip according to claim 4, characterized in that: The ratio of N2 to N3 is 8.

9. A battery protection system, characterized in that: The battery protection system comprises the battery protection chip and an external power tube as described in any one of claims 1 to 8, wherein the external power tube is arranged in series in a battery power supply circuit, the input end of the external power tube is connected to the input end of the battery protection chip, the control end of the external power tube is connected to the control end of the battery protection chip, the output end of the external power tube is connected to the output end of the battery protection chip, and the protection chip is used to output an overcurrent control signal when the current of the external power tube is greater than a preset value, and the overcurrent control signal is used to control the external power tube to shut down.

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