A decoding method, apparatus, device, and medium for error-correcting codes.

Abstract

This application discloses a decoding method, apparatus, device, and medium for error-correcting codes. The method includes: obtaining the Galois field equation corresponding to the error-correcting code, wherein the total length of the error-correcting code is a preset number of bits. Then, based on the Galois field equation, a target relational expression corresponding to multiple error positions after decoding the error-correcting code is determined. This target relational expression is derived based on Vieta's formulas. Based on the target relational expression and the preset number of bits of the error-correcting code, a first traversal range is determined. Then, among the values ​​included in the first traversal range, a first error position is determined. Finally, based on the target relational expression and the first error position, a second error position is determined. The error-correcting code decoding method provided by this application, based on the application of the Galois field equation and Vieta's formulas, reduces the traversal range for determining error positions, eliminating the need to traverse all possible values, thus reducing the computational load and complexity in the decoding process.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a method, apparatus, device and medium for error correction decoding. Background Technology

[0002] BCH codes are linear block codes in a finite field (Galois field) that can correct multiple random errors and are commonly used for error correction coding in communication and storage. BCH codes divide a sequence of information to be transmitted into message groups of fixed bits, and then independently transform each message group into a group of binary numbers, thus obtaining the block code. The process of transforming message groups into codewords is called encoding, and the reverse process is called decoding.

[0003] For example, in flash storage scenarios, BCH error-correcting codes with an error-correcting capability of 2 are primarily used to achieve error correction. This means that decoding the error-correcting code provides information about the two error locations in the flash storage. The core step in decoding is calculating the roots of the quadratic equation in the Galois field corresponding to the BCH code. The current method involves iterating through all possible values ​​in the Galois field and substituting each value into the quadratic equation to determine if the result is zero. This results in a large computational load for finding the roots, making the decoding process quite complex. Summary of the Invention

[0004] In view of this, this application provides a decoding method, apparatus, device and medium for error-correcting codes, so as to reduce the amount of computation and reduce the complexity in the decoding process.

[0005] Firstly, this application provides a decoding method for error-correcting codes, the method comprising:

[0006] Obtain the Galois domain equation corresponding to the error correction code, wherein the total length of the error correction code is a preset number of bits;

[0007] Based on the Galois domain equation, the target relational expression corresponding to multiple error positions after decoding the error correction code is determined. The target relational expression is derived based on Vieta's theorem.

[0008] Based on the target relation and the preset number of bits, the first traversal range is determined;

[0009] Determine the first error location from the values ​​included in the first traversal range;

[0010] Based on the target relation and the first error location, the second error location is determined.

[0011] In one possible implementation, the derivation process for determining the target relation based on Vieta's formulas includes:

[0012] The first exponent corresponding to the first coefficient of the Galois domain equation is determined based on the generator of the Galois domain equation, where the first coefficient is the coefficient of the highest power term.

[0013] Based on the generator, determine the second exponent corresponding to the first root of the Galois domain equation and the third exponent corresponding to the second root of the Galois domain equation.

[0014] The product relationship between the second exponent and the third exponent is determined based on Vieta's formulas, and the product relationship includes the first exponent;

[0015] The target relation is determined based on the product relation, wherein the first root and the first error position are inversely related, and the second root and the second error position are inversely related.

[0016] In one possible implementation, determining the target relation based on the product relation includes:

[0017] Take the logarithm of both sides of the product expression to determine the summation expression;

[0018] Based on the reciprocal relationship between the first root and the first error position, the reciprocal relationship between the second root and the second error position, and the summation formula, the target formula is determined.

[0019] In one possible implementation, determining the first traversal range based on the target relation and the preset number of bits includes:

[0020] Based on the target relation, determine the midpoint position;

[0021] Based on the midpoint position and the value space of the Galois domain equation, the initial traversal range is determined;

[0022] The first traversal range is determined based on the initial traversal range and the preset number of bits.

[0023] Secondly, this application provides a decoding apparatus for error-correcting codes, the apparatus comprising:

[0024] The acquisition unit is used to acquire the Galois domain equation corresponding to the error correction code, wherein the total length of the error correction code is a preset number of bits.

[0025] The first determining unit is used to determine the target relational expression corresponding to multiple error positions after the error correction code is decoded based on the Galois domain equation. The target relational expression is derived based on Vieta's theorem.

[0026] The second determining unit is used to determine the first traversal range based on the target relation and the preset number of bits;

[0027] The third determining unit is used to determine the first error position among the values ​​included in the first traversal range;

[0028] The fourth determining unit is used to determine the second error position based on the target relation and the first error position.

[0029] In one possible implementation, the first determining unit is specifically configured to: determine a first exponent corresponding to a first coefficient of the Galois equation based on the generators of the Galois equation; determine a second exponent corresponding to a first root of the Galois equation and a third exponent corresponding to a second root of the Galois equation based on the generators; determine a product relationship between the second exponent and the third exponent based on Vieta's formulas, wherein the product relationship includes the first exponent; and determine a target relationship based on the product relationship, wherein the first root is reciprocal to the first error position, and the second root is reciprocal to the second error position.

[0030] In one possible implementation, the first determining unit is specifically used to take the logarithm of both sides of the product relation to determine the summation relation; and to determine the target relation based on the reciprocal relationship between the first root and the first error position, the reciprocal relationship between the second root and the second error position, and the summation relation.

[0031] In one possible implementation, the second determining unit is specifically used to determine the midpoint position based on the target relation; determine the initial traversal range based on the midpoint position and the value space of the Galois domain equation; and determine the first traversal range based on the initial traversal range and the preset number of bits.

[0032] Thirdly, this application provides a decoding device for error-correcting codes, the device comprising: a memory and a processor;

[0033] The memory is used to store the relevant program code;

[0034] The processor is used to call the program code to execute the decoding method of the error correction code described in any of the implementations of the first aspect above.

[0035] Fourthly, this application provides a computer-readable storage medium for storing a computer program for executing the decoding method of the error-correcting code described in any implementation of the first aspect.

[0036] Therefore, this application has the following beneficial effects:

[0037] In the above implementation of this application, when decoding the error-correcting code, the Galois field equation corresponding to the error-correcting code can be obtained, wherein the total length of the error-correcting code is a preset number of bits. Then, based on the Galois field equation, the target relation corresponding to multiple error positions after decoding the error-correcting code is determined. This target relation is derived based on Vieta's formulas. Based on the target relation and the preset number of bits of the error-correcting code, a first traversal range is determined, and then the first error position is determined among the values ​​included in the first traversal range. Finally, based on the target relation and the first error position, the second error position is determined. Through the error-correcting code decoding method provided by the embodiments of this application, the traversal range for determining the error position can be reduced by applying the Galois field equation and Vieta's formulas, eliminating the need to traverse all possible values, thereby reducing the computational load and complexity in the decoding process. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments provided in this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0039] Figure 1 A flowchart illustrating a decoding method for error-correcting codes provided in an embodiment of this application;

[0040] Figure 2 A schematic diagram of a decoding device for error-correcting codes provided in an embodiment of this application;

[0041] Figure 3 This is a schematic diagram of a decoding device for error correction codes provided in an embodiment of this application. Detailed Implementation

[0042] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. The described embodiments are merely exemplary implementations of this application and not all implementation methods. Those skilled in the art can obtain other embodiments in conjunction with the embodiments of this application without creative effort, and these embodiments are also within the protection scope of this application.

[0043] To facilitate understanding of the technical solutions provided in the embodiments of this application, the technical background involved in the embodiments of this application will be introduced below.

[0044] A field is an algebraic system that defines two mathematical operations on its elements. A field consists of the set of addition operations on all elements and the set of multiplication operations on all non-zero elements. It exhibits closure property in addition and multiplication, meaning that the result of adding or multiplying elements within a field is still an element within the field. Multiplication and addition within a field can be defined using the AND operation (module-2 addition) and XOR operation in the C programming language, respectively. However, by convention, the symbols "+" and "*" are still used to represent addition and multiplication operations.

[0045] Consider a set of elements G = {0, 1, 2, 3, ..., p-1}, where p is a prime number. Define two mathematical operations: modulo-p addition and module-p multiplication. To satisfy the closure property of multiplication, p must be a prime number, and the set contains p elements. Therefore, if we restrict the coefficients of a polynomial to elements in the finite field GF(p), and redefine the addition, subtraction, multiplication, and division operations of the polynomial based on the rules of operation in the finite field, then such a set of polynomials is called a polynomial based on a finite field. Extending GF(p) to GF(2... p If p is not limited to prime numbers, then p still satisfies the addition and multiplication rules of finite fields: mapping the numerical elements in the finite field to polynomial elements, that is, the elements in the finite field are 2^p elements including 0 and 1. p There are several polynomials. Among them, the finite field GF(2) p It is also called the Galois domain.

[0046] BCH codes are cyclic codes belonging to the Galois field. Their key feature is on-demand design; that is, the BCH code for a given application scenario is determined based on the number of errors required. Error locations can then be obtained by decoding the BCH code. The main decoding steps include: calculating the adjoint polynomial using the receiver polynomial; using the coefficients of the adjoint polynomial to find the coefficients of the error location polynomial; and finally, determining the error location by solving for the root of the error location polynomial. The reciprocal of this root represents the error location to be determined.

[0047] In flash storage scenarios, BCH error-correcting codes with an error-correcting capability of 2 are primarily used to achieve error correction. This means that decoding the BCH code provides information about two error locations in the flash storage. The core step of the decoding is calculating the roots of the polynomials corresponding to the error locations in the BCH code. Since the error-correcting capability is 2, these roots are the roots of the quadratic equation in the Galois field. Because the elements in the Galois field are essentially polynomials, the current method for solving the equation involves iterating through all possible values ​​in the Galois field and substituting them into the quadratic equation to determine if the result is zero. This results in a large computational load for finding the roots, making the decoding process quite complex.

[0048] Based on this, embodiments of this application provide a decoding method for error-correcting codes to reduce the computational load and complexity of the decoding process. Specifically, the Galois field equation corresponding to the error-correcting code can be obtained, where the total length of the error-correcting code is a preset number of bits. Then, based on the Galois field equation, target relational expressions corresponding to multiple error positions after decoding are determined. These target relational expressions are derived based on Vieta's formulas. Based on the target relational expressions and the preset number of bits of the error-correcting code, a first traversal range is determined. Then, among the values ​​included in the first traversal range, the first error position is determined. Finally, based on the target relational expressions and the first error position, the second error position is determined. The decoding method for error-correcting codes provided by embodiments of this application, based on the application of the Galois field equation and Vieta's formulas, reduces the traversal range for determining error positions, eliminating the need to traverse all possible values, thus reducing the computational load and complexity of the decoding process. The decoding method for error-correcting codes provided by embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0049] See Figure 1 , Figure 1 A flowchart illustrating a decoding method for error-correcting codes provided in an embodiment of this application.

[0050] The method may include the following steps:

[0051] S101: Obtain the Galois domain equation corresponding to the error correction code.

[0052] When decoding error-correcting codes, the Galois domain equation corresponding to the error location can be determined based on the decoding principle of error-correcting codes. That is, the error location polynomial introduced above. The main steps include: calculating the adjoint polynomial using the receiving polynomial, obtaining the coefficients of the error location polynomial from the coefficients of the adjoint polynomial, and finally determining the error location by solving the roots of the error location polynomial. This part can be referred to in the decoding process of error-correcting codes in the prior art, and will not be repeated here.

[0053] In this embodiment, the focus is on solving the roots of the Galois domain equation for an error-correcting code with an error-correcting capability of 2, i.e., the Galois domain equation is a quadratic equation in one variable. For example, the error-correcting code can be a BCH code. Furthermore, the total length of the error-correcting code can be pre-configured according to actual needs, i.e., the total length of the error-correcting code is a preset number of bits.

[0054] S102: Based on the Galois domain equation, determine the target relational formula corresponding to multiple error positions after decoding the error-correcting code. This target relational formula is derived based on Vieta's theorem.

[0055] In applications with an error correction capability of 2, the Galois equation is a quadratic equation with two distinct roots, and Vieta's formulas also apply. Since the roots of the Galois equation are reciprocals of the error locations, the target relation corresponding to the two error locations can be derived based on Vieta's formulas. This applies to applications with an error correction capability of 2.

[0056] A Galois field contains generators, and all non-zero elements in the Galois field can be expressed as powers of the generators, i.e., exponential forms of the generators. In practice, based on the generators of the Galois field equation, the first exponent corresponding to the first coefficient of the Galois field equation can be determined. That is, the first exponent of the Galois field equation is expressed as an exponential form of the generator. Based on the generators, the second exponent corresponding to the first root of the Galois field equation and the third exponent corresponding to the second root are determined; that is, both roots of the Galois field equation are expressed as exponential forms of the generators, where the power of the generator corresponding to each root can be represented by a variable. Then, the product relationship between the second and third exponents is determined based on Vieta's formulas. That is, the product relationship between the two roots of the Galois field equation can be determined based on Vieta's formulas, since the two roots can be expressed as exponential forms of the generators, thus allowing the determination of the product relationship between the second and third exponents. According to Vieta's formulas, the product of the two roots of an equation can be expressed by the coefficient of the highest power element and the coefficient of the constant term, that is, by the first coefficient and the coefficient of the constant term. Therefore, the product expression includes the first exponent corresponding to the first coefficient. As shown in the above example, the roots of the Galois domain equation are reciprocals of the error positions. Therefore, the target expression corresponding to the two error positions can be determined based on the product expression of the two roots.

[0057] In one possible implementation, after determining the product relationship between the second and third exponents, the logarithm of both sides of the product relationship can be taken to obtain the summation relationship. Then, based on the reciprocal relationship between the first root and the first error position, and the reciprocal relationship between the second root and the second error position, the target relationship between the first and second error positions is determined according to the summation relationship. The principle of deriving the target relationship based on Vieta's formulas will be introduced below with a specific application scenario.

[0058] In this application scenario, the Galois domain equation is expressed as: u1x 2 +u2x+1=0(GF(2 n The first coefficient is u1. In this Galois field, the generator is denoted as a. Therefore, the first coefficient u1 can be expressed as the first exponent of a using the generator a, i.e., u1 = a. r1The two roots of the Galois domain equation are represented as the first root x1 and the second root x2. Then, using the generator a, the first root x1 and the second root x2 are represented as the second and third exponents, respectively, i.e., x1 = a. r2 x2 = a r3 Based on Vieta's formulas, the product of the first and second roots can be expressed as x1*x2=u1 -1 Using generators, let a be the representation of the generator. r2+r3 =a -r1 Taking the logarithm of both sides of the product relation yields the summation relation: r1 + r2 + r3 ≡ 0 mod (2 n -1). Let e1 represent the first error position and e2 represent the second error position. Since the first error position e1 and the second error position e2 correspond to the reciprocals of the first root and the second root, according to the summation formula, the target relationship between the first error position e1 and the second error position e2 can be obtained as: e1 + e2 ≡ r3 mod (2 n -1).

[0059] S103: Determine the range of the first traversal based on the target relation and the preset number of bits.

[0060] After determining the target relationship between the first and second error positions, the first traversal range for finding the root can be determined based on the target relationship and the total length of the error correction code, i.e., the preset number of bits.

[0061] In practical implementation, the target relation represents the summation relationship between two error locations. The midpoint location can be determined based on this target relation. Then, based on the midpoint location and the length of the possible value space of the Galois domain equation, i.e., 2... n First, determine the initial traversal range. Optionally, starting from the midpoint, determine a fixed-length space to the left or right of the midpoint as the initial traversal range. For example, this fixed length is half the length of the space where the Galois domain equation can take values. Since the length of the error-correcting code is a pre-configured preset number of bits, when the initial traversal range exceeds the length of the error-correcting code, it is necessary to determine the first traversal range based on the initial traversal range and the preset number of bits of the error-correcting code to avoid solving for the roots of the equation in invalid ranges and increasing unnecessary computation.

[0062] S104: Determine the first error location among the values ​​included in the first traversal range.

[0063] The first traversal range is used to traverse the values ​​included in the first traversal range. Each value in the first traversal range is substituted into the Galois domain equation. The value that makes the Galois domain equation 0 corresponds to the first error position.

[0064] S105: Determine the second error location based on the target relation and the first error location.

[0065] As can be seen from the above embodiments, the target relation represents the relationship between the first error position and the second error position. After determining the first error position, the second error position can be determined based on the target relation and the first error position. For example, after determining the sum of the first and second error positions based on the target relation, the second error position can be determined based on the sum of the two and the length of the value space of the Galois domain equation.

[0066] To facilitate understanding of the decoding method for the error correction code provided in the embodiments of this application, it will be introduced below in conjunction with specific application scenarios.

[0067] In one possible application scenario, the total length of the BCH code can be configured to be 255 bits, corresponding to a finite field of GF(2). 8 That is, the possible value space corresponding to the Galois field equation is [0, 254], the error correction capability is 2, and the corresponding Galois field equation in the decoding process is: a 56 x 2 +a 65 x+1=0(GF(2 8 ), where a is the generator of the Galois field. According to the target relation derived from the above Vieta theorem, the target relation for the first error position e1 and the second error position e2 is: e1 + e2 = 56 mod 255, and then the midpoint position can be determined as 56 / 2 = 28. Then, half the length of the possible value space can be traversed from the midpoint position in the higher direction (to the right of the midpoint) or in the lower direction (to the left of the midpoint). In this embodiment, taking the traversal of half the length of the possible value space from the midpoint position in the higher direction as an example, it is taken as the initial traversal range, which corresponds to [27, 155]. In this scenario, the total length of the error correction code is the same as the length of the possible value space of the finite field, so the first traversal range is [27, 155], and therefore the second traversal range where the second error position is located can also be obtained as [156, 254]. To find the first error position e1, we can iterate through each value in [27, 155] and substitute it into the Galois domain equation. The value that makes the equation equal to 0 is the first error position. Assuming that in this application scenario, the determined first error position is e1 = 142, based on the target relation e1 + e2 = 56 mod 255 and the first error position e1, the formula for calculating the second error position is: e2 = 56 - 142 = -86 mod 255 = 169 mod 255, meaning the second error position is 169.

[0068] In one possible application scenario, the total length of the BCH code can be configured to be 144 bits, and the corresponding finite field is GF(2). 8The error correction capability is 2, and the corresponding Galois domain equation during the decoding process is: a 67 x 2 +a 236 x+1=0(GF(2 8 The possible value space corresponding to the Galois field equation is [0, 254], where a is the generator of the Galois field. Based on the target relation derived from Vieta's theorem, the target relation for the first error position e1 and the second error position e2 is: e1 + e2 = 67 mod 255. Then, the midpoint position can be determined as 67 / 2 = 33.5. When the calculated midpoint position includes a decimal, the nearest integer, i.e., 33 or 34, can be taken as the midpoint position. Optionally, starting from the midpoint position, half the length of the possible value space can be traversed towards the higher bits as the initial traversal range, corresponding to [34, 160]. Since the total length of the pre-configured error correction code is 144 bits, the actual traversable value range is [34, 143], which is the first traversal range. Based on the possible value space of the Galois field [0, 254], the remaining traversable ranges are [0, 33] and [161, 154]. Since the total length of the error-correcting code is 144 bits, the actual traversable second traversable range is [0, 33]. In the first traversable range [34, 143], all possible values ​​are traversed and substituted into the Galois field equation to determine the first error position e1. Assuming the first error position determined in the first traversable range is e1 = 63, according to the target relation e1 + e2 = 67 mod 255 and the first error position e1, the formula for calculating the second error position e2 is: e2 = 67 - 63 = 4 mod 255, that is, the second error position e2 is 4.

[0069] The decoding method of the error-correcting code provided in this application can reduce the traversal range of error positions by applying the Galois field equation and Vieta's formulas, without having to traverse all possible values, thereby reducing the amount of computation in the decoding process and lowering the complexity.

[0070] Based on the above method embodiments, this application also provides a decoding apparatus for error-correcting codes. See also Figure 2 , Figure 2 This is a schematic diagram of a decoding device for error-correcting codes provided in an embodiment of this application.

[0071] The device 200 may include:

[0072] Acquisition unit 201 is used to acquire the Galois domain equation corresponding to the error correction code, wherein the total length of the error correction code is a preset number of bits;

[0073] The first determining unit 202 is used to determine the target relational expression corresponding to multiple error positions after the error correction code is decoded based on the Galois domain equation. The target relational expression is derived based on Vieta's theorem.

[0074] The second determining unit 203 is used to determine the first traversal range based on the target relation and the preset number of bits;

[0075] The third determining unit 204 is used to determine the first error position among the values ​​included in the first traversal range;

[0076] The fourth determining unit 205 is used to determine the second error position based on the target relation and the first error position.

[0077] In one possible implementation, the first determining unit 202 is specifically configured to: determine a first exponent corresponding to a first coefficient of the Galois domain equation based on the generators of the Galois domain equation, wherein the first coefficient is the coefficient of the highest power term; determine a second exponent corresponding to a first root of the Galois domain equation and a third exponent corresponding to a second root of the Galois domain equation based on the generators; determine a product relationship between the second exponent and the third exponent based on Vieta's formulas, wherein the product relationship includes the first exponent; and determine a target relationship based on the product relationship, wherein the first root is reciprocal to the first error position, and the second root is reciprocal to the second error position.

[0078] In one possible implementation, the first determining unit 202 is specifically used to take the logarithm of both sides of the product relation to determine the summation relation; and to determine the target relation based on the reciprocal relationship between the first root and the first error position, the reciprocal relationship between the second root and the second error position, and the summation relation.

[0079] In one possible implementation, the second determining unit 203 is specifically used to determine the midpoint position based on the target relation; determine the initial traversal range based on the midpoint position and the value space length of the Galois domain equation; and determine the first traversal range based on the initial traversal range and the preset number of bits.

[0080] The beneficial effects of the decoding device for the error correction code provided in this application embodiment can be found in the above method embodiment, and will not be repeated here.

[0081] Based on the above method and apparatus embodiments, this application also provides a decoding device for error-correcting codes. See also Figure 3 , Figure 3 This is a schematic diagram of a decoding device for error correction codes provided in an embodiment of this application.

[0082] The device 300 includes: a memory 301 and a processor 302;

[0083] The memory 301 is used to store relevant program code;

[0084] The processor 302 is used to call the program code and execute the decoding method of the error correction code described in the above method embodiment.

[0085] Furthermore, embodiments of this application also provide a computer-readable storage medium for storing a computer program for executing the decoding method of the error-correcting code described in the above method embodiments.

[0086] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. In particular, for system or device embodiments, since they are basically similar to method embodiments, the description is relatively simple, and relevant parts can be referred to the descriptions in the method embodiments. The device embodiments described above are merely illustrative. The units or modules described as separate components may or may not be physically separate. The components shown as units or modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network units. Some or all of the units or modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0087] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0088] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0089] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0090] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A decoding method for error-correcting codes, characterized in that, The method includes: Obtain the Galois domain equation corresponding to the error correction code, wherein the total length of the error correction code is a preset number of bits; The first exponent corresponding to the first coefficient of the Galois domain equation is determined based on the generator of the Galois domain equation, where the first coefficient is the coefficient of the highest power term. Based on the generator, determine the second exponent corresponding to the first root of the Galois domain equation and the third exponent corresponding to the second root of the Galois domain equation. The product relationship between the second exponent and the third exponent is determined based on Vieta's formulas, and the product relationship includes the first exponent; The target relation is determined based on the product relation, where the first root and the first error position are reciprocals, and the second root and the second error position are reciprocals. Based on the target relation and the preset number of bits, the first traversal range is determined; Determine the first error location from the values ​​included in the first traversal range; Based on the target relation and the first error location, the second error location is determined.

2. The method according to claim 1, characterized in that, Determining the target relation based on the product relation includes: Take the logarithm of both sides of the product expression to determine the summation expression; Based on the reciprocal relationship between the first root and the first error position, the reciprocal relationship between the second root and the second error position, and the summation formula, the target formula is determined.

3. The method according to claim 1, characterized in that, Determining the first traversal range based on the target relation and the preset number of bits includes: Based on the target relation, determine the midpoint position; Based on the midpoint position and the value space of the Galois domain equation, the initial traversal range is determined; The first traversal range is determined based on the initial traversal range and the preset number of bits.

4. A decoding device for error-correcting codes, characterized in that, The device includes: The acquisition unit is used to acquire the Galois domain equation corresponding to the error correction code, wherein the total length of the error correction code is a preset number of bits. The first determining unit is configured to: determine a first exponent corresponding to a first coefficient of the Galois equation based on the generators of the Galois equation; determine a second exponent corresponding to a first root of the Galois equation and a third exponent corresponding to a second root of the Galois equation based on the generators; determine a product relationship between the second exponent and the third exponent based on Vieta's formulas, wherein the product relationship includes the first exponent; and determine a target relationship based on the product relationship, wherein the first root is reciprocal to the first error position, and the second root is reciprocal to the second error position. The second determining unit is used to determine the first traversal range based on the target relation and the preset number of bits; The third determining unit is used to determine the first error position among the values ​​included in the first traversal range; The fourth determining unit is used to determine the second error position based on the target relation and the first error position.

5. The apparatus according to claim 4, characterized in that, The first determining unit is specifically used to take the logarithm of both sides of the product relation to determine the summation relation; and to determine the target relation based on the reciprocal relationship between the first root and the first error position, the reciprocal relationship between the second root and the second error position, and the summation relation.

6. The apparatus according to claim 4, characterized in that, The second determining unit is specifically used to determine the midpoint position based on the target relation; determine the initial traversal range based on the midpoint position and the value space of the Galois domain equation; and determine the first traversal range based on the initial traversal range and the preset number of bits.

7. A decoding device for error-correcting codes, characterized in that, The device includes: a memory and a processor; The memory is used to store the relevant program code; The processor is used to call the program code to execute the decoding method of the error correction code according to any one of claims 1 to 3.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store a computer program for executing the decoding method of the error-correcting code according to any one of claims 1 to 3.

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