Amplification circuit, control method, device and equipment of source driving circuit

Abstract

The present disclosure provides an amplification circuit, a source driving circuit control method, device and equipment, which not only improves the flexibility of the amplification circuit, but also uses the provided amplification circuit to pre-charge the pixel points first in each row pixel driving period, thereby saving the charging time of each pixel point in the row pixel, maintaining the reliable completion of the driving of the row pixel in each row pixel driving period, and improving the reliability of the source driving circuit.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and in particular, to an amplification circuit, a control method, device and equipment of a source driving circuit. BACKGROUND

[0002] Generally, the amplification multiple of an amplification circuit is fixed after the design is completed. Such an amplification circuit has poor flexibility and limited use scenarios. SUMMARY

[0003] The present disclosure provides an amplification circuit, a control method, device and equipment of a source driving circuit. The specific solutions are as follows:

[0004] In an aspect, an embodiment of the present disclosure provides an amplification circuit, comprising: a first transistor, a second transistor, a third transistor and a fourth transistor with the same structure, and further comprising an output unit, a coupling unit, a first switch component and a controller.

[0005] The driving electrode of the first transistor is connected with the driving electrode of the second transistor, for receiving a signal to be amplified. The first connection end of the first transistor is connected with the first connection end of the second transistor and the first input end of the output unit. The second connection end of the first transistor is connected with the second connection end of the second transistor and the coupling unit.

[0006] The driving electrode of the third transistor is connected with one end of the first switch component. The first connection end of the third transistor is connected with the first connection end of the fourth transistor and the second input end of the output unit. The second connection end of the third transistor is connected with the second connection end of the fourth transistor and the coupling unit.

[0007] The driving electrode of the fourth transistor is connected with the output end of the output unit. The other end of the first switch component is connected with the output end of the output unit.

[0008] The controller is configured to control the conduction state of the first switch component, so that the signal output by the output unit and the signal to be amplified have a first amplification multiple or a second amplification multiple.

[0009] Optionally, the amplification circuit further comprises a second switch component.

[0010] One end of the second switch component is connected with the output end of the output unit and the driving electrode of the fourth transistor. The other end of the second switch component is connected with the other end of the first switch component.

[0011] The controller is further configured to control the conduction state of the second switch component.

[0012] Optionally, the output unit comprises a first resistor and a second resistor.

[0013] One end of the first resistor is connected with the first connection end of the first transistor, the first connection end of the second transistor and the output end of the output unit, and the other end of the first resistor is connected with the power supply.

[0014] One end of the second resistor is connected with the first connection end of the third transistor and the first connection end of the fourth transistor, and the other end of the second resistor is connected with the power supply.

[0015] Optionally, the coupling unit comprises a current source.

[0016] Optionally, the first transistor, the second transistor, the third transistor and the fourth transistor are N-type transistors, or the first transistor, the second transistor, the third transistor and the fourth transistor are P-type transistors.

[0017] The amplification circuit provided by the embodiments of the present disclosure not only can improve the flexibility of the amplification circuit and enrich its use scenarios, but also can improve the performance of the application circuit.

[0018] Another aspect of the present disclosure provides a source driving circuit, comprising the amplification circuit provided by the above embodiments.

[0019] Another aspect of the present disclosure provides a source driving circuit control method, comprising:

[0020] Determining the number of pixel points contained in each row of pixels of a display panel;

[0021] Based on the number of pixel points, obtaining the off duration of the first switch component in the amplification circuit within each row of pixel driving period from a preset mapping relationship table;

[0022] Based on the off duration, controlling the on-off state of the first switch component within each row of pixel driving period.

[0023] Optionally, the controlling the on-off state of the first switch component within each row of pixel driving period based on the off duration comprises:

[0024] From the start time of each row of pixel driving period to the duration of the off duration, the first switch component is controlled to be in the off state.

[0025] Another aspect of the present disclosure provides a source driving circuit control device, comprising:

[0026] The first determination module is configured to determine a number of pixel points contained in each row of pixels of the to-be-driven panel.

[0027] The second determination module is configured to determine, based on the number of pixel points, an off duration of a first switch component in the amplification circuit within each row of pixel driving period.

[0028] The control module is configured to control, based on the off duration, a conduction state of the first switch component within each row of pixel driving period.

[0029] Optionally, the control module is specifically configured to:

[0030] The first switch component is controlled to be in an off state during a duration of the off duration from a starting moment of the each row of pixel driving period.

[0031] Another aspect of the present disclosure provides a display driving integrated circuit (DDIC) comprising the source driving circuit.

[0032] Another aspect of the present disclosure provides a device comprising the source driving circuit and the display panel.

[0033] The source driving circuit control method, device and equipment provided by the present disclosure first determine the number of pixel points contained in each row of pixels of the display panel, then acquire, based on the number of pixel points, the off duration of the first switch component in the amplification circuit within each row of pixel driving period from a preset mapping relationship table, and then control, based on the off duration, the conduction state of the first switch component within each row of pixel driving period. By pre-charging the pixel points within each row of pixel driving period, the charging time of each pixel point in the row of pixels is saved, the driving of the row of pixels within each row of pixel driving period is reliably completed, and the reliability of the source driving circuit is improved.

[0034] Additional aspects and advantages of the present disclosure will be described in part in the description that follows, will become apparent from the description, or will be learned by practice of the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0035] The above and / or additional aspects and advantages of the present disclosure will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:

[0036] Figure 1 Equivalent circuit diagram of a source driver and a display panel in the related art;

[0037] Figure 2 Structure schematic diagram of an amplification circuit provided by an embodiment of the present disclosure;

[0038] Figure 3 Another structure schematic diagram of an amplification circuit provided by an embodiment of the present disclosure;

[0039] Figure 4 Another structure schematic diagram of an amplification circuit provided by an embodiment of the present disclosure;

[0040] Figure 5 A flowchart of a source driving circuit control method provided by an embodiment of the present disclosure;

[0041] Figure 6 A timing diagram of a signal in a source driving circuit provided by an embodiment of the present disclosure;

[0042] Figure 7 A structure schematic diagram of a source driving circuit control device provided by an embodiment of the present disclosure;

[0043] Figure 8 A device structure schematic diagram provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] Embodiments disclosed by the present disclosure are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar notations represent the same or similar elements or elements with the same or similar functions throughout. The embodiments described below by referring to the accompanying drawings are exemplary and are intended to explain the present disclosure, and cannot be understood as a limitation of the present disclosure.

[0045] The present disclosure takes the display driving field as an example to illustrate the problem of poor flexibility that may be caused by the fixed amplification multiple of an amplification circuit.

[0046] Figure 1 An equivalent circuit diagram of a source driver and a display panel in the related art.

[0047] As Figure 1 stated, the source driver 12 of the display panel 11 includes an operational amplifier 121 and an output switch 122 for controlling whether to output driving data. The operational amplifier 121 receives an input signal and outputs an amplified driving signal, and the output switch 122 controls whether to output the driving signal output by the operational amplifier to the display panel 11. In the display panel 11, the pixel point closest to the source driver 12 is named A, and the pixel point farthest from the source driver 12 is named B. As the panel size increases, the resistor (R) and the capacitor (C) of the panel load are also increasing, which limits the charging time of the pixel.

[0048] When 122 is off, the input voltage V in is updated. Next, when 122 is on, V OUTThe driving signal corresponding to the updated input voltage is output to the display panel. In this case, if the display panel is large, the RC delay will also increase, and the charging time of some pixels in the display panel will be delayed. If some pixels are not fully charged within the driving time of a row of pixels, display abnormalities may occur.

[0049] The present disclosure provides an amplification circuit with variable amplification, which can not only improve the flexibility of the amplification circuit and enrich its use scenarios, but also improve the performance of the application circuit.

[0050] Figure 2 A structural schematic diagram of an amplification circuit provided by an embodiment of the present disclosure.

[0051] As Figure 2 shown, the amplification circuit includes a first transistor 101, a second transistor 102, a third transistor 103, and a fourth transistor 104 with the same structure, and further includes an output unit 105, a coupling unit 106, a first switch component 107, and a controller 108.

[0052] The driving electrode of the first transistor 101 is connected to the driving electrode of the second transistor 102, for receiving the signal to be amplified. The first connection end of the first transistor 101 is connected to the first connection end of the second transistor 102 and the first input end of the output unit 105. The second connection end of the first transistor 101 is connected to the second connection end of the second transistor 102 and the coupling unit 106.

[0053] The driving electrode of the third transistor 103 is connected to one end of the first switch component 107. The first connection end of the third transistor 103 is connected to the first connection end of the fourth transistor 104 and the second input end of the output unit 105. The second connection end of the third transistor 103 is connected to the second connection end of the fourth transistor 104 and the coupling unit 106.

[0054] The driving electrode of the fourth transistor 104 is connected to the output end of the output unit 105. The other end of the first switch component 107 is connected to the output end of the output unit 105.

[0055] The controller 108 is configured to control the conduction state of the first switch component 107, so that the signal output by the output unit 105 and the signal to be amplified have a first amplification multiple or a second amplification multiple.

[0056] Optionally, the first transistor 101, the second transistor 102, the third transistor 103, and the fourth transistor 104 can be N-type transistors as Figure 2 shown.

[0057] Alternatively, the first transistor 101, the second transistor 102, the third transistor 103 and the fourth transistor 104 can also be P-type transistors, and the present disclosure does not make any limitation in this regard.

[0058] Figure 2 In the shown amplification circuit, the first transistor 101 and the second transistor 102 are connected in parallel as the positive input terminal of the amplification circuit, and the third transistor 103 and the fourth transistor 104 constitute the negative input terminal of the amplification circuit.

[0059] When the first switch assembly 107 is closed, and the signals to be amplified received by the driving terminals of the first transistor 101 and the second transistor 102 are high level, the first transistor 101 and the second transistor 102 are turned on, and the output unit 105 outputs a high level signal. At this time, the third transistor 103 and the fourth transistor 104 are turned on under the driving of the high level signal output by the output unit 105. Since the first transistor 101, the second transistor 102, the third transistor 103 and the fourth transistor 104 have the same structure, the difference between the positive and negative inputs of the amplification circuit can be approximately "0", and the amplification circuit is in the first working state. At this time, the amplification factor of the amplification circuit is determined by the amplification factor of the transistor, and the output signal of the output unit 105 and the signal to be amplified form a first amplification factor.

[0060] At this time, if the first switch assembly 107 is opened, the third transistor 103 constituting the negative input terminal of the amplification circuit is also opened. At this time, there is a difference between the positive and negative inputs of the amplification circuit. At this time, the amplification circuit is in the second working state, and the output voltage of the amplification circuit can be approximately equal to the supply voltage (not shown in the figure) on the side of the output unit 105. The amplification factor of the amplification circuit is determined by the supply voltage and the signal to be amplified, and the output signal of the output unit 105 and the signal to be amplified form a second amplification factor.

[0061] Generally, the level of the output signal of the amplification circuit in the first working state is less than the supply voltage of the output unit 105, that is, the first amplification factor is less than the second amplification factor. Therefore, in actual use, the controller can control the conduction and turn-off of the first switch assembly 107 according to the needs of the subsequent stage. For example, when the output unit 105 needs to output a relatively high level signal, the first switch assembly 107 can be controlled to be opened; when the output unit 105 needs to output a relatively low level signal, the first switch assembly 107 can be controlled to be closed.

[0062] When the amplification circuit is applied in a source driver, the first switch component 107 can be first turned off when the input voltage is updated, so that the output unit 105 first outputs a source driving signal with a voltage level corresponding to the supply voltage, to pre-charge each pixel point in the display panel. Then, the first switch component 107 is turned on, so that the output unit 105 first outputs a source driving signal corresponding to the input signal, to drive each pixel point in the display panel to display. Since each pixel point has been pre-charged, the driving time of the display of each pixel point can be reduced, and the reliable display of the display panel is ensured.

[0063] The amplification circuit provided by the embodiments of the present disclosure can make the signal output by the output unit and the signal to be amplified have a first amplification multiple or a second amplification multiple by controlling the conduction state of the first switch component by the controller, and the circuit structure is simple, reliable, and highly flexible.

[0064] Figure 3 FIG. 3 is a structural schematic diagram of another amplification circuit provided by the embodiments of the present disclosure.

[0065] As shown in FIG. 3, the amplification circuit further includes a second switch component 301. Figure 3

[0066] The one end of the second switch component 301 is connected with the output end of the output unit 105 and the driving electrode of the fourth transistor 104, and the other end of the second switch component 301 is connected with the other end of the first switch component 107.

[0067] The controller 108 is further configured to control the conduction state of the second switch component.

[0068] Optionally, the second switch component 301 and the first switch component 107 can be the same type of switch device, or can be different types of switch devices, which are not limited in the present disclosure.

[0069] In the present disclosure, in order to further control the signal output by the output unit 105 of the amplification circuit, the second switch component 301 can be connected between the output end of the output unit 105 and the fourth transistor.

[0070] Then, the controller 108 can control the first switch component 107 and the second switch component 301 to be turned on at the same time, so that the amplification circuit works in a normal amplification state, that is, the amplification circuit outputs a signal with a smaller amplification multiple with the signal to be amplified; or the controller 108 can control the first switch component 107 to be turned off and the second switch component 301 to be turned on, so that the amplification circuit outputs a signal with a voltage close to the supply voltage, and the voltage output by the amplification circuit has a larger amplification multiple with the signal to be amplified.

[0071] ​The amplification circuit provided by the embodiments of the present disclosure can not only control the on state of the first switch component to make the output unit output a signal with a first amplification multiple or a second amplification multiple relative to the signal to be amplified, but also control whether the amplification circuit outputs a signal by controlling the on state of the second switch component, and the circuit structure is simple, reliable and highly flexible.

[0072] Figure 4 Another structure schematic diagram of an amplification circuit provided by the embodiments of the present disclosure.

[0073] As shown in Figure 4 , the output unit 105 includes a first resistor 1051 and a second resistor 1052.

[0074] The one end of the first resistor 1051 is connected with the first connection end of the first transistor 101, the first connection end of the second transistor 102 and the output end of the output unit, and the other end of the first resistor 1051 is connected with the power supply V cc .

[0075] The one end of the second resistor 1052 is connected with the first connection end of the third transistor 103 and the first connection end of the fourth transistor 104, and the other end of the second resistor 1052 is connected with the power supply V cc .

[0076] Optionally, in order to balance the voltage between the positive input end and the negative input end of the amplification circuit, the first resistor 1051 and the second resistor 1052 can be resistor devices with the same resistance value. The first resistor 1051 and the second resistor 1052 are used to limit the current passing through each transistor, so as to protect each transistor.

[0077] Optionally, as shown in Figure 4 , the coupling unit 106 can include a current source 1061.

[0078] If the first transistor 101 to the fourth transistor 104 are N-type transistors, the current direction of the current source 1061 is as shown in Figure 4 . By connecting each transistor with the current source 1061, the zero drift of the circuit can be effectively suppressed.

[0079] Optionally, if the first transistor 101 to the fourth transistor 104 are P-type transistors, the current direction of the current source 1061 needs to be opposite to the direction as shown in Figure 4 .

[0080] In some possible implementation forms, the coupling unit 106 can also be composed of a resistor and a voltage source to provide a current path for each transistor.

[0081] It should be noted that the number and type of each electronic device in the amplification circuit provided in the above embodiments of the present disclosure are only illustrative and cannot be regarded as a restrictive description of the amplification circuit provided by the present disclosure.

[0082] Based on the amplification circuit provided in the above embodiments, the present disclosure further provides a source driving circuit, which comprises the amplification circuit provided in any of the above embodiments.

[0083] Figure 5 A flowchart of a source driving circuit control method provided by an embodiment of the present disclosure is shown. The method can be executed by a controller in a source driving circuit provided by the present disclosure, or by a DDIC provided by the present disclosure, and the like, which is not limited by the present disclosure. The following embodiments of the present disclosure are described taking the method executed by the controller as an example.

[0084] As shown in the source driving circuit control method, the method comprises but is not limited to the following steps: Figure 5

[0085] Step 501, determining the number of pixel points contained in each row of pixels of the display panel.

[0086] Wherein, one row of pixels refers to a set of pixel points in a row of the display panel, and the number of pixel points contained in each row of pixels can be determined by the number of column pixels contained in the display panel. For example, the size of the display panel is 1024*512 (number of columns*number of rows), which means that each row of pixels contains 1024 pixel points.

[0087] Step 502, based on the number of pixel points, obtaining the off duration of the first switching component in the amplification circuit within each row of pixel driving period from the preset mapping relationship table.

[0088] As the size of the display panel is larger, the number of pixel points contained in each row of pixels is more, and the corresponding RC delay is longer. In order to reduce the driving time caused by RC delay, the pixel points can be pre-charged for a longer time. Therefore, in the present disclosure, the pre-charging time of the pixel points within each row of pixel driving period is determined based on the number of pixel points contained in each row of pixels, that is, the off duration of the first switching component in the amplification circuit within each driving period is determined.

[0089] Optionally, the mapping relationship between different pixel point numbers and off durations can be set in advance, and then after the actual number of pixel points contained in each row of pixels of the display panel is determined, the corresponding off duration can be determined based on the mapping relationship.

[0090] ​Alternatively, the length of the pre-charge of the pixel points in each row pixel driving period can also be determined based on the RC delay length of each pixel point, the number of pixel points actually contained in each row pixel of the current display panel, and the length of each row pixel driving period, and the present disclosure does not limit this.

[0091] In step 503, the on-off state of the first switching component in each row pixel driving period is controlled based on the off duration.

[0092] After the off duration of the first switching component in each row pixel driving period is determined, the off duration can be used to control the first switching component to be in the off state within the off duration in each row pixel driving period.

[0093] Referring to the structure schematic diagram of the above-mentioned amplification circuit, the first switching component can be controlled to be in the off state within the off duration from the start time of each row pixel driving period.

[0094] That is, at the start time of the row pixel driving period, the amplification circuit is first controlled to output a higher driving signal to pre-charge the row pixel, and then the amplification circuit is controlled to output an amplified driving signal corresponding to the input signal to drive each pixel point in the row pixel to display.

[0095] If the amplification circuit adopts the circuit structure shown in Figure 3 or 4, the driving signal timing diagram corresponding to the pixel point "B" in the display panel shown in Figure 1 . Figure 6

[0096] Figure 6 A timing diagram of a signal in a source driving circuit provided by an embodiment of the present disclosure.

[0097] As shown in Figure 6 , at the start time t1 of each row pixel driving period, the second switching component is in the off state as shown by the signal SW2 in the figure, and the first switching component can be in the on or off state (corresponding to SW1 in the figure, and the first switching component is in the on state at t1 in the figure), and the input end of the amplification circuit receives the data signal to be displayed (corresponding to Vin in the figure). Then, at t2, the second switching component is turned on and the first switching component is turned off, and the row pixel is pre-charged, and the output voltage of the source driving circuit is as shown in Figure 6 . out At t3, the first switching component is turned on, and the output signal of the amplification circuit is related to the input signal, and the row pixel is driven and displayed.

[0098] As shown in Figure 6 ​It can be seen that the voltage at the pixel point B is pre-charged from t1, as shown in V Figure 6 B The charging time of the pixel point B can be reduced, and the corresponding driving voltage of the pixel point B can be reliably increased to the display voltage corresponding to the input signal in the row pixel driving period, and the reliable display of the pixel point B is ensured.

[0099] It should be noted that the first switch component can be turned off at the same time as the second switch component at t1, or can be turned off at a certain time between t1 and t2, as shown in Figure 6 The present disclosure does not limit this.

[0100] The connection relationship between the amplification circuit in the source driving circuit and the display panel, and the role of the first switch component and the second switch component in the amplification circuit can be referred to the detailed description of each circuit embodiment of the present disclosure, which will not be repeated here.

[0101] The source driving circuit control method provided by the embodiment of the present disclosure first determines the number of pixel points contained in each row pixel of the display panel, and then acquires the off duration of the first switch component in the amplification circuit in each row pixel driving period from the preset mapping relationship table based on the number of pixel points, and then controls the on-off state of the first switch component in each row pixel driving period based on the off duration. By pre-charging the pixel points in each row pixel driving period, the charging time of each pixel point in the row pixel is saved, and the driving of the row pixel in each row pixel driving period is reliably completed, and the reliability of the source driving circuit is improved.

[0102] Figure 7 A structural schematic diagram of a source driving circuit control device provided by an embodiment of the present disclosure. As shown in Figure 7 The device 70 comprises a first determination module 71, a second determination module 72 and a control module 73.

[0103] The first determination module 71 is configured to determine the number of pixel points contained in each row pixel of the to-be-driven panel.

[0104] The second determination module 72 is configured to determine the off duration of the first switch component in the amplification circuit in each row pixel driving period based on the number of pixel points.

[0105] The control module 73 is configured to control the on-off state of the first switch component in each row pixel driving period based on the off duration.

[0106] ​Optionally, the control module 73 is specifically configured to control the first switch component to be in the off state during the duration of the off duration from the start time of each row pixel driving period.

[0107] The specific control process and implementation principle of the source driving circuit control device can refer to the detailed description of other embodiments of the present disclosure, which will not be described here.

[0108] The source driving circuit control device provided by the embodiments of the present disclosure first determines the number of pixel points contained in each row pixel of the display panel, and then acquires the off duration of the first switch component in the amplification circuit within each row pixel driving period from the preset mapping relationship table based on the number of pixel points, and then controls the on-off state of the first switch component within each row pixel driving period based on the off duration. By pre-charging the pixel points within each row pixel driving period, the charging time of each pixel point in the row pixel is saved, the driving of the row pixel within each row pixel driving period is reliably completed, and the reliability of the source driving circuit is improved.

[0109] Based on the source driving circuit provided by the above embodiments, the embodiments of the present disclosure can also provide a display driver integrated circuit (DDIC). The above explanation and description of the source driving circuit also apply to the DDIC of the present embodiment, and therefore will not be described here.

[0110] Based on the source driving circuit provided by the above embodiments, the embodiments of the present disclosure can also provide a device. Figure 8 The device structure schematic diagram provided by the embodiments of the present disclosure is as follows. Figure 8 The device 80 includes a source driving circuit 81 and a display panel 82.

[0111] In the device of the embodiments of the present disclosure, when the source driving circuit drives the display panel, the number of pixel points contained in each row pixel of the display panel is first determined, and then the off duration of the first switch component in the amplification circuit within each row pixel driving period is acquired from the preset mapping relationship table based on the number of pixel points, and then the on-off state of the first switch component within each row pixel driving period is controlled based on the off duration. By pre-charging the pixel points within each row pixel driving period, the charging time of each pixel point in the row pixel is saved, the driving of the row pixel within each row pixel driving period is reliably completed, and the reliability of the source driving circuit is improved.

[0112] In the description of the present disclosure, the terms "first", "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "a plurality of" is at least two, for example, two, three, etc., unless otherwise explicitly specified.

[0113] Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above-described embodiments are exemplary and cannot be understood as limiting the present disclosure, and those of ordinary skill in the art can make changes, modifications, replacements and variations to the above-described embodiments within the scope of the present disclosure.

Claims

1. An amplification circuit, characterized by, The amplification circuit comprises: a first transistor, a second transistor, a third transistor and a fourth transistor with the same structure, an output unit, a coupling unit, a first switch assembly and a controller; a driving electrode of the first transistor is connected with a driving electrode of the second transistor, for receiving a signal to be amplified, a first connection end of the first transistor is connected with a first connection end of the second transistor and a first input end of the output unit, and a second connection end of the first transistor is connected with a second connection end of the second transistor and the coupling unit; a driving electrode of the third transistor is connected with one end of the first switch assembly, a first connection end of the third transistor is connected with a first connection end of the fourth transistor and a second input end of the output unit, and a second connection end of the third transistor is connected with a second connection end of the fourth transistor and the coupling unit; a driving electrode of the fourth transistor is connected with an output end of the output unit, and the other end of the first switch assembly is connected with the output end of the output unit; the controller is configured to control a conduction state of the first switch assembly, so that a signal output by the output unit and the signal to be amplified have a first amplification multiple or a second amplification multiple; the amplification circuit is applied to a source driving circuit, and the source driving circuit is controlled in the following manner: determining a number of pixel points contained in each row of pixels of a display panel; based on the number of pixel points, obtaining, from a preset mapping relationship table, an off duration of the first switch assembly in each row of pixel driving period of the amplification circuit; and based on the off duration, controlling a conduction state of the first switch assembly in each row of pixel driving period.

2. The circuit of claim 1, wherein, The amplification circuit further comprises: a second switch assembly; one end of the second switch assembly is connected with an output end of the output unit and a driving electrode of the fourth transistor, and the other end of the second switch assembly is connected with the other end of the first switch assembly; the controller is further configured to control a conduction state of the second switch assembly.

3. The circuit of claim 1, wherein, the output unit comprises a first resistor and a second resistor; one end of the first resistor is connected with a first connection end of the first transistor, a first connection end of the second transistor and an output end of the output unit, and the other end of the first resistor is connected with a power supply; one end of the second resistor is connected with a first connection end of the third transistor and a first connection end of the fourth transistor, and the other end of the second resistor is connected with the power supply.

4. The circuit of claim 1, wherein, the coupling unit comprises a current source.

5. The circuit of any one of claims 1-4, wherein, The first transistor, the second transistor, the third transistor and the fourth transistor are N-type transistors, or the first transistor, the second transistor, the third transistor and the fourth transistor are P-type transistors.

6. A source driver circuit, comprising: The amplification circuit comprises any one of claims 1-5.

7. A source driver circuit control method, comprising: The method comprises: determining a number of pixel points contained in each row of pixels of a display panel; based on the number of pixel points, obtaining, from a preset mapping relationship table, an off duration of the first switch assembly in each row of pixel driving period of the amplification circuit; and Control, based on the off duration, a conduction state of the first switch component in each row pixel driving period; The amplification circuit comprises a first transistor, a second transistor, a third transistor and a fourth transistor which are of the same structure, and further comprises an output unit, a coupling unit, a first switch component and a controller; The driving electrode of the first transistor is connected with the driving electrode of the second transistor, for receiving a signal to be amplified; the first connection end of the first transistor is connected with the first connection end of the second transistor and the first input end of the output unit; and the second connection end of the first transistor is connected with the second connection end of the second transistor and the coupling unit. The driving electrode of the third transistor is connected with one end of the first switch component; the first connection end of the third transistor is connected with the first connection end of the fourth transistor and the second input end of the output unit; and the second connection end of the third transistor is connected with the second connection end of the fourth transistor and the coupling unit. The driving electrode of the fourth transistor is connected with the output end of the output unit; and the other end of the first switch component is connected with the output end of the output unit. The controller is configured to control the conduction state of the first switch component, so that the signal output by the output unit and the signal to be amplified have a first amplification multiple or a second amplification multiple.

8. The method of claim 7, wherein, The control, based on the off duration, a conduction state of the first switch component in each row pixel driving period, comprises: From the start time of each row pixel driving period, the first switch component is controlled to be in an off state within the duration of the off duration.

9. A source driver circuit control device, comprising: The device comprises: A first determination module configured to determine a number of pixel points contained in each row pixel of a to-be-driven panel; A second determination module configured to determine, based on the number of pixel points, an off duration of a first switch component in an amplification circuit in each row pixel driving period; A control module configured to control, based on the off duration, a conduction state of the first switch component in each row pixel driving period; The amplification circuit comprises a first transistor, a second transistor, a third transistor and a fourth transistor which are of the same structure, and further comprises an output unit, a coupling unit, a first switch component and a controller; The driving electrode of the first transistor is connected with the driving electrode of the second transistor, for receiving a signal to be amplified; the first connection end of the first transistor is connected with the first connection end of the second transistor and the first input end of the output unit; and the second connection end of the first transistor is connected with the second connection end of the second transistor and the coupling unit. The driving electrode of the third transistor is connected with one end of the first switch component; the first connection end of the third transistor is connected with the first connection end of the fourth transistor and the second input end of the output unit; and the second connection end of the third transistor is connected with the second connection end of the fourth transistor and the coupling unit. The driving electrode of the fourth transistor is connected with an output end of the output unit, and the other end of the first switch assembly is connected with the output end of the output unit; The controller is configured to control the on-off state of the first switch assembly, so that the signal output by the output unit and the signal to be amplified have a first amplification multiple or a second amplification multiple.

10. The apparatus of claim 9, wherein, The control module is specifically configured to: Control the first switch assembly to be in the off state during the duration of the off duration from the start time of each row of pixel driving periods.

11. A display driving integrated circuit (DDIC), comprising: The source driving circuit of claim 6.

12. An apparatus, comprising: The source driving circuit and the display panel of claim 6.

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