A near-infrared single-photon array detector and a method for preparing the same

By using the primary Zn diffusion process in the InGaAs/InP single-photon array detector, the step-type doped region and deep diffusion isolation region are formed, and combined with the ALD process to optimize the passivation layer, the problems of complex process and poor isolation effect in the prior art are solved, and more efficient device preparation and performance optimization are achieved.

CN116230800BActive Publication Date: 2025-03-18XIAN INST OF OPTICS & PRECISION MECHANICS CHINESE ACAD OF SCI
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Patent Information

Application Number
CN202310169970.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-27
Publication Date
2025-03-18
Estimated Expiration
2043-02-27

AI Technical Summary

Technical Problem

The existing InGaAs/InP single-photon array detector has a complex preparation process and poor anti-cross talk isolation effect, which leads to high production difficulty and high cost, and has the problem of electrical crosstalk between cells.

Method used

The first Zn diffusion process is used to form a step-type P-type doped region and a deep diffusion isolation region on the InP cap layer, and the growth on the passivation layer is combined with the ALD thin film deposition process, and the radius of curvature of the diffusion isolation region is optimized to suppress edge breakdown and electrical crosstalk.

Benefits of technology

The preparation process is simplified, process difficulty and material defects are reduced, the isolation effect and resolution of the device are improved, and the dark counting rate and error counting rate are reduced.

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Abstract

The present invention discloses a near-infrared single-photon array detector and a preparation method thereof, which are used to solve the technical problems of the existing single-photon array detector, such as the complicated preparation process and poor anti-crosstalk isolation effect. The array detector includes a substrate layer, an epitaxial layer arranged on the upper surface of the substrate layer, and an anti-reflection layer arranged on the lower surface of the substrate layer; the epitaxial layer includes a buffer layer, an absorption layer, a gradient layer, a charge layer and a cap layer grown in sequence from bottom to top; the buffer layer is close to the substrate layer; a passivation layer is arranged on the side of the cap layer away from the charge layer; a plurality of second electrode windows and a plurality of third electrode windows are evenly spaced on the passivation layer, a pixel anode metal electrode is arranged on the inner side of each second electrode window, and an isolation area electrode is arranged on the inner side of each third electrode window; the cap layer and the outer side of the second electrode window form an active diffusion area, and the third electrode window and the cap layer form a diffusion isolation area; the diffusion isolation areas are all step structures, and their depth is the same as the depth of the active diffusion area.
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Description

Technical Field

[0001] The invention relates to a single-photon semiconductor device, in particular to a near-infrared single-photon array detector and a preparation method thereof. Background Art

[0002] At present, the devices that can realize single photon array detection mainly include photomultiplier tubes (PMT), superconducting nanowires (SNSPD), photoelectric avalanche diodes (APD), etc. Among them, PMT has problems such as large size, high production cost, high voltage operation of thousands of volts, and susceptibility to magnetic field; SNSPD usually needs to work in the temperature range below liquid helium (4.2K), which limits its application scope; semiconductor APD single photon devices based on Geiger mode have the advantages of small size, low operating voltage, and easy integration, and are widely used in quantum communication, biochemistry, space exploration, and laser radar. Since the response band of Geiger mode avalanche diode arrays made of InGaAs / InP covers 0.9~1.7μm wavelengths, especially has good response characteristics at 1.55μm wavelength, has advantages such as safety for human eyes and good atmospheric transmission, such devices have received widespread attention and rapid development in various fields in recent years.

[0003] At present, InGaAs / InP single-photon array detectors still have a series of problems, which make them difficult to prepare and costly. At the same time, since the distance between adjacent pixels of the detector is very small, a large number of carriers generated by avalanche can easily diffuse into adjacent pixels, thereby causing electrical crosstalk between pixels, resulting in reduced resolution and increased false count rate.

[0004] In order to suppress the electrical crosstalk between the above-mentioned pixels, the prior art adds a p-type isolation region between adjacent pixels. The p-type isolation region is located between two adjacent p-type doped regions, which can block the laterally diffused carriers from entering the adjacent pixels. However, as the scale of the array detector expands and the pixel spacing further decreases, the electrical crosstalk between pixels is further deteriorated. Therefore, in the preparation process of the InGaAs / InP single-photon array detector, a step-type structured p-type doped region must be formed. This structure can effectively reduce the edge breakdown effect and thus reduce the dark count rate. In the current preparation process, two high-temperature Zn diffusion processes are usually performed, wherein the doped region formed by the first Zn diffusion is larger and the doping concentration is lower; the doped region formed by the second Zn diffusion is smaller and the doping concentration is higher, forming a step-type p-type doped region in the InP cap layer, and forming a p-type isolation region in the second Zn diffusion. However, this process also has the following problems:

[0005] (1) The P-type doped region of the step structure is formed by two Zn diffusion processes, which is a complex process. Multiple high-temperature treatments will introduce defects into the material, thereby causing a decrease in device performance.

[0006] (2) Since the current P-type isolation region is a shallow groove structure formed on the InP cap layer, it adopts a single Zn diffusion method for regional doping. Therefore, the depth of Zn doping in the P-type isolation region is relatively shallow, and the isolation effect on the lateral diffusion carriers at the deeper position of the cap layer multiplication region is poor, and the effect on suppressing device edge breakdown is limited. Summary of the invention

[0007] The purpose of the present invention is to provide a near-infrared single-photon array detector and a preparation method thereof, so as to solve the technical problems that the existing single-photon array detector has a complex preparation process and poor anti-crosstalk isolation effect.

[0008] In order to achieve the above object, the present invention provides a near-infrared single-photon array detector, which has the following characteristics:

[0009] It comprises a substrate layer, an epitaxial layer arranged on the upper surface of the substrate layer, and an anti-reflection layer arranged on the lower surface of the substrate layer; the anti-reflection layer is provided with a plurality of first electrode windows and a plurality of pixel incident windows which are spaced apart; the bottoms of the plurality of first electrode windows are in contact with the lower surface of the substrate layer, and a pixel cathode metal electrode is arranged in the first electrode window;

[0010] The epitaxial layer comprises a buffer layer, an absorption layer, a gradient layer, a charge layer and a cap layer which are grown sequentially from bottom to top; the buffer layer is close to the substrate layer; and a passivation layer is provided on the side of the cap layer away from the charge layer;

[0011] A plurality of second electrode windows and a plurality of third electrode windows are evenly spaced on the passivation layer, a pixel anode metal electrode is disposed inside each second electrode window, and an isolation region electrode is disposed inside each third electrode window;

[0012] The second electrode window and the third electrode window have the same depth, and the bottoms of both are located in the cap layer; the cap layer and the outer side of the second electrode window form an active diffusion area, and the cap layer and the third electrode window form a diffusion isolation area;

[0013] The diffusion isolation region is a step structure, and its depth is the same as that of the active diffusion region. This structural design can isolate the laterally diffused carriers at deeper positions of the multiplication layer on the one hand, and optimize the electric field distribution at the edge of the central junction on the other hand, thereby better suppressing the edge breakdown of the device.

[0014] Furthermore, the diffusion isolation region includes a shallow isolation region and a deep isolation region arranged from top to bottom, and the width of the shallow isolation region is greater than that of the deep isolation region. The wider shallow isolation region increases the curvature radius of the diffusion isolation region, thereby better suppressing premature breakdown at the junction edge.

[0015] Furthermore, the active diffusion region is a step structure, which includes a shallow diffusion region and a deep diffusion region arranged from top to bottom, and the width of the shallow diffusion region is greater than that of the deep diffusion region. The wider shallow diffusion region increases the curvature radius of the active diffusion region, thereby better suppressing premature breakdown at the junction edge.

[0016] Furthermore, the buffer layer is an n+ type InP layer; the absorption layer is an i type InGaAs layer; the gradient layer is an i type InGaAsP layer; the charge layer is an n type InP layer; and the cap layer is an i type InP layer.

[0017] Furthermore, the substrate layer is an n+ type InP layer, which has a relatively low resistance; the passivation layer is silicon dioxide or silicon nitride, which has a good passivation effect on the surface of the cap layer (ie, the InP layer), and the preparation process is relatively mature.

[0018] In addition, the present invention also provides a method for preparing a near-infrared single-photon array detector, which specifically comprises the following steps:

[0019] Step 1, growing epitaxial layers in sequence on the upper surface of the prepared substrate layer, wherein the epitaxial layers include a buffer layer, an absorption layer, a gradient layer, a charge layer and a cap layer grown in sequence from bottom to top;

[0020] Step 2, growing a passivation layer on the upper surface of the cap layer by an ALD thin film deposition process;

[0021] Step 3, fixing the substrate layer and the epitaxial layer on a supporting device, and thinning the lower surface of the substrate layer;

[0022] Step 4, after growing an anti-reflection layer on the lower surface of the substrate layer by using a PECVD vapor deposition method, the substrate layer and the epitaxial layer on which the anti-reflection layer is grown are peeled off from the support device and cleaned;

[0023] Step 5, photolithography a plurality of second electrode windows and a plurality of third electrode windows which are spaced apart from each other on the passivation layer;

[0024] Step 6, processing an active diffusion region and a diffusion isolation region of a step structure on the outside of the second electrode window and the third electrode window respectively, wherein the bottoms of the active diffusion region and the diffusion isolation region are both located in the cap layer;

[0025] Step 7, washing away the original passivation layer, and growing a passivation layer again on the surface of the cap layer, the active diffusion area and the diffusion isolation area;

[0026] Step 8, preparing a pixel anode metal electrode and an isolation region electrode on the inner sides of the second electrode window and the third electrode window respectively by electron beam evaporation process;

[0027] Step 9, photolithography first electrode windows and pixel incident windows that are spaced apart are formed on the anti-reflection layer;

[0028] Step 10, using a wet etching process to etch the first electrode window to the lower surface of the substrate layer;

[0029] Step 11, prepare a pixel cathode metal electrode in the first electrode window, and perform a rapid annealing treatment on it to obtain a near-infrared single-photon array detector.

[0030] Further, step 6 includes the following steps:

[0031] 6.1, etching the outer sides of the second electrode window and the third electrode window to the upper surface of the cap layer adjacent thereto by a wet etching process;

[0032] 6.2, etching from the upper surface of the cap layer in step 6.1 by a plasma etching process, with an etching depth of 0.5 to 2.0 μm;

[0033] 6.3, using a wet etching process to quickly process the etched area in step 6.2, thereby reducing the surface roughness;

[0034] 6.4, through a closed-tube Zn diffusion process, a step-structured active diffusion region and a diffusion isolation region are processed between the outer sides of the second electrode window and the third electrode window and the cap layer.

[0035] Furthermore, in step 7, the original passivation layer is washed away with HF solution to prevent the passivation layer from being contaminated during Zn diffusion, which would result in a poor passivation effect; and the passivation layer is grown again on the cap layer surface, the active diffusion area and the diffusion isolation area using an ALD thin film deposition process.

[0036] Compared with the prior art, the present invention has the following beneficial effects:

[0037] 1. The near-infrared single-photon array detector of the present invention has a plurality of second electrode windows and a plurality of third electrode windows evenly spaced on the passivation layer, a pixel anode metal electrode is provided on the inner side of each second electrode window, and an isolation region electrode is provided on the inner side of each third electrode window; an active diffusion region is enclosed between the cap layer and the outer sides of the second electrode windows, and a diffusion isolation region is enclosed between the cap layer and the third electrode windows. The diffusion isolation region is a step structure, and its depth is the same as that of the active diffusion region. This structural design can, on the one hand, isolate the laterally diffused carriers at a deeper position of the multiplication layer, and on the other hand, optimize the electric field distribution at the edge of the center junction, better suppress the edge breakdown of the device, and thus improve the isolation effect.

[0038] 2. The detector preparation method of the present invention forms a step-type active diffusion area through a one-step Zn diffusion process, which effectively reduces the edge breakdown probability of the active diffusion area and can achieve effective detection of weak light signals in the near-infrared band under the Geiger mode.

[0039] 3. The detector preparation method of the present invention pre-forms pits in the diffusion isolation area by wet etching and plasma etching, and combines the Zn diffusion process to increase the isolation depth of the diffusion isolation area in the InP cap layer, thereby reducing the electrical crosstalk between pixels.

[0040] 4. The detector preparation method of the present invention grows a passivation layer on the side wall of the etched area through the ALD thin film deposition process, which solves the problem of poor side wall film coverage in the traditional vapor deposition process and improves the surface passivation effect of the etched area.

[0041] 5. The detector preparation method of the present invention realizes the preparation of a pixel structure with good crosstalk characteristics and edge breakdown characteristics through a single Zn diffusion process, and the process difficulty is low, and can be applied to the preparation of large-scale InGaAs avalanche diode arrays in the future. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 It is a structural schematic diagram of an embodiment of a near-infrared single-photon array detector of the present invention.

[0043] The reference numerals are as follows:

[0044] 1-anti-reflection layer, 11-pixel incident window, 12-first electrode window, 2-substrate layer, 3-epitaxial layer, 31-buffer layer, 32-absorption layer, 33-gradient layer, 34-charge layer, 35-cap layer, 36-active diffusion region, 37-diffusion isolation region, 4-passivation layer, 41-second electrode window, 42-pixel anode metal electrode, 43-third electrode window, 44-isolation region electrode. DETAILED DESCRIPTION

[0045] The present invention proposes a back-illuminated planar single-photon detector array with a step-type isolation region and a manufacturing method based on a single Zn diffusion process, which can achieve several purposes: ① By combining pre-thinning (i.e., wet etching and plasma etching in sequence) with a single Zn diffusion process, a simpler manufacturing process is used to form a step-type P-type doping region, reducing the process difficulty. ② A new deep doping isolation structure is designed, which can complete the isolation region preparation by combining pre-thinning and a single Zn diffusion process, thereby improving the device's anti-crosstalk capability.

[0046] The present invention is further described in detail below in conjunction with the accompanying drawings. It should be noted that the embodiments described here are only used for illustration and do not limit the present invention.

[0047] like Figure 1As shown, the present invention provides a near-infrared single-photon array detector, comprising a substrate layer 2, an epitaxial layer 3 arranged on the upper surface of the substrate layer 2, and an anti-reflection layer 1 arranged on the lower surface of the substrate layer 2, wherein the substrate layer 2 is an n+ type InP layer. The anti-reflection layer 1 is provided with a plurality of pixel incident windows 11 and a plurality of first electrode windows 12 which are spaced apart; the bottoms of the plurality of first electrode windows 12 are in contact with the lower surface of the substrate layer 2, and a pixel cathode metal electrode is provided in the first electrode window 12.

[0048] In this embodiment, the epitaxial layer 3 includes a buffer layer 31, an absorption layer 32, a gradient layer 33, a charge layer 34 and a cap layer 35 grown in sequence from bottom to top; wherein the buffer layer 31 is an n+ type InP layer; the absorption layer 32 is an i type InGaAs layer with a thickness of 1μm to 2μm; the gradient layer 33 is an i type InGaAsP layer; the charge layer 34 is an n type InP layer with a thickness of 200nm; and the cap layer 35 is an i type InP layer with a thickness of 3.0μm. The buffer layer 31 is close to the substrate layer 2; the cap layer 35 is provided with a passivation layer 4 on the side away from the charge layer 34, wherein the passivation layer 4 is a silicon dioxide or silicon nitride film.

[0049] A plurality of second electrode windows 41 and a plurality of third electrode windows 43 are evenly spaced on the passivation layer 4, and a pixel anode metal electrode 42 is disposed inside each second electrode window 41, and an isolation region electrode 44 is disposed inside each third electrode window 43. The second electrode windows 41 and the third electrode windows 43 have the same depth, and their bottoms are both located in the cap layer 35; the cap layer 35 and the outer side of the second electrode window 41 enclose an active diffusion region 36, and the third electrode window 43 encloses a diffusion isolation region 37.

[0050] In this embodiment, all diffusion isolation regions 37 are step structures, and their depth is the same as the depth of the active diffusion region 36. The diffusion isolation region 37 includes a shallow isolation region and a deep isolation region arranged from top to bottom, and the width of the shallow isolation region is greater than the width of the deep isolation region. All active diffusion regions 36 are also step structures, which include a shallow diffusion region and a deep diffusion region arranged from top to bottom, and the width of the shallow diffusion region is greater than the width of the deep diffusion region. Through the wider shallow diffusion region and shallow isolation region, the curvature radius of the active diffusion region and the diffusion isolation region is increased, the premature breakdown at the junction edge is better suppressed, and the electrical crosstalk between pixels is further suppressed.

[0051] The key point of the present invention is to design a back-illuminated InGaAs / InP near-infrared single-photon array detector, in which a deep diffusion isolation structure is adopted. Compared with the isolation region structure on the traditional planar array, the isolation structure adopted by the array is pre-etched and thinned on the planar array, and then P-type doping is performed. On the basis of not increasing the process difficulty, the isolation depth of the isolation region is effectively increased, and the anti-crosstalk effect is improved.

[0052] In addition, the present invention also provides a method for preparing a near-infrared single-photon array detector, which specifically comprises the following steps:

[0053] Step 1, using PECVD vapor deposition method to sequentially grow an epitaxial layer 3 on the upper surface of the prepared InP substrate layer 2, the epitaxial layer 3 includes an InP buffer layer 31, an InGaAs absorption layer 32, an InGaAsP gradient layer 33, an InP charge layer 34 and an InP cap layer 35 sequentially grown from bottom to top;

[0054] Step 2: grow a thin film with a thickness of 100 mm on the upper surface of the InP cap layer 35 by an ALD thin film deposition process. SiO2 passivation layer 4;

[0055] Step 3: fix the InP substrate layer 2 and the epitaxial layer 3 on the support device by bonding, and thin the lower surface of the substrate layer 2 by 200 μm by chemical mechanical polishing.

[0056] Step 4: After growing a 200nm to 300nm silicon nitride anti-reflection layer 1 on the lower surface of the substrate layer 2 by PECVD vapor deposition, the InP substrate layer 2 and the epitaxial layer 3 on which the anti-reflection layer 1 is grown are peeled off from the support device and ultrasonically cleaned with ethanol, acetone and deionized water.

[0057] Step 5, photolithography a plurality of second electrode windows 41 and a plurality of third electrode windows 43 which are spaced apart on the passivation layer 4; the second electrode window 41 is a circular window with a diameter of 25 μm-35 μm, and the third electrode window 43 is a long strip window with a width of 2 μm-3 μm.

[0058] Step 6, processing the active diffusion region 36 and the diffusion isolation region 37 of the step structure on the outer sides of the second electrode window 41 and the third electrode window 43 respectively, specifically:

[0059] 6.1, by wet etching process, respectively, the outer sides of the second electrode window 41 and the third electrode window 43 are etched to the upper surface of the adjacent InP cap layer 35;

[0060] 6.2, etching the upper surface of the InP cap layer 35 in step 6.1 by a plasma etching process, with an etching depth of 0.5 to 2.0 μm;

[0061] 6.3, using a wet etching process to quickly process the etched area of ​​step 6.2, thereby reducing surface roughness and defects;

[0062] 6.4. Through a closed-tube Zn diffusion process, a stepped active diffusion region 36 and a diffusion isolation region 37 are processed between the outer sides of the second electrode window 41 and the third electrode window 43 and the cap layer 35, respectively. The bottoms of the active diffusion region 36 and the diffusion isolation region 37 are both located in the InP cap layer 35.

[0063] Step 7, using HF solution to remove the original passivation layer 4, and using ALD process to re-grow the passivation layer 4 on the surface of the InP cap layer 35, the active diffusion area 36 and the diffusion isolation area 37, the passivation layer thickness is 200nm ~ 300nm.

[0064] Step 8: Prepare the pixel anode metal electrode 42 and the isolation region electrode 44 on the inner sides of the second electrode window 41 and the third electrode window 43 respectively by electron beam evaporation process.

[0065] Step 9, photolithography the pixel incident window 11 and the first electrode window 12 which are spaced apart on the anti-reflection layer 1; wherein the pixel incident window 11 is a circular window with a diameter of 50 μm to 55 μm, and the first electrode window 12 is a long strip structure with a width of 2 μm to 3 μm.

[0066] Step 10, using a wet etching process to etch the first electrode window 12 to the lower surface of the substrate layer 2;

[0067] Step 11, prepare a pixel cathode metal electrode in the first electrode window 12 through electron beam evaporation process, and perform rapid annealing treatment on it to ensure that the pixel cathode metal electrode directly forms a good ohmic contact with the semiconductor material, thereby completing the preparation of the near-infrared single photon array detector.

[0068] In addition, compared with the traditional two-time Zn diffusion process, the preparation method of the present invention first pre-etches the doped area (i.e., wet etching and plasma etching), and then uses a single Zn diffusion to form a step-type P-type doping structure on the InP cap layer 35, and at the same time forms a deep diffusion isolation area structure, which reduces the process difficulty. In order to solve the problem of incomplete film coverage on the side of the etching area, the ALD process is used to grow the passivation layer to improve the sidewall passivation effect.

[0069] The working principle of a near-infrared single-photon array detector provided by the present invention is as follows: when working, a reverse bias voltage is applied to the photoelectric avalanche diode array, and the photogenerated carriers collide and ionize in the multiplier to cause avalanche, and the carriers are amplified and cause the APD reverse breakdown (Geiger mode). At this time, the carriers excited by a single photon can trigger an avalanche effect and generate a measurable signal. Through pre-etching of the characteristic area and a Zn diffusion process, an active diffusion area with a step structure is formed in the InP cap layer, which reduces the edge breakdown voltage, increases the length of the isolation area, suppresses the electrical crosstalk between the pixels, and then realizes the parameter optimization of the device dark count rate and imaging resolution. The preparation process is simple and reliable, and can be applied to the preparation of subsequent large-scale arrays.

Claims

1. A method for preparing a near-infrared single-photon array detector, characterized in that: The following steps are involved: Step 1, sequentially growing an epitaxial layer (3) on the upper surface of a prepared substrate layer (2), wherein the epitaxial layer (3) comprises a buffer layer (31), an absorption layer (32), a gradient layer (33), a charge layer (34), and a cap layer (35) sequentially grown from bottom to top; Step 2, growing a passivation layer (4) on the upper surface of the cap layer (35) by an ALD thin film deposition process; Step 3, fixing the substrate layer (2) and the epitaxial layer (3) on a supporting device, and thinning the lower surface of the substrate layer (2); Step 4, after growing an anti-reflection layer (1) on the lower surface of the substrate layer (2) by using a PECVD vapor deposition method, the substrate layer (2) on which the anti-reflection layer (1) is grown and the epitaxial layer (3) are peeled off from the support device and cleaned; Step 5, photolithography a plurality of second electrode windows (41) and a plurality of third electrode windows (43) which are spaced apart from each other on the passivation layer (4); Step 6, processing an active diffusion region (36) with a step structure and a diffusion isolation region (37) with a step structure on the outside of the second electrode window (41) and the third electrode window (43), respectively, wherein the bottoms of the active diffusion region (36) and the diffusion isolation region (37) are both located in the cap layer (35); specifically: 6.1, etching the outer sides of the second electrode window (41) and the third electrode window (43) to the upper surface of the cap layer (35) adjacent thereto by a wet etching process; 6.2, etching the upper surface of the cap layer (35) in step 6.1 by a plasma etching process, with the etching depth being 0.5-2.0 μm; 6.3, using a wet etching process to quickly process the etched area in step 6.2, thereby reducing the surface roughness; 6.4, by a closed-tube Zn diffusion process, a step-structured active diffusion region (36) and a diffusion isolation region (37) are respectively processed between the outer sides of the second electrode window (41) and the third electrode window (43) and the cap layer (35); Step 7, washing away the original passivation layer (4), and growing a passivation layer (4) again on the surface of the cap layer (35), the active diffusion region (36) and the diffusion isolation region (37); Step 8, preparing a pixel anode metal electrode (42) and an isolation region electrode (44) on the inner sides of the second electrode window (41) and the third electrode window (43) respectively by electron beam evaporation process; Step 9, photolithography is performed on the anti-reflection layer (1) to form first electrode windows (12) and pixel incident windows (11) that are spaced apart from each other; Step 10, using a wet etching process to etch the first electrode window (12) to the lower surface of the substrate layer (2); Step 11, preparing a pixel cathode metal electrode in the first electrode window (12), and performing a rapid annealing treatment on the cathode metal electrode, thereby obtaining a near-infrared single-photon array detector.

2. The method for preparing the near-infrared single-photon array detector according to claim 1, characterized in that: In step 7, the original passivation layer (4) is washed away with an HF solution; and the passivation layer (4) is grown again on the surface of the cap layer (35), the active diffusion region (36) and the diffusion isolation region (37) using an ALD thin film deposition process.

3. A near-infrared single-photon array detector, prepared by the method for preparing a near-infrared single-photon array detector according to claim 1 or 2, characterized in that: It comprises a substrate layer (2), an epitaxial layer (3) arranged on the upper surface of the substrate layer (2), and an anti-reflection layer (1) arranged on the lower surface of the substrate layer (2); the anti-reflection layer (1) is provided with a plurality of pixel incident windows (11) and a plurality of first electrode windows (12) which are spaced apart; the bottoms of the plurality of first electrode windows (12) are in contact with the lower surface of the substrate layer (2), and a pixel cathode metal electrode is provided in the first electrode window (12); The epitaxial layer (3) comprises a buffer layer (31), an absorption layer (32), a gradient layer (33), a charge layer (34) and a cap layer (35) grown in sequence from bottom to top; the buffer layer (31) is close to the substrate layer (2); and a passivation layer (4) is provided on a side of the cap layer (35) away from the charge layer (34); A plurality of second electrode windows (41) and a plurality of third electrode windows (43) are evenly spaced on the passivation layer (4), a pixel anode metal electrode (42) is provided on the inner side of each second electrode window (41), and an isolation region electrode (44) is provided on the inner side of each third electrode window (43); The second electrode window (41) and the third electrode window (43) have the same depth, and their bottoms are both located within the cap layer (35); the cap layer (35) and the outer side of the second electrode window (41) form an active diffusion region (36), and the cap layer (35) and the third electrode window (43) form a diffusion isolation region (37); The diffusion isolation region (37) is a step structure formed by a single Zn diffusion process, and its depth is the same as the depth of the active diffusion region (36); the diffusion isolation region (37) comprises a shallow isolation region and a deep isolation region arranged from top to bottom, and the width of the shallow isolation region is greater than the width of the deep isolation region.

4. The near-infrared single-photon array detector according to claim 3, characterized in that: The active diffusion region (36) is a step structure, comprising a shallow diffusion region and a deep diffusion region arranged from top to bottom, and the width of the shallow diffusion region is greater than the width of the deep diffusion region.

5. The near-infrared single-photon array detector according to claim 4, characterized in that: The buffer layer (31) is an n+ type InP layer; The absorption layer (32) is an i-type InGaAs layer; The gradient layer (33) is an i-type InGaAsP layer; The charge layer (34) is an n-type InP layer; The cap layer (35) is an i-type InP layer.

6. The near-infrared single-photon array detector according to claim 5, characterized in that: The substrate layer (2) is an n+ type InP layer; The passivation layer (4) is silicon dioxide or silicon nitride.

Citation Information

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