Linear topology slave node synchronization method and system based on IEEE 1588 precision clock protocol

Abstract

The application discloses a linear topology slave node synchronization method and system based on IEEE 1588 precision clock protocol, and the method comprises the following steps: step one, slave node 1 to slave node n-1 accepts PTP messages from a master node and forwards the PTP messages to the next level; step two, slave node 1 to slave node n-1 accepts PTP messages from slave node n and forwards the PTP messages to the previous level; step three, slave node 1 to slave node n takes an average value of round trip time to obtain an average link delay; step four, the master-slave clock offset is calculated according to the average transmission delay; and step five, dynamic frequency compensation calculation is performed. The application can increase the synchronization accuracy of the system and effectively reduce the clock deviation between nodes in the distributed system of the linear topology structure.

Description

Technical Field

[0001] This invention belongs to the field of high-speed industrial Ethernet bus technology, specifically relating to a linear topology slave node synchronization method and system based on the IEEE 1588 precision clock protocol. Background Technology

[0002] As the application scope and scale of distributed networks continue to expand, the consistency of clocks among distributed nodes within a distributed system becomes increasingly important. Precise time synchronization technology plays an increasingly crucial role in distributed systems, especially in linear topology systems, the topology of which can be found in [reference needed]. Figure 2 As shown. Clock synchronization problems mainly arise from latency and frequency issues. Latency issues primarily include link latency and internal processing latency. Link latency occurs because data transmission from the master node to the slave node, and vice versa, takes time. Internal processing latency arises because data processing between the master and slave nodes takes time, and the internal processing latency varies between different slave nodes, and even within the same slave node, it fluctuates at different times. Frequency issues arise because the master node and each slave node rely on their own local crystal oscillators to generate pulses, and counters rely on these pulses to trigger counting. Although these local crystal oscillators theoretically have the same frequency, in practice, these independent crystal oscillators fluctuate within a small range of their theoretical values. This causes the time deviation between nodes to gradually diverge as the system runs longer. The consequences of these two problems can lead to data delays, resulting in larger errors in real-time control and measurement functions.

[0003] Traditional clock synchronization methods mainly include IRIG-B code, Network Time Protocol (NTP), and Global Positioning System (GPS). IRIG-B code is divided into pulse synchronization and serial port synchronization. Pulse synchronization offers high accuracy but cannot directly provide time information, while serial port synchronization is less accurate than pulse synchronization. NTP, on the other hand, only provides millisecond-level synchronization accuracy and can only be used in applications where high synchronization precision is not required. GPS synchronization can achieve microsecond-level accuracy, but it requires specialized equipment such as GPS receivers, which is not only costly but also difficult to implement. Therefore, a low-cost, high-precision clock synchronization method is needed. Summary of the Invention

[0004] The purpose of this invention is to solve the clock synchronization problem in distributed systems with linear topology, and to propose a method and system for synchronizing slave nodes in linear topology based on the IEEE 1588 precision clock protocol.

[0005] The technical solution adopted by the present invention to solve the above problems is as follows:

[0006] The specific steps of the linear topology slave node synchronization method based on the IEEE 1588 precision clock protocol are as follows:

[0007] Step 1: Receive PTP packets from the master node from node 1 to slave node n-1, and forward the PTP packets to the next level.

[0008] Step 2: Node 1 receives PTP packets from slave node n and forwards them to the next higher level.

[0009] Step 3: Take the average round-trip time from node 1 to node n to obtain the average link delay.

[0010] Step 4: Calculate the master-slave clock offset based on the average transmission delay.

[0011] Step 5: Perform dynamic frequency compensation calculation.

[0012] Furthermore, in both steps one and two, the data forwarding module from node 1 to node n-1 has the same internal processing delay.

[0013] Furthermore, in step three, the formula for calculating the average master-slave link delay is as follows:

[0014]

[0015]

[0016]

[0017] In formula (1), Mean_delay 1 represents the average link delay between the first slave node and the master node; in formula (2), Mean_delay 2 represents the average link delay between the second slave node and the master node; and in formula (3), Mean_delay n represents the average link delay between the nth slave node and the master node. T1 represents the timestamp of the master node device sending the Sync message, and T... n 2 represents the timestamp of the nth slave node receiving the Sync message, and T represents the timestamp of the nth slave node receiving the Sync message. n 3 is the timestamp of the nth slave node sending the Delay_req message, and T4 is the timestamp of the master node receiving the Delay_req message.

[0018] Furthermore, in step four, the formula for calculating the clock offset is:

[0019] Offset = T n 2-T1-Mean_delay n (4)

[0020] In formula (4), T n2 represents the timestamp of the nth slave node receiving the Sync message, T1 represents the timestamp of the master node sending the Sync message, and Mean_delay n represents the average link transmission delay of the nth slave node.

[0021] Further, in step five, dynamic frequency compensation calculation is performed based on the timestamps obtained in step three.

[0022] Furthermore, in step five, the dynamic frequency compensation calculation formula is as follows:

[0023] MCC = T2 M1 -T1 M1 (5)

[0024] SCC = T2 S1 -T1 S1 (6)

[0025] MSC=|MCC-SCC| (7)

[0026] γ=SCC / MSC (8)

[0027] In formula (5), MCC represents the master clock transmission interval, T2 M1 T1 represents the timestamp of the (n+1)th Sync message sent by the master clock. M1 This represents the timestamp of the nth Sync message sent by the master clock. In formula (6), SCC represents the time interval received from the clock, and T2... S1 T1 represents the timestamp of the (n+1)th time a Sync message is received from the clock. S1 This represents the timestamp of the nth time the Sync message is received from the clock. In formula (7), MSC represents the clock offset between the master and slave clock transmission intervals, and in formula (8), γ represents the time ratio between the master and slave clocks.

[0028] Furthermore, the value of MSC is determined. If the highest bit is 1, it means that the master clock frequency is higher than the slave clock frequency. In this case, the slave clock's ns counter decrements by 1 every time the γ value increases. Conversely, the ns counter increments by 1.

[0029] This invention also discloses a system based on the above-described linear topology slave node synchronization method, which includes the following modules:

[0030] Data parsing module: used to parse PTP packets;

[0031] Data forwarding module: Parses PTP packets;

[0032] Average link delay calculation module: The average link delay is obtained by averaging the round-trip time from node 1 to node n;

[0033] Clock skew calculation module: Calculates master-slave clock skew based on average transmission delay;

[0034] Frequency compensation calculation module: performs dynamic frequency compensation calculations.

[0035] The beneficial effects of this invention are:

[0036] For distributed systems with linear topology, which suffer from uncertainties in transmission delay and clock skew, this invention provides a linear topology slave node synchronization method based on the IEEE 1588 precision clock protocol. This invention can improve the clock synchronization accuracy of each node in the distributed system and reduce the synchronization error when each node outputs synchronously. Attached Figure Description

[0037] Figure 1 This is a flowchart of a slave clock synchronization method based on the IEEE 1588 precision clock protocol;

[0038] Figure 2 It is a linear topological structure diagram;

[0039] Figure 3 This is a schematic diagram of PTP transmission principle;

[0040] Figure 4 This is a performance comparison chart of the dynamic frequency compensation algorithm with different numbers of slave nodes. Detailed Implementation

[0041] The present invention will be further described below with reference to preferred embodiments and accompanying drawings.

[0042] like Figure 2 As shown, the IEEE 1588 protocol uses PTP messages to carry timestamps, with the master node representing the master clock and the slave node representing the slave clock. This embodiment describes a linear topology slave node synchronization method based on the IEEE 1588 precision clock protocol, with the following specific steps:

[0043] Step 1: The master node periodically sends Sync messages and encapsulates the sending timestamp into Follow_up messages before sending.

[0044] Step 2: Node 1 receives the Sync message, records the timestamp of receipt, and sends it to the next slave node through the data forwarding module.

[0045] Step 3: Receive Follow_up messages from node 1, forward and parse the sending time of Sync messages.

[0046] Step 4: Follow steps 2 and 3 until Sync and Follow_up messages are received from node n.

[0047] Step 5: Generate a Delay_req message from node n, send it to the previous slave node, and record the sending timestamp.

[0048] Step 6: Receive the Delay_req message from node n-1 and forward it to node n-2 via the data forwarding module, recording the timestamp of the message.

[0049] Step 7: Follow the steps in step 6 until the master node receives the Delay_req message and records the timestamp of receipt.

[0050] Step 8: The master node generates a Delay_resp message, encapsulates the receive timestamp of the Delay_req message, and sends it to the slave node.

[0051] Step 9: Each slave node receives the Delay_resp message and forwards it through the data forwarding module until the last slave node.

[0052] Step 10: Each slave node calculates the average link delay and clock skew.

[0053]

[0054]

[0055]

[0056] Offset = T n 2-T1-Mean_delay n (4)

[0057] Step 11 is repeated in a loop from Step 1 to Step 10, while simultaneously performing clock offset and transmission delay compensation.

[0058] Step 12: In the second and subsequent loop cycles, perform dynamic frequency compensation based on the obtained timestamps.

[0059] MCC = T2 M1 -T1 M1 (5)

[0060] SCC = T2 S1 -T1 S1 (6)

[0061] MSC=|MCC-SCC| (7)

[0062] γ=SCC / MSC (8)

[0063] First, determine the value of MSC. If the highest bit is 1, it means that the master clock frequency is higher than the slave clock frequency. In this case, the slave clock's ns counter decrements by 1 every time the γ value increases. Conversely, the ns counter increments by 1.

[0064] The invention was tested, and the results are shown in Table 1. The average time deviation distribution of the second slave node was 20.79 ns, the maximum deviation was 80 ns, and the minimum deviation was 0 ns. The average time deviation distribution of the fourth slave node was 36.2 ns, the maximum deviation was 100 ns, and the minimum deviation was 0 ns. The average time deviation values ​​of the two slave nodes demonstrate that the proposed method can significantly improve the synchronization accuracy of the master and slave nodes.

[0065] Table 1. Performance comparison of dynamic frequency compensation algorithm with different numbers of slave nodes.

[0066]

[0067] Figure 3 The diagram illustrates the principle of timestamp extraction. During a synchronization process, the latency of each slave node includes link latency and internal latency. Internal latency includes T... MS d11, T MS d21, T MS d(n-1)1、T SM d1, T SM 2. T SM n-1 and T MS d12, T MS d22, T MS d(n-1)2、T MS d13, T MS d23, T MS d(n-1)3,T MS d11, T MS d21, T MS d(n-1)1 represents the internal delay of the first slave node, the second slave node, and the (n-1)th slave node in receiving and forwarding the Sync message, respectively; T MS d12, T MS d22, T MS d(n-1)2 represents the internal delay of the first slave node, the second slave node, and the (n-1)th slave node in receiving and forwarding the Follow_up message, respectively; T SM d1, T SM d2, T SM d(n-1) represent the internal delays for the first slave node, the second slave node, and the (n-1)th slave node to receive and forward the Delay_req message, respectively; T MS d13, T MS d23, T MSd(n-1)3 represents the internal delay of the first slave node, the second slave node, and the (n-1)th slave node in receiving and forwarding the Delay_resp message. Link delay includes cable transmission.

[0068] This invention uses the same network cable to alleviate issues such as uneven link latency between slave nodes and between slave and master nodes. It employs a parallel approach to data forwarding and processing, with internal latency caused only by the data forwarding module. This eliminates the problem of uneven data forwarding latency between different slave nodes during a single synchronization process; it eliminates the problem of uneven data forwarding latency during each synchronization process; and it eliminates the problem of inconsistent data forwarding latency during each synchronization process.

[0069] T MS d(n-1)1=T MS d(n-1)2=T SM d(n-1)=T MS d(n-1)3

[0070] This invention employs a parallel approach of data forwarding and data processing. Whenever data is received from a node, a timestamp of the received data is recorded, and the data simultaneously enters both the data forwarding module and the data parsing module. When the data parsing module determines that the packet is not a PTP packet, the recorded timestamp is discarded.

[0071] like Figure 4 As shown, this invention employs a dynamic frequency compensation method. During each synchronization process, dynamic frequency compensation is performed by acquiring timestamps in real time. Each slave node can dynamically and in real-time control the clock deviation between its local clock and the master clock. This design can solve the technical problem of low clock synchronization accuracy caused by transmission delay and clock skew in linear topology distributed systems.

[0072] This invention also discloses a system based on the above-described linear topology slave node synchronization method, which includes the following modules:

[0073] Data parsing module: used to parse PTP packets;

[0074] Data forwarding module: forwards PTP packets;

[0075] Average link delay calculation module: The average link delay is obtained by averaging the round-trip time from node 1 to node n;

[0076] Clock skew calculation module: Calculates master-slave clock skew based on average transmission delay;

[0077] Frequency compensation calculation module: Performs dynamic frequency compensation calculation based on the obtained timestamp.

[0078] To address the clock synchronization problems in linear topology distributed systems, this invention discloses a linear topology slave node synchronization method and system based on the IEEE 1588 Precision Clock Protocol. This invention improves the clock synchronization accuracy of nodes in a distributed system and reduces synchronization errors during node synchronization output. The invention mainly includes timestamp extraction between master and slave nodes, transmission delay measurement, dynamic frequency compensation, and performance testing of the compensated synchronization accuracy. The transmission delay measurement, through a data forwarding module, ensures that the internal delay of each node is equal and constant during each synchronization process. The dynamic frequency compensation dynamically compensates for the clock frequency of each slave node by obtaining the timestamp in real time. The IEEE 1588 protocol uses PTP messages to carry the timestamp, with the clock represented by the master node being the master clock and the clock represented by the slave node being the slave clock. This invention increases the synchronization accuracy of a linear topology distributed system while effectively reducing clock deviations between nodes.

[0079] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent substitutions, and improvements made to the above embodiments without departing from the scope of the present invention, based on the technical essence of the present invention and within the spirit and principles of the present invention, shall still fall within the protection scope of the present invention.

Claims

1. A linear topology slave node synchronization method based on the IEEE 1588 precision clock protocol, characterized by specific... The steps are as follows: Step 1: Receive PTP packets from the master node from node 1 to node n-1, and forward the PTP packets to the next level; Step 2: Receive PTP packets from slave node n from slave node n-1 and forward the PTP packets to the next higher level; Step 3: Calculate the average link delay by averaging the round-trip times from node 1 to node n. In this step, the formula for calculating the average master-slave link delay is: In formula (1), Mean_delay 1 represents the average link delay between the first slave node and the master node; in formula (2), Mean_delay 2 represents the average link delay between the second slave node and the master node; in formula (3), Mean_delay n represents the average link delay between the nth slave node and the master node. T1 represents the timestamp of the master node device sending the Sync message. n 2 represents the timestamp of the nth slave node receiving the Sync message, and T represents the timestamp of the nth slave node receiving the Sync message. n 3 is the timestamp of the nth slave node sending the Delay_req message, and T4 is the timestamp of the master node device receiving the Delay_req message; Step 4: Calculate the master-slave clock offset based on the average link delay; Step 5: Perform dynamic frequency compensation calculation.

2. The linear topology slave node synchronization method based on the IEEE 1588 precision clock protocol according to claim 1, characterized in that: In both Step 1 and Step 2, the data forwarding from Node 1 to Node n has the same internal processing delay.

3. The linear topology slave node synchronization method based on the IEEE 1588 precision clock protocol according to claim 1, characterized in that: In step four, the formula for calculating the clock offset is: In formula (4), T n 2 represents the timestamp of the nth slave node receiving the Sync message, T1 represents the timestamp of the master node sending the Sync message, and Mean_delay n represents the average link delay of the nth slave node.

4. The linear topology slave node synchronization method based on the IEEE 1588 precision clock protocol according to claim 3, characterized in that: In step five, the dynamic frequency compensation calculation formula is as follows: In formula (5), MCC represents the master clock transmission interval, T2 M1 T1 represents the timestamp of the (n+1)th Sync message sent by the master clock. M1 The timestamp of the nth Sync message sent by the master clock is represented; in formula (6), SCC represents the time interval received from the clock, T2 S1 T1 represents the timestamp of the (n+1)th time a Sync message is received from the clock. S1 The timestamp of the nth time the Sync message is received from the clock is indicated; in formula (7), MSC represents the clock offset between the master and slave clocks; in formula (8), γ represents the time ratio between the master and slave clocks.

5. The linear topology slave node synchronization method based on the IEEE 1588 precision clock protocol according to claim 4, characterized in that: To determine the value of MSC, if the highest bit is 1, it means that the master clock frequency is higher than the slave clock frequency. In this case, the slave clock's ns counter decrements by 1 every time the γ value increases. Conversely, the ns counter increments by 1.

6. A system based on the linear topology slave node synchronization method according to any one of claims 1-5, characterized in that: Includes the following modules: Data parsing module: used to parse PTP packets; Data forwarding module: forwards PTP packets; Average link delay calculation module: The average link delay is obtained by averaging the round-trip time from node 1 to node n; Clock skew calculation module: Calculates master-slave clock skew based on average link delay; Frequency compensation calculation module: performs dynamic frequency compensation calculations.

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