Data synchronization method, baseband unit, electronic device, and storage medium

Abstract

This disclosure provides a data synchronization method, a baseband unit, an electronic device, and a storage medium. The method includes: an auxiliary unit generating synchronization information and transmitting the synchronization information to a host unit via a synchronization interface; the host unit obtaining the synchronization information from the auxiliary unit via the synchronization interface; the host unit performing synchronization processing based on the synchronization information to synchronize the host unit with the auxiliary unit; the host unit generating a synchronization pointer based on the synchronization information; and the host unit sending baseband data based on the synchronization pointer. This method simplifies the processing procedure of the auxiliary unit and reduces the latency introduced during data processing between the baseband data and the auxiliary unit.

Description

Technical Field

[0001] This disclosure relates to the field of communication technology, and in particular to a data synchronization method, a baseband unit, an electronic device, and a storage medium. Background Technology

[0002] The 5G extended active indoor small cell system consists of three parts: a baseband unit, an extension unit, and a radio frequency (RF) unit. The baseband unit primarily performs functions such as baseband signal modulation and demodulation, radio resource management, physical layer processing, and device status monitoring. The extension unit primarily performs data splitting and merging, and data forwarding. The RF unit primarily performs RF processing and wireless signal transmission and reception. To improve computing power, the baseband unit incorporates a hardware auxiliary subsystem, offloading encoding / decoding and fronthaul functions to this subsystem. Baseband data is forwarded via a hardware interface, synchronized by the baseband hardware subsystem, and then distributed to the extension unit via the fronthaul interface.

[0003] In related technologies, baseband data uses a passive synchronization method. The host unit of the baseband system needs to poll the synchronization signal provided by the auxiliary subsystem to trigger the transmission of baseband data. Due to the error in the polling time, two data blocks need to be stored in the buffer each time, resulting in a large overall latency.

[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this disclosure is to provide a data synchronization method, a baseband unit, an electronic device, and a storage medium, which simplifies the processing of the auxiliary unit and reduces the latency introduced during the data processing between the baseband data and the auxiliary unit.

[0006] Other features and advantages of this disclosure will become apparent from the following detailed description, or may be learned in part from practice of this disclosure.

[0007] This disclosure provides a data synchronization method executed by a baseband unit, which includes a host unit and an auxiliary unit. The method includes: the auxiliary unit generating synchronization information and transmitting the synchronization information to the host unit through a synchronization interface; the host unit obtaining the synchronization information from the auxiliary unit through the synchronization interface; the host unit performing synchronization processing based on the synchronization information to synchronize the host unit with the auxiliary unit; the host unit generating a synchronization pointer based on the synchronization information; and the host unit sending baseband data based on the synchronization pointer.

[0008] In an exemplary embodiment, the synchronization information includes a clock pulse signal with a fixed phase deviation; wherein, the host unit performs synchronization processing based on the synchronization information, including: the host unit synchronizing its clock network to the clock pulse signal.

[0009] In an exemplary embodiment, the synchronization information includes a time information signal; wherein, the host unit generates a synchronization pointer based on the synchronization information, including: the host unit parses the time information signal to obtain time information; and the host unit generates synchronization pointers with equal intervals based on the time information.

[0010] In an exemplary embodiment, the auxiliary unit generates synchronization information, including: the auxiliary unit generates synchronization information and simultaneously generates a local data extraction pointer signal; the method further includes: the auxiliary unit extracts the baseband data according to the local data extraction pointer signal.

[0011] In an exemplary embodiment, the synchronization information includes a 10ms pulse signal with a fixed phase deviation; wherein, the host unit performs synchronization processing based on the synchronization information, including: the host unit synchronizing its clock network to the 10ms pulse signal.

[0012] In an exemplary embodiment, the host unit generates a synchronization pointer based on the synchronization information, including: the host unit parses the 10ms pulse signal to obtain time information; and the host unit generates synchronization pointers with equal intervals based on the time information.

[0013] In an exemplary embodiment, the auxiliary unit generates synchronization information, including: the auxiliary unit generates synchronization information and simultaneously generates a local data extraction pointer signal; the method further includes: the auxiliary unit extracts the baseband data according to the local data extraction pointer signal.

[0014] This disclosure provides a baseband unit, which includes a host unit and an auxiliary unit. The auxiliary unit generates synchronization information and transmits the synchronization information to the host unit through a synchronization interface. The host unit obtains the synchronization information from the auxiliary unit through the synchronization interface. The host unit performs synchronization processing based on the synchronization information to synchronize the host unit with the auxiliary unit. The host unit generates a synchronization pointer based on the synchronization information. The host unit sends baseband data based on the synchronization pointer.

[0015] This disclosure provides an electronic device, including: at least one processor; and a storage terminal device for storing at least one program, which, when executed by the at least one processor, causes the at least one processor to implement any of the above-described data synchronization methods.

[0016] This disclosure provides a computer-readable storage medium storing a computer program thereon, characterized in that the computer program, when executed by a processor, implements any of the above-described data synchronization methods.

[0017] The data synchronization method provided in this disclosure allows an auxiliary unit to transmit generated synchronization information to a host unit via a synchronization interface. The host unit performs synchronization processing using this information and generates a synchronization pointer. The host unit then sends baseband data via the synchronization pointer, enabling the auxiliary unit to retrieve the baseband data. Compared to related technologies, this method simplifies the processing of the auxiliary unit, reduces the chip processing capacity, lowers hardware costs, and reduces latency introduced during data processing between the baseband data and the auxiliary unit.

[0018] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0020] Figure 1 A schematic diagram of baseband data processing in related technologies is shown.

[0021] Figure 2 A flowchart illustrating a data synchronization method according to an exemplary embodiment is shown.

[0022] Figure 3 This is a data synchronization framework diagram of a distributed base station as shown in the example.

[0023] Figure 4 This is a schematic diagram of baseband data processing based on an example.

[0024] Figure 5 This is a flowchart illustrating another data synchronization method according to an exemplary embodiment.

[0025] Figure 6 This is a flowchart illustrating another data synchronization method according to an exemplary embodiment.

[0026] Figure 7 This is a block diagram of a baseband unit according to an exemplary embodiment.

[0027] Figure 8 This is a schematic diagram of the structure of an electronic device according to an exemplary embodiment. Detailed Implementation

[0028] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0029] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor terminal devices and / or microcontroller terminal devices.

[0030] The 5G extended active indoor small cell system consists of three parts: a baseband unit (BBU), an extension unit, and a radio frequency (RF) unit. The baseband unit primarily performs functions such as baseband signal modulation and demodulation, radio resource management, physical layer processing, and device status monitoring. The extension unit primarily performs data splitting and merging, and data forwarding. The RF unit primarily performs RF processing and wireless signal transmission and reception. To improve computing power, the baseband unit incorporates a hardware auxiliary subsystem, offloading encoding / decoding and fronthaul functions to this subsystem. Baseband data is forwarded via a hardware interface, synchronized by the baseband hardware subsystem, and then distributed to the extension unit via the fronthaul interface.

[0031] In related technologies, baseband data adopts a passive synchronization method. The host unit of the baseband system needs to poll the synchronization signal provided by the auxiliary subsystem to trigger the transmission of baseband data. Due to the error in the polling time, two data blocks need to be stored in the buffer each time, and the overall data synchronization work will be delayed by one symbol.

[0032] Figure 1 A schematic diagram of baseband data processing in related technologies is shown.

[0033] Specifically, after the protocol stack starts, the baseband data blocks undergo counting, placing the first two data blocks into two buffers. Simultaneously, a polling mechanism is used to determine the data channel upload flag. When the flag is detected, data is forwarded to the hardware subsystem's buffer via the hardware interface, using a ping-pong operation for filling. The logic processing unit also uses a ping-pong operation to extract data from the buffer, placing even-numbered bits into the lower buffer and odd-numbered bits into the higher buffer. The hardware subsystem uses its own generated pointer signal to extract data from the buffer, ultimately synchronizing it to the synchronization pointer, completing the baseband data synchronization between the main and auxiliary units. A detailed data processing diagram is shown below. Figure 1 As shown, Data0, Data1, Data2, Data3, Data4, and Data5 represent the baseband data sent by the host unit of the baseband system. Dma_buffer0_low and Dma_buffer0_high represent two buffers. Buffer0_low and Buffer1_high represent two buffers of the hardware subsystem. Data0_acc, Data1_acc, Data2_acc, Data3_acc, Data4_acc, and Data5_acc represent the data processed by the auxiliary subsystem through the synchronization pointer. The overall data between the baseband data and the auxiliary subsystem will have a delay of more than one data block.

[0034] To address the technical problems existing in the aforementioned related technologies, this disclosure provides a knowledge graph entity domain conflict detection method to solve at least one or all of the aforementioned technical problems.

[0035] Figure 2 A flowchart illustrating a data synchronization method according to an exemplary embodiment is shown.

[0036] The method provided in this disclosure can be executed by any electronic device with computing capabilities, such as the baseband unit in a 5G extended active indoor small cell system. The baseband unit may include a host unit (also known as a main synchronization unit) and an auxiliary unit (also known as an auxiliary system or hardware auxiliary subsystem).

[0037] Figure 3 This is a data synchronization framework diagram of a distributed base station as shown in the example.

[0038] refer to Figure 3The baseband unit includes layer 2 and layer 3 protocol stacks, a layer 1 protocol stack, and a host unit. The host unit includes Cell / Antenna framing and a BBU host unit buffer. In addition to the existing protocol stack processing, the host unit adds BMC (Best Clock Priority Algorithm). The auxiliary unit (also called the auxiliary subsystem) includes a DMA (Direct Memory Access) module and a CLK module. The auxiliary unit transmits the encoded clock and time information (CLK / time coding) to the host unit via an out-of-band interface in the form of PTP (Precision Time Synchronization Protocol) / syncE, achieving clock time synchronization. After clock time synchronization, the host unit's data buffer and the auxiliary unit's data parsing are processed by the synchronization clock, ultimately achieving data synchronization between the host unit and the auxiliary unit.

[0039] like Figure 2 As shown, the data synchronization method provided in this disclosure embodiment may include the following steps.

[0040] In step S202, the auxiliary unit generates synchronization information and transmits the synchronization information to the host unit through the synchronization interface.

[0041] In this embodiment of the present disclosure, before step S202, after the device is started, configuration information is sent out, and the auxiliary unit obtains the timing information of the synchronization source through the external synchronization interface in order to synchronize the auxiliary unit to the external synchronization source.

[0042] In this embodiment of the present disclosure, the auxiliary unit can generate synchronization information, which includes, but is not limited to, clock pulse signals, timestamp information, etc., and the synchronization information can be transmitted through a separate synchronization channel.

[0043] In an exemplary embodiment, the synchronization information may include a clock pulse signal with a fixed phase deviation, and may also include a TOD (time of day) signal.

[0044] In an exemplary embodiment, the synchronization information may include a 10ms pulse signal with a fixed phase deviation.

[0045] In an exemplary embodiment, the auxiliary unit can generate a local data extraction pointer signal while generating synchronization information.

[0046] In step S204, the host unit obtains synchronization information from the auxiliary unit through the synchronization interface.

[0047] In step S206, the host unit performs synchronization processing based on synchronization information to synchronize the host unit with the auxiliary unit.

[0048] In this embodiment of the present disclosure, the host unit can obtain synchronization information through the synchronization interface, perform corresponding parsing, and then perform master-slave synchronization. If the synchronization information includes a clock pulse signal, the clock frequency and phase information can be obtained and the host unit can perform synchronization processing to complete the synchronization of the host unit's clock network to the received clock pulse signal. If the synchronization information includes timestamp information, the time information can be parsed to obtain the time information and time synchronization can be performed through a time synchronization mechanism.

[0049] In this embodiment of the disclosure, the pulse signal acquired by the host unit can serve as both a clock frequency and a data block start pointer.

[0050] In an exemplary embodiment, the host unit may synchronize its clock network to a clock pulse signal; or, the host unit may synchronize its own clock network to a 10ms pulse signal.

[0051] In step S208, the host unit generates a synchronization pointer based on the synchronization information.

[0052] In this embodiment of the present disclosure, the host unit can generate a synchronization pointer based on the pulse signal in the synchronization information. The pulse signal provided by the auxiliary unit may include a start pointer. The host unit can calculate and generate a pointer for each data block based on the start pointer provided by the auxiliary unit, which serves as the flag information for the host unit to send out data blocks. Alternatively, the host unit can generate the flag information for sending out data blocks by means of synchronization time information and time intervals.

[0053] In an exemplary embodiment, the host unit may parse the time information signal to obtain time information and generate synchronization pointers with equal intervals based on the time information; or, the host unit may parse the 10ms pulse signal to obtain time information and generate synchronization pointers with equal intervals based on the time information.

[0054] In step S210, the host unit sends baseband data according to the synchronization pointer.

[0055] In this embodiment of the disclosure, when the host unit sends data through the above-mentioned data block synchronization pointer, it can complete the sending of data information between separated flag bits. The host unit can send data at a fixed position. The data block is not a single data information and can be adjusted by the number of antennas it carries.

[0056] In this embodiment of the disclosure, the host unit can sample the system clock generated, and when the synchronization pointer is obtained, it sends down baseband data information, fills the baseband data information into the buffer area provided by the hardware interface, and waits for the auxiliary unit to extract it.

[0057] In an exemplary embodiment, the above method may further include: an auxiliary unit extracting baseband data based on a local data extraction pointer signal.

[0058] In this embodiment of the present disclosure, the auxiliary unit can extract baseband data from the buffer area based on the local data extraction pointer signal it generates.

[0059] Figure 4 This is a schematic diagram of baseband data processing based on an example.

[0060] refer to Figure 4 Data0, Data1, Data2, Data3, Data4, and Data5 represent baseband data sent by the host unit of the baseband system; Dma_buffer0_low, Dma_buffer0_high, Dma_buffer1_low, Dma_buffer1_high, Dma_buffer2_low, and Dma_buffer2_high represent the buffers; and Data0_acc, Data1_acc, Data2_acc, Data3_acc, Data4_acc, and Data5_acc represent the data processed by the auxiliary unit using the synchronization pointer. Figure 4 As can be seen from the embodiments of this disclosure, the data synchronization method provided simplifies the processing of the auxiliary unit and reduces the delay introduced during the data processing between the baseband data and the auxiliary unit compared to the data synchronization methods in related technologies.

[0061] The data synchronization method provided in this disclosure allows an auxiliary unit to transmit generated synchronization information to a host unit via a synchronization interface. The host unit performs synchronization processing using this information and generates a synchronization pointer. The host unit then sends baseband data via the synchronization pointer, enabling the auxiliary unit to retrieve the baseband data. Compared to related technologies, this method utilizes only a single layer of buffering, simplifying the auxiliary unit's processing, reducing the chip's processing capacity, lowering hardware costs, and minimizing latency introduced during data processing between baseband data and the auxiliary unit.

[0062] Furthermore, in this embodiment, the baseband data processing method adopts a phase synchronization method, which improves the synchronization accuracy of data processing compared to the polling detection method in related technologies. At the same time, it reduces the data processing latency of the auxiliary unit, reduces the application of data cache, reduces the capacity of the processing chip, and saves costs.

[0063] Figure 5 This is a flowchart illustrating another data synchronization method according to an exemplary embodiment.

[0064] like Figure 5 As shown, the data synchronization method provided in this disclosure embodiment may include the following steps.

[0065] In step S501, the protocol stack is started.

[0066] In this embodiment of the disclosure, the protocol stack startup may include device power-on, main unit protocol stack startup, basic configuration distribution, and auxiliary unit interface configuration, etc.

[0067] In step S502, the auxiliary unit synchronizes with the external synchronization source and outputs the generated 1pps+tod signal.

[0068] In this embodiment, the auxiliary unit provides a synchronization interface for an external synchronization source, such as GPS (Global Positioning System), GNSS (Global Navigation Satellite System), or a 1588v2 interface. The auxiliary unit performs clock synchronization and simultaneously generates a 1pps (pulse per second) signal with a fixed phase deviation and a local data extraction pointer signal. Time information is encapsulated in a tod signal based on whole seconds, and a 1pps+tod signal is output through the synchronization interface.

[0069] In step S503, the host unit acquires 1pps information, and the local clock is locked to 1pps.

[0070] In this embodiment of the present disclosure, the host unit can obtain 1pps information through the synchronization interface. The 1pps pulse can be used as a clock signal. The synchronization module of the host unit is locked to the 1pps clock and outputs the system clock for the sampling clock of the baseband data.

[0071] In step S504, the host unit acquires the tod information and generates a synchronization pointer using the time information.

[0072] In this embodiment of the disclosure, the host unit can obtain the TOD information, parse out the whole second time, and generate synchronization pointers with equal intervals through the time information to trigger the transmission of baseband data.

[0073] In step S505, under system clock sampling, the baseband data is triggered to be transmitted using a synchronization pointer.

[0074] In this embodiment of the disclosure, the system clock generated by the above-mentioned synchronization module can be used for sampling. When the synchronization pointer is obtained, the baseband data information is sent down and the baseband data information is filled into the buffer area provided by the hardware interface, waiting for the auxiliary unit to extract it.

[0075] In step S506, the auxiliary unit retrieves the cached data through the synchronization pointer.

[0076] In this embodiment of the disclosure, the auxiliary unit can extract buffer data through the local data extraction pointer signal. The data can be split according to the synchronization signal and can be split into data of corresponding bit width according to different needs.

[0077] In step S507, the host unit and the auxiliary unit complete the synchronization.

[0078] In this embodiment of the disclosure, after the host unit and the auxiliary unit have completed synchronization, the data transmission can be performed cyclically according to the above steps S501 to S507.

[0079] Figure 6 This is a flowchart illustrating another data synchronization method according to an exemplary embodiment.

[0080] like Figure 6 As shown, the data synchronization method provided in this disclosure embodiment may include the following steps.

[0081] In step S601, the protocol stack is started.

[0082] In this embodiment of the disclosure, the protocol stack startup may include device power-on, main unit protocol stack startup, basic configuration distribution, and auxiliary unit interface configuration, etc.

[0083] In step S602, the auxiliary unit synchronizes with the external synchronization source and outputs the generated 10ms signal.

[0084] In this embodiment, the auxiliary unit provides a synchronization interface for an external synchronization source, such as GPS, GNSS, or a 1688v2 interface. The auxiliary unit performs clock time synchronization and simultaneously generates a 10ms pulse with a fixed phase deviation and a local data extraction pointer signal. The synchronization interface in this embodiment does not transmit time information.

[0085] In step S603, the host unit acquires 10ms information, and at the same time, the local clock is locked at 10ms.

[0086] In this embodiment of the disclosure, the host unit can obtain 10ms information through the synchronization interface. The 10ms pulse can be used as a clock signal. The synchronization module of the host unit is locked on the 10ms clock and outputs the system clock for the sampling clock of the baseband data.

[0087] In step S604, the host unit acquires 10ms information and generates a synchronization pointer using the time information.

[0088] In this embodiment of the disclosure, the host unit can acquire 10ms information and use the 10ms pulse as a trigger condition for counting. The counting clock of the counter can be the system clock output by the above-mentioned synchronization module. The time information generated by the counter generates a synchronization pointer with equal intervals, which is used to trigger the transmission of baseband data.

[0089] In step S605, under system clock sampling, the baseband data is triggered to be transmitted using a synchronization pointer.

[0090] In this embodiment of the disclosure, the system clock generated by the above-mentioned synchronization module can be used for sampling. When the synchronization pointer is obtained, the baseband data information is sent down and the baseband data information is filled into the buffer area provided by the hardware interface, waiting for the auxiliary unit to extract it.

[0091] In step S606, the auxiliary unit retrieves the cached data through the synchronization pointer.

[0092] In this embodiment of the disclosure, the auxiliary unit can extract buffer data through the local data extraction pointer signal. The data can be split according to the synchronization signal and can be split into data of corresponding bit width according to different needs.

[0093] In step S607, the main unit and the auxiliary unit complete the synchronization.

[0094] In this embodiment of the disclosure, after the host unit and the auxiliary unit have completed synchronization, data transmission can be performed cyclically according to the above steps S601 to S607.

[0095] The following are embodiments of the baseband unit of this disclosure, which can be used to execute the method embodiments of this disclosure. For details not disclosed in the baseband unit embodiments of this disclosure, please refer to the method embodiments of this disclosure.

[0096] Figure 7 This is a block diagram of a baseband unit according to an exemplary embodiment.

[0097] like Figure 7 As shown, the baseband unit 700 may include a host unit 702 and an auxiliary unit 704.

[0098] The auxiliary unit 704 is used to generate synchronization information and transmit the synchronization information to the host unit through a synchronization interface; the host unit 702 is used to obtain the synchronization information from the auxiliary unit through the synchronization interface; the host unit 702 is used to perform synchronization processing based on the synchronization information to synchronize the host unit 702 with the auxiliary unit 704; the host unit 702 is used to generate a synchronization pointer according to the synchronization information; and the host unit is used to send baseband data according to the synchronization pointer.

[0099] In an exemplary embodiment, the synchronization information includes a clock pulse signal with a fixed phase deviation; wherein, the host unit 702 is further configured to synchronize the clock network of the host unit to the clock pulse signal.

[0100] In an exemplary embodiment, the synchronization information includes a time information signal; wherein, the host unit 702 is further configured to parse the time information signal to obtain time information; the host unit 702 is further configured to generate synchronization pointers with equal intervals based on the time information.

[0101] In an exemplary embodiment, the auxiliary unit 704 is further configured to generate synchronization information and simultaneously generate a local data extraction pointer signal; the auxiliary unit 704 is further configured to extract the baseband data according to the local data extraction pointer signal.

[0102] In an exemplary embodiment, the host unit 702 is further configured to synchronize the clock network of the host unit to the 10ms pulse signal.

[0103] In an exemplary embodiment, the host unit 702 is further configured to parse the 10ms pulse signal to obtain time information; the host unit generates synchronization pointers with equal intervals based on the time information.

[0104] In an exemplary embodiment, the auxiliary unit 704 is further configured to generate synchronization information and simultaneously generate a local data extraction pointer signal; the auxiliary unit 704 is further configured to extract the baseband data according to the local data extraction pointer signal.

[0105] It should be noted that the block diagrams shown in the above figures are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor terminal devices and / or microcontroller terminal devices.

[0106] Figure 8 This is a schematic diagram illustrating the structure of an electronic device according to an exemplary embodiment. It should be noted that... Figure 8 The electronic device shown is merely an example and should not be construed as limiting the functionality and scope of the embodiments disclosed herein.

[0107] like Figure 8As shown, the electronic device 800 includes a central processing unit (CPU) 801, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 802 or a program loaded from a storage section 808 into a random access memory (RAM) 803. The RAM 803 also stores various programs and data required for the operation of the system 800. The CPU 801, ROM 802, and RAM 803 are interconnected via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0108] The following components are connected to I / O interface 805: an input section 806 including a keyboard, mouse, etc.; an output section 807 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 808 including a hard disk, etc.; and a communication section 809 including a network interface card such as a LAN card, modem, etc. The communication section 809 performs communication processing via a network such as the Internet. A drive 810 is also connected to I / O interface 805 as needed. A removable medium 811, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on drive 810 as needed so that computer programs read from it can be installed into storage section 808 as needed.

[0109] In particular, according to embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 809, and / or installed from removable medium 811. When the computer program is executed by central processing unit (CPU) 801, it performs the functions defined above in the system of this disclosure.

[0110] It should be noted that the computer-readable medium disclosed herein may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium may be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, terminal device, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, terminal device, or device. In this disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media can also be any computer-readable medium other than computer-readable storage media, which can send, propagate, or transmit programs for use by or in connection with an instruction execution system, terminal device, or apparatus. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0111] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0112] The units described in the embodiments of this disclosure can be implemented in software or hardware. The described units can also be housed in a processor; for example, a processor can be described as including a sending unit, an acquisition unit, a determining unit, and a first processing unit. The names of these units do not necessarily limit the specific unit; for example, a sending unit can also be described as "a unit that sends an image acquisition request to a connected server."

[0113] In another aspect, this disclosure also provides a computer-readable medium, which may be included in the device described in the above embodiments; or it may exist independently and not assembled into the device. The computer-readable medium carries one or more programs that, when executed by the device, cause the device to include implementations of the methods described in the above embodiments. For example, the electronic device may implement... Figure 2 The steps shown.

[0114] Exemplary embodiments of this disclosure have been specifically shown and described above. It is to be understood that this disclosure is not limited to the detailed structures, arrangements, or implementation methods described herein; rather, this disclosure is intended to cover various modifications and equivalent arrangements contained within the spirit and scope of the appended claims.

Claims

1. A method of data synchronization, the method comprising: The method is executed by a baseband unit, which includes a host unit and an auxiliary unit, and the method includes: The auxiliary unit generates synchronization information and transmits the synchronization information to the host unit through the synchronization interface; The host unit obtains the synchronization information from the auxiliary unit through the synchronization interface; The host unit performs synchronization processing based on the synchronization information to synchronize the host unit with the auxiliary unit. The host unit generates a synchronization pointer based on the synchronization information; The host unit sends baseband data according to the synchronization pointer; The synchronization information includes a clock pulse signal with a fixed phase deviation; the host unit performs synchronization processing based on the synchronization information, including: the host unit synchronizing its clock network to the clock pulse signal.

2. The method of claim 1, wherein, The synchronization information includes time information signals; The host unit generates a synchronization pointer based on the synchronization information, including: The host unit parses the time information signal to obtain time information; The host unit generates synchronization pointers with equal intervals based on the time information.

3. The method according to claim 2, characterized in that, The auxiliary unit generates synchronization information, including: The auxiliary unit generates synchronization information and simultaneously generates a local data extraction pointer signal; The method further includes: The auxiliary unit extracts the baseband data based on the local data extraction pointer signal.

4. The method according to claim 1, characterized in that, The synchronization information includes a 10ms pulse signal with a fixed phase deviation; The host unit performs synchronization processing based on the synchronization information, including: The host unit synchronizes its clock network to the 10ms pulse signal.

5. The method according to claim 4, characterized in that, The host unit generates a synchronization pointer based on the synchronization information, including: The host unit analyzes the 10ms pulse signal to obtain time information; The host unit generates synchronization pointers with equal intervals based on the time information.

6. The method according to claim 5, characterized in that, The auxiliary unit generates synchronization information, including: The auxiliary unit generates synchronization information and simultaneously generates a local data extraction pointer signal; The method further includes: The auxiliary unit extracts the baseband data based on the local data extraction pointer signal.

7. A baseband unit, characterized in that, The baseband unit includes a host unit and an auxiliary unit; The auxiliary unit is used to generate synchronization information and transmit the synchronization information to the host unit through the synchronization interface; The host unit is used to obtain the synchronization information from the auxiliary unit through the synchronization interface; The host unit is used to perform synchronization processing based on the synchronization information, so as to synchronize the host unit with the auxiliary unit. The host unit is used to generate a synchronization pointer based on the synchronization information; The host unit is used to send baseband data according to the synchronization pointer; The synchronization information includes a clock pulse signal with a fixed phase deviation; The host unit is used to synchronize the host unit's clock network to the clock pulse signal.

8. An electronic device, characterized in that, include: At least one processor; A storage device for storing at least one program, which, when executed by the at least one processor, causes the at least one processor to implement the method as described in any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1 to 6.

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