A temperature monitoring system, method, device and storage medium for a domain controller
By introducing a combination system of microcontroller units and temperature monitoring nodes into the ADAS domain controller, the temperature is monitored and managed in real time, the problem of insufficient temperature monitoring of the high computing power ADAS domain controller is solved, ensuring the high reliability and security of the system.
Patent Information
- Application Number
- CN202310319548.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-03-28
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2043-03-28
AI Technical Summary
The prior art cannot effectively monitor the temperature of the high-computing ADAS domain controller, resulting in untimely cooling, which may lead to a reduction in ADAS functional level and pose a risk of vehicle functional safety.
The combination of microcontroller unit, board temperature monitoring node and chip core junction temperature monitoring node is adopted to collect and judge the temperature in real time through serial bus and Ethernet communication, and perform corresponding response actions to ensure that the temperature is within a reasonable range.
High reliability temperature monitoring of high computing power ADAS domain controllers is realized, avoiding ADAS function degradation and vehicle safety risks caused by temperature abnormalities.
Smart Images

Figure CN116243742B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of intelligent vehicles, and particularly to a temperature monitoring system, method, device and storage medium for a domain controller. Background Art
[0002] Since the single SOC of the integrated parking and driving ADAS domain controller has entered the era of 250 TOPs high computing power, the corresponding high power when running scripts at full computing power reaches 105W, which brings a sharp temperature rise effect to the SOC computing power chip and the surrounding multi-core MCU circuits.
[0003] For low-computing-power ADAS domain controllers, the core junction temperature of their SOC generally does not reach the upper limit junction temperature of 125°C for automotive-grade chips. Therefore, the prior art generally only uses traditional body air cooling for the cooling strategy.
[0004] The existing methods are not applicable to the usage scenarios of high-computing-power ADAS domain controllers. If there are situations such as abnormal operation of the domain controller system or failure of the air cooling device, it is easy to have the problem of untimely cooling, which may reduce the ADAS function level. And the prior art only relies on the hardware over-temperature protection mechanism of the SOC chip itself, and there is no temperature monitoring method at the domain controller level. If the hardware over-temperature mechanism of the chip itself fails, it will directly cause vehicle functional safety risks. Summary of the Invention
[0005] The present invention provides a temperature monitoring system, method, device and storage medium for a domain controller to monitor the temperatures of multiple nodes in the domain controller.
[0006] According to an aspect of the present invention, a temperature monitoring system for a domain controller is provided, including: a micro control unit, a first board-end temperature monitoring node, a second board-end temperature monitoring node and a chip core junction temperature monitoring node, wherein the micro control unit includes a micro control unit core junction temperature monitoring node;
[0007] The first board-end temperature monitoring node is configured to collect the first board-end temperature of the first printed circuit board corresponding to the micro control unit, and in response to a first query instruction sent by the micro control unit, send the first board-end temperature to the micro control unit;
[0008] The second board-end temperature monitoring node is configured to collect the second board-end temperature of the second printed circuit board corresponding to the system-on-chip, and in response to a second query instruction sent by the micro control unit, send the second board-end temperature to the micro control unit;
[0009] The chip core junction temperature monitoring node is used to collect the second core junction temperature of the system-on-chip, and in response to the third query instruction sent by the microcontroller unit, send the second core junction temperature to the microcontroller unit;
[0010] The microcontroller unit is used to send the first query instruction, the second query instruction, and the third query instruction to the first board-end temperature monitoring node, the second board-end temperature monitoring node, and the chip core junction temperature monitoring node respectively, and perform a rationality judgment based on the received first board-end temperature, second board-end temperature, second core junction temperature, and the first core junction temperature of the microcontroller unit collected by the microcontroller unit core junction temperature monitoring node, and execute corresponding response actions according to the judgment results.
[0011] Optionally, the microcontroller unit is specifically used for:
[0012] Monitor the interrupt pins of the first board-end temperature monitoring node and the second board-end temperature monitoring node;
[0013] When the potential of the interrupt pin of the first board-end temperature monitoring node decreases, send the first query instruction to the first board-end temperature monitoring node through the serial bus;
[0014] When the potential of the interrupt pin of the second board-end temperature monitoring node decreases, send the second query instruction to the second board-end temperature monitoring node through the serial bus.
[0015] Optionally, the microcontroller unit is specifically used for:
[0016] Set the temperature thresholds corresponding to the first board-end temperature and the second board-end temperature respectively;
[0017] When the first board-end temperature and / or the second board-end temperature do not meet the corresponding temperature thresholds, report the fault pin to the power management chip.
[0018] Optionally, after reporting the fault pin to the power management chip, the microcontroller unit is further used for:
[0019] When the potential of the interrupt pin of the first board-end temperature monitoring node is normal, send the fourth query instruction to the first board-end temperature monitoring node through the serial bus;
[0020] When the potential of the interrupt pin of the second board-end temperature monitoring node is normal, send the fifth query instruction to the second board-end temperature monitoring node through the serial bus;
[0021] If both the first board-end temperature and the second board-end temperature meet the corresponding temperature thresholds, report the fault recovery information to the power management chip;
[0022] Correspondingly, the first board - end temperature monitoring node is further configured to respond to the fourth query instruction and send the first board - end temperature to the micro - control unit; the second board - end temperature monitoring node is further configured to respond to the fifth query instruction and send the second board - end temperature to the micro - control unit.
[0023] Optionally, the micro - control unit communicates with the chip core junction temperature monitoring node through Ethernet.
[0024] Optionally, the micro - control unit is specifically configured to:
[0025] Receive the second core junction temperature. If the second core junction temperature does not meet the preset temperature range, increment the value of the count flag bit by one;
[0026] If the value of the count flag bit is greater than the first set value, report a temperature acquisition failure message to the client application layer and reset the count flag bit to zero; if the value of the count flag bit is less than or equal to the first set value and the second core junction temperature is greater than the warning threshold, report chip core junction temperature abnormal information to the power management chip.
[0027] Optionally, the micro - control unit is further configured to:
[0028] If the second core junction temperature meets the preset temperature range and the difference between the second core junction temperature and the previously received second core junction temperature is greater than the second set value, increment the value of the count flag bit by one;
[0029] If the second core junction temperature meets the preset temperature range and the difference between the second core junction temperature and the previously received second core junction temperature is less than or equal to the second set value, when the second core junction temperature is greater than the warning threshold, report chip core junction temperature abnormal information to the power management chip.
[0030] Optionally, the micro - control unit is specifically configured to:
[0031] Read the upper temperature limit value and the lower temperature limit value corresponding to the first core junction temperature preset in the thermal status register and send the upper temperature limit value and the lower temperature limit value to the power management chip;
[0032] If the first core junction temperature is greater than the upper temperature limit value or less than the lower temperature limit value, report micro - control unit core junction temperature abnormal information to the power management chip.
[0033] According to another aspect of the present invention, there is provided a method for monitoring the temperature of a domain controller, which is used for a temperature monitoring system of a domain controller. The system includes a micro-control unit, a first board-end temperature monitoring node, a second board-end temperature monitoring node, and a chip core junction temperature monitoring node. Among them, the micro-control unit includes a micro-control unit core junction temperature monitoring node. The method includes:
[0034] Collect the first board-end temperature of the first printed circuit board corresponding to the micro-control unit through the first board-end temperature monitoring node, and in response to the first query instruction sent by the micro-control unit, send the first board-end temperature to the micro-control unit;
[0035] Collect the second board-end temperature of the second printed circuit board corresponding to the system-on-chip through the second board-end temperature monitoring node, and in response to the second query instruction sent by the micro-control unit, send the second board-end temperature to the micro-control unit;
[0036] Collect the second core junction temperature of the system-on-chip through the chip core junction temperature monitoring node, and in response to the third query instruction sent by the micro-control unit, send the second core junction temperature to the micro-control unit;
[0037] The micro-control unit sends the first query instruction, the second query instruction, and the third query instruction to the first board-end temperature monitoring node, the second board-end temperature monitoring node, and the chip core junction temperature monitoring node respectively, and respectively makes a rationality judgment based on the received first board-end temperature, second board-end temperature, second core junction temperature, and the first core junction temperature of the micro-control unit collected by the micro-control unit core junction temperature monitoring node, and performs corresponding response actions according to the judgment results.
[0038] Further, the micro-control unit sends the first query instruction and the second query instruction to the first board-end temperature monitoring node and the second board-end temperature monitoring node respectively, including:
[0039] The micro-control unit monitors the interrupt pins of the first board-end temperature monitoring node and the second board-end temperature monitoring node respectively;
[0040] When the potential of the interrupt pin of the first board-end temperature monitoring node decreases, send the first query instruction to the first board-end temperature monitoring node through the serial bus;
[0041] When the potential of the interrupt pin of the second board-end temperature monitoring node decreases, send the second query instruction to the second board-end temperature monitoring node through the serial bus.
[0042] Further, the micro - control unit makes a rationality judgment based on the received first board - end temperature and second board - end temperature respectively, and performs corresponding response actions according to the judgment results, including:
[0043] Set temperature thresholds corresponding to the first board - end temperature and the second board - end temperature respectively;
[0044] When the first board - end temperature and / or the second board - end temperature do not meet the corresponding temperature thresholds, report a fault pin to the power management chip.
[0045] Further, after reporting the fault pin to the power management chip, the method further includes:
[0046] When the interrupt pin potential of the first board - end temperature monitoring node is normal, send a fourth query instruction to the first board - end temperature monitoring node through the serial bus;
[0047] When the interrupt pin potential of the second board - end temperature monitoring node is normal, send a fifth query instruction to the second board - end temperature monitoring node through the serial bus;
[0048] If both the first board - end temperature and the second board - end temperature meet the corresponding temperature thresholds, report fault recovery information to the power management chip;
[0049] Correspondingly, the method further includes that the first board - end temperature monitoring node responds to the fourth query instruction and sends the first board - end temperature to the micro - control unit; the second board - end temperature monitoring node responds to the fifth query instruction and sends the second board - end temperature to the micro - control unit.
[0050] Further, the micro - control unit communicates with the chip core junction temperature monitoring node through Ethernet.
[0051] Further, the micro - control unit makes a rationality judgment based on the received second core junction temperature and performs corresponding response actions according to the judgment results, including:
[0052] Receive the second core junction temperature. If the second core junction temperature does not fall within the preset temperature range, increment the value of the count flag bit by one;
[0053] If the value of the count flag bit is greater than the first set value, report temperature acquisition failure information to the customer application layer and reset the count flag bit; if the value of the count flag bit is less than or equal to the first set value and the second core junction temperature is greater than the warning threshold, report chip core junction temperature abnormality information to the power management chip.
[0054] Further, the method further includes:
[0055] If the second core junction temperature meets the preset temperature range and the difference between the second core junction temperature and the previously received second core junction temperature is greater than the second set value, increment the value of the count flag bit by one;
[0056] If the second core junction temperature meets the preset temperature range and the difference between the second core junction temperature and the previously received second core junction temperature is less than or equal to the second set value, when the second core junction temperature is greater than the warning threshold, report information on abnormal chip core junction temperature to the power management chip.
[0057] Further, the micro control unit makes a rationality judgment based on the first core junction temperature of the micro control unit collected by the micro control unit core junction temperature monitoring node received, and performs corresponding response actions according to the judgment result, including:
[0058] Read the upper temperature limit value and the lower temperature limit value corresponding to the preset first core junction temperature in the thermal status register, and send the upper temperature limit value and the lower temperature limit value to the power management chip;
[0059] If the first core junction temperature is greater than the upper temperature limit value or less than the lower temperature limit value, report information on abnormal micro control unit core junction temperature to the power management chip.
[0060] According to another aspect of the present invention, there is provided an electronic device, the electronic device includes:
[0061] At least one processor; and
[0062] A memory communicatively connected to the at least one processor; wherein,
[0063] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the temperature monitoring method of the domain controller according to any embodiment of the present invention.
[0064] According to another aspect of the present invention, there is provided a computer-readable storage medium, the computer-readable storage medium stores computer instructions, and the computer instructions are used to implement the temperature monitoring method of the domain controller according to any embodiment of the present invention when executed by a processor.
[0065] The temperature monitoring system of the domain controller disclosed by the present invention monitors the core junction temperature of the microcontroller unit, the core junction temperature of the system-on-chip, the board-end temperature of the microcontroller unit, and the board-end temperature of the system-on-chip through the microcontroller unit, enabling the microcontroller unit to execute the domain controller temperature judgment logic, forming a highly reliable temperature monitoring method at the system level of the domain controller system, and being more suitable for the high-computing-power ADAS driving assistance system.
[0066] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0067] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0068] Figure 1 is a schematic structural diagram of a temperature monitoring system of a domain controller provided in Embodiment 1 of the present invention;
[0069] Figure 2 is a schematic internal connection diagram of a temperature monitoring system of a domain controller provided in Embodiment 1 of the present invention;
[0070] Figure 3 is a schematic diagram of a temperature monitoring process of a domain controller provided in Embodiment 1 of the present invention;
[0071] Figure 4 is a flowchart of a temperature monitoring method of a domain controller provided in Embodiment 2 of the present invention;
[0072] Figure 5 is a schematic structural diagram of an electronic device for implementing the temperature monitoring method of the domain controller in Embodiment 3 of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0073] In order to enable those skilled in the art to better understand the solutions of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0074] It should be noted that the terms "first", "second", etc. in the description, claims and above-mentioned drawings of the present invention are used to distinguish similar objects, and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.
[0075] Embodiment 1
[0076] Figure 1 FIG. is a schematic structural diagram of a temperature monitoring system for a domain controller provided in Embodiment 1 of the present invention. This embodiment is applicable to the situation of controlling the temperature of the domain controller of the vehicle ADAS driving assistance system. The temperature monitoring system of the domain controller can be implemented in the form of hardware and / or software, and the temperature monitoring system of the domain controller can be configured in an electronic device. As Figure 1 shown, the system includes: a microcontroller unit 110, a first board-end temperature monitoring node 120, a second board-end temperature monitoring node 130, and a chip core junction temperature monitoring node 140. Among them, the microcontroller unit 110 includes a microcontroller unit core junction temperature monitoring node 111.
[0077] The first board-end temperature monitoring node 120 is used to collect the first board-end temperature of the first printed circuit board corresponding to the microcontroller unit 110, and in response to the first query instruction sent by the microcontroller unit 110, send the first board-end temperature to the microcontroller unit 110.
[0078] The second board-end temperature monitoring node 130 is used to collect the second board-end temperature of the second printed circuit board corresponding to the system-on-chip, and in response to the second query instruction sent by the microcontroller unit 110, send the second board-end temperature to the microcontroller unit 110.
[0079] The chip core junction temperature monitoring node 140 is used to collect the second core junction temperature of the system-on-chip, and in response to the third query instruction sent by the microcontroller unit 110, send the second core junction temperature to the microcontroller unit 110.
[0080] The microcontroller unit 110 is used to send a first query instruction, a second query instruction, and a third query instruction to the first board-end temperature monitoring node 120, the second board-end temperature monitoring node 130, and the chip core junction temperature monitoring node 140 respectively, and perform a rationality judgment based on the received first board-end temperature, second board-end temperature, second core junction temperature, and the first core junction temperature of the microcontroller unit 110 collected by the microcontroller unit core junction temperature monitoring node 111, and execute corresponding response actions according to the judgment result.
[0081] Among them, a printed circuit board (PCB) is a carrier for the electrical interconnection of electronic components fabricated using electronic printing technology. A system on chip (SOC) is an integrated circuit with a dedicated target, which contains a complete system and all the contents of the embedded software. A microcontroller unit (MCU) is a chip-level computer formed by appropriately reducing the frequency and specifications of a central processing unit (CPU) and integrating peripherals such as memory, timer, USB, A / D conversion, UART, PLC, DMA, and even an LCD driver circuit on a single chip, which can perform different combinations of control for different application scenarios. The operating temperature range of the PCB board is generally between 0°C and 125°C. Too high or too low temperature may cause faults in the PCB board. The core junction temperature is the highest temperature of the actual semiconductor chip (wafer, die) in an electronic device. To ensure the reliability of the chip operation, there are also corresponding reasonable temperature ranges for the SOC core junction temperature and the MCU core junction temperature. Therefore, it is necessary to monitor the temperature of each board end and the core junction temperature, and perform protection processing in a timely manner when the temperature is abnormal.
[0082] In this embodiment, the first printed circuit board is a PCB board connected to the microcontroller unit 110, and the second printed circuit board is a PCB board connected to the system-on-chip. The first board-end temperature (MCU-PCB board-end temperature) and the second board-end temperature (SOC-PCB board-end temperature) are respectively collected through the first board-end temperature monitoring node 120 and the second board-end temperature monitoring node 130. The first core junction temperature (MCU core junction temperature) is collected through the microcontroller unit core junction temperature monitoring node 111 inside the microcontroller unit 110, and the second core junction temperature (SOC core junction temperature) is collected through the chip core junction temperature monitoring node 140 inside the SOC. Each temperature monitoring node can be a chip node with a temperature sensor, which can collect temperature and communicate with the microcontroller unit 110. The microcontroller unit 110 includes the microcontroller unit core junction temperature monitoring node 111, which can monitor the temperatures of each temperature collection node including the MCU-PCB board-end temperature, the SOC-PCB board-end temperature, the MCU core junction temperature, and the SOC core junction temperature, determine whether the temperatures of each node are within a reasonable range, and then execute corresponding response actions.
[0083] Optionally, the microcontroller unit 110 is specifically configured to:
[0084] Monitor the interrupt pins of the first board-end temperature monitoring node 120 and the second board-end temperature monitoring node 130; when the potential of the interrupt pin of the first board-end temperature monitoring node 120 decreases, send a first query instruction to the first board-end temperature monitoring node 120 through the serial bus; when the potential of the interrupt pin of the second board-end temperature monitoring node 130 decreases, send a second query instruction to the second board-end temperature monitoring node 130 through the serial bus.
[0085] In this embodiment, for the first board-end temperature monitoring node 120 and the second board-end temperature monitoring node 130, the microcontroller unit 110 can monitor their interrupt pins (SHDN). When it is detected that the potential of the interrupt pin is pulled low, the microcontroller unit 110 issues a query instruction, where the first query instruction corresponds to the first board-end temperature monitoring node 120, and the second query instruction corresponds to the second board-end temperature monitoring node 130. Further, the microcontroller unit 110 can communicate with the first board-end temperature monitoring node 120 and the second board-end temperature monitoring node 130 through the serial bus.
[0086] Preferably, the serial bus can be an IIC bus. IIC (Inter-Integrated Circuit) is an integrated circuit bus, which is a serial communication bus using a multi-master and multi-slave architecture. The micro-control unit 110 sends query instructions to the first board-end temperature monitoring node 120 and the second board-end temperature monitoring node 130 through the IIC bus. After receiving the query instructions, they can reply the board-end temperature at this time to the built-in SMU (safety management unit) of the micro-control unit 110 through the IIC bus.
[0087] Optionally, the micro-control unit 110 is specifically configured to:
[0088] Set the temperature thresholds corresponding to the first board-end temperature and the second board-end temperature respectively; when the first board-end temperature and / or the second board-end temperature do not meet the corresponding temperature thresholds, report a fault pin to the power management chip.
[0089] In this embodiment, the reasonable temperature thresholds corresponding to the first board-end temperature (MCU-PCB board-end temperature) and the second board-end temperature (SOC-PCB board-end temperature) can be set by the micro-control unit 110. After the ADAS ECU (Advanced Driver Assistance System Electronic Control Unit) is powered on, according to the temperature information fed back by the first board-end temperature monitoring node 120 and the second board-end temperature monitoring node 130, if the first board-end temperature and / or the second board-end temperature do not meet the corresponding temperature thresholds, the SMU in the micro-control unit 110 can send a signal to the power management chip (Power-Management-IC, PMIC) through the fault pin (Error pin).
[0090] Furthermore, according to the received fault information, the PMIC can enter the Abnormal mode of power management, make the SOC power off normally, and maintain non-startup. The PMIC can also control the restart of the ADAS ECU domain controller through the Reset signal.
[0091] Preferably, after the PMIC controls the power-on of the ADAS ECU, the microcontroller unit 110 can configure the registers of the first board-end temperature monitoring node 120 and the second board-end temperature monitoring node 130 through the IIC bus, and write the reasonable temperature thresholds corresponding to the first board-end temperature (MCU-PCB board-end temperature) and the second board-end temperature (SOC-PCB board-end temperature) into the first board-end temperature monitoring node 120 and the second board-end temperature monitoring node 130 respectively, and at the same time write the status codes corresponding to different temperatures. When the first board-end temperature monitoring node 120 and the second board-end temperature monitoring node 130 respond to the query instruction of the microcontroller unit 110 and send the board-end temperature to it, they can reply the status code corresponding to the currently collected temperature to the built-in SMU of the microcontroller unit 110 through the IIC bus. For example, if the first board-end temperature exceeds the preset temperature threshold and the microcontroller unit 110 detects that the potential of the interrupt pin of the first board-end temperature monitoring node 120 decreases, it sends the first query instruction to it. The first board-end temperature monitoring node 120 replies the status code representing the too-high temperature to the microcontroller unit 110 through the IIC bus. At the same time, the status code can also correspond to a fault identifier (ErrorID) and report the Error ID representing the over-temperature fault to the microcontroller unit 110.
[0092] Optionally, after reporting the fault pin to the power management chip, the microcontroller unit 110 is further configured to:
[0093] When the potential of the interrupt pin of the first board-end temperature monitoring node 120 is normal, send a fourth query instruction to the first board-end temperature monitoring node 120 through the serial bus; when the potential of the interrupt pin of the second board-end temperature monitoring node 130 is normal, send a fifth query instruction to the second board-end temperature monitoring node 130 through the serial bus; if both the first board-end temperature and the second board-end temperature meet the corresponding temperature thresholds, report the fault recovery information to the power management chip;
[0094] Correspondingly, the first board-end temperature monitoring node 120 is further configured to respond to the fourth query instruction and send the first board-end temperature to the microcontroller unit 110; the second board-end temperature monitoring node 130 is further configured to respond to the fifth query instruction and send the second board-end temperature to the microcontroller unit 110.
[0095] In this embodiment, the microcontroller unit 110 can also control the fault recovery of the first board - end temperature monitoring node 120 and the second board - end temperature monitoring node 130. Taking the temperature monitoring of the second board - end temperature as an example, when the second board - end temperature monitoring node 130 detects that the board - end temperature returns to normal, the potential of the interrupt pin SHDN is pulled high again. At this time, the microcontroller unit 110 sends a query instruction to the second board - end temperature monitoring node 130 to make it respond with the currently collected second board - end temperature information. After the microcontroller unit 110 confirms that the temperature has recovered, the Error ID is reset, and the built - in SMU of the microcontroller unit 110 sends a SOC power - on instruction to the power management chip PMIC through the fault pin Error pin to start the SOC. Similarly, when the first board - end temperature returns to normal, the first board - end temperature monitoring node 120 also sends the temperature recovery information to the microcontroller unit 110 in the same way.
[0096] Optionally, the microcontroller unit 110 communicates with the chip core junction temperature monitoring node 140 through Ethernet.
[0097] Among them, Ethernet is a computer local - area network technology. In this embodiment, the microcontroller unit 110 and the chip core junction temperature monitoring node 140 can communicate in ways such as using a 1000M Ethernet or a 100M in - vehicle Ethernet line. Optionally, an IIC bus and other communication lines within the ADAS domain controller can also be used, including but not limited to PCIE (peripheral component interconnect express), UART (Universal Asynchronous Receiver / Transmitter), SPI (Serial Peripheral Interface), etc.
[0098] Optionally, the microcontroller unit 110 is specifically configured to:
[0099] Receive the second core junction temperature. If the second core junction temperature does not meet the preset temperature range, increment the value of the count flag bit; if the value of the count flag bit is greater than the first set value, report a temperature acquisition failure message to the customer application layer and reset the count flag bit; if the value of the count flag bit is less than or equal to the first set value and the second core junction temperature is greater than the warning threshold, report an abnormal chip core junction temperature message to the power management chip.
[0100] In this embodiment, when the micro control unit 110 monitors the second core temperature (SOC core temperature), after the SOC starts and successfully shakes hands with the micro control unit 110, the micro control unit 110 can send a third query instruction to the SOC via Ethernet to request the second core temperature and initialize the counting flag bit Error Counter. The chip core temperature monitoring node 140 inside the SOC collects the second core temperature and sends it to the micro control unit 110. According to the preset temperature range corresponding to the second core temperature (for example, it can be -45°C - 135°C), the micro control unit 110 checks the rationality of the second core temperature. If it does not meet the preset temperature range, the temperature obtained in this cycle is discarded and Error Counter is incremented by 1. Let the first setting value be 5. When Error Counter > 5, that is, the second core temperatures received more than 5 times do not meet the preset temperature range, at this time, an information indicating that the temperature acquisition fails can be reported to the customer application layer, and Error Counter is reset to zero; if Error Counter ≤ 5, the second core temperature is further judged. If the second core temperature is greater than the warning threshold (for example, it can be 110°C), an information indicating that the chip core temperature is abnormal is reported to the power management integrated circuit (PMIC) and reported to the customer application layer.
[0101] Further, when the second core temperature is greater than the warning threshold, the micro control unit 110 can also send a shutdown signal to the PMIC through the error pin to make the PMIC turn off the high-power power rails of the SOC.
[0102] Optionally, the micro control unit 110 is further configured to:
[0103] If the second core temperature meets the preset temperature range and the difference between the second core temperature and the second core temperature received last time is greater than the second setting value, the value of the counting flag bit is incremented by 1; if the second core temperature meets the preset temperature range and the difference between the second core temperature and the second core temperature received last time is less than or equal to the second setting value, when the second core temperature is greater than the warning threshold, an information indicating that the chip core temperature is abnormal is reported to the power management integrated circuit.
[0104] In this embodiment, to accurately judge the second core junction temperature, the microcontroller unit 110 can perform anti-shake elimination processing on the received temperature value, that is, compare the currently received second core junction temperature with the previously received second core junction temperature. If the difference between the two is greater than the second set value, then Error Counter + 1. For example, let the currently received second core junction temperature be SOC-Core(a) and the previously received second core junction temperature be SOC-Core(b). If the second set value is 20, then when │SOC-Core(a) - SOC-Core(b)│ > 20 (°C), Error Counter + 1. Further, if the second core junction temperature meets the preset temperature range and the difference between the second core junction temperature and the previously received second core junction temperature is less than or equal to the second set value, when the second core junction temperature is greater than the warning threshold, the microcontroller unit reports the abnormal information of the chip core junction temperature to the power management chip.
[0105] Further, after the microcontroller unit 110 sends the third query instruction to the SOC, if the second core junction temperature is not received after the set time (such as 5S), it reports the abnormal temperature acquisition failure to the customer application layer. If the microcontroller unit 110 cannot obtain the second core junction temperature through Ethernet due to reasons such as Ethernet communication failure or the failure of the chip core junction temperature monitoring node 140, the microcontroller unit 110 sends a request for the maximum water cooling capacity signal to the whole vehicle through a CAN specific frame message.
[0106] Optionally, the microcontroller unit 110 is specifically used for:
[0107] Read the upper temperature limit value and the lower temperature limit value corresponding to the preset first core junction temperature in the thermal status register, and send the upper temperature limit value and the lower temperature limit value to the power management chip; if the first core junction temperature is greater than the upper temperature limit value or less than the lower temperature limit value, report the abnormal information of the microcontroller unit core junction temperature to the power management chip.
[0108] In this embodiment, the microcontroller unit 110 can obtain the upper temperature limit value and the lower temperature limit value corresponding to the preset first core junction temperature (MCU core junction temperature) by reading the thermal status register of the microcontroller unit core junction temperature monitoring node 111, and synchronously send them to the power management chip PMIC. When the first core junction temperature is greater than the upper temperature limit value or less than the lower temperature limit value, an alarm alert event is triggered. The microcontroller unit 110 reports the abnormal information of the microcontroller unit core junction temperature to the PMIC and stops feeding the watchdog of the PMIC. Further, the PMIC can control the restart of the ADAS ECU domain controller through the Reset signal.
[0109] Preferably, the upper temperature limit value and the lower temperature limit value in the thermal status register can be combined with the temperature environment of the vehicle sales region to customize appropriate lower and upper limits of the MCU core junction temperature.
[0110] Furthermore, after obtaining the first core junction temperature, the microcontroller unit 110 can determine whether the first core junction temperature is greater than 95°C. If so, it reports to the customer application layer software.
[0111] Figure 2 FIG. is an internal connection schematic diagram of a temperature monitoring system for a domain controller provided by an embodiment of the present invention. As shown in the figure, the microcontroller unit 110 incorporates a microcontroller unit core junction temperature monitoring node 111 and a security management unit (SMU), and can monitor the interrupt pins (SHDN) of the first board - end temperature monitoring node 120 and the second board - end temperature monitoring node 130, and can communicate with them via a serial bus. The microcontroller unit 110 can also communicate with a system - on - chip (SOC) via Ethernet to obtain the SOC core junction temperature collected by the core junction temperature monitoring node 140. When a temperature anomaly fault occurs, the SMU can report to the power management integrated circuit (PMIC) via a fault pin. When the fault is recovered, the power management integrated circuit (PMIC) can control the restart of the ADAS ECU domain controller via a reset signal.
[0112] Figure 3It is a schematic diagram of the temperature monitoring process of a domain controller provided by an embodiment of the present invention. As shown in the figure, after the ECU is powered on and the microcontroller unit 110 starts, it monitors the first board-end temperature, the second board-end temperature, the first core junction temperature, and the second core junction temperature simultaneously. For the first board-end temperature and the second board-end temperature, the microcontroller unit 110 sets corresponding temperature thresholds, and monitors the interrupt pins of each monitoring node in a polling manner. If it is detected that the interrupt pin point is pulled low, a query instruction is sent to the corresponding monitoring node to obtain the board-end temperature. If the temperature is abnormal, an error pin is reported to the PMIC. For the first core junction temperature, the microcontroller unit 110 reads the preset upper and lower temperature limit values from the thermal status register and sends them to the PMIC. The actual first core junction temperature is judged according to the upper and lower limit values. If the temperature exceeds the upper limit value or is lower than the lower limit value, an abnormal message is reported to the PMIC to make the PMIC control the domain controller to restart. If the first core junction temperature is within the preset upper and lower temperature limit values, the microcontroller unit 110 can handshake with the SOC and send a query instruction to the SOC to obtain the second core junction temperature. If the second core junction temperature meets the corresponding temperature range, to eliminate temperature jitter, it is judged whether the difference between the currently obtained second core junction temperature and the previously obtained second core junction temperature is greater than the set value. If so, Error Counter + 1. Otherwise, when the second core junction temperature is greater than the warning threshold, an abnormal message is reported to the PMIC to make the PMIC control the SOC to power off. If the second core junction temperature does not meet the corresponding temperature range, Error Counter + 1. When Error Counter is greater than the set value, a temperature acquisition failure message is reported to the customer application layer and the counting starts again.
[0113] The temperature monitoring system of the domain controller disclosed in the embodiment of the present invention monitors the core junction temperature of the microcontroller unit, the core junction temperature of the system-on-chip, the board-end temperature of the microcontroller unit, and the board-end temperature of the system-on-chip through the microcontroller unit, enables the microcontroller unit to execute the domain controller temperature judgment logic, and forms a highly reliable temperature monitoring method at the system level of the domain controller system, which is more suitable for high-computing-power ADAS driving assistance systems.
[0114] Embodiment 2
[0115] Figure 4 It is a flowchart of a temperature monitoring method for a domain controller provided by Embodiment 2 of the present invention. This method can be executed by the temperature monitoring system of the domain controller. The system includes a microcontroller unit, a first board-end temperature monitoring node, a second board-end temperature monitoring node, and a chip core junction temperature monitoring node. Among them, the microcontroller unit includes a microcontroller unit core junction temperature monitoring node. The temperature monitoring system of the domain controller can be implemented in the form of hardware and / or software, and the temperature monitoring system of the domain controller can be configured in an electronic device. As Figure 4 shown, the method includes:
[0116] S210. Collect the first board-end temperature of the first printed circuit board corresponding to the microcontroller unit through the first board-end temperature monitoring node, and in response to the first query instruction sent by the microcontroller unit, send the first board-end temperature to the microcontroller unit.
[0117] S220. Collect the second board-end temperature of the second printed circuit board corresponding to the system-on-chip through the second board-end temperature monitoring node, and in response to the second query instruction sent by the microcontroller unit, send the second board-end temperature to the microcontroller unit.
[0118] S230. Collect the second core junction temperature of the system-on-chip through the chip core junction temperature monitoring node, and in response to the third query instruction sent by the microcontroller unit, send the second core junction temperature to the microcontroller unit.
[0119] S240. Send the first query instruction, the second query instruction, and the third query instruction to the first board-end temperature monitoring node, the second board-end temperature monitoring node, and the chip core junction temperature monitoring node respectively through the microcontroller unit, and respectively make a rationality judgment based on the received first board-end temperature, second board-end temperature, second core junction temperature, and the first core junction temperature of the microcontroller unit collected by the microcontroller unit core junction temperature monitoring node, and perform corresponding response actions according to the judgment results.
[0120] Further, the manner of sending the first query instruction and the second query instruction to the first board-end temperature monitoring node and the second board-end temperature monitoring node respectively through the microcontroller unit may be:
[0121] Monitor the interrupt pins of the first board-end temperature monitoring node and the second board-end temperature monitoring node respectively through the microcontroller unit; when the potential of the interrupt pin of the first board-end temperature monitoring node decreases, send the first query instruction to the first board-end temperature monitoring node through the serial bus; when the potential of the interrupt pin of the second board-end temperature monitoring node decreases, send the second query instruction to the second board-end temperature monitoring node through the serial bus.
[0122] Further, the manner of making a rationality judgment based on the received first board-end temperature and second board-end temperature respectively through the microcontroller unit and performing corresponding response actions according to the judgment results may be:
[0123] Set the temperature thresholds corresponding to the first board-end temperature and the second board-end temperature respectively; when the first board-end temperature and / or the second board-end temperature do not meet the corresponding temperature thresholds, report the fault pin to the power management chip.
[0124] Further, after reporting the fault pin to the power management chip, the method further includes:
[0125] When the potential of the interrupt pin of the first board - end temperature monitoring node is normal, send a fourth query instruction to the first board - end temperature monitoring node through the serial bus; when the potential of the interrupt pin of the second board - end temperature monitoring node is normal, send a fifth query instruction to the second board - end temperature monitoring node through the serial bus; if both the first board - end temperature and the second board - end temperature meet the corresponding temperature thresholds, report the fault recovery information to the power management chip;
[0126] Correspondingly, the method further includes: through the first board - end temperature monitoring node responding to the fourth query instruction, sending the first board - end temperature to the micro - control unit; through the second board - end temperature monitoring node responding to the fifth query instruction, sending the second board - end temperature to the micro - control unit.
[0127] Furthermore, the micro - control unit communicates with the chip core temperature monitoring node through Ethernet.
[0128] Furthermore, the way that the micro - control unit makes a rationality judgment based on the received second core temperature and performs corresponding response actions can be:
[0129] Receive the second core temperature. If the second core temperature does not meet the preset temperature range, increment the value of the count flag bit by one; if the value of the count flag bit is greater than the first set value, report the temperature acquisition failure information to the customer application layer and set the count flag bit to zero; if the value of the count flag bit is less than or equal to the first set value and the second core temperature is greater than the warning threshold, report the chip core temperature anomaly information to the power management chip.
[0130] Furthermore, the method further includes:
[0131] If the second core temperature meets the preset temperature range and the difference between the second core temperature and the previously received second core temperature is greater than the second set value, increment the value of the count flag bit by one; if the second core temperature meets the preset temperature range and the difference between the second core temperature and the previously received second core temperature is less than or equal to the second set value, when the second core temperature is greater than the warning threshold, report the chip core temperature anomaly information to the power management chip.
[0132] Furthermore, the way that the micro - control unit makes a rationality judgment based on the first core temperature of the micro - control unit collected by the micro - control unit core temperature monitoring node and performs corresponding response actions can be:
[0133] Read the upper temperature limit value and the lower temperature limit value corresponding to the preset first core temperature in the thermal status register and send the upper temperature limit value and the lower temperature limit value to the power management chip; if the first core temperature is greater than the upper temperature limit value or less than the lower temperature limit value, report the micro - control unit core temperature anomaly information to the power management chip.
[0134] The temperature monitoring method of the domain controller disclosed in the embodiments of the present invention can be executed by the temperature monitoring system of the domain controller provided by any embodiment, and has the corresponding functional modules and beneficial effects of the execution system.
[0135] Embodiment III
[0136] Figure 5 FIG. shows a schematic structural diagram of an electronic device 10 that can be used to implement the embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as, for example, a laptop computer, a desktop computer, a workbench, a personal digital assistant, a server, a blade server, a mainframe computer, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as, for example, a personal digital processor, a cellular phone, a smart phone, a wearable device (such as a helmet, glasses, a watch, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present invention described and / or claimed herein.
[0137] As Figure 5 shown, the electronic device 10 includes at least one processor 11, and a memory communicatively connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program executable by the at least one processor. The processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 into the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other via a bus 14. The input / output (I / O) interface 15 is also connected to the bus 14.
[0138] Multiple components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a magnetic disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0139] The processor 11 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the temperature monitoring method of the domain controller.
[0140] In some embodiments, the temperature monitoring method of the domain controller can be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the temperature monitoring of the domain controller described above can be executed. Alternatively, in other embodiments, the processor 11 can be configured to execute the temperature monitoring method of the domain controller by any other suitable means (e.g., by means of firmware).
[0141] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: being implemented in one or more computer programs, which can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special-purpose or general-purpose programmable processor, and can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit the data and instructions to the storage system, the at least one input device, and the at least one output device.
[0142] The computer program for implementing the method of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to the processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the computer program is executed by the processor, the functions / operations specified in the flowchart and / or block diagram are implemented. The computer program can be executed entirely on the machine, partially on the machine, as an independent software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.
[0143] In the context of the present invention, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer-readable storage medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. Alternatively, the computer-readable storage medium can be a machine-readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0144] To provide for interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can also be used to provide for interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, speech input, or tactile input).
[0145] The systems and techniques described herein can be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of a communication network include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.
[0146] A computing system may include a client and a server. The client and the server are generally far from each other and usually interact via a communication network. The relationship between the client and the server is created by computer programs running on respective computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or a cloud host, which is a host product in the cloud computing service system, and solves the defects of difficult management and weak business scalability existing in traditional physical hosts and VPS services.
[0147] It should be understood that various forms of the processes shown above can be used, steps can be reordered, added or deleted. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and no limitation is made herein.
[0148] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. A temperature monitoring system for a domain controller, characterized in that, Including: A microcontroller unit, a first board - end temperature monitoring node, a second board - end temperature monitoring node, and a chip core junction temperature monitoring node. Among them, the microcontroller unit includes a microcontroller unit core junction temperature monitoring node; The first board - end temperature monitoring node is used to collect the first board - end temperature of the first printed circuit board corresponding to the microcontroller unit, and in response to the first query instruction sent by the microcontroller unit, send the first board - end temperature to the microcontroller unit; The second board - end temperature monitoring node is used to collect the second board - end temperature of the second printed circuit board corresponding to the system - on - chip, and in response to the second query instruction sent by the microcontroller unit, send the second board - end temperature to the microcontroller unit; The chip core junction temperature monitoring node is used to collect the second core junction temperature of the system - on - chip, and in response to the third query instruction sent by the microcontroller unit, send the second core junction temperature to the microcontroller unit; The microcontroller unit is used to send the first query instruction, the second query instruction, and the third query instruction to the first board - end temperature monitoring node, the second board - end temperature monitoring node, and the chip core junction temperature monitoring node respectively, and respectively make a rationality judgment based on the received first board - end temperature, second board - end temperature, second core junction temperature, and the first core junction temperature of the microcontroller unit collected by the microcontroller unit core junction temperature monitoring node, and perform corresponding response actions according to the judgment result.
2. The system according to claim 1, wherein Specifically, the microcontroller unit is used for: Monitoring the interrupt pins of the first board - end temperature monitoring node and the second board - end temperature monitoring node; When the potential of the interrupt pin of the first board - end temperature monitoring node decreases, sending the first query instruction to the first board - end temperature monitoring node through the serial bus; When the potential of the interrupt pin of the second board - end temperature monitoring node decreases, sending the second query instruction to the second board - end temperature monitoring node through the serial bus.
3. The system according to claim 2, wherein Specifically, the microcontroller unit is used for: Respectively setting the temperature thresholds corresponding to the first board - end temperature and the second board - end temperature; When the first board - end temperature and / or the second board - end temperature do not meet the corresponding temperature thresholds, reporting a fault pin to the power management chip.
4. The system according to claim 3, wherein After reporting the fault pin to the power management chip, the microcontroller unit is further used for: When the potential of the interrupt pin of the first board - end temperature monitoring node is normal, sending a fourth query instruction to the first board - end temperature monitoring node through the serial bus; When the potential of the interrupt pin of the second board - end temperature monitoring node is normal, sending a fifth query instruction to the second board - end temperature monitoring node through the serial bus; If both the first board - end temperature and the second board - end temperature meet the corresponding temperature thresholds, reporting fault recovery information to the power management chip; Correspondingly, the first board - end temperature monitoring node is further used to respond to the fourth query instruction and send the first board - end temperature to the microcontroller unit; the second board - end temperature monitoring node is further used to respond to the fifth query instruction and send the second board - end temperature to the microcontroller unit.
5. The system according to claim 1, wherein The microcontroller unit communicates with the chip core junction temperature monitoring node via Ethernet.
6. The system according to claim 1, wherein The microcontroller unit is specifically configured to: Receive the second core junction temperature. If the second core junction temperature does not fall within the preset temperature range, increment the value of the count flag bit by one. If the value of the count flag bit is greater than the first set value, report a temperature acquisition failure message to the customer application layer and reset the count flag bit to zero. If the value of the count flag bit is less than or equal to the first set value and the second core junction temperature is greater than the warning threshold, report an abnormal chip core junction temperature message to the power management chip.
7. The system according to claim 6, wherein The microcontroller unit is further configured to: If the second core junction temperature falls within the preset temperature range and the difference between the second core junction temperature and the previously received second core junction temperature is greater than the second set value, increment the value of the count flag bit by one. If the second core junction temperature falls within the preset temperature range and the difference between the second core junction temperature and the previously received second core junction temperature is less than or equal to the second set value, when the second core junction temperature is greater than the warning threshold, report an abnormal chip core junction temperature message to the power management chip.
8. The system according to claim 1, wherein The microcontroller unit is specifically configured to: Read the upper temperature limit value and the lower temperature limit value corresponding to the first core junction temperature preset in the thermal status register and send the upper temperature limit value and the lower temperature limit value to the power management chip. If the first core junction temperature is greater than the upper temperature limit value or less than the lower temperature limit value, report an abnormal microcontroller unit core junction temperature message to the power management chip.
9. A temperature monitoring method for a domain controller, characterized in that, The method is used for the temperature monitoring system of the domain controller. The system includes a microcontroller unit, a first board-end temperature monitoring node, a second board-end temperature monitoring node, and a chip core junction temperature monitoring node. Among them, the microcontroller unit includes a microcontroller unit core junction temperature monitoring node. The method includes: Collect the first board-end temperature of the first printed circuit board corresponding to the microcontroller unit through the first board-end temperature monitoring node, and in response to the first query instruction sent by the microcontroller unit, send the first board-end temperature to the microcontroller unit. Collect the second board-end temperature of the second printed circuit board corresponding to the system-on-chip through the second board-end temperature monitoring node, and in response to the second query instruction sent by the microcontroller unit, send the second board-end temperature to the microcontroller unit. Collect the second core junction temperature of the system-on-chip through the chip core junction temperature monitoring node, and in response to the third query instruction sent by the microcontroller unit, send the second core junction temperature to the microcontroller unit. Send the first query instruction, the second query instruction, and the third query instruction to the first board-end temperature monitoring node, the second board-end temperature monitoring node, and the chip core junction temperature monitoring node respectively through the microcontroller unit, and respectively perform a rationality judgment based on the received first board-end temperature, second board-end temperature, second core junction temperature, and the first core junction temperature of the microcontroller unit collected by the microcontroller unit core junction temperature monitoring node, and perform corresponding response actions according to the judgment results.
10. An electronic device, characterized in that, The electronic device includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores a computer program executable by the at least one processor, and when the computer program is executed by the at least one processor, the at least one processor is enabled to execute the temperature monitoring method of the domain controller according to claim 9.
11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for implementing the temperature monitoring method of the domain controller according to claim 9 when executed by a processor.
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