DMA device and data transmission method

Abstract

Embodiments of the present application provide a DMA device and a data transmission method. The DMA device includes: a first DMA controller, a first data frame processor, a second DMA controller, and a second data frame processor. The device according to the embodiments of the present application not only realizes single data transfer, but also accurately identifies and transfers control information related to the data.

Description

Technical Field

[0001] The present application relates to the technical field of data transmission, and in particular, to a DMA device and a data transmission method. Background Art

[0002] Direct Memory Access (DMA) can transfer data from one address space to another, providing high-speed data transmission between peripherals and memories, memories and memories, and peripherals and peripherals.

[0003] In related technologies, during the data reading and writing process, DMA needs to use a lot of information related to data transmission; however, DMA can only transfer data singly and cannot identify and transfer control information related to data. Therefore, how to implement the transfer of data and control information related to data by DMA is a technical problem that those skilled in the art urgently need to solve. Summary of the Invention

[0004] In view of the problems in the prior art, embodiments of the present application provide a DMA device and a data transmission method.

[0005] Specifically, the embodiments of the present application provide the following technical solutions:

[0006] In a first aspect, an embodiment of the present application provides a DMA device, including:

[0007] A first DMA controller, a first data frame processor, a second DMA controller, and a second data frame processor;

[0008] The first DMA controller is configured to receive a data read request and send the data read request to the first data frame processor; the data read request carries position information of a transmission header descriptor (THD) in memory;

[0009] The first data frame processor is configured to obtain the THD and a first data frame from memory according to the data read request, and transfer the THD and the first data frame to an external storage device; the THD is used to carry first control information and indicate data frame information to be read out; the first data frame is a data frame that needs to be transferred from memory to an external storage device;

[0010] The second DMA controller is configured to receive a data write request and send the data write request to the second data frame processor; the data write request carries position information of a receive header descriptor (RHD) in an external storage device;

[0011] The second data frame processor is used to obtain the RHD and the second data frame from an external storage device according to the data write request, and move the RHD and the second data frame to the memory; the RHD is used to carry second control information and indicate data frame information to be written; the second data frame is a data frame that needs to be moved from the external storage device to the memory.

[0012] Further, the first data frame processor is specifically used for:

[0013] Obtain a transmission header descriptor THD from the memory according to the data read request, and obtain first control information and indication information according to the transmission header descriptor THD; the indication information is used to indicate data frame information to be read;

[0014] Obtain the data frame to be read according to the indication information;

[0015] Move the first control information and the data frame to be read to the external storage device.

[0016] Further, the first data frame processor is also used for:

[0017] Send a data frame identifier; the data frame identifier includes at least one of the following: a data frame start identifier, a data frame middle identifier, and a data frame end identifier.

[0018] Further, the second data frame processor is specifically used for:

[0019] Determine a target storage space in the memory; the target storage space is used for the second data frame processor to write data;

[0020] Obtain a receive header descriptor RHD, a receive data frame descriptor RPD, and a data frame from the external storage device according to the data write request; the receive data frame descriptor RPD is used to indicate status information of the target storage space and / or a data write address when the status information of the target storage space is full;

[0021] Write the receive header descriptor RHD, the receive data frame descriptor RPD, and the data frame into the target storage space in the memory.

[0022] Further, the second data frame processor is specifically used for:

[0023] Point a target pointer to a target address in the target storage space; the target address is the address at the end of the previous data transmission;

[0024] Determine the remaining space in the target storage space according to the target address and the target storage space;

[0025] According to the remaining space, write the received header descriptor RHD, received data frame descriptor RPD, and data frame into the target storage space in the memory.

[0026] Further, the second data frame processor is specifically configured to:

[0027] When the remaining space is greater than or equal to the space occupied by the received header descriptor RHD, write the received header descriptor RHD into the remaining space and update the remaining space in the target storage space; or, when the remaining space is less than the space occupied by the received header descriptor RHD, point the target pointer to the starting address of the target storage space, update the received data frame descriptor RPD, write the received header descriptor RHD into the target storage space, and update the remaining space in the target storage space;

[0028] When the remaining space is greater than or equal to the space occupied by the received data frame descriptor RPD, write the received data frame descriptor RPD into the remaining space and update the remaining space in the target storage space; or, when the remaining space is less than the space occupied by the received data frame descriptor RPD, point the target pointer to the starting address of the target storage space, update the received data frame descriptor RPD, write the received data frame descriptor RPD into the target storage space, and update the remaining space in the target storage space;

[0029] When the remaining space is greater than or equal to the space occupied by the data frame, write the data frame into the remaining space; or, when the remaining space is less than the space occupied by the data frame, point the target pointer to the starting address of the target storage space, update the received data frame descriptor RPD, and write the data frame into the target storage space.

[0030] Further, the DMA device further includes:

[0031] DMA read / write controller, transmit selector, arbiter, transmission status module;

[0032] Wherein, the DMA read / write controller is connected to the bus, and the DMA read / write controller is configured to obtain the data frame to be read out and the transmission header descriptor THD from the memory through the bus; and / or, write the received data frame, received header descriptor RHD, and received data frame descriptor RPD into the memory;

[0033] The input end of the transmit selector is connected to the first DMA controller, and the output end of the transmit selector is connected to the first data frame processor, and is used to determine the DMA channel for transmitting data;

[0034] The arbitration machine is connected to the first data frame processor, the transmission status module, the second data frame processor, and the DMA read / write controller, and is used to determine the current transmission task and update the transmission status module;

[0035] The transmission status module is used to indicate the current data transmission status.

[0036] In a second aspect, an embodiment of the present application further provides a data transmission method, including:

[0037] Receiving a data read request; the data read request carries the position information of the transmission header descriptor THD in the memory;

[0038] According to the data read request, obtaining the transmission header descriptor THD and the data frame from the memory, and moving the transmission header descriptor THD and the data frame to an external storage device; the transmission header descriptor THD is used to carry first control information and indicate the data frame information to be read out;

[0039] Receiving a data write request; the data write request carries the position information of the receive header descriptor RHD in the external storage device;

[0040] According to the data write request, obtaining the receive header descriptor RHD and the data frame from the external storage device, and moving the receive header descriptor RHD and the data frame to the memory; the receive header descriptor RHD is used to carry second control information and indicate the data frame information to be written.

[0041] In a third aspect, an embodiment of the present application further provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the data transmission method described in the second aspect is implemented.

[0042] In a fourth aspect, an embodiment of the present application further provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the data transmission method described in the second aspect is implemented.

[0043] In a fifth aspect, an embodiment of the present application further provides a computer program product, including a computer program. When the computer program is executed by a processor, the data transmission method described in the second aspect is implemented.

[0044] The DMA device and data transmission method provided by the embodiments of the present application, when it is necessary to transfer the data in the memory and the first control information related to the data to an external storage device, the first data frame processor in the DMA device obtains the transmission header descriptor (THD) from the memory, so as to obtain the data frame information to be transferred and the first control information related to the data frame, and transfers the data frame information and the first control information related to the data frame in the memory to the external storage device; when it is necessary to transfer the data in the external storage device and the second control information related to the data to the memory, the second data frame processor in the DMA device obtains the receive header descriptor (RHD) from the external storage device, so as to obtain the data frame information to be transferred and the second control information related to the data frame, and transfers the data frame information and the control information related to the data frame in the external storage device to the memory, thereby not only realizing a single data transfer, but also accurately identifying and transferring the control information related to the data. Description of the Drawings

[0045] In order to more clearly illustrate the technical solutions in the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0046] Figure 1 is a schematic structural diagram of the DMA device provided by the embodiments of the present application;

[0047] Figure 2 is a schematic diagram of the data frame identifier provided by the embodiments of the present application;

[0048] Figure 3 is one of the schematic flowcharts of data transmission by the DMA device provided by the embodiments of the present application;

[0049] Figure 4 is the second schematic flowchart of data transmission by the DMA device provided by the embodiments of the present application;

[0050] Figure 5 is a schematic structural diagram of the electronic device provided by the embodiments of the present application. Detailed Embodiments

[0051] To make the objectives, technical solutions, and advantages of the present application clearer, the following will clearly and completely describe the technical solutions in the present application with reference to the drawings in the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art without creative efforts based on the embodiments in the present application belong to the scope of protection of the present application.

[0052] The DMA device according to the embodiments of the present application can be applied to scenarios of transporting data and control information, which not only realizes single data transfer, but also accurately identifies and transfers control information related to the data.

[0053] In the related art, during the data reading and writing process, DMA needs to use a lot of relevant information about data transmission; however, DMA can only transfer data singly and cannot identify and transfer control information related to the data. Therefore, how to implement the transfer of data and control information related to the data is a technical problem that those skilled in the art urgently need to solve. For example, DMA in the private protocol MAC layer needs to use a lot of relevant information about data transmission during the data reading and writing process. For example: the identifier of the data start, the start address of the data, the length of the data, the time of data transmission, and status information, etc. The existing DMA starts the data reading and writing operation immediately after configuring the start address, destination address, and data length, and waits for the next data transmission after the transmission is completed. It cannot identify information related to the data and can only transfer data singly. Therefore, the existing DMA cannot perform data transmission in the private protocol MAC layer.

[0054] When the DMA device according to the embodiments of the present application needs to transfer data and the first control information related to the data in the memory to an external storage device, the first data frame processor in the DMA device obtains a transmit header descriptor (THD) from the memory, and thus can obtain the data frame information to be transferred and the first control information related to the data frame, and transfers the data frame information and the first control information related to the data frame in the memory to the external storage device; when it is necessary to transfer data and the second control information related to the data in the external storage device to the memory, the second data frame processor in the DMA device obtains a receive header descriptor (RHD) from the external storage device, and thus can obtain the data frame information to be transferred and the second control information related to the data frame, and transfers the data frame information and the control information related to the data frame in the external storage device to the memory, thereby not only realizing single data transfer, but also accurately identifying and transferring control information related to the data.

[0055] The following combines Figures 1 - 5 Specific embodiments are used to describe the technical solutions of the present application in detail. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0056] Figure 1 It is a schematic structural diagram of the DMA device provided by the embodiments of the present application. As Figure 1 shown, the method provided in this embodiment includes:

[0057] A first DMA controller, a first data frame processor, a second DMA controller, and a second data frame processor;

[0058] The first DMA controller is configured to receive a data read request and send the data read request to the first data frame processor; the data read request carries location information of a transmission header descriptor (THD) in the memory.

[0059] The first data frame processor is configured to obtain the THD and a first data frame from the memory according to the data read request, and move the THD and the first data frame to an external storage device; the THD is used to carry first control information and indicate data frame information to be read out; the first data frame is a data frame that needs to be moved from the memory to the external storage device.

[0060] The second DMA controller is configured to receive a data write request and send the data write request to the second data frame processor; the data write request carries location information of a receive header descriptor (RHD) in the external storage device.

[0061] The second data frame processor is configured to obtain the RHD and a second data frame from the external storage device according to the data write request, and move the RHD and the second data frame to the memory; the RHD is used to carry second control information and indicate data frame information to be written; the second data frame is a data frame that needs to be moved from the external storage device to the memory.

[0062] Specifically, in the existing DMA device during data reading and writing, a lot of relevant information about data transmission is required; however, the DMA can only move data singly and cannot identify and move control information related to the data.

[0063] To solve the above problems, the DMA device of the present application includes a first DMA controller, a first data frame processor, a second DMA controller, and a second data frame processor.

[0064] Among them, the first DMA controller is configured to receive a data read request and send the data read request to the first data frame processor; the data read request carries location information of the THD in the memory; the first data frame processor is configured to obtain the transmission header descriptor (THD) and the first data frame from the memory according to the data read request, and move the transmission header descriptor (THD) and the first data frame to the external storage device; wherein, the first data frame is a data frame that needs to be moved from the memory to the external storage device; the transmission header descriptor (THD) is used to carry first control information and indicate data frame information to be read out. Optionally, the memory is connected to the first DMA controller through a bus, the first DMA controller is connected to the first data frame processor, and the first data frame processor is connected to the external storage device.

[0065] Optionally, when it is necessary to transfer the data and the first control information related to the data in the memory to an external storage device, a data read request is triggered to the DMA device; optionally, the data read request can be triggered by the CPU. After receiving the data read request, the first DMA controller in the DMA device sends the data read request to the first data frame processor; optionally, the data read request carries the location information of the transfer header descriptor THD in the memory; so that after receiving the data read request, the first data frame processor can obtain the location information of the transfer header descriptor THD in the memory in a timely and accurate manner, and then obtain the transfer header descriptor THD from the memory; optionally, the transfer header descriptor THD carries the first control information; optionally, the first control information is the control information related to the data frame to be read; optionally, the transfer header descriptor THD also indicates the data frame related information; so that after the first data frame processor obtains the transfer header descriptor THD from the memory, it can further obtain the data frame information and the control information related to the data frame, so as to transfer the data frame information and the control information related to the data frame in the memory to the external storage device, which not only realizes a single data transfer, but also accurately identifies and transfers the control information related to the data.

[0066] Exemplarily, in the embodiment of the present application, the DMA device reads the transfer header descriptor THD in the memory through the AHB bus and sends it to the external storage device. Optionally, the first control information carried in the transfer header descriptor THD includes at least one of the following:

[0067] Data frame status information, data frame control information, data frame transmission time.

[0068] Optionally, the data frame status information is used to indicate the transmission status of the data frame. For example, the transmission status of the data frame includes: the transmitted completed status, the transmitting status, and the waiting transmission status. Optionally, the first data frame processor can update the data frame status information according to the data transmission process and send it to the external storage device.

[0069] Optionally, the data frame control information includes custom private protocol information. Optionally, when the first data frame processor transfers the data frame, it also sends the data frame control information to the external storage device, so as to not only realize a single data transfer, but also accurately identify and transfer the control information related to the data.

[0070] Optionally, the data frame transmission time is used to indicate whether to immediately read and transfer the data frame and the control information, or wait for a target period before reading and transferring, or not read.

[0071] Optionally, other types of control information related to the read data may also be included in the transmission header descriptor THD, which is not limited in the embodiments of the present application. Optionally, the first data frame processor may update the first control information in the obtained transmission header descriptor THD, and send the updated first control information and the data to be transported to an external storage device together.

[0072] Optionally, the data frame information to be read indicated by the transmission header descriptor THD includes at least one of the following:

[0073] Data frame length, data frame start address (Payload start PointerAddress); optionally, the data frame length is used to indicate the length information of the data to be read; the data frame start address is used to indicate the address of the data to be read in the memory. Optionally, according to the data frame length and the data frame start address, the data to be read and transported can be accurately determined.

[0074] Optionally, the first DMA controller includes 4 states: start state, passive state, active state, end state. Optionally, the state transition process is as follows: when the software configures to start sending a new data frame, the first DMA controller goes from the start state to the passive state; when an external signal indicating that it can be sent is fed back, the first DMA controller goes from the passive state to the active state; when the data transmission is interrupted, the first DMA controller goes from the active state to the passive state; when an error occurs during the data transmission, the first DMA controller goes from the active state to the end state; when it is ready to start sending data again, the first DMA controller goes from the end state to the start state.

[0075] Optionally, the second DMA controller is used to receive a data write request and send the data write request to the second data frame processor; the data write request carries the location information of the receive header descriptor RHD in the external storage device; the second data frame processor is used to obtain the receive header descriptor RHD and the second data frame from the external storage device according to the data write request, and move the receive header descriptor RHD and the second data frame to the memory; the receive header descriptor RHD is used to carry the second control information and indicate the data frame information to be written; the second data frame is the data frame that needs to be moved from the external storage device to the memory. Optionally, the memory is connected to the second DMA controller through a bus, the second DMA controller is connected to the second data frame processor, and the second data frame processor is connected to the external storage device.

[0076] Optionally, when it is necessary to transfer the data and the second control information related to the data in the external storage device to the memory, a data write request is triggered to the DMA device; optionally, the data write request can be triggered by the external storage device. After receiving the data write request, the second DMA controller in the DMA device sends the data write request to the second data frame processor; optionally, the position information of the Receive Header Descriptor (RHD) in the external storage device is carried in the data write request, so that after receiving the data write request, the second data frame processor can obtain the position information of the receive header descriptor RHD in the external storage device in a timely and accurate manner, and then obtain the receive header descriptor RHD from the external storage device; optionally, the receive header descriptor RHD carries the second control information; optionally, the second control information is the control information related to the data frame to be written; optionally, the receive header descriptor RHD also indicates the data frame related information, so that after the second data frame processor obtains the receive header descriptor RHD from the external storage device, it can further obtain the data frame information and the control information related to the data frame, so as to transfer the data frame information and the control information related to the data frame in the external storage device to the memory, which not only realizes a single data transfer, but also accurately identifies and transfers the control information related to the data.

[0077] Exemplarily, in the embodiment of the present application, the DMA device writes the RHD information in the external storage device to the memory through the AHB bus. Optionally, the control information included in the receive header descriptor RHD includes at least one of the following:

[0078] Data frame status information, data frame reception time. For example, the transmission status of the data frame includes: transmitted completed status, transmitting status, waiting for transmission status. Optionally, the second data frame processor can update the data frame status information according to the data transmission process and send it to the memory. Optionally, the data frame reception time is used to indicate whether to immediately write the data frame and the control information, or wait for a target period and then write, or not write to the memory. Optionally, other types of control information related to the written data may also be included in the receive header descriptor RHD, which is not limited in the embodiment of the present application. Optionally, the second data frame processor can update the information in the obtained receive header descriptor RHD and transfer the updated RHD and the data to be transported to the memory together.

[0079] Optionally, the data frame information to be written indicated by the receive header descriptor RHD includes at least one of the following: data frame length and data frame start pointer; optionally, the data frame length indicates information such as the length of the data to be written. Optionally, the data frame start pointer address is used to indicate the address of the data to be written.

[0080] Optionally, the DMA device further includes:

[0081] a DMA read / write controller, a transmission selector, an arbiter, and a transmission status module;

[0082] wherein, the DMA read / write controller is connected to the bus, and the DMA read / write controller is configured to obtain a data frame to be read out and a transmission header descriptor (THD) from the memory through the bus; and / or, write a received data frame, a receive header descriptor (RHD), and a received data frame descriptor (RPD) into the memory;

[0083] The input end of the transmission selector is connected to the first DMA controller, and the output end of the transmission selector is connected to the first data frame processor, and is configured to determine a DMA channel for transmitting data;

[0084] The arbiter is connected to the first data frame processor, the transmission status module, the second data frame processor, and the DMA read / write controller, and is configured to determine a current transmission task and update the transmission status module;

[0085] The transmission status module is configured to indicate a current data transmission status.

[0086] Specifically, the DMA device in the embodiment of the present application further includes a DMA read / write controller, a transmission selector, an arbiter, and a transmission status module.

[0087] Optionally, as Figure 1 shown, the DMA read / write controller is connected to the bus and the arbiter, and the DMA read / write controller obtains a data frame to be read out and a transmission header descriptor (THD) from the memory through the bus; or, the DMA read / write controller writes a received data frame, a receive header descriptor (RHD), and a received data frame descriptor (RPD) into the memory through the bus. Optionally, the DMA read / write controller processes only one request at a time, and after the current request is completed, it will serve the next request. The requests mainly processed include: reading and writing data frames from / to the memory and writing data frames into the memory.

[0088] Optionally, the arbiter is connected to the first data frame processor, the transmission status module, the second data frame processor, and the DMA read / write controller, and is configured to determine a current transmission task, update the transmission status module, and send the current transmission status to the first data frame processor, the second data frame processor, and the DMA read / write controller.

[0089] Optionally, the input end of the sending selector is connected to the first DMA controller, and the output end of the sending selector is connected to the first data frame processor. The sending selector is used to determine the DMA channel for transporting data. Optionally, in the embodiments of the present application, for different THDs and data frames, the sending selector can customize corresponding configurations according to the sending type, so that multiple DMA data frame sending channels can be defined. Multiple DMA data sending channels can be in a passive state at the same time, but only one channel can enter the active state at any moment.

[0090] Optionally, the transmission status module is connected to the arbiter. The main function of the transmission status module is to obtain information related to the data frame and update it to the THD. In the embodiments of the present application, only the data sending completion signal is updated. When all data frames are sent, the hardware updates this field information to declare that the data frame has been sent. The transmission status module includes the following state transitions: idle state to transmission request: receive a transmission request and prepare to update the state; transmission request to waiting for transmission state: update the state and wait for the update to complete; waiting for transmission state to waiting for transmission completion: mainly update whether the data frame to be sent is completed; waiting for transmission completion to idle state: transmission is completed and wait for the next update request.

[0091] In the above-described implementation device, when it is necessary to move the data in the memory and the first control information related to the data to an external storage device, the first data frame processor in the DMA device obtains the transmission header descriptor THD from the memory, and thus can obtain the data frame information to be transported and the first control information related to the data frame, and move the data frame information and the first control information related to the data frame in the memory to the external storage device; when it is necessary to move the data in the external storage device and the second control information related to the data to the memory, the second data frame processor in the DMA device obtains the receive header descriptor RHD from the external storage device, and thus can obtain the data frame information to be transported and the second control information related to the data frame, and move the data frame information and the control information related to the data frame in the external storage device to the memory, thereby not only realizing a single data transfer, but also accurately identifying and transferring the control information related to the data.

[0092] In one embodiment, the first data frame processor is specifically configured to:

[0093] Obtain the transmission header descriptor THD from the memory according to the data read request, and obtain the first control information and the indication information according to the transmission header descriptor THD; the indication information is used to indicate the data frame information to be read out;

[0094] Obtain the data frame to be read out according to the indication information;

[0095] Move the first control information and the data frame to be read out to the external storage device.

[0096] Specifically, when it is necessary to transfer the data and the first control information related to the data in the memory to an external storage device, a data read request is triggered to the DMA device; optionally, the data read request can be triggered by the CPU. After receiving the data read request, the first DMA controller in the DMA device sends the data read request to the first data frame processor; optionally, the data read request carries the position information of the transmission header descriptor THD in the memory, so that after receiving the data read request, the first data frame processor can obtain the position information of the transmission header descriptor THD in the memory in a timely and accurate manner, and then obtain the transmission header descriptor THD from the memory; optionally, the transmission header descriptor THD carries the first control information; optionally, the first control information is the control information related to the data frame to be read out; wherein, the data frame to be read out is the first data frame; optionally, the transmission header descriptor THD further includes an indication information, and the indication information is used to indicate the data frame information to be read out, such as the data frame length and the data frame start address, so that after the first data frame processor obtains the transmission header descriptor THD from the memory, it can also determine the data frame information to be transferred in the memory and the control information related to the data frame, and transfer the data frame information and the control information related to the data frame in the memory to the external storage device, thus not only realizing a single data transfer, but also accurately identifying and transferring the control information related to the data.

[0097] For example, as Figure 3 shown, after the transmission selector in the DMA device selects the DMA channel and the first data frame processor obtains the transmission header descriptor THD from the memory, it can also determine the data frame information to be transferred in the memory and the control information related to the data frame, and transfer the data frame information and the control information related to the data frame in the memory to the external storage device, thus not only realizing a single data transfer, but also accurately identifying and transferring the control information related to the data.

[0098] In the above implementation device, according to the position information of the transmission header descriptor THD carried in the data read request, the first data frame processor can obtain the transmission header descriptor THD in a timely and accurate manner, and then determine the data frame information to be transferred in the memory and the control information related to the data frame according to the transmission header descriptor THD, and transfer the data frame information and the control information related to the data frame in the memory to the external storage device, thus not only realizing a single data transfer, but also accurately identifying and transferring the control information related to the data.

[0099] In an embodiment, the first data frame processor is further configured to:

[0100] Send a data frame identifier; the data frame identifier includes at least one of the following: a data frame start identifier, a data frame middle identifier, and a data frame end identifier.

[0101] Specifically, during the process of moving the data frame information and the control information related to the data frame in the memory to the external storage device, the first data frame processor can also send a data frame identifier, so as to accurately label the moved data, enabling the external storage device to accurately and conveniently identify the start position and end position of the incoming data according to the data frame identifier, and determine the moving status of the data, thereby accurately receiving the moved data. Optionally, the data frame identifier includes a data frame start identifier, a data frame middle identifier, and a data frame end identifier. The data frame start identifier is used to indicate the start position of the moved data frame, the data frame middle identifier is used to indicate that the data is being moved, and the data frame end identifier is used to indicate the end position of the moved data frame, enabling the external storage device to accurately and conveniently identify the start and end positions of the incoming data according to the data frame identifier, and thereby accurately receive the moved data.

[0102] Optionally, the first data frame processor is triggered by the first DMA controller. When the first DMA controller is in an active state, the first data frame processor is in a working mode. The AHB bus is controlled by a DMA arbiter and a DMA read / write controller to read the data in the memory. Optionally, the first data frame processor is responsible for tracking the transmitted data frame, reading the THD, and moving the data from the memory to the external storage device. At the same time, it marks the transmitted THD and data frame information to indicate the start position and end position of the data frame, enabling the external storage device to accurately and conveniently identify the start and end positions of the incoming data according to the data frame identifier, and thereby accurately receive the moved data.

[0103] For example, as Figure 2 shown, during the process of moving the data frame information and the control information related to the data frame in the memory to the external storage device, in order to facilitate the external storage device to accurately identify the start and end positions of the data, so that the external storage device can accurately receive the moved data, the first data frame processor in the DMA device sends a data frame identifier, including: data frame start identifier: 00, data frame middle identifier: 01, data frame end identifier: 10; thus, when the external storage device receives the data frame start identifier, it can identify the start position of the moved data and start receiving and storing the data; when the external storage device receives the data frame end identifier, it stops receiving and storing the data.

[0104] In the above-described implementation device, during the process of moving the data frame information and the control information related to the data frame in the memory to the external storage device, by sending a data frame identifier, the moved data is accurately labeled, enabling the external storage device to accurately and conveniently identify the start and end positions of the data according to the identifier, and thereby accurately receive the moved data.

[0105] In one embodiment, the second data frame processor is specifically configured to:

[0106] Determine the target storage space in the memory; the target storage space is used for the second data frame processor to write data;

[0107] According to the data write request, obtain the receive header descriptor (RHD), the receive data frame descriptor (RPD), and the data frame from the external storage device; the receive data frame descriptor (RPD) is used to indicate the status information of the target storage space and / or the data write address when the status information of the target storage space is full;

[0108] Write the receive header descriptor (RHD), the receive data frame descriptor (RPD), and the data frame into the target storage space in the memory.

[0109] Specifically, when the second data frame processor moves the data frame information and the control information related to the data frame in the external storage device to the memory, it first determines the target storage space in the memory, so that the position where the moved data should be stored in the memory can be determined; optionally, the CPU can allocate the target storage space for the second data frame processor; further, according to the data write request, the second data frame processor obtains the receive header descriptor (RHD), the receive data frame descriptor (RPD), and the data frame from the external storage device; optionally, the data write request can be triggered by the external storage device; optionally, the receive header descriptor (RHD) carries the second control information; optionally, the second control information is the control information related to the data frame to be written; wherein, the data frame to be written is the second data frame; optionally, the receive header descriptor (RHD) also indicates the data frame related information, so that after the second data frame processor obtains the receive header descriptor (RHD) from the external storage device, it can further obtain the data frame information and the control information related to the data frame, so as to move the data frame information and the control information related to the data frame in the external storage device to the target storage space in the memory, which not only realizes a single data transfer, but also accurately identifies and transfers the control information related to the data.

[0110] Optionally, the receive data frame descriptor (RPD) is used to indicate the status information of the target storage space and / or the data write address when the status information of the target storage space is full; optionally, after the target storage space in the memory is full, data writing can start again from the start address of the storage space; optionally, the initial default value of the receive data frame descriptor (RPD) can be empty or a default value, and the second data frame processor updates the receive data frame descriptor (RPD) during the data transfer process and sends it to the memory, so that the write address of the transferred data can be accurately determined.

[0111] For example, the received data frame descriptor RPD includes: data frame status information, data frame end pointer address, and data frame start pointer address; among them, the data frame status information is used to indicate the status information of the target storage space; optionally, the status information of the target storage space includes: the target storage space is full and the storage space is not full; optionally, the data frame start pointer address is used to indicate the data write address when the status information of the target storage space is full; optionally, the data write address when the status information of the target storage space is full can be the start address of the target storage space or other addresses in the memory, which is not limited in the embodiments of the present application. Optionally, the initial default value of the received data frame descriptor RPD can be empty or a default value. The second data frame processor updates the received data frame descriptor RPD during the data transfer process and writes the special RPD information to the memory through the AHB bus, so as to accurately mark and determine the write address of the transferred data.

[0112] In the above implementation device, when the second data frame processor transfers the data in the external storage device to the memory, by determining the target storage space in the memory, it can accurately determine the position in the memory where the transferred data should be stored, and then transfer the data frame information and data frame-related control information in the external storage device to the target storage space in the memory, not only realizing a single data transfer, but also accurately identifying and transferring the control information related to the data.

[0113] In one embodiment, the second data frame processor is specifically configured to:

[0114] Point the target pointer to the target address in the target storage space; the target address is the address at the end of the previous data transmission;

[0115] Determine the remaining space in the target storage space according to the target address and the target storage space;

[0116] Write the received header descriptor RHD, received data frame descriptor RPD, and data frame into the target storage space in the memory according to the remaining space.

[0117] Specifically, the pointer in the second data frame processor points to the target address in the target storage space; optionally, the target address is the address at the end of the previous data transfer, that is, the data to be moved can be stored starting from the next address corresponding to the address at the end of the previous data transfer; thus, the second data frame processor can determine the remaining space based on the target address in the storage space and the target storage space, and write the received header descriptor (RHD), the received data frame descriptor (RPD), and the data frame into the remaining space, thereby not only implementing a single data transfer but also transferring control information related to the data. Optionally, after the target storage space in the memory is full, data writing can start again from the start address of the storage space, and the received data frame descriptor (RPD) is updated and sent to the memory to indicate the data writing address when the status information of the target storage space is full.

[0118] In the above-described implementation device, the pointer in the second data frame processor points to the target address in the target storage space, so that the remaining space can be determined based on the target address in the target storage space and the target storage space, and the received header descriptor (RHD), the received data frame descriptor (RPD), and the data frame are written into the remaining space. When the remaining space is not sufficient to store the data and control information to be moved, the received data frame descriptor (RPD) can be updated to indicate the data writing address when the status information of the target storage space is full, thereby not only implementing a single data transfer but also transferring control information related to the data.

[0119] In one embodiment, the second data frame processor is specifically configured to:

[0120] When the remaining space is greater than or equal to the space occupied by the received header descriptor (RHD), write the received header descriptor (RHD) into the remaining space and update the remaining space in the target storage space; or, when the remaining space is less than the space occupied by the received header descriptor (RHD), point the target pointer to the start address of the target storage space, update the received data frame descriptor (RPD), write the received header descriptor (RHD) into the target storage space, and update the remaining space in the target storage space;

[0121] When the remaining space is greater than or equal to the space occupied by the received data frame descriptor (RPD), write the received data frame descriptor (RPD) into the remaining space and update the remaining space in the target storage space; or, when the remaining space is less than the space occupied by the received data frame descriptor (RPD), point the target pointer to the start address of the target storage space, update the received data frame descriptor (RPD), write the received data frame descriptor (RPD) into the target storage space, and update the remaining space in the target storage space;

[0122] When the remaining space is greater than or equal to the space occupied by the data frame, write the data frame into the remaining space; or, when the remaining space is less than the space occupied by the data frame, point the target pointer to the starting address of the target storage space and update the received data frame descriptor RPD, and write the data frame into the target storage space.

[0123] Specifically, as Figure 4 shown, the pointer in the second data frame processor points to the target address in the target storage space; optionally, the target address is the address at the end of the previous data transfer, that is, the data to be moved can be stored starting from the next address corresponding to the address at the end of the previous data transfer; thus, the second data frame processor can determine the remaining space based on the target address in the target storage space and the target storage space, and write the received header descriptor RHD, the received data frame descriptor RPD, and the data frame into the remaining space; optionally, when moving the data and data-related control information in the external storage device to the remaining space in the target storage space in the memory, first move the received header descriptor RHD to the remaining space, and when the remaining space is greater than or equal to the space occupied by the received header descriptor RHD, write the received header descriptor RHD into the remaining space and update the remaining space in the target storage space after the received header descriptor RHD is moved; or, when the remaining space is less than the space occupied by the received header descriptor RHD and the data corresponding to the starting address of the target storage space has been read and is in an idle state, the second data frame processor points the target pointer to the starting address of the target storage space and updates the received data frame descriptor RPD, indicating the data write address when the status information of the target storage space is full, so as to continue writing the received header descriptor RHD.

[0124] Optionally, after the second data frame processor moves the received header descriptor RHD to the target storage space in the memory, it can continue to move the received data frame descriptor RPD; optionally, when the remaining space is greater than or equal to the space occupied by the received data frame descriptor RPD, write the received data frame descriptor RPD into the remaining space and update the remaining space in the target storage space after the received header descriptor RHD is moved; or, when the remaining space is less than the space occupied by the received data frame descriptor RPD and the data corresponding to the starting address of the target storage space has been read and is in an idle state, the second data frame processor points the target pointer to the starting address of the target storage space and writes the updated received data frame descriptor RPD into the target storage space.

[0125] Optionally, after the second data frame processor transports the received data frame descriptor RPD to the target storage space in the memory, it can continue to transport the data in the external storage device; optionally, when the remaining space is greater than or equal to the space occupied by the data frame, the second data frame processor writes the data frame into the remaining space; or, when the remaining space is less than the space occupied by the data frame, the second data frame processor points the target pointer to the starting address of the storage space and updates the received data frame descriptor RPD, so as to continue writing the data frame.

[0126] Optionally, the second data frame processor can also send a data frame identifier; the data frame identifier includes at least one of the following: a data frame start identifier, a data frame middle identifier, and a data frame end identifier. Optionally, when the second data frame processor moves the data frame information and the control information related to the data frame in the external storage device to the memory, it can also send a data frame identifier, so as to accurately label the moved data, so that the memory can accurately and conveniently identify the start position and the end position of the incoming data according to the data frame identifier, and determine the transfer status of the data, so as to accurately write the transferred data. Optionally, the data frame identifier includes a data frame start identifier, a data frame middle identifier, and a data frame end identifier, where the data frame start identifier is used to indicate the start position of the transferred data frame, the data frame middle identifier is used to indicate that the data is being transferred, and the data frame end identifier is used to indicate the end position of the transferred data frame, so that the memory can accurately and conveniently identify the start and end positions of the incoming data, and thus accurately write the transferred data.

[0127] In the above implementation device, when the remaining space in the target storage space in the memory is not enough to write the data and control information to be transferred, by updating the received data frame descriptor RPD, the data write address in the case where the status information of the target storage space is full is indicated, so as to realize the writing of the data and control information in the external storage device in the memory.

[0128] The data transmission method provided by the present application will be described below, and the data transmission method described below can be mutually corresponding and referred to the DMA device described above.

[0129] The data transmission method provided in this embodiment includes:

[0130] Receiving a data read request; the data read request carries the position information of the transmission header descriptor THD in the memory;

[0131] Obtain the THD and the first data frame from the memory according to the data read request, and transfer the THD and the first data frame to an external storage device; the THD is used to carry the first control information and indicate the data frame information to be read out; the first data frame is the data frame that needs to be transferred from the memory to the external storage device; and / or,

[0132] Receive a data write request; the data write request carries the location information of the received header descriptor RHD in the external storage device;

[0133] Obtain the RHD and the second data frame from the external storage device according to the data write request, and transfer the RHD and the second data frame to the memory; the RHD is used to carry the second control information and indicate the data frame information to be written; the second data frame is the data frame that needs to be transferred from the external storage device to the memory.

[0134] The device in the embodiments of the present application is used to execute the methods in any of the foregoing method embodiments, and its implementation principles and technical effects are similar, and will not be elaborated here.

[0135] Figure 5 An entity structure diagram of an electronic device is exemplified. The electronic device may include: a processor 810, a communication interface 820, a memory 830, and a communication bus 840. Among them, the processor 810, the communication interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call the logical instructions in the memory 830 to execute a data transmission method, and the method includes: receiving a data read request; the data read request carries the location information of the transmission header descriptor THD in the memory; obtaining the THD and the first data frame from the memory according to the data read request, and transferring the THD and the first data frame to the external storage device; the THD is used to carry the first control information and indicate the data frame information to be read out; and / or, receiving a data write request; the data write request carries the location information of the received header descriptor RHD in the external storage device; obtaining the RHD and the second data frame from the external storage device according to the data write request, and transferring the RHD and the second data frame to the memory; the RHD is used to carry the second control information and indicate the data frame information to be written.

[0136] In addition, when the logical instructions in the above-mentioned memory 830 can be implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of this application. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0137] On the other hand, this application also provides a computer program product. The computer program product includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions. When the program instructions are executed by a computer, the computer can execute the data transmission method provided by the above-mentioned various methods. The method includes: receiving a data read request; the data read request carries the location information of the transmission header descriptor THD in the memory; according to the data read request, obtaining the THD and the first data frame from the memory, and moving the THD and the first data frame to an external storage device; the THD is used to carry the first control information and indicate the data frame information to be read; and / or, receiving a data write request; the data write request carries the location information of the receive header descriptor RHD in the external storage device; according to the data write request, obtaining the RHD and the second data frame from the external storage device, and moving the RHD and the second data frame to the memory; the RHD is used to carry the second control information and indicate the data frame information to be written.

[0138] On another aspect, this application also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it is implemented to execute the data transmission method provided by the above-mentioned various methods. The method includes: receiving a data read request; the data read request carries the location information of the transmission header descriptor THD in the memory; according to the data read request, obtaining the THD and the first data frame from the memory, and moving the THD and the first data frame to an external storage device; the THD is used to carry the first control information and indicate the data frame information to be read; and / or, receiving a data write request; the data write request carries the location information of the receive header descriptor RHD in the external storage device; according to the data write request, obtaining the RHD and the second data frame from the external storage device, and moving the RHD and the second data frame to the memory; the RHD is used to carry the second control information and indicate the data frame information to be written.

[0139] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without creative work.

[0140] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the essence of the above technical solution, or the part that contributes to the prior art, can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0141] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of each embodiment of the present application.

Claims

1. A direct memory access (DMA) device, characterized in that, Including: A first DMA controller, a first data frame processor, a second DMA controller, and a second data frame processor; The first DMA controller is configured to receive a data read request and send the data read request to the first data frame processor; the data read request carries location information of a transmission header descriptor (THD) in a memory; The first data frame processor is configured to obtain the THD and a first data frame from the memory according to the data read request, and move the THD and the first data frame to an external storage device; The THD is configured to carry first control information and indicate data frame information to be read out; The first data frame is a data frame that needs to be moved from the memory to the external storage device; The second DMA controller is configured to receive a data write request and send the data write request to the second data frame processor; the data write request carries location information of a receive header descriptor (RHD) in the external storage device; The second data frame processor is configured to obtain the RHD and a second data frame from the external storage device according to the data write request, and move the RHD and the second data frame to the memory; The RHD is configured to carry second control information and indicate data frame information to be written; the second data frame is a data frame that needs to be moved from the external storage device to the memory; The first data frame processor is further configured to: Send a data frame identifier; the data frame identifier includes at least one of the following: a data frame start identifier, a data frame middle identifier, and a data frame end identifier; Specifically, the second data frame processor is configured to: Determine a target storage space in the memory; the target storage space is used for the second data frame processor to write data; According to the data write request, obtain a receive header descriptor (RHD), a receive data frame descriptor (RPD), and a data frame from the external storage device; The receive data frame descriptor (RPD) is configured to indicate status information of the target storage space and / or a data write address when the status information of the target storage space is full; Write the receive header descriptor (RHD), the receive data frame descriptor (RPD), and the data frame into the target storage space in the memory.

2. The DMA device according to claim 1, characterized in that, Specifically, the first data frame processor is configured to: Obtain a transmission header descriptor (THD) from the memory according to the data read request, and obtain first control information and indication information according to the transmission header descriptor (THD); the indication information is used to indicate data frame information to be read out; Obtain a data frame to be read out according to the indication information; Move the first control information and the data frame to be read out to the external storage device.

3. The DMA device according to claim 1, characterized in that, Specifically, the second data frame processor is configured to: Point a target pointer to a target address in the target storage space; the target address is the address at the end of the previous data transmission; Determine remaining space in the target storage space according to the target address and the target storage space; According to the remaining space, write the receive header descriptor (RHD), the receive data frame descriptor (RPD), and the data frame into the target storage space in the memory.

4. The DMA device according to claim 3, characterized in that, The second data frame processor is specifically configured to: When the remaining space is greater than or equal to the space occupied by the received header descriptor (RHD), write the RHD into the remaining space and update the remaining space in the target storage space; or, when the remaining space is less than the space occupied by the RHD, point the target pointer to the start address of the target storage space, update the received data frame descriptor (RPD), write the RHD into the target storage space, and update the remaining space in the target storage space; When the remaining space is greater than or equal to the space occupied by the received data frame descriptor (RPD), write the RPD into the remaining space and update the remaining space in the target storage space; or, when the remaining space is less than the space occupied by the RPD, point the target pointer to the start address of the target storage space, update the RPD, write the RPD into the target storage space, and update the remaining space in the target storage space; When the remaining space is greater than or equal to the space occupied by the data frame, write the data frame into the remaining space; or, when the remaining space is less than the space occupied by the data frame, point the target pointer to the start address of the target storage space, update the RPD, and write the data frame into the target storage space.

5. The DMA device according to claim 1 or 2, characterized in that, It further includes: A DMA read / write controller, a transmission selector, an arbiter, and a transmission status module; Wherein, the DMA read / write controller is connected to the bus, and the DMA read / write controller is used to obtain the data frame to be read out and the transmission header descriptor (THD) from the memory through the bus; and / or, write the received data frame, the received header descriptor (RHD), and the received data frame descriptor (RPD) into the memory; The input end of the transmission selector is connected to the first DMA controller, and the output end of the transmission selector is connected to the first data frame processor, and is used to determine the DMA channel for transmitting data; The arbiter is connected to the first data frame processor, the transmission status module, the second data frame processor, and the DMA read / write controller, and is used to determine the current transmission task and update the transmission status module; The transmission status module is used to indicate the current data transmission status.

6. A data transmission method, characterized in that, The method is applied to the DMA device according to any one of claims 1-5, and the method includes: Receiving a data read-out request; the data read-out request carries the position information of the transmission header descriptor (THD) in the memory; According to the data read-out request, obtaining the THD and the first data frame from the memory and moving the THD and the first data frame to an external storage device; the THD is used to carry the first control information and indicate the data frame information to be read out; the first data frame is the data frame that needs to be moved from the memory to the external storage device. A data frame sending identifier; the data frame identifier includes at least one of the following: a data frame start identifier, a data frame middle identifier, and a data frame end identifier; and / or, A received data writing request; the data writing request carries location information of a received header descriptor (RHD) in an external storage device; According to the data writing request, obtain the RHD and a second data frame from the external storage device, and move the RHD and the second data frame to the memory; the RHD is used to carry second control information and indicate data frame information to be written; the second data frame is a data frame that needs to be moved from the external storage device to the memory; the step of obtaining the RHD and the second data frame from the external storage device according to the data writing request and moving the RHD and the second data frame to the memory includes: Determine a target storage space in the memory; the target storage space is used for writing data; According to the data writing request, obtain a received header descriptor (RHD), a received data frame descriptor (RPD), and a data frame from the external storage device; the received data frame descriptor (RPD) is used to indicate status information of the target storage space and / or a data writing address when the status information of the target storage space is full; Write the received header descriptor (RHD), the received data frame descriptor (RPD), and the data frame into the target storage space in the memory.

7. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the data transmission method as described in claim 6.

8. A non-transitory computer-readable storage medium, on which a computer program is stored, characterized in that, When the computer program is executed by the processor, it implements the data transmission method as described in claim 6.

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