Duplexer

Abstract

A duplexer includes a first filter circuit and a second filter circuit. The first filter circuit is used to provide a first signal path for a first radio frequency signal and includes a first adjustable resonant circuit for adjusting a first transmission zero corresponding to a first frequency multiple of the first radio frequency signal. The second filter circuit is used to provide a second signal path for a second radio frequency signal and includes a second adjustable resonant circuit for adjusting a first transmission zero corresponding to a first frequency multiple of the second radio frequency signal. The first frequency multiple of the first radio frequency signal corresponding to the first filter circuit is a fourth harmonic of the first radio frequency signal.

Description

Technical Field

[0001] The present invention relates to a duplexer, and more particularly to a duplexer for dual-band WiFi applications. Background Art

[0002] A diplexer enables the transmission or reception of two signals of different frequencies over the same transmission line or antenna. Common diplexers include low-temperature co-fired ceramic (LTCC) duplexers, integrated passive device (IPD) duplexers, and thin film duplexers. However, these duplexers struggle to strike a balance between insertion loss (IL), size, manufacturing cost, and stop-band suppression. Therefore, designing a diplexer with low insertion loss, a compact size, low cost, and good stop-band suppression remains an urgent challenge. Summary of the Invention

[0003] The present invention provides a duplexer for dual-band WiFi applications to solve the above-mentioned problems. The present invention discloses a duplexer comprising a first end, a first filter circuit, a second end, a second filter circuit, and a third end. The first filter circuit is coupled to the first end to provide a first signal path for a first radio frequency signal, and comprises a first adjustable resonant circuit for adjusting a first transmission zero point corresponding to a first frequency multiple of the first radio frequency signal. The second end is coupled to the first filter circuit. The second filter circuit is coupled to the first end to provide a second signal path for a second radio frequency signal, and comprises a second adjustable resonant circuit for adjusting a first transmission zero point corresponding to a first frequency multiple of the second radio frequency signal. The third end is coupled to the second filter circuit. The first frequency multiple of the first radio frequency signal corresponding to the first filter circuit is a fourth harmonic of the first radio frequency signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figure 1 Schematic diagram of a duplexer according to an embodiment of the present invention.

[0005] Figure 2 FIG. 1 is a schematic diagram of the layout of a duplexer according to an embodiment of the present invention.

[0006] Figure 3 Schematic diagram of the insertion loss of a duplexer according to an embodiment of the present invention.

[0007] Explanation of symbols

[0008] 10: Duplexer

[0009] 100: first filter circuit

[0010] 102: First adjustable resonant circuit

[0011] 1020,1120:Capacitor circuit

[0012] 1022,1122: Inductor and capacitor series circuit

[0013] 104: First resonance unit

[0014] 106: Second resonance unit

[0015] 110: Second filter circuit

[0016] 112: Second adjustable resonant circuit

[0017] 114: Resonance unit

[0018] E1: First end

[0019] E2: Second end

[0020] E3: The third end

[0021] L1, L2, L3, L4: inductors

[0022] C1, C2, C3, C4, C5, C6, C7, C8: capacitors

[0023] T1, T2: transistors

[0024] BW:Balling

[0025] 20: Layout

[0026] 30: Insertion loss

[0027] 302,312: Curve DETAILED DESCRIPTION

[0028] Figure 1The figure is a schematic diagram of a diplexer 10 according to an embodiment of the present invention. The diplexer 10 includes a first terminal E1, a first filter circuit 100, a second terminal E2, a second filter circuit 110, and a third terminal E3. The first filter circuit 100 is coupled to the first terminal E1 to provide a first signal path for a first radio frequency (RF) signal. The first filter circuit 100 includes a first tunable resonant circuit 102. The first tunable resonant circuit 102 can be used to adjust a first transmission zero corresponding to a first multiple frequency of the first RF signal. The second terminal E2 is coupled to the first filter circuit 100. The second filter circuit 110 is coupled to the first terminal E1 to provide a second signal path for a second RF signal. The second filter circuit 110 includes a second tunable resonant circuit 112. The second tunable resonant circuit 112 can be used to adjust a first transmission zero corresponding to a first multiple frequency of the second RF signal. The third terminal E3 is coupled to the second filter circuit 110. In one embodiment, the first harmonic of the first RF signal is a fourth harmonic of the first RF signal. That is, based on the first transmission zero of the first harmonic of the first RF signal, the first tunable resonant circuit 102 of the first filtering circuit 100 can filter out the fourth harmonic of the first RF signal.

[0029] In one embodiment, a frequency of the first RF signal is different from a frequency of the second RF signal. In one embodiment, a range of the frequency of the first RF signal and a range of the frequency of the second RF signal are roughly in a multiple relationship. For example, the frequency range of the second RF signal may be twice the frequency range of the first RF signal, but is not limited thereto. For example, the frequency range of the first RF signal and the frequency range of the second RF signal may be determined according to a communication protocol (such as the IEEE802.11 communication protocol). For example, the frequency range of the first RF signal may be between 2.4 GHz and 2.483 GHz, while the frequency range of the second RF signal may be between 5.15 GHz and 5.85 GHz. That is, in this embodiment, the frequency of the second RF signal is approximately twice the frequency of the first RF signal.

[0030] In one embodiment, the first filter circuit 100 further includes a first resonant unit 104 and a second resonant unit 106. The first resonant unit 104 is coupled between the first end E1 and the first tunable resonant circuit 102 to provide a second transmission zero corresponding to the second harmonic of the first RF signal. The second resonant unit 106 is coupled between the first resonant unit 104 and the first tunable resonant circuit 102 to provide a third transmission zero corresponding to the third harmonic of the first RF signal. In other words, the first resonant unit 104 and the second resonant unit 106 can respectively filter out the second and third harmonics of the first RF signal. In other words, through the first tunable resonant circuit 102, the first resonant unit 104, and the second resonant unit 106, and their corresponding first, second, and third transmission zeros of the first RF signal, the first filter circuit 100 can respectively filter out the fourth, second, and third harmonics of the first RF signal.

[0031] In one embodiment, the first tunable resonant circuit 102 of the duplexer 10 further includes a capacitor circuit 1020. The capacitor circuit 1020 includes a capacitor C1 and a transistor T1, with the transistor T1 connected in series with the capacitor C1. The first tunable resonant circuit 102 may include an inductor-capacitor series circuit (LC series circuit) 1022. The LC series circuit 1022 of the first tunable resonant circuit 102 is connected in parallel with the capacitor circuit 1020 of the first tunable resonant circuit 102. A capacitance value of the capacitor circuit 1020 is adjusted based on the transistor T1 in the capacitor circuit 1020 (e.g., based on a control voltage or other parameter received by the transistor T1). For example, by adjusting the control voltage received by the transistor T1, the capacitor circuit 1020 can be treated as a variable capacitor. By adjusting the capacitance value of the capacitor circuit 1020, a first transmission zero corresponding to the fourth harmonic of the first RF signal can be adjusted. Alternatively, when transistor T1 operates as a variable capacitor, the control voltage received by transistor T1 can be adjusted according to the complementary metal-oxide-semiconductor (CMOS) process. For example, for transistor T1 using 0.18 micron (μm) CMOS technology, a range of 0 to 1.8 volts can be selected as the control voltage received by transistor T1. By using transistor T1, the first tunable resonant circuit 102 can effectively overcome process variations and maintain a good transmission zero position. The capacitor-inductor series circuit 1022 includes an inductor L1 and a capacitor C2. The first tunable resonant circuit 102 can include an inductor L1 (i.e., the inductor L1 in the capacitor-inductor series circuit 1022), and the inductor L1 of the first tunable resonant circuit 102 has a spiral direction. The second tunable resonant circuit 112 includes an inductor L2, and the inductor L2 of the second tunable resonant circuit 112 has a spiral direction. The spiral direction of the inductor L1 of the first tunable resonant circuit 102 may be different from the spiral direction of the inductor L2 of the second tunable resonant circuit 112 .

[0032] In one embodiment, the second filter circuit 110 further includes a resonance unit 114. The resonance unit 114 is coupled between the first terminal E1 and the second tunable resonance circuit 112 to provide a second transmission zero corresponding to the second RF signal. In other words, the resonance unit 114 can filter out unwanted noise signals of a specific frequency from the second RF signal.

[0033] In one embodiment, the second tunable resonant circuit 112 of the duplexer 10 includes an inductor-capacitor series circuit 1122 and a capacitor circuit 1120. The inductor-capacitor series circuit 1122 of the second tunable resonant circuit 112 may include an inductor L2 and a capacitor C3. The capacitor circuit 1120 of the second tunable resonant circuit 112 may include a capacitor C4 and a transistor T2. Transistor T2 is connected in series with capacitor C4 to adjust a capacitance value of the capacitor circuit 1120 of the second tunable resonant circuit 112. The capacitance value of the capacitor circuit 1120 is adjusted based on the transistor T2 in the capacitor circuit 1120 (e.g., based on a control voltage or other parameter received by transistor T2). In other words, by adjusting the control voltage received by transistor T2, the capacitor circuit 1120 can be treated as a variable capacitor. By adjusting the capacitance value of the capacitor circuit 1120, the position of the first transmission zero of the second RF signal corresponding to the second harmonic of the second RF signal can be adjusted. When transistor T2 is operated as a variable capacitor, the control voltage received by transistor T2 can be adjusted according to the complementary metal oxide semiconductor process. For example, for transistor T2 using 0.18 micron complementary metal oxide semiconductor technology, 0 to 1.8 volts can be selected as the control voltage received by transistor T2. Through transistor T2, the second adjustable resonant circuit 112 can effectively overcome process variations and maintain a good position of the transmission zero point. In addition, since the capacitance values of capacitors C3 and C4 in the second filter circuit 110 are relatively small, they are more likely to drift due to process variations. Through the characteristics of transistor T2 as a variable capacitor, the drift of capacitors C3 and C4 due to process variations can be overcome to maintain a good position of the first transmission zero point of the second RF signal.

[0034] Furthermore, the first resonant unit 104 of the first filter circuit 100 may include an inductor L3 and a capacitor C5. The inductor L3 of the first resonant unit 104 is connected in parallel with the capacitor C5. The inductor L3 of the first resonant unit 104 of the first filter circuit 100 has a spiral orientation. The second resonant unit 106 of the first filter circuit 100 includes a capacitor C6 and a bondwire BW. The bondwire BW of the second resonant unit 106 is connected in series with the capacitor C6. In other words, through the inductor-capacitor parallel circuit formed by the inductor L3 and the capacitor C5, the first resonant unit 104 can filter out the second harmonic signal of the first RF signal. Through the circuit formed by the bondwire BW and the capacitor C6, the second resonant unit 106 of the first filter circuit 100 can filter out the third harmonic signal of the first RF signal. In one embodiment, the resonant unit 114 of the second filter circuit 110 includes an inductor L4 and a capacitor C7. The inductor L4 of the resonant unit 114 is connected in series with the capacitor C7. The inductor L4 of the resonant unit 114 has a spiral orientation. That is, through the LC series circuit formed by the inductor L4 and the capacitor C7, the resonant unit 114 of the second filter circuit 110 can filter out the frequency signal corresponding to the second transmission zero point of the second RF signal. For example, when the frequency of the second RF signal falls between 5.15 GHz and 5.85 GHz, the second transmission zero point of the second RF signal corresponding to the resonant unit 114 can filter out signals with a frequency of approximately 2.4 GHz.

[0035] For example, the second filter circuit 110 may include a resonance unit 114 to provide a second transmission zero corresponding to the second RF signal. In other words, the resonance unit 114 can filter out unwanted noise signals of a specific frequency in the second RF signal. For example, the second filter circuit 110 may include a second transmission zero. When the second RF signal (such as a 5 GHz signal) passes through the second signal path, the second transmission zero can filter out the noise corresponding to the first RF signal (such as a 2.4 GHz signal), thereby reducing interference at the signal receiving end to maintain the performance of the duplexer 10. The second adjustable resonant circuit 112 of the second filter circuit 110 provides a first transmission zero corresponding to the first harmonic of the second RF signal. For example, this first harmonic can be the second harmonic of the second RF signal. Therefore, the second adjustable resonant circuit 112 can filter out the second harmonic signal of the second RF signal (such as a 5 GHz signal).

[0036] In one embodiment, the spiral direction of the inductor L1 of the first filter circuit 100 and the spiral direction of the inductor L3 of the first filter circuit 100 are the same; however, this spiral direction is different from the spiral direction of the inductor L2 of the second filter circuit 110 and the spiral direction of the inductor L4 of the second filter circuit 110. For example, the spiral directions of the inductor L2 and the inductor L4 may be clockwise, while the spiral directions of the inductor L1 and the inductor L3 may be counterclockwise.

[0037] In one embodiment, the second filtering circuit 110 further includes a capacitor C8 , and the capacitor C8 is coupled between the first end E1 and the second adjustable resonant circuit 112 .

[0038] In one embodiment, the first filter circuit 100 and the second filter circuit 110 are fabricated using silicon-on-insulator (SOI) technology. In other embodiments, the capacitors and inductors may be implemented as integrated passive devices (IPDs), while the transistors may be fabricated using a complementary metal oxide semiconductor (CMOS) process, depending on actual needs. Using passive components fabricated using an IPD process effectively reduces costs.

[0039] In one embodiment, the first filter circuit 100 receives a first RF signal from the first end E1 or the second end E2, or transmits the first RF signal to the first end E1 or the second end E2. That is, the first end E1 and the second end E2 can serve as both signal transmitting ends and signal receiving ends of the first filter circuit 100. The first signal path provided by the first filter circuit 100 for the first RF signal can be from the first end E1 to the second end E2, or from the second end E2 to the first end E1. In one embodiment, the second filter circuit 110 receives a second RF signal from the first end E1 or the third end E3, or transmits the second RF signal to the first end E1 or the third end E3. That is, the first end E1 and the third end E3 can serve as both signal transmitting ends and signal receiving ends of the second filter circuit 110. The second signal path provided by the second filter circuit 100 to the second RF signal may be from the first end E1 to the third end E3 , or from the third end E3 to the first end E1 .

[0040] Figure 2 FIG. 2 is a schematic diagram of a layout 20 of a duplexer 10 according to an embodiment of the present invention. Figure 2Only the layout of the inductor L1, inductor L2, inductor L3 and inductor L4 of the duplexer 10 is shown, and the layout of other components of the duplexer 10 is not shown. Figure 2 As shown, in the first filter circuit 100 of the duplexer 10, the first adjustable resonant circuit 102 includes an inductor L1, and the first resonant unit 104 includes an inductor L3. Inductors L1 and L3 have a spiral direction, which may be counterclockwise. In the second filter circuit 110 of the duplexer 10, the second adjustable resonant circuit includes an inductor L2, and the resonant unit 114 includes an inductor L4. Inductors L2 and L4 have a spiral direction, which may be clockwise. That is, the spiral direction (e.g., counterclockwise) of the inductor L1 of the first adjustable resonant circuit 102 differs from the spiral direction (e.g., clockwise) of the inductor L2 of the second adjustable resonant circuit 112. The spiral direction (e.g., counterclockwise) of the inductor L3 of the first resonant unit 104 differs from the spiral direction (e.g., clockwise) of the inductor L4 of the resonant unit 114. By designing the inductors of the first filter circuit 100 (ie, inductors L1 and L3 ) and the inductors of the second filter circuit 110 (ie, inductors L2 and L4 ) with different spiral directions, magnetic coupling between components of the duplexer 10 can be reduced, thereby reducing electrical interference between components of the duplexer 10 .

[0041] Furthermore, since the number of inductors used in the duplexer 10 (i.e., four inductors) is less than that of conventional duplexers, the duplexer 10 can be designed on a 600μm×600μm high-resistance silicon substrate. Compared to conventional duplexers that require designing on a 1600μm×800μm substrate, the circuit design area of the duplexer 10 disclosed in the present invention is smaller.

[0042] Figure 3 FIG. 3 is a schematic diagram of the insertion loss 30 of the duplexer 10 according to an embodiment of the present invention. Figure 3 In FIG, the horizontal axis represents the frequency of the RF signal in gigahertz (GHz); the vertical axis represents the insertion loss (IL) of the RF signal in decibels (dB). The first RF signal has a baseband frequency of 2.4 GHz. Curve 302 represents the insertion loss of the first RF signal passing through the first filter circuit 100 of the duplexer 10. Figure 3As shown by curve 302 in FIG, when a first RF signal passes through the first filter circuit 100 of the duplexer 10, the insertion losses of the second harmonic (around 4.8 GHz), third harmonic (around 7.2 GHz), and fourth harmonic (around 9.6 GHz) of the first RF signal are approximately -40 dB (i.e., the second transmission zero provided by the first resonant unit 104 of the first filter circuit 100), -43 dB (i.e., the third transmission zero provided by the second resonant unit 106 of the first filter circuit 100), and -31 dB (i.e., the first transmission zero provided by the first tunable resonant circuit 102 of the first filter circuit 100), respectively. In other words, the three transmission zeros of the duplexer 10 of the present invention block the second, third, and fourth harmonics of the fundamental frequency signal more effectively than the corresponding transmission zeros of conventional duplexers.

[0043] Please continue to refer to Figure 3 The second RF signal has a baseband frequency of 5 GHz. Curve 312 shows the insertion loss of the second RF signal passing through the second filter circuit 110 of the duplexer 10. The transmission zeros provided by conventional duplexers are located at approximately 2.5 GHz and 3.2 GHz, with insertion losses of approximately -33 dB and -38 dB, respectively. When the second RF signal passes through the second filter circuit 110 of the duplexer 10, the frequency of the more prominent transmission zero is approximately 11.5 GHz (i.e., the first transmission zero provided by the second adjustable resonant circuit 112 of the second filter circuit 110). The second transmission zero provided by the second filter circuit 110, corresponding to the second RF signal, is located at approximately 2.6 GHz, with an insertion loss of approximately -36 dB (i.e., the second transmission zero provided by the resonant unit 114 of the second filter circuit 110). In other words, even though both the conventional duplexer and the second filter circuit 110 of the duplexer 10 provide two transmission zeros corresponding to the second RF signal, the conventional duplexer cannot filter out the second harmonic of the second RF signal. In contrast, the duplexer 10 of the present invention provides a transmission zero corresponding to the second harmonic of the second RF signal, and can filter out the second harmonic of the second RF signal.

[0044] In summary, the present invention discloses a duplexer for WiFi applications that offers low insertion loss, a compact size, low cost, and excellent stopband rejection. The duplexer disclosed in the present invention surpasses conventional duplexers in filtering the second and third harmonics of low-frequency signals. Furthermore, by utilizing fewer inductors, it effectively reduces circuit design area and cost, enabling the duplexer to maintain excellent performance within a simple architecture. Consequently, the problems encountered in the art are addressed.

[0045] The above description is only a preferred embodiment of the present invention. Any equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the present invention.

Claims

1. A duplexer, characterized in that: Includes: a first end; A first filtering circuit is coupled to the first end and is configured to provide a first signal path for a first radio frequency signal, wherein the first filtering circuit comprises: a first adjustable resonant circuit for adjusting a first transmission zero corresponding to a first frequency multiplication of the first radio frequency signal; a second terminal coupled to the first filtering circuit; a second filtering circuit coupled to the first end for providing a second signal path for a second RF signal, wherein the second filtering circuit comprises: a second adjustable resonant circuit for adjusting a first transmission zero corresponding to a first harmonic frequency of the second radio frequency signal; and a third terminal coupled to the second filtering circuit; The first frequency multiplication of the first radio frequency signal corresponding to the first filtering circuit is a fourth harmonic of the first radio frequency signal.

2. The duplexer according to claim 1, wherein: A frequency of the first radio frequency signal is different from a frequency of the second radio frequency signal.

3. The duplexer according to claim 2, wherein: A frequency range of the first radio frequency signal and a frequency range of the second radio frequency signal have a multiple relationship.

4. The duplexer according to claim 3, wherein: According to the IEEE 802.11 communication protocol, the frequency range of the first radio frequency signal and the frequency range of the second radio frequency signal are determined.

5. The duplexer according to claim 2, wherein: The first filter circuit further includes a second transmission zero corresponding to a second frequency multiplication of the first radio frequency signal, and the second frequency multiplication is a second harmonic of the first radio frequency signal.

6. The duplexer according to claim 5, wherein: The first filter circuit further includes a third transmission zero corresponding to a third harmonic of the first radio frequency signal. The third harmonic is a third harmonic of the first radio frequency signal.

7. The duplexer according to claim 5, wherein: The first adjustable resonant circuit includes an inductor having a spiral direction; the second adjustable resonant circuit includes an inductor having a spiral direction; and the spiral direction of the inductor of the first adjustable resonant circuit is different from the spiral direction of the inductor of the second adjustable resonant circuit.

8. The duplexer according to claim 2, wherein: The first adjustable resonant circuit includes a capacitor circuit. The capacitor circuit includes a capacitor and a transistor. The transistor of the capacitor circuit is connected in series with the capacitor of the capacitor circuit.

9. The duplexer according to claim 8, wherein: The first adjustable resonant circuit includes an inductor-capacitor series circuit. The inductor-capacitor series circuit of the first adjustable resonant circuit is connected in parallel with the capacitor circuit. A capacitance value of the capacitor circuit is adjusted according to the transistor of the capacitor circuit.

10. The duplexer according to claim 9, wherein: The first adjustable resonant circuit includes an inductor having a spiral direction; the second adjustable resonant circuit includes an inductor having a spiral direction; and the spiral direction of the inductor of the first adjustable resonant circuit is different from the spiral direction of the inductor of the second adjustable resonant circuit.

11. The duplexer according to claim 2, wherein: The second filter circuit further includes a first transmission zero corresponding to the first frequency multiplication of the second radio frequency signal, and the first frequency multiplication of the second filter circuit is a second harmonic of the second radio frequency signal.

12. The duplexer according to claim 1, wherein: The first filter circuit further comprises: a first resonance unit coupled between the first end and the first adjustable resonance circuit, for providing a second transmission zero corresponding to a second harmonic of the first radio frequency signal; and A second resonance unit is coupled between the first resonance unit and the first adjustable resonance circuit, and is used to provide a third transmission zero corresponding to a third harmonic of the first radio frequency signal.

13. The duplexer according to claim 12, wherein: The second filtering circuit further includes: a resonance unit coupled between the first end and the second adjustable resonance circuit, for providing a second transmission zero point corresponding to the second radio frequency signal.

14. The duplexer according to claim 13, wherein: The first adjustable resonant circuit includes an inductor-capacitor series circuit and a capacitor circuit. The inductor-capacitor series circuit of the first adjustable resonant circuit includes an inductor and a capacitor. The inductor of the inductor-capacitor series circuit of the first adjustable resonant circuit has a spiral direction.

15. The duplexer according to claim 14, wherein: The capacitor circuit of the first adjustable resonant circuit includes: a capacitor; and A transistor is connected in series with the capacitor and is used to adjust a capacitance value of the capacitor circuit of the first adjustable resonant circuit.

16. The duplexer according to claim 15, wherein: The second adjustable resonant circuit includes an inductor-capacitor serial circuit and a capacitor circuit. The inductor-capacitor serial circuit of the second adjustable resonant circuit includes an inductor and a capacitor. The inductor of the capacitor-inductor serial circuit of the second adjustable resonant circuit has a spiral direction.

17. The duplexer according to claim 16, wherein: The capacitor circuit of the second adjustable resonant circuit includes: a capacitor; and A transistor is connected in series with the capacitor and is used to adjust a capacitance value of the capacitor circuit of the second adjustable resonant circuit.

18. The duplexer according to claim 17, wherein: in: The first resonance unit of the first filter circuit includes an inductor and a capacitor, the inductor of the first resonance unit is connected in parallel with the capacitor, and the inductor of the first resonance unit has a spiral direction; and The second resonance unit of the first filter circuit includes: a capacitor; as well as A wire is connected in series with the capacitor.

19. The duplexer according to claim 18, wherein: The resonance unit of the second filter circuit includes an inductor and a capacitor. The inductor and the capacitor of the resonance unit are connected in series, and the inductor of the resonance unit has a spiral direction.

20. The duplexer according to claim 19, wherein: The spiral direction of the inductor of the inductor-capacitor series circuit of the first adjustable resonant circuit and the spiral direction of the inductor of the first resonant unit of the first filter circuit are different from the spiral direction of the inductor of the capacitor-inductor series circuit of the second adjustable resonant circuit and the spiral direction of the inductor of the resonant unit of the second filter circuit.

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