Bms hibernation wakeup circuit, method, bms, and powered device

Abstract

The application discloses a BMS hibernation wake-up circuit, a method, a BMS and a power-using device. The BMS hibernation wake-up circuit is provided with an enabling circuit, which generates an enabling level in response to the access of a charging device to wake up the BMS, and outputs a self-locking signal through a control circuit to enable the wake-up chip to keep the BMS awake; in addition, when the charging device is not pulled out, the wake-up chip is closed after the self-locking signal is cancelled, so that the BMS can enter a hibernation state, and the problem that the BMS cannot enter the hibernation state when the charging device is not pulled out in the prior art is solved.

Description

Technical Field

[0001] This application relates to the field of battery management, specifically to a BMS sleep / wake-up circuit, a method for BMS, and an electrical device. Background Technology

[0002] Charging is an essential function for new energy electric vehicles. For the ground charging interface of the national standard charging gun (such as the AC_CC interface of the AC charging gun and the DC_CC2 interface of the DC charging gun), the vehicle design requires that the battery management system (BMS) be able to be woken up after the charging gun is inserted into the vehicle. When engineers are designing, they focus on the plug-in wake-up function and often overlook the fact that the BMS should also be able to enter sleep mode when the charging gun is not removed. In this case, if the charging is completed or stopped but the charging gun is not removed, the BMS cannot enter sleep mode, thus increasing the lead-acid power consumption of the vehicle. Summary of the Invention

[0003] In view of the above problems, this application provides a BMS sleep / wake-up circuit, method, BMS, and power-consuming device, which can solve the problem that the charging device cannot enter sleep mode without unplugging the BMS.

[0004] In a first aspect, embodiments of this application provide a BMS sleep / wake-up circuit, including:

[0005] The first detection port is used to connect to the communication interface of the charging device;

[0006] An enabling circuit, connected to the first detection port and the wake-up chip of the BMS, is used to generate an enabling level in response to the access of a charging device to wake up the BMS;

[0007] The control circuit is used to output a self-locking signal to the wake-up chip to maintain the wake-up chip in the startup state; it is also used to stop outputting the self-locking signal in response to a sleep signal.

[0008] In the technical solution of this application embodiment, an enable circuit is configured to generate an enable level in response to the charging device connection when the charging device is connected, enabling the wake-up chip to start and wake up the BMS in a dormant state (i.e., start). A self-locking signal is output through a control circuit to keep the wake-up chip awake. Furthermore, when the charging device is not disconnected and a dormant state is required, the self-locking signal is removed, and the wake-up chip shuts down, allowing the BMS to enter a dormant state. This solves the problem in related technologies where the BMS cannot enter a dormant state if the charging device is not disconnected. Additionally, since the generated enable level will inevitably produce an edge signal, both edge-triggered and level-triggered wake-up chips can ensure that the BMS can enter a dormant state while the charging device is connected, thereby reducing lead-acid battery consumption.

[0009] In some embodiments, the control circuit is further configured to output the self-locking signal to the enabling circuit, and the enabling circuit is further configured to stop generating the enabling level in response to the self-locking signal and disconnect the connection with the first detection port.

[0010] In the technical solution of this application embodiment, the self-locking signal can disconnect the enable circuit from the first detection port to avoid mutual interference between the enable circuit and the charging device; it can also prevent the enable circuit from being interfered with and continuing to generate the enable level, so that it can smoothly enter the sleep state when the BMS needs to enter the sleep state.

[0011] In some embodiments, the communication interface of the charging device is grounded through an impedance circuit.

[0012] In the technical solution of this application embodiment, the way to trigger the enable circuit to respond to the charging device access is by triggering the grounding of the communication interface of the charging device, thereby generating an enable level, that is, providing a low-level signal to the first detection port. This is applicable to the AC_CC interface of the AC charging gun and the DC_CC2 interface of the DC charging gun. The solution is simple and widely used. In other embodiments, the way to trigger the enable circuit to respond to the charging device access can also be by providing a rising edge, falling edge, or high-level signal.

[0013] In some embodiments, the enabling circuit includes:

[0014] The trigger module is connected to the first detection port and the control circuit, and is used to generate a first level signal in response to the charging device access, and is also used to maintain the first level signal in response to the self-locking signal, and to disconnect the connection with the first detection port.

[0015] An enable module, connected to the trigger module, is used to generate an enable level based on a first level signal.

[0016] In the technical solution of this application embodiment, an embodiment of an enabling circuit is provided. The trigger module generates a first level signal in response to the access of the charging device (e.g., triggered by the grounding of the communication interface or the first detection port). The enabling module generates an enabling level based on the first level signal to start the wake-up chip, thereby waking up the BMS in a dormant state. In addition, since the enabling module generates an enabling level based on a first level signal, the trigger module also maintains the first level signal after receiving the self-locking signal, disconnecting the connection with the first detection port to avoid mutual interference between the BMS sleep wake-up circuit and the charging device. When the BMS needs to enter sleep mode without being enabled by the enabling level, the self-locking signal can be removed to successfully enter sleep mode. The circuit is simple and reliable.

[0017] In some embodiments, the trigger module includes a first switching transistor, a second switching transistor, a voltage divider network, a first resistor, and a second resistor. The voltage divider network is used to connect to a power supply and has a first voltage divider output terminal and a second voltage divider output terminal.

[0018] The first end of the first switching transistor is connected to the first detection port, the second end of the first switching transistor is connected to the first voltage divider output terminal, the control terminals of the first switching transistor and the second switching transistor are connected to the second voltage divider output terminal, the control terminals of the first switching transistor and the second switching transistor are also connected to the control circuit through the first resistor to receive the self-locking signal, the first end of the second resistor is connected to the first voltage divider output terminal, the second end of the second resistor and the first end of the second switching transistor are connected together as the output of the trigger module, and the second end of the second switching transistor is grounded.

[0019] In the technical solution of this application embodiment, an implementation of a trigger module is provided. The first level signal is, for example, a low level signal. The self-locking signal can allow the trigger module to disconnect from the first detection port through the first switching transistor to avoid mutual interference between the trigger module and the charging device. It can also keep the second switching transistor on, so that the trigger module maintains the output of the first level signal and prevents the enable circuit from continuing to generate the enable level. When the BMS needs to enter sleep mode, it can enter smoothly. This circuit structure is simple, reliable, and low in cost.

[0020] In some embodiments, the triggering module further includes a first unidirectional conduction device, wherein the first end of the first switch is positively connected to the first detection port through the first unidirectional conduction device.

[0021] In the technical solution of this application embodiment, the first unidirectional conducting device can prevent the current from the communication interface of the charging device from flowing to the BMS sleep-wake circuit, so as to avoid mutual interference.

[0022] In some embodiments, the enabling module includes a third switching transistor, a fourth switching transistor, a fifth switching transistor, a voltage divider unit, an energy storage device, a third resistor, a fourth resistor, and a fifth resistor;

[0023] The control terminal of the third switch is connected to the output of the trigger module. The first terminal of the third switch is connected to the power supply. The second terminal of the third switch is grounded through the voltage divider unit. The second terminal of the third switch is connected to the control terminal of the fourth switch. The first terminal of the fourth switch is connected to the power supply through the third resistor. The second terminal of the fourth switch is grounded. The first terminal of the fourth switch is connected to the first terminal of the energy storage device. The second terminal of the energy storage device is connected to the control terminal of the fifth switch. The first terminal of the fifth switch is connected to the power supply. The fourth resistor is connected between the control terminal and the first terminal of the fifth switch. The second terminal of the fifth switch is grounded through the fifth resistor and connected to the output terminal of the enable module.

[0024] The third switch is turned on based on the first level signal to turn on the fourth switch to drive the fifth switch to turn on, and the enable level is output at the output terminal of the enable module. After the fourth switch is turned on, the power supply charges the energy storage device through the fourth resistor. After the voltage of the energy storage device reaches the voltage to turn off the fifth switch, the fifth switch is turned off to stop outputting the enable level.

[0025] The duration from when the power supply starts charging the energy storage device until it reaches the voltage required to turn off the fifth switch is the duration for outputting the enable level.

[0026] In the technical solution of this application embodiment, when the fourth switch is turned on, the control terminal of the fifth switch is turned on by utilizing the principle that the voltage across the energy storage device, such as a capacitor, does not change abruptly, thereby outputting an enable level. At the same time, the power supply charges the energy storage device, and the voltage rises to the point that the fifth switch is turned off to stop outputting the enable level. By configuring the duration of the enable level during the charging process of the energy storage device, the fifth switch can be opened for a certain time window, thereby outputting an enable level to enable the chip to start up and wake up the BMS in the dormant state.

[0027] In some embodiments, the enabling module further includes a second unidirectional conducting device, which is forward-connected between the second terminal of the fifth switching transistor and the output terminal of the enabling module. The output terminal of the enabling module is connected to the first enable pin of the wake-up chip. This prevents the interference of other wake-up source voltages sharing the first enable pin of the wake-up chip from affecting the normal operation of the enabling module.

[0028] In some embodiments, the control circuit includes one of the control chips in the BMS, and the self-locking pin of the control chip is connected to the second enable pin of the wake-up chip and the enable circuit to provide the self-locking signal.

[0029] In the technical solution of this application embodiment, the enable circuit and the control circuit are connected to different pins of the wake-up chip, so that the control of the wake-up chip by the enable level and the control of the wake-up chip by the self-locking signal are independent of each other. In this way, the wake-up chip can be turned off after the self-locking signal is removed, so as to achieve hibernation and reduce the lead-acid consumption of the battery.

[0030] In some embodiments, the wake-up chip is a power supply chip for supplying power to the BMS, or a control chip for controlling the BMS to sleep or wake up.

[0031] In some embodiments, the control circuit and the wake-up chip are the same control chip, to facilitate system configuration.

[0032] In some embodiments, a sampling circuit connected to the output of the enabling circuit is further included, for outputting a gun insertion signal when the enabling signal is detected, and for outputting a gun withdrawal signal when the enabling signal is not detected. This facilitates system confirmation of operating status.

[0033] In some embodiments, the control circuit is connected to the sampling circuit and is further configured to shut off the output of the self-locking signal upon receiving the gun-drawing signal, thereby facilitating the BMS to enter gun-drawing sleep mode.

[0034] Secondly, embodiments of this application provide a BMS sleep-wake method, including:

[0035] When a charging device is connected, the wake-up chip of the BMS is enabled by generating an enable level in response to the connection of the charging device to wake up the BMS.

[0036] A self-locking signal is generated, which is used to maintain the wake-up chip in the startup state;

[0037] If a sleep signal is received, the output of the self-locking signal is stopped in response to the sleep signal.

[0038] In the technical solution of this application embodiment, when a charging device is connected, the BMS responds to the connection of the charging device by generating an enable level, enabling the wake-up chip to start and wake up the BMS. A self-locking signal is output to keep the wake-up chip awake. Furthermore, when the charging device is not disconnected and sleep mode is required, the self-locking signal is removed, and the wake-up chip shuts down, allowing the BMS to enter sleep mode. This solves the problem in related technologies where the BMS cannot enter sleep mode if the charging device is not disconnected. Moreover, since the generated enable level produces an edge signal, both edge-triggered and level-triggered wake-up chips can ensure that the BMS can enter sleep mode while the charging device is connected, thereby reducing lead-acid battery consumption.

[0039] In some embodiments, the latching signal is also used to prevent the generation of the enable level and disconnect the charging device.

[0040] In the technical solution of this application embodiment, the self-locking signal can disconnect the device from the charging device to avoid mutual interference with the charging device; it can also prevent the device from continuing to generate an enable level due to interference, so that it can smoothly enter the sleep state when the BMS needs to enter the sleep state.

[0041] Thirdly, this application provides a BMS, including the aforementioned BMS sleep / wake-up circuit.

[0042] In the technical solution of this application embodiment, when the charging device is connected, the BMS responds to the connection of the charging device by enabling the wake-up chip to start and wake up the BMS in the dormant state. After being woken up, the BMS maintains the start of the wake-up chip by outputting a self-locking signal. In addition, when the charging device is not unplugged, the BMS can enter the dormant state after the self-locking signal is canceled when dormant state is required. This solves the problem that the BMS cannot enter the dormant state if the charging device is not unplugged, thereby reducing the lead-acid consumption of the battery.

[0043] Fourthly, this application provides an electrical device, including a battery and the aforementioned BMS.

[0044] In the technical solution of this application embodiment, when the charging device is connected, the device responds to the trigger of the charging device connection to enable the wake-up chip to start and wake up the BMS in the sleep state of the device. After being woken up, the BMS maintains the start of the wake-up chip by outputting a self-locking signal. In addition, when the charging device is not unplugged, the BMS can enter the sleep state after the self-locking signal is canceled when sleep is required. This solves the problem that the BMS cannot enter the sleep state if the charging device is not unplugged, thereby reducing the lead-acid consumption of the battery.

[0045] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0046] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiments below. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0047] Figure 1 This is a block diagram of a BMS sleep / wake-up circuit provided in some embodiments of this application;

[0048] Figure 2 This is a block diagram of a BMS sleep / wake-up circuit provided in some embodiments of this application;

[0049] Figure 3 Circuit diagrams of BMS sleep / wake-up circuits provided in some embodiments of this application;

[0050] Figure 4 Flowcharts of BMS sleep-wake methods provided in some embodiments of this application;

[0051] The reference numerals in the detailed embodiments are as follows:

[0052] The device includes a charging device 10, a communication interface 11, a first detection port 110, an enable circuit 120, a trigger module 122, an enable module 124, a control circuit 130, a sampling circuit 140, and a wake-up chip 200.

[0053] First switch Q1, second switch Q2, third switch Q3, fourth switch Q4, impedance circuit R0, fifth switch Q5, energy storage device C1, first resistor R1, second resistor R2, third resistor R3, fourth resistor R4, fifth resistor R5, first enable pin EN1, second enable pin EN2, first unidirectional conductor D1, second unidirectional conductor D2, power supply U1. Detailed Implementation

[0054] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0055] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0056] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0057] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0058] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0059] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0060] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0061] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0062] Charging wake-up functionality often utilizes the edge-activated wake-up function of a wake-up chip, but many application chips currently do not support edge-activated wake-up. Therefore, the inventive concept of this application aims to enable the wake-up chip used for the charging wake-up function to possess basic level-based wake-up functionality, while also being compatible with edge-activated wake-up functionality. Specifically, this application mainly introduces an inventive concept for a BMS interface circuit for the interface of a charging device (such as a charging gun), supporting both on-line wake-up and sleep mode without disconnection. The wake-up chip used (such as a power chip or other chip with wake-up functionality) only needs to have a level-based or edge-based wake-up function in its wake-up channel.

[0063] For example, in new energy electric vehicle products, it supports the charging gun interface to be woken up by plugging in the charging gun through an equivalent impedance circuit and a grounded communication interface (such as the AC_CC interface of the AC charging gun and the DC_CC2 interface of the DC charging gun). It also supports the ability to achieve sleep mode without unplugging the charging gun under the control of the BMS, so that the BMS can enter sleep mode after charging is completed or stopped, saving energy and reducing the loss of lead-acid batteries in the vehicle.

[0064] Please see Figure 1 , Figure 1 This is a block diagram of a BMS sleep / wake-up circuit provided in some embodiments of this application. The BMS sleep / wake-up circuit includes a first detection port 110, an enable circuit 120, and a control circuit 130.

[0065] The first detection port 110 is used to connect to the communication interface 11 of the charging device 10; the enable circuit 120 is connected to the first detection port 110 and the wake-up chip 200 of the BMS, and is used to generate an enable level to wake up the BMS in response to the access of the charging device 10; the control circuit 130 outputs a self-locking signal to the wake-up chip 200 to maintain the wake-up chip 200 in the start-up state, and is also used to stop outputting the self-locking signal in response to the sleep signal. This turns off the wake-up chip 200, causing the BMS to enter a sleep state, solving the problem in related technologies that the charging device 10 cannot enter a sleep state without unplugging the BMS, and reducing the lead-acid consumption of the battery.

[0066] The charging device 10 is, for example, a charging gun or a general charging adapter available on the market. For the BMS sleep-wake-up circuit, when the charging device 10 is connected, it will bring a wake-up signal to the first detection port 110, such as a high level, low level, rising edge or falling edge signal. The enable circuit 120 responds to the wake-up signal and generates an enable level to enable the BMS wake-up chip 200 to start, so that the BMS wake-up chip 200 wakes up the entire BMS, including the control circuit 130.

[0067] In some embodiments, an enable level is generated in response to the connection of the charging device 10, and the enable level disappears after the BMS wake-up chip 200 is started. Therefore, a latching signal needs to be generated to the wake-up chip 200 before the enable level disappears or before the BMS wake-up chip 200 is woken up and automatically shuts down to maintain the wake-up chip 200 in the started state. Subsequently, when the BMS needs to enter sleep mode, the latching signal is removed, which shuts down the wake-up chip 200, allowing the BMS to enter sleep mode. It can be seen that since the enable level wakes up the BMS and disappears immediately, it is no longer necessary to detect whether the charging device 10 is connected to determine whether sleep mode is needed. This solves the problem in related technologies where the charging device 10 cannot enter sleep mode without disconnecting the BMS, reducing lead-acid battery consumption.

[0068] It is understandable that generating an enable level will necessarily produce an edge signal. For example, an enable level generated by the enable circuit 120 being triggered by the grounding of the first detection port 110 is a high level, which must include both a rising edge and a falling edge. Therefore, the BMS wake-up chip 200 can be enabled by a high-level active enable or by a rising edge active enable. The control circuit 130 is part of the BMS. When the BMS in sleep mode is woken up, the control circuit 130 is activated. Therefore, after the wake-up chip 200 is activated, it will wake up the BMS in sleep mode. The control circuit 130 outputs a latching signal to maintain the wake-up chip 200 in the activated state, ensuring that the wake-up chip 200 always keeps the BMS awake and working, thus completing the wake-up process of the BMS in sleep mode. It is understandable that to maintain the wake-up chip 200 in the activated state, the latching signal should be generated within the duration of the enable level or before the wake-up chip 200 automatically shuts down after being woken up.

[0069] Subsequently, for example, when charging is completed and stopped, if you want to reduce lead-acid battery consumption, since the enable level has stopped outputting, you can directly stop the output of the self-locking signal to shut down the wake-up chip 200 and put the BMS into sleep mode. This BMS wake-up and sleep control method can be applied to wake-up chips 200 that are triggered by level and / or edge.

[0070] In some embodiments, the communication interface 11 of the charging device 10 is grounded through an impedance circuit R0.

[0071] The communication interface 11 of the charging device 10 is, for example, the AC_CC interface of an AC charging gun or the DC_CC2 interface of a DC charging gun, or the communication interface of a charging adapter, and the impedance circuit R0 is the equivalent resistance of the interface. Taking the charging gun as an example, after the charging gun is connected to the charging interface, the corresponding interface of the charging interface is grounded through the communication interface 11 (i.e., the AC_CC interface of the AC charging gun or the DC_CC2 interface of the DC charging gun) to enter the charging gun connection stage, and the communication interface 11 is in a grounded state during this stage.

[0072] It can be understood that when the charging gun is connected, the first detection port 110 is connected to the communication interface 11 of the charging device 10 and is pulled low to ground by the communication interface 11 of the charging device 10, that is, a low-level signal is input. Conversely, when the charging device 10 is not connected, the first detection port 110 is at a high level.

[0073] The enabling circuit 120 is triggered by the grounding of the first detection port 110 to determine when the charging device 10 is connected. In response to the connection of the charging device 10, it outputs an enabling level to activate the wake-up chip 200 to wake up the BMS from its dormant state, and then deactivates the activation. Furthermore, the control circuit 130 outputs a self-locking signal to keep the wake-up chip 200 awake for the BMS. Additionally, when the charging device 10 is not disconnected, since the enabling level is deactivated, when sleep mode is needed later, the self-locking signal is deactivated and the wake-up chip 200 shuts down, allowing the BMS to enter a sleep state. This solves the problem that the BMS cannot enter sleep mode if the charging device 10 is not disconnected. Moreover, since the generated enabling level will inevitably produce an edge signal, both edge-triggered and level-triggered wake-up chips 200 can ensure that the BMS can enter sleep mode while the charging device 10 is connected, thereby reducing lead-acid battery consumption.

[0074] In some embodiments, the control circuit 130 is further configured to output a self-locking signal to the enable circuit 120, and the enable circuit 120 is further configured to stop generating an enable level in response to the self-locking signal and disconnect the connection with the first detection port 110.

[0075] Outputting the latching signal to the enable circuit 120 is essentially to maintain the enable circuit 120 in the state triggered by the grounding of the first detection port 110 before the BMS enters the next sleep state. After the enable level ends, the control circuit 130 can cancel the latching signal and enter sleep mode. Additionally, the latching signal can also disconnect the enable circuit 120 from the first detection port 110 to prevent interference between the BMS sleep / wake-up circuit and the communication interface 11 of the charging device 10, which could lead to errors in the charging device 10's information acquisition from the communication interface 11, or the BMS sleep / wake-up circuit failing to wake up the BMS or incorrectly entering sleep mode.

[0076] In some embodiments, please refer to Figure 2 , Figure 2 This is a block diagram of a BMS sleep / wake-up circuit provided in some embodiments of this application.

[0077] The enabling circuit 120 includes a trigger module 122 and an enabling module 124. The trigger module 122 is connected to the first detection port 110 and the control circuit 130, and is used to generate a first-level signal in response to the charging device 10 being connected, and also to maintain the first-level signal in response to a self-locking signal, and to disconnect from the first detection port 110. The enabling module 124 is connected to the trigger module 122 and is used to generate an enabling level based on a first-level signal. The enabling level is output to the wake-up chip 200 of the BMS to enable the wake-up chip 200 to start, thereby waking up the BMS.

[0078] Understandably, when the charging gun is connected, the trigger module 122 generates a low-level signal due to the grounding of the first detection port 110. When the charging gun is unplugged, the trigger module 122 outputs a high-level signal. The enable module 124 is also used to receive the high-level signal and stop outputting the enable level (high level or rising edge). At this time, it outputs a low level. For the wake-up chip 200, which is valid for high level or rising edge, the low level cannot enable the wake-up signal. Since the enable module 124 generates an enable level based on a first-level signal, the trigger module 122 also maintains the output of a low-level signal after receiving the self-locking signal. This allows the BMS to enter sleep mode simply by canceling the self-locking signal when it needs to. The trigger module 122 disconnects from the first detection port 110 to avoid mutual interference between the BMS sleep / wake-up circuit and the charging device 10. This circuit design is simple and reliable.

[0079] In some embodiments, please refer to Figure 3 , Figure 3 This is a circuit diagram of a BMS sleep / wake-up circuit provided in some embodiments of this application. The trigger module 122 includes a first switch Q1, a second switch Q2, a voltage divider network, a first resistor R1, and a second resistor R2. The voltage divider network is connected to the power supply U1 and has a first voltage divider output terminal a and a second voltage divider output terminal b. The first end of the first switch Q1 is connected to the first detection port 110, and the second end of the first switch Q1 is connected to the first voltage divider output terminal a. The control terminals of the first switch Q1 and the second switch Q2 are connected to the second voltage divider output terminal b. The control terminals of the first switch Q1 and the second switch Q2 are also connected to the control circuit 130 through the first resistor R1 to receive a self-locking signal. The first end of the second resistor R2 is connected to the first voltage divider output terminal a, and the second end of the second resistor R2 is connected together with the first end of the second switch Q2 as the output of the trigger module 122. The second end of the second switch Q2 is grounded.

[0080] For example, the first switch Q1 can be a low-level conducting semiconductor transistor, such as a P-channel MOSFET or an IGBT. The control terminal, first terminal, and second terminal of the first switch Q1 are the gate, drain, and source of the MOSFET, respectively. The second switch Q2 can be a high-level conducting semiconductor transistor, such as an N-channel MOSFET or an IGBT. The control terminal, first terminal, and second terminal of the first switch Q1 are the gate, drain, and source of the MOSFET, respectively. The voltage divider network includes resistors R11, R12, and R13 connected in series between the power supply U1 and ground. The series connection of resistors R11 and R12 is the first voltage divider output terminal a, and the series connection of resistors R12 and R13 is the second voltage divider output terminal b.

[0081] When the first detection port 110 is grounded, the output Vc of the trigger module 122 is a low-level signal; if the second switch Q2 receives a self-locking signal (high level), that is, the first switch Q1 is turned off and disconnected from the first detection port 110, but the second switch Q2 is turned on, it can still make the output Vc of the trigger module 122 a low-level signal.

[0082] In the technical solution of this application embodiment, the trigger module 122 is disconnected from the first detection port 110 through the first switch Q1 to avoid mutual interference between the trigger module 122 and the charging device 10. The second switch Q2 can also be kept on so that the trigger module 122 maintains the output of the first level signal, preventing the enable circuit 120 from continuing to generate the enable level. When the BMS needs to enter sleep mode, it can enter smoothly. This circuit structure is simple, reliable and low cost.

[0083] In some embodiments, please refer to Figure 3 The trigger module 122 also includes a first unidirectional conduction device D1, and the first end of the first switch Q1 is positively connected to the first detection port 110 through the first unidirectional conduction device D1.

[0084] For example, the first unidirectional conducting device D1 can be a diode. In the technical solution of this application embodiment, the first unidirectional conducting device D1 can prevent the current from the communication interface 11 of the charging device 10 from flowing to the BMS sleep-wake circuit, so as to avoid mutual interference.

[0085] In some embodiments, please refer to Figure 3 The enabling module 124 includes a third switch Q3, a fourth switch Q4, a fifth switch Q5, an energy storage device C1, a voltage divider unit, a third resistor R3, a fourth resistor R4, and a fifth resistor R5.

[0086] The control terminal of the third switch Q3 is connected to the output of the trigger module 122. The first terminal of the third switch Q3 is connected to the power supply U1. The second terminal of the third switch Q3 is grounded through a voltage divider unit. The second terminal of the third switch Q3 is connected to the control terminal of the fourth switch Q4. The first terminal of the fourth switch Q4 is connected to the power supply U1 through the third resistor R3. The second terminal of the fourth switch Q4 is grounded. The first terminal of the fourth switch Q4 is connected to the first terminal of the energy storage device C1. The second terminal of the energy storage device C1 is connected to the control terminal of the fifth switch Q5. The first terminal of the fifth switch Q5 is connected to the power supply U1. The fourth resistor R4 is connected between the control terminal and the first terminal of the fifth switch Q5. The second terminal of the fifth switch Q5 is grounded through the fifth resistor R5 and is connected to the output terminal of the enable module 124.

[0087] For example, the third switch Q3 can be a low-level conducting semiconductor transistor, such as a P-channel MOSFET or an IGBT. The control terminal, first terminal, and second terminal of the third switch Q3 are the gate, source, and drain of the MOSFET, respectively. The fourth switch Q4 and the fifth switch Q5 can be high-level conducting semiconductor transistors, such as an N-channel MOSFET or an IGBT. The control terminal, first terminal, and second terminal of the first switch Q1 are the gate, drain, and source of the MOSFET, respectively. The energy storage device C1 is, for example, a capacitor. The voltage divider unit includes a capacitor C2 and a resistor R7 connected in parallel. The capacitor C2 stores energy to maintain a stable gate level for the MOSFET.

[0088] The third switch Q3 is turned on based on the first level signal to turn on the fourth switch Q4, which in turn drives the fifth switch Q5 to turn on, so that the output terminal of the enable module 124 outputs an enable level. After the fourth switch Q4 is turned on, the power supply U1 charges the energy storage device C1 through the fourth resistor R4. After the voltage of the energy storage device C1 reaches the voltage that turns off the fifth switch Q5, the fifth switch Q5 is turned off to stop outputting the enable level. The duration from when the power supply U1 starts charging the energy storage device C1 to when the voltage that turns off the fifth switch Q5 is reached is the duration of outputting the enable level.

[0089] In the technical solution of this application embodiment, when the fourth switch Q4 is turned on, the control terminal of the fifth switch Q5 is turned on by utilizing the principle that the voltage across the energy storage device C1, such as a capacitor, does not change abruptly, thereby outputting an enable level. At the same time, the power supply U1 charges the energy storage device C1, and the voltage rises to the point that the fifth switch Q5 is turned off to stop outputting the enable level. By configuring the duration of the enable level during the charging process of the energy storage device C1, the fifth switch Q5 can be turned on for a certain time window, thereby outputting an enable level to enable the wake-up chip 200 to start and wake up the BMS in the dormant state.

[0090] Power supply U1 can be a common power supply on the BMS board, typically 3.3V or 5V, or a power supply level adapted to the system.

[0091] In some embodiments, the enable module 124 further includes a second unidirectional conducting device D2, which is positively connected between the second terminal of the fifth switching transistor Q5 and the output terminal of the enable module 124. The output terminal of the enable module 124 is connected to the first enable pin EN1 of the wake-up chip 200. This prevents the interference of other wake-up source voltages sharing the first enable pin EN1 of the wake-up chip 200 from affecting the normal operation of the enable module 124.

[0092] In some embodiments, please refer to Figure 3 The control circuit 130 includes one of the control chips in the BMS. The lock pin of the control chip is connected to the second enable pin EN2 of the wake-up chip 200 to provide a lock signal.

[0093] The enable circuit 120 and the control circuit 130 are connected to different enable pins of the wake-up chip 200, so that the control of the wake-up chip 200 by the enable level and the control of the wake-up chip 200 by the self-locking signal are independent of each other. This allows the wake-up chip 200 to be locked by the self-locking signal output by the control chip after startup, so that the wake-up chip 200 can be turned off after the self-locking signal is removed, thereby achieving hibernation and reducing the lead-acid consumption of the battery.

[0094] In some embodiments, the wake-up chip 200 is a power supply chip for supplying power to the BMS, or a control chip for controlling the BMS to sleep or wake up.

[0095] It can be understood that the wake-up chip 200 is a component of the BMS. An externally input high-level signal or rising edge signal enables the wake-up chip 200 through the first enable pin EN1, thereby activating the entire BMS and starting it to work. For example, a power supply chip with high-level and / or rising edge signal wake-up function, upon receiving an external level signal (e.g., a high level), outputs the required voltage for the downstream power supply, thus enabling the entire BMS to start working. Similarly, a control chip with level and / or rising edge signal wake-up function, upon receiving an external level signal (e.g., a high level), outputs a control signal to start the power module, causing the power module to output the required voltage for the downstream power supply, thus enabling the entire BMS to start working.

[0096] The BMS sleep / wake-up circuit of this application embodiment is compatible with power supply chips and control chips that are level-triggered and / or edge-triggered, so that the BMS that is level-triggered and / or edge-triggered can also realize the connection wake-up and sleep of the charging device 10.

[0097] In some embodiments, the control circuit 130 and the wake-up chip 200 are the same control chip. During operation, after being enabled by receiving an enable level through the first enable pin EN1, the control chip generates a self-locking signal to the second enable pin EN2 to maintain its working state. Removing the self-locking signal allows the wake-up chip 200 to shut down and enter sleep mode for the BMS.

[0098] In some embodiments, please refer to Figure 3 The BMS sleep / wake-up circuit also includes a sampling circuit 140, which is connected to the output of the enable circuit 120 and the control circuit 130. The sampling circuit 140 is used to output a gun insertion signal when an enable signal is detected, and to output a gun removal signal when no enable signal is detected. Optionally, the control circuit 130 is also used to turn off the output of the self-locking signal when a gun removal signal is received, so that the BMS can enter gun removal sleep mode.

[0099] The sampling circuit 140 includes a resistor R8 and a capacitor C3. One end of the resistor R8 is connected to the output of the enable circuit 120, and the other end is connected to the control circuit 130. The capacitor C3 is connected between the resistor R8 and ground. The gun removal signal can be a horizontal signal, which is not limited here. The control circuit 130 can cancel the self-locking signal according to the gun removal signal, thereby turning off the wake-up chip 200 and putting the BMS into sleep mode.

[0100] In some embodiments, please refer to Figure 3 When the charging gun is not connected, the attached Figure 1 When the impedance circuit R0 is not connected, Vba presents a certain voltage, i.e., Vba > Q1 - Vgsth (gate-source threshold voltage), causing the first switch Q1 to conduct; at this time, the BMS is in sleep mode, the control circuit 130 does not output a high level (lock-in signal), and the second switch Q2 is cut off and not conducting (i.e., Vb < Q2 - Vgsth); Vc = U1, and the third switch Q3 is also cut off and not conducting (i.e., Vci < Q3 - Vgsth); the voltage across the energy storage device C1 is stable, and the fifth switch Q5 is cut off and not conducting (i.e., Vfj < U1).

[0101] Q5-Vgsth), at which point Vg is low and the BMS is not woken up and activated;

[0102] The charging gun is connected, i.e., attached Figure 1When the impedance circuit R0 is connected, Vc becomes low, the third switch Q3 turns on (i.e., Vci > Q3 - Vgsth), Vd changes from low to high, the fourth switch Q4 turns on (i.e., Vd > Q4 - Vgsth), Ve changes from high to low. Since the voltage across the energy storage device C1 cannot change abruptly (capacitor characteristics), Vf also changes from high to low, causing the fifth switch Q5 to turn on (i.e., Vfj > Q5 - Vgsth). At this point, Vg rises from low to high, meaning the first enable pin EN1 of the corresponding enable / wake-up chip 200 changes from low to high. When the high level triggers the edge / high-level wake-up function, the BMS starts working. After the BMS is activated, the control circuit 130 outputs a self-locking signal to the second enable pin EN2 of the wake-up chip 200 to maintain the wake-up state. This self-locking signal also controls the first switch Q1 to turn off and the second switch Q2 to turn on, so that Vc remains at a low level. When the BMS needs to be plugged in to enter sleep mode, that is, after the self-locking signal disappears, since Vc remains at a low level, the BMS will not cause a sudden change in the voltage across the energy storage device C1 and repeatedly wake up the BMS when the device where the BMS is located is plugged in.

[0103] Secondly, please refer to Figure 4 , Figure 4 The flowcharts for some embodiments of the BMS sleep-wake method provided in this application are shown in conjunction with... Figures 1 to 3 This application provides a BMS sleep-wake method, including:

[0104] Step S110: When the charging device is connected, the wake-up chip of the BMS is enabled to start in response to the connection of the charging device to wake up the BMS.

[0105] Step S120: Generate a self-locking signal, which is used to maintain the wake-up chip in the startup state;

[0106] Step S130: If a sleep signal is received, then stop outputting the self-locking signal in response to the sleep signal.

[0107] In the technical solution of this application embodiment, when the charging device 10 is connected, the BMS responds to the connection of the charging device 10 by generating an enable level, enabling the wake-up chip 200 to start and wake up the BMS from its dormant state. A self-locking signal is output to keep the wake-up chip 200 awake. Furthermore, if the charging device 10 is not disconnected, the wake-up chip 200 shuts down after the self-locking signal is removed, allowing the BMS to enter a dormant state. This solves the problem in related technologies where the BMS cannot enter a dormant state if the charging device 10 is not disconnected. Moreover, since the generated enable level produces an edge signal, both edge-triggered and level-triggered wake-up chips 200 can ensure that the BMS remains dormant while the charging device 10 is connected, thereby reducing lead-acid battery consumption.

[0108] In some embodiments, the latching signal is also used to prevent the generation of the enable level and disconnect the charging device 10 from the network.

[0109] In the technical solution of this application embodiment, the self-locking signal can disconnect the communication interface 11 between the device and the charging device 10 to avoid mutual interference with the charging device 10; it can also prevent the device from continuing to generate an enable level due to interference, so that it can smoothly enter sleep mode when the BMS needs to enter sleep mode.

[0110] Thirdly, please refer to Figure 3 This application provides a BMS, including the BMS sleep-wake circuit described above.

[0111] In the technical solution of this application embodiment, when the charging device 10 is connected, the BMS responds to the connection of the charging device 10 by generating an enable level, thereby enabling the wake-up chip 200 to start and wake up the BMS in the dormant state. After being woken up, the BMS maintains the start of the wake-up chip 200 by outputting a self-locking signal. In addition, if the charging device 10 is not unplugged, the BMS can enter the dormant state after the self-locking signal is canceled, which solves the problem that the BMS cannot enter the dormant state if the charging device 10 is not unplugged, thereby reducing the lead-acid consumption of the battery.

[0112] Fourthly, this application provides an electrical device, including a battery and the aforementioned BMS.

[0113] The electrical equipment can be new energy electric vehicles, cleaning robots, energy storage devices, etc. In the technical solution of this application embodiment, when the electrical equipment is connected to the charging device 10, it generates an enable level in response to the connection of the charging device 10, so as to enable the wake-up chip 200 to start and wake up the BMS of the electrical equipment. After being woken up, the BMS maintains the start of the wake-up chip 200 by outputting a self-locking signal. In addition, if the charging device 10 is not unplugged, the BMS can enter the sleep state after the self-locking signal is canceled, which solves the problem that the charging device 10 cannot enter the sleep state without being unplugged, thereby reducing the lead-acid consumption of the battery.

[0114] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application.

[0115] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application, and they should all be covered within the scope of the claims and specification of this application. In particular, as long as there is no structural conflict, the various technical features mentioned in the embodiments can be combined in any way. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A BMS sleep / wake-up circuit, characterized in that, include: The first detection port is used to connect to the communication interface of the charging device; An enabling circuit, connected to the first detection port and the wake-up chip of the BMS, is used to generate an enabling level in response to the access of a charging device to wake up the BMS; The control circuit is used to output a self-locking signal to the wake-up chip to maintain the wake-up chip in the startup state; it is also used to stop outputting the self-locking signal in response to a sleep signal. The enabling circuit includes a trigger module, which includes a first switching transistor, a second switching transistor, a voltage divider network, a first resistor, and a second resistor. The voltage divider network is used to connect to a power supply and has a first voltage divider output terminal and a second voltage divider output terminal. The first end of the first switch is connected to the first detection port, the second end of the first switch is connected to the first voltage divider output terminal, the control terminals of the first switch and the second switch are connected to the second voltage divider output terminal, the control terminals of the first switch and the second switch are also used to receive the self-locking signal through the first resistor, the first end of the second resistor is connected to the first voltage divider output terminal, the second end of the second resistor and the first end of the second switch are connected together as the output of the trigger module, and the second end of the second switch is grounded.

2. The BMS sleep / wake-up circuit as described in claim 1, characterized in that, The control circuit is also used to output the self-locking signal to the enabling circuit, and the enabling circuit is also used to stop generating the enabling level in response to the self-locking signal and disconnect the connection with the first detection port.

3. The BMS sleep / wake-up circuit as described in claim 1, characterized in that, The communication interface of the charging device is grounded through an impedance circuit.

4. The BMS sleep / wake-up circuit as described in claim 2 or 3, characterized in that, The trigger module is connected to the first detection port and the control circuit, and is used to generate a first level signal in response to the charging device access, and is also used to maintain the first level signal in response to the self-locking signal, and to disconnect the connection with the first detection port. The enabling circuit further includes an enabling module, which is connected to the triggering module and is used to generate an enabling level based on a first level signal.

5. The BMS sleep / wake-up circuit as described in claim 1, characterized in that, The triggering module further includes a first unidirectional conduction device, and the first end of the first switching transistor is connected in the forward direction to the first detection port through the first unidirectional conduction device.

6. The BMS sleep / wake-up circuit as described in claim 4, characterized in that, The enabling module includes a third switch, a fourth switch, a fifth switch, a voltage divider unit, an energy storage device, a third resistor, a fourth resistor, and a fifth resistor; The control terminal of the third switch is connected to the output of the trigger module. The first terminal of the third switch is connected to the power supply. The second terminal of the third switch is grounded through the voltage divider unit. The second terminal of the third switch is connected to the control terminal of the fourth switch. The first terminal of the fourth switch is connected to the power supply through the third resistor. The second terminal of the fourth switch is grounded. The first terminal of the fourth switch is connected to the first terminal of the energy storage device. The second terminal of the energy storage device is connected to the control terminal of the fifth switch. The first terminal of the fifth switch is connected to the power supply. The fourth resistor is connected between the control terminal and the first terminal of the fifth switch. The second terminal of the fifth switch is grounded through the fifth resistor and connected to the output terminal of the enable module. The third switch is turned on based on the first level signal to turn on the fourth switch to drive the fifth switch to turn on, and the enable level is output at the output terminal of the enable module. After the fourth switch is turned on, the power supply charges the energy storage device through the fourth resistor. After the voltage of the energy storage device reaches the voltage to turn off the fifth switch, the fifth switch is turned off to stop outputting the enable level. The duration from when the power supply starts charging the energy storage device until it reaches the voltage required to turn off the fifth switch is the duration for outputting the enable level.

7. The BMS sleep / wake-up circuit as described in claim 6, characterized in that, The enabling module further includes a second unidirectional conducting device, which is positively connected between the second terminal of the fifth switching transistor and the output terminal of the enabling module. The output terminal of the enabling module is connected to the first enabling pin of the wake-up chip.

8. The BMS sleep / wake-up circuit as described in claim 7, characterized in that, The control circuit includes one of the control chips in the BMS, and the self-locking pin of the control chip is connected to the second enable pin of the wake-up chip and the enable circuit to provide the self-locking signal.

9. The BMS sleep / wake-up circuit as described in claim 1, characterized in that, The wake-up chip is a power supply chip used to supply power to the BMS, or a control chip used to control the BMS to go into sleep or wake up.

10. The BMS sleep / wake-up circuit as described in claim 1, characterized in that, The control circuit and the wake-up chip are the same control chip.

11. The BMS sleep / wake-up circuit as described in claim 1, characterized in that, It also includes a sampling circuit connected to the output of the enable circuit, used to output a gun insertion signal when an enable signal is detected, and to output a gun withdrawal signal when the enable signal is not detected.

12. The BMS sleep / wake-up circuit as described in claim 11, characterized in that, The control circuit is connected to the sampling circuit and is also used to shut off the output of the self-locking signal when the gun-drawing signal is received.

13. A BMS sleep-wake method, characterized in that, include: When a charging device is connected, the wake-up chip of the BMS is enabled by generating an enable level in response to the connection of the charging device to wake up the BMS. A self-locking signal is generated, which is used to maintain the wake-up chip in the startup state; If a sleep signal is received, the output of the self-locking signal is stopped in response to the sleep signal; The enable level is generated by an enable circuit, which includes a trigger module. The trigger module includes a first switch, a second switch, a voltage divider network, a first resistor, and a second resistor. The voltage divider network is connected to a power supply and has a first voltage divider output terminal and a second voltage divider output terminal. The first end of the first switch is connected to the first detection port, the second end of the first switch is connected to the first voltage divider output terminal, the control terminals of the first switch and the second switch are connected to the second voltage divider output terminal, the control terminals of the first switch and the second switch are also used to receive the self-locking signal through the first resistor, the first end of the second resistor is connected to the first voltage divider output terminal, the second end of the second resistor and the first end of the second switch are connected together as the output of the trigger module, and the second end of the second switch is grounded.

14. The BMS sleep-wake method as described in claim 13, characterized in that, The self-locking signal is also used to prevent the generation of the enable level and disconnect the charging device.

15. A BMS, characterized in that, Includes the BMS sleep / wake-up circuit as described in any one of claims 1 to 12.

16. An electrical device, comprising a battery, characterized in that, It also includes the BMS as described in claim 15.

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