Method for locating bullet impact point and trajectory direction based on shock wave signal processing circuit

Abstract

The present invention relates to a method for locating a bullet's impact point and trajectory direction based on a shock wave signal processing circuit, comprising the steps of: initialization; denoising, filtering, amplifying, and shaping the shock wave signal captured by a shock wave sensor; extracting the time difference of the level signal, calculating the offset angle, and obtaining the trajectory direction under different circumstances; and calculating the bullet point position. The present invention has the following beneficial effects: the hardware circuit of the present invention greatly reduces the amount of data and improves the computing speed; the hardware circuit's numerous IO ports and multifunctional registers provide flexibility and convenience in controlling the wireless communication system; the positioning method of the present invention can provide accurate information on the bullet's impact point, minimizes underreporting, and is applicable both indoors and outdoors; wavelet packet analysis is used to analyze the data of the bullet on the target, and the wavelet packet analysis performs multi-level decomposition of the frequency band, not only decomposing the low-frequency portion but also performing secondary decomposition of the high-frequency portion.

Description

Technical Field

[0001] The invention belongs to the technical field of positioning a bullet impact point in shooting training, and in particular relates to a method for positioning a bullet impact point and trajectory direction based on a shock wave signal processing circuit. Background Art

[0002] Currently, automatic target-tracking systems based on shock wave technology have yet to achieve breakthrough progress in locating bullet impact points. Consequently, numerous Chinese research institutions and enterprises have developed systems and products based on metal dual- and multi-layer conductive targets, laser interdiction technology, image recognition technology, and thermal imaging technology. However, these systems and products all have limitations, such as limited regional probabilistic target tracking, sensitivity to light conditions restricting their applicability to indoor ranges, and the susceptibility of targets to penetration, resulting in their failure.

[0003] The metal double / multi-layer conductive target technology is the earliest technology used in domestic automatic target reporting products. Its working principle is: when the bullet passes through the separated double / multi-layer conductive metal body, the metal body is instantly connected to conduct electricity to determine whether the bullet has passed through a specific area; the advantages of the metal double / multi-layer conductive target technology are clear and simple principles and easy processing, but its disadvantages are also very obvious, mainly including: (1) It can only realize regional target reporting and cannot accurately locate. It can only locate part of a certain ring area and cannot accurately locate the impact point. Although it can meet the basic functional requirements of target reporting, it cannot provide more accurate information and cannot meet the shooter's requirements for correction and improvement; (2) It cannot solve the penetration phenomenon when reporting. Shooting experts can quickly shoot at a specific position (such as the 10-ring area) to form a hole, and the bullet passes through the hole. In this case, it is impossible to detect whether there is a missed report; (3) Consumables are frequently replaced and the overall cost is high.

[0004] Laser blocking technology uses two columns of laser transmitters and receivers to form a laser array. When a bullet passes through the laser array, the laser will be blocked. The receiver receives the blocking signal and locates the target. The advantage of laser blocking technology is that it can achieve accurate target reporting instead of regional approximate target reporting. However, it also has several disadvantages: (1) It can only be applied to indoor shooting ranges, which is quite restrictive. (2) Since the laser transmitter and receiver are installed in the form of a metal frame around the target, the optoelectronic physical device on the metal frame can be easily damaged by bullets during live-fire shooting. (3) The laser array is large in size and complex to install, and cannot be applied to moving targets.

[0005] Machine vision technology (image recognition technology) uses a camera to capture images of the target paper, then compares the images before and after the shot to determine the impact point. Image recognition is a technology that has gradually emerged in recent years. The technology is not very mature, has a high error rate, and is difficult to meet standards. In addition, image recognition technology cannot be used in strong light, and natural wind can also interfere with the stable acquisition of images.

[0006] In addition, multi-resolution analysis can effectively decompose the shock wave signal in time and frequency. However, since its scale changes in binary, that is, the division of the shock wave signal band is exponentially equally spaced, its frequency resolution is poor in the high-frequency band and its time resolution is poor in the low-frequency band; therefore, it is necessary to denoise the shock wave signal.

[0007] The basic idea of ​​traditional denoising is to pass the signal through a low-pass or band-pass filter; the filter can extract the signal from the noisy data in the form of physical hardware or computer software, and perform information processing functions such as filtering and smoothing; but for short-term, low-energy transient signals such as step signals and pulse signals, when the signal-to-noise ratio is low, after smoothing by the filter, not only will the signal-to-noise ratio not be greatly improved, but the singular information of the signal will also be blurred; using a matched filter, the output can obtain the maximum signal-to-noise ratio; but it is not adaptable to time-varying signals and frequency-shifted signals. The adaptive filter can track and adapt to the dynamic changes of the system or environment, but its algorithm has a greater impact on the ability to track the dynamic changes of the system or environment.

[0008] In summary, a method for locating the bullet impact point and trajectory direction indoors and outdoors is proposed, which has a wide target reporting area, high target reporting accuracy, can provide accurate bullet impact point location information, avoids missed reports as much as possible, and is suitable for filtering the low-frequency and high-frequency signals in the shock wave signal during data processing. Summary of the Invention

[0009] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a method for locating the impact point and trajectory direction of a bullet based on a shock wave signal processing circuit.

[0010] This method for locating the impact point and trajectory direction of a bullet based on a shock wave signal processing circuit comprises a power supply circuit, a clock system circuit, a pre-signal amplification circuit, an amplification factor adjustment circuit, a threshold comparison circuit, a signal latch circuit, a CPLD-based time difference calculation circuit, and a microprocessor circuit. The method also includes a wireless communication system and a host computer control and display portion that cooperate with the shock wave signal processing circuit. The positioning method specifically comprises the following steps:

[0011] Step 1: Initialization: Initialize each I / O port; initialize the wireless communication system; power on the CPLD and globally clear all modules inside the CPLD; denoise, filter, amplify and shape the shock wave signal captured by the shock wave sensor;

[0012] Step 2: The rising edge of the first pulse of each signal of the shaping circuit is used as the trigger signal of the corresponding channel of the time difference calculation circuit based on the CPLD in the subsequent stage. The level signal is latched by the latch circuit and sent to the time difference calculation circuit based on the CPLD. After receiving the level signal sent by the threshold comparison circuit, the time difference calculation circuit based on the CPLD extracts the time difference of the level signal, sorts and formats the extracted time difference data, and stores it, records the arrival time of the shock wave, and sends an interrupt enable signal of data preparation to the microprocessor circuit; calculates the offset angle and obtains the trajectory direction under different circumstances; the time difference calculation circuit based on the CPLD includes multiple groups of pulse sorting modules, a counter control module, a counter module, multiple groups of register modules, a data sorting module and a data format sorting module;

[0013] Step 3: After the single-chip microcomputer of the microprocessor circuit receives the data ready signal from the CPLD, it enters the interrupt service process, and the single-chip microcomputer reads the data output by the data format arrangement module: if the single-channel data has been read and the data of all channels have been read, the data is written to the sending buffer; if the single-channel data has not been read, the single-chip microcomputer continues to send a clock pulse to the data sorting module in the CPLD and continues to read data until the single-channel data has been read; if the single-channel data has been read but the data of all channels has not been read, the single-chip microcomputer re-sends clock signals to the data sorting module and the data format arrangement module in the CPLD respectively and continues to read data until the data of all channels has been read;

[0014] Step 4: The sending buffer sends data to the wireless communication system to calculate the bullet point position;

[0015] Step 5: After the data is read into the receiving buffer of the wireless communication system, the microprocessor circuit transmits the data to the upper computer display control part through the wireless communication system; when the data is sent, the single chip microcomputer detects the DR high level signal output by the wireless communication system, and the single chip microcomputer sends a global clear signal to the CPLD. After the interrupt flag is reset, the test of the first bullet is completed, and the process returns to step 2 to step 4, waiting for the data ready signal of the second bullet to arrive;

[0016] Step 6: Display the calculated bullet point position and hit rate on the host computer control display part.

[0017] Preferably, step 1 specifically includes the following steps:

[0018] Step 1.1, denoising and filtering: Input the noisy shock wave signal detected by the shock wave sensor, extract the shock wave signal features, and continue to filter the shock wave signal after feature extraction using wavelet packet analysis. Combine the filtering result with the extracted shock wave signal features, and reconstruct the denoised filtered signal using wavelet denoising. The decomposition in wavelet packet analysis has the following relationship:

[0019] A=AAA3+DAA3+ADA3+DDA3+AAD3+DAD3+ADD3+DDD3

[0020] In the above formula, A represents low frequency, D represents high frequency, and the sequence number at the end represents the number of layers of wavelet packet analysis;

[0021] Step 1.2, amplification: The denoised filtered signal is amplified by a pre-signal amplification circuit. When the pre-signal amplification circuit amplifies the shock wave signal, the amplification factor adjustment circuit adjusts the amplification factor of the shock wave according to the actual situation. The amplified shock wave signal is compared with a preset threshold signal strength by a threshold comparison circuit. If the amplified shock wave signal is higher than the preset threshold signal strength, the threshold comparison circuit outputs a high level. If the amplified shock wave signal is equal to or lower than the preset threshold signal strength, the threshold comparison circuit outputs a low level. The threshold comparison circuit converts the shock wave signal into a level signal.

[0022] Step 1.3, shaping: The shaping circuit transforms the denoised square filter signal into a digital pulse signal.

[0023] Preferably, step 2 specifically includes the following steps:

[0024] Step 2.1: The threshold comparison circuit outputs square wave signals with different pulse widths to multiple pulse sorting modules. The pulse sorting modules integrate the multiple square wave signals with different pulse widths into a high-level signal with a constant rising edge time, and output the high-level signal with a constant rising edge time to the counter control module. The pulse sorting module also outputs the high-level signal with a constant rising edge time to the register module as an enable signal for the register module. The register module stores the current value of the counter module.

[0025] Step 2.2: When the input signal of any pulse sorting module reaches the counter control module, the counter control module generates a counter enable signal to start the counter module. The counter module starts when the first counter enable signal arrives and waits until the last counter enable signal arrives. After that, the counter module stops working and stores the current value of the counter.

[0026] Step 2.3: Subtract the values ​​in the two registers in the CPLD-based time difference calculation circuit to obtain the time difference values ​​corresponding to the two channels; calculate the offset angle, and ultimately determine the trajectory direction under different circumstances;

[0027] Step 2.4: After extracting the count values ​​of the counter modules, the data sorting module is used to sort the data according to their corresponding channels. The data sorting module sorts the data in the following manner: the microcontroller provides a clock signal to the data sorting module and the data format arrangement module in the CPLD. Under the control of the rising edge of the clock signal, the count value of each counter module is output in sequence at each rising edge. If there is a reset signal, the data sorting module outputs a low-level signal.

[0028] Step 2.5, the data sorting module outputs the data sorting result to the data formatting module, and the data formatting module formats the data sorting result; until the input signal of the last pulse sorting module reaches the counter control module, the CPLD-based time difference calculation circuit counter control module sends a data ready interrupt enable signal to the microprocessor circuit.

[0029] Preferably, step 4 specifically includes the following steps:

[0030] Step 4.1, the microprocessor circuit controls the working state of the wireless communication system: initialize the pins connected to the single-chip microcomputer in the wireless communication system; configure the output registers of the single-chip microcomputer to match the settings of the output registers with the input registers of the single-chip microcomputer;

[0031] Step 4.2: Set the working state of the wireless communication system. The microprocessor circuit reads the data received by the wireless communication system through the UART serial port. After the data is read, the data is read byte by byte into the microcontroller receiving buffer.

[0032] Step 4.3: After obtaining the time or angle information, the wireless communication system obtains a nonlinear equation group about the measurement value; the wireless communication system uses the TDOA algorithm to solve the nonlinear equation group; and uses the information of the three base stations for positioning to obtain the bullet point position.

[0033] Preferably, in step 2:

[0034] The EPM570T100C5N chip is selected in the time difference calculation circuit based on CPLD;

[0035] The time difference calculation circuit based on CPLD connects the control signal output port of the single chip microcomputer control display system to the dedicated global clock pin and global clear pin of the CPLD chip;

[0036] The signal input end of the multiple-group pulse sorting module is connected to the threshold comparison circuit, the signal output end of the multiple-group pulse sorting module is connected to the signal input end of the counter control module, the signal output end of the counter control module is electrically connected to the signal input end of the counter module, the signal output end of the counter module is electrically connected to the signal input end of the multiple-group register module, the signal output end of the multiple-group register module is electrically connected to the signal input end of the data sorting module, the signal output end of the data sorting module is electrically connected to the data input end of the data format sorting module, and the data output end of the data format sorting module is electrically connected to the microprocessor circuit; the signal output end of the multiple-group pulse sorting module is also electrically connected to the signal input end of the multiple-group register module.

[0037] Preferably, in step 3: the microprocessor circuit selects STM32F103RCT6 single-chip microcomputer as the single-chip microcomputer, the STM32F103RCT6 single-chip microcomputer is used to communicate with the time difference calculation circuit based on CPLD, for writing the output data into the wireless communication system, and controlling the wireless communication system to send data to the host computer control display part.

[0038] Preferably, in step 3: the clock period of the data sorting module is strictly three times greater than the clock period of the data format arrangement module.

[0039] Preferably, in step 3, a single-chip microcomputer is used when the microprocessor circuit performs data processing; the interrupt service process adopted by the single-chip microcomputer combines DMA transmission and interrupt processing: N interrupts = N DMA accesses + 1 interrupt, and an interrupt is requested after N DMA accesses, instead of interrupting each time data is sampled; the data storage method of the single-chip microcomputer using DMA access is: a double buffer is set up in the RAM area, one buffer is used for data storage, and the other buffer is used for data processing and transmission; the size of each buffer is the size of N DMA transfer data; step 3 also performs DMA access optimization: a circular memory area is opened up inside the ARM processor for data storage; for continuous data streams, the DMA circular access mode is turned on.

[0040] Preferably, in step 2.3, the calculation method of the trajectory direction in different situations is as follows:

[0041] Based on the arrival times of sensors A, B, and C, we can determine whether sensor C arrives before or after sensor AB, determine whether the sensor array is offset clockwise or counterclockwise, and calculate the offset angle. Ultimately, we can derive the trajectory direction under different circumstances:

[0042] Get the sound arrival time T of the three sensors A, B, and C a 、T b 、T c , compare and get the time difference of arrival T of sensors A, B, and C AB 、TBC、 T AC The smaller value of the absolute value of , the distance between the sensors associated with the smaller value and the offset angle of the two sensor arrays are obtained;

[0043] If |T AB | minimum, and T b <T a <T c , add α to the trajectory direction and return the trajectory direction in this case; if T AB Minimum, and T a <T c , T a <T b , subtract the offset angle α from the trajectory direction and return the trajectory direction in this case; if T AB Minimum, and T c <T a , T b <T a , add the offset angle α to the trajectory direction and return the trajectory direction in this case; if T AB Minimum, and T c <T a , T a <T b , subtract the offset angle α from the trajectory direction;

[0044] If |T BC | minimum, and T c <T b <T a , add β to the trajectory direction and return the trajectory direction in this case; if |T BC | minimum, and T b <T a， T b <T c， Then subtract the offset angle β from the trajectory direction and return the trajectory direction in this case; if |T BC | minimum, and T a <T b， T c <T b , then add β to the trajectory direction and return the trajectory direction in this case; if |T BC | minimum, and T a <T b <T c， Then subtract the offset angle β from the trajectory direction to return the trajectory direction in this case;

[0045] If |T AC | minimum, and T c <T a <T b, then add the offset angle γ to the trajectory direction and return the trajectory direction in this case; if |T AC | minimum, and T b <T a， T c <T a， Then subtract the offset angle γ from the trajectory direction and return the trajectory direction in this case; if |T AC | minimum, and T c <T a <T b , then add the offset angle γ to the trajectory direction and return the trajectory direction in this case.

[0046] Preferably, the power supply circuit supplies power to the data processing part, and an interface circuit for communication is provided between the single-chip microcomputer of the microprocessor circuit and the host computer control and display part; the microprocessor circuit adopts a 5V DC power input externally, and the internal chip uses a 3.3V power supply. The power supply circuit is used to convert the 5V DC voltage into a 3.3V voltage to power each chip.

[0047] The beneficial effects of the present invention are:

[0048] The hardware circuit of the present invention significantly reduces the amount of data and improves the computing speed. The hardware circuit's numerous IO ports and registers with diverse functions provide flexibility and convenience in controlling the wireless communication system. The positioning method of the present invention can provide accurate information on the bullet impact point, minimizing missed reports and is applicable both indoors and outdoors.

[0049] When filtering the shock wave signal after feature extraction, the present invention adopts wavelet packet analysis on the data of the bullet on the target. The wavelet packet analysis decomposes the frequency band into multiple levels, not only decomposing the low-frequency part, but also performing a secondary decomposition on the high-frequency part, overcoming the defect of the existing multi-resolution analysis that the high-frequency part cannot be further decomposed. The advantage of wavelet packet analysis is that the wavelet packet can make a more detailed description of the high-frequency part of the signal and has a stronger ability to analyze the signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 Schematic diagram of the data processing part;

[0051] Figure 2 This is a schematic diagram of signal shaping in the shaping circuit;

[0052] Figure 3 This is a schematic diagram of the time difference calculation circuit based on CPLD;

[0053] Figure 4 This is the input and output effect diagram of the pulse sorting module in the time difference calculation circuit;

[0054] Figure 5This is the schematic diagram of the counter control module;

[0055] Figure 6 This is a schematic diagram of the counter pins;

[0056] Figure 7 This is a connection diagram of the register module and the data sorting module;

[0057] Figure 8 Arrange module schematics for data format;

[0058] Figure 9 It is a flow chart of the communication between the microprocessor circuit and the time difference calculation circuit based on CPLD;

[0059] Figure 10 It is a flow chart of the communication between the microprocessor circuit and the time difference calculation circuit based on CPLD;

[0060] Figure 11 This is the DMA transfer flow chart;

[0061] Figure 12 This is the asynchronous socket program communication flow chart;

[0062] Figure 13 This is a schematic diagram of the data packet format for bullet hole data;

[0063] Figure 14 It is a three-layer wavelet packet analysis data structure diagram;

[0064] Figure 15 This is the flow chart of wavelet denoising. Implementation Method

[0065] The present invention will be further described below with reference to the following examples. The following examples are provided only to facilitate understanding of the present invention. It should be noted that, without departing from the principles of the present invention, it is possible for a person skilled in the art to make various modifications to the present invention, and such improvements and modifications fall within the scope of the claims of the present invention.

[0066] During the process of the bullet hitting the target, as long as the time when the Mach wave and the detonation wave reach each sensor is obtained, the relevant information such as the position of the gun sound source and the direction of the trajectory can be calculated; as an embodiment, a method for locating the target point and trajectory direction of the bullet based on the shock wave signal processing circuit is provided. Figure 1 As shown, the shock wave signal processing circuit consists of a power supply circuit, a clock system circuit, a pre-signal amplification circuit, an amplification factor adjustment circuit, a threshold comparison circuit, a signal latch circuit, a time difference calculation circuit based on CPLD and a microprocessor circuit. It is also provided with a wireless communication system and a host computer control and display part that cooperate with the shock wave signal processing circuit. The positioning method specifically includes the following steps:

[0067] Step 1. Initialization: Initialize each I / 0 port: Set each VO port control register one by one according to the definition and actual pin usage; in the STM32F103RCT6 single-chip microcomputer, use the interrupt function of the P1 port to clear the CPLD globally, use the interrupt function of the P2 port to read the CPLD data, and set the interrupt enable registers, interrupt trigger edge selection registers and interrupt flag registers of the P1 and P2 ports respectively according to the actual hardware pin connection method; according to the timing logic of the CPLD operation and the working mode of the wireless communication system, the STM32F103RCT6 single-chip microcomputer is set to trigger the interrupt on the rising edge, and the two clock signals and global clear signals of the single-chip microcomputer to the CPLD are output by the P3 port, and the 8-bit data signal output by the CPLD to the single-chip microcomputer is read in by the UART port of the single-chip microcomputer; initialize the wireless communication system: initialize the pins connected to the wireless communication system and the single-chip microcomputer, configure the wireless communication system registers Register, set the wireless communication system to work in the sending state; when configuring the wireless communication system register, it is necessary to configure the frequency band, power, transmit and receive data length, receive address and check permission. This part of the initialization data is written into the wireless communication system from the corresponding interface by software simulating SPI timing. The data transmission pin of the wireless communication system is connected to the P4 port of the single-chip microcomputer, and the state feedback signal is connected to the P1 port, which serves as the trigger signal of the P1 port interrupt subroutine; CPLD is powered on, in order to prevent the internal data of the CPLD from not being reset to zero or being subject to external interference after power-on, the single-chip microcomputer needs to send a global clear negative pulse to the CPLD after power-on to globally clear all modules inside the CPLD; the shock wave signal when the bullet passes through the target plane is mixed with many low-frequency and high-frequency signals; in order to accurately obtain the waveform of the shock wave, the high-frequency and low-frequency parts need to be removed; the shock wave signal captured by the shock wave sensor is denoised, filtered, amplified and shaped so that the signal can match the subsequent circuit;

[0068] Step 1.1, denoising and filtering: From the perspective of signal science, wavelet denoising is a problem of signal filtering. Although wavelet denoising can be regarded as low-pass filtering to a large extent, it is superior to traditional low-pass filters in that it can successfully retain signal characteristics after denoising. The noisy shock wave signal detected by the input shock wave sensor is relatively weak, such as Figure 15 As shown in the figure, the shock wave signal is feature extracted, and the shock wave signal after feature extraction is further filtered using wavelet packet analysis. The filtering result and the extracted shock wave signal feature are combined, and the denoised filtered signal is reconstructed using wavelet denoising. The decomposition in wavelet packet analysis has the following relationship:

[0069] A=AAA3+DAA3+ADA3+DDA3+AAD3+DAD3+ADD3+DDD3

[0070] In the above formula, A represents low frequency, D represents high frequency, and the sequence number at the end represents the number of layers of wavelet packet analysis;

[0071] like Figure 12 As shown in the figure, data transmission and communication between different hosts are realized by TCP protocol, and asynchronous Socket program is used to ensure that the program operation is not blocked; the ARM processor (single chip microcomputer) first initializes the asynchronous Socket program, and then the asynchronous Socket program monitors the port; the bullet hole data on the target is used as shown in the figure. Figure 13 The data format shown;

[0072] The sine waves used in Fourier analysis have no time limit, from negative infinity to positive infinity, but wavelets tend to be irregular and asymmetric. Fourier analysis decomposes the signal into a superposition of a series of sine waves of different frequencies. Similarly, wavelet analysis decomposes the signal into a superposition of a series of wavelet functions, and these wavelet functions are all obtained by translating and scaling a mother wavelet function. According to intuition, it is obviously better to use irregular wavelet functions to approximate sharply changing signals than smooth sine curves. Similarly, it is obviously better to use wavelet functions to approximate the local characteristics of the signal than smooth sine functions. Traditional Fourier transform can only obtain spectral information, and wavelet analysis can very accurately analyze at what moment the signal is distorted. Wavelet analysis can detect many signal features that are ignored by other analysis methods, such as signal trends, high-order discontinuities and self-similar characteristics of the signal. Wavelet analysis can also achieve signal compression and noise reduction with very small distortion. In the two-dimensional case, wavelet analysis is notable for its “polarization” capability (i.e., direction selectivity) in addition to its “microscopic” capability;

[0073] Wavelet packet analysis is a method that extends from wavelet analysis and performs more detailed analysis and reconstruction of signals. Wavelet analysis actually decomposes the signal into a low-frequency coarse part and a high-frequency detailed part, and then only decomposes the low-frequency details a second time, decomposing them into low-frequency and high-frequency parts, without decomposing the high-frequency parts a second time. The decomposition coefficient sequence obtained by analogy is the coefficient result of wavelet decomposition. Wavelet packet analysis not only decomposes the low-frequency part, but also decomposes the high-frequency part a second time. The advantages of wavelet packet analysis are: wavelet packets can make a more detailed description of the high-frequency part of the signal and have a stronger ability to analyze the signal. The analysis data structure diagram of wavelet packet analysis is as follows: Figure 14 As shown;

[0074] Step 1.2, amplification: The denoised filtered signal is amplified by a pre-signal amplifier circuit. When the pre-signal amplifier circuit amplifies the shock wave signal, the amplification factor adjustment circuit adjusts the amplification factor of the shock wave according to actual needs to obtain an ideal waveform; the amplified shock wave signal is compared with a preset threshold signal strength by a threshold comparison circuit; if the amplified shock wave signal is higher than the preset threshold signal strength, the threshold comparison circuit outputs a high level; if the amplified shock wave signal is equal to or lower than the preset threshold signal strength, the threshold comparison circuit outputs a low level; the threshold comparison circuit converts the shock wave signal (analog signal) into a level signal (digital signal);

[0075] Step 1.3, shaping: The shaping circuit organizes the denoised square filter signal into a digital pulse signal; for signal shaping, take three-way signal as an example, Figure 2 As shown, the first rising edge of the first arriving signal is taken as the time starting point, and the relative time interval between the first rising edge of the subsequent arriving signal and the time starting point is the time difference value to be calculated by the time difference calculation circuit;

[0076] Step 2: The rising edge of the first pulse of each signal in the shaping circuit serves as the trigger signal for the corresponding channel of the subsequent CPLD-based time difference calculation circuit. The level signal is latched by the latch circuit and sent to the CPLD-based time difference calculation circuit (a digital integrated circuit with a programmable logic device (CPLD) as the hardware core). After receiving the three level signals sent by the threshold comparison circuit, the CPLD-based time difference calculation circuit extracts the time difference of the three level signals, sorts and formats the extracted time difference data, and stores it. The arrival time of the shock wave is recorded, and an interrupt enable signal indicating that the data is ready is sent to the microprocessor circuit; the offset angle is calculated to obtain the trajectory direction under different circumstances; if traditional discrete components are used to design the circuit, the system will be bulky, power consumption will increase, and reliability will be greatly reduced ... Figure 3 As shown, the time difference calculation circuit based on CPLD includes multiple groups of pulse sorting modules, a counter control module, a counter module, multiple groups of register modules, a data sorting module and a data format sorting module;

[0077] Step 2.1: The threshold comparison circuit outputs square wave signals with different pulse widths to multiple groups of pulse sorting modules, such as Figure 4As shown in the figure, the pulse sorting module integrates multiple square wave signals with different pulse widths into a high-level signal with a constant rising edge time, and outputs the high-level signal with a constant rising edge time to the counter control module; the pulse sorting module also outputs the high-level signal with a constant rising edge time to the register module as the enable signal of the register module, and the register module saves the current value of the counter module; the register module consists of eight registers with the same function, and the en end of the register module is connected to the Q end of the D flip-flop in the pulse sorting module on each corresponding channel. Clr is generated by the interrupt service process of the single-chip microcomputer and is valid at low level. Din[17 … The 0] terminal is connected to the output terminal of the upper counter module. When the en signal is valid, the register reads the current value of the counter and temporarily stores it in the register. The value is output according to the control signal of the subsequent module. The value in the register corresponding to the first signal to arrive is 0, which is equivalent to a time starting point. The values ​​in the registers corresponding to the subsequent signals are the time differences relative to the starting point. Similarly, the difference between the values ​​in any two registers is the time difference between the two signals.

[0078] Step 2.2, such as Figure 5 As shown, when the input signal of any pulse sorting module reaches the counter control module, the counter control module generates a counter enable signal to start the counter module: Figure 6 As shown in the figure, the counter module starts when the first counter enable signal arrives, and waits until the last counter enable signal arrives. After the microprocessor circuit sends a reset signal, the counter module stops working and stores the current value of the counter. Obviously, the first signal to arrive is the trigger signal to start the counter, and the value in its corresponding register is 0. The values ​​in the remaining registers are the time differences relative to the first signal to arrive.

[0079] Step 2.3: Subtract the values ​​in the two registers in the CPLD-based time difference calculation circuit according to the pre-set sensor combination to obtain the time difference value corresponding to the two channels; calculate the offset angle, and finally determine the trajectory direction under different conditions;

[0080] Step 2.4: The distance between the impact point of each shot and the shock wave sensor is different. Therefore, the shock wave sensor that the shock wave first reaches is also different during each measurement process. To avoid data confusion, it is necessary to use a data sorting module to extract the count value of the counter module and sort it according to the corresponding channels. The data sorting module sorts in the following way: the single-chip microcomputer gives a clock signal to the data sorting module and the data format arrangement module in the CPLD. Under the control of the rising edge of the clock signal, when each rising edge arrives, the count value of a counter module is output in sequence. If there is a reset signal, the data sorting module outputs a low-level signal. Taking three-way signals as an example, the connection diagram of the register module and the data sorting module is as follows: Figure 7 As shown;

[0081] Step 2.5: The data sorting module outputs the data sorting results to the data formatting module, such as Figure 8 The data formatting module shown in the figure formats the data sorting results: each channel of the data sorting module transmits in parallel in the form of 18-bit data, while the I / O register in the lower-level single-chip microcomputer circuit is an 8-bit register. In order to match the data format, the module needs to truncate the 18-bit data into 8-bit data for transmission; first, six zeros are added to the high-order bits of the data to convert the 18-bit data into 24-bit data, and then when the rising edge of the clock signal arrives, 8-bit data is output from the high-order bit to the low-order bit. After each three 8-bit data are output, new input data is read and the above process is repeated; until the input signal of the last pulse sorting module reaches the counter control module, the counter control module based on the CPLD time difference calculation circuit sends an interrupt enable signal indicating that the data is ready to the microprocessor circuit;

[0082] Step 3: Figure 9 As shown, when the single-chip microcomputer of the microprocessor circuit receives the data ready signal from the CPLD, it enters the interrupt service process, and the single-chip microcomputer reads the data output by the data format arrangement module: if the single-channel data is read and the data of all channels are also read, the data is written to the sending buffer; if the single-channel data is not read, the single-chip microcomputer continues to send a clock pulse to the data sorting module in the CPLD and continues to read data until the single-channel data is read; if the single-channel data is read but the data of all channels is not read, the single-chip microcomputer re-sends clock signals to the data sorting module and the data format arrangement module in the CPLD respectively and continues to read data until the data of all channels is read;

[0083] Step 4: The sending buffer sends data to the wireless communication system to calculate the bullet point position;

[0084] Step 4.1. The microprocessor circuit controls the working state of the wireless communication system: Initialize the pins connected to the single-chip microcomputer in the wireless communication system so that the single-chip microcomputer in the microprocessor circuit and the wireless communication system can correctly communicate data; configure the output registers of the single-chip microcomputer so that the output registers match the settings of the input registers of the single-chip microcomputer so that data can be received accurately;

[0085] Step 4.2, such as Figure 10 As shown, the working state of the wireless communication system is set, and the microprocessor circuit reads the data received by the wireless communication system through the UART serial port: after the data is read, the data is read byte by byte into the microcontroller receiving buffer;

[0086] Step 4.3: After obtaining time or angle information, the wireless communication system generates a nonlinear equation system related to the measured values, which is often difficult to find an optimal solution. The wireless communication system uses the TDOA algorithm to solve the nonlinear equation system. This algorithm has a simple principle and low computational complexity. However, since the TDOA algorithm cannot use redundant information to improve positioning accuracy, it can only use the information from three base stations to determine the bullet point location.

[0087] Step 5: After the data is read into the receiving buffer of the wireless communication system, the microprocessor circuit transmits the data to the upper computer display control part through the wireless communication system; when the data is sent, the single chip microcomputer detects the DR high level signal output by the wireless communication system, and the single chip microcomputer sends a global clear signal to the CPLD. After the interrupt flag is reset, the test of the first bullet is completed, and the process returns to step 2 to step 4, waiting for the data ready signal of the second bullet to arrive;

[0088] Step 6. Finally, the calculated bullet point position and hit rate are displayed on the host computer control display part.

[0089] In step 2, currently, the three major companies producing CPLD / FPGA in the world are Altera, Xilinx, and Lattice, and their products are diverse. For example, Altera's CPLDs include the MAX7000, MAX3000, and MAX II series. Since the software of the CPLD-based time difference calculation circuit uses 405 logic cells after successful compilation, and in general CPLD circuit development, the occupancy of the logic cells should not exceed 90%, otherwise the CPLD state will become unstable, the present invention selects the EPM570T100C5N chip in the CPLD-based time difference calculation circuit. This chip belongs to the MAX II series, has 570 logic cells, 80 I / O pins, can operate under power supply voltages of 2.375V to 2.625V and 3V to 3.6V, and has an operating frequency of up to 201.1MHz. It implements online programming through the JTAG interface, without removing the chip, and also without requiring a programmer and chip adapter, which facilitates system software upgrades.

[0090] In step 2, designing the CPLD-based time difference calculation circuit is prone to contention and hazard, which can increase circuit errors and disrupt the entire circuit logic. Contention and hazard are inevitable when designing logic circuits, but through scientific and reasonable logic design, the probability of contention and hazard can be minimized. The signals used to control the operation of each module within the CPLD mainly include clocks, preset numbers, enable, and clear signals. Except for the main clock, all other control signals come from the microcontroller. The control signals within the CPLD must strictly follow the designed timing logic. However, due to the internal wiring position of the CPLD and the inherent delay of the chip itself, these control signals arrive at each module within the CPLD at different times. Therefore, the operation of each module within the CPLD cannot be strictly synchronized. Especially when a single control signal controls too many modules, weak signal driving capability can cause clock skew or inability to completely clear and enable the CPLD internal modules, resulting in unpredictable circuit errors. To avoid this, in addition to strictly defining the timing logic in the software, special requirements are also placed on the hardware.

[0091] The CPLD-based time difference calculation circuit connects the control signal output port of the microcontroller-controlled display system to the dedicated global clock pin and global clear pin of the CPLD chip (EPM570T100C5N chip), which can improve the driving capability of the control signal. In addition, the dedicated pins can be used to use special channels during wiring, effectively reducing the delay time for the signal to reach each module, and reducing the probability of glitches in the timing logic circuit from a hardware perspective.

[0092] In step 2, the signal input end of the multiple-group pulse sorting module is connected to the threshold comparison circuit, the signal output end of the multiple-group pulse sorting module is connected to the signal input end of the counter control module, the signal output end of the counter control module is electrically connected to the signal input end of the counter module, the signal output end of the counter module is electrically connected to the signal input end of the multiple-group register module, the signal output end of the multiple-group register module is electrically connected to the signal input end of the data sorting module, the signal output end of the data sorting module is electrically connected to the data input end of the data format sorting module, and the data output end of the data format sorting module is electrically connected to the microprocessor circuit; the signal output end of the multiple-group pulse sorting module is also electrically connected to the signal input end of the multiple-group register module.

[0093] In step 3, shock wave processing requires more CPU resources, and a high-performance ARM processor (single-chip microcomputer) needs to be selected; the single-chip microcomputer needs to have a higher main frequency and a faster processing speed, so that the bullet hole position can be determined in time during continuous shooting with a short time interval; secondly, when collecting shock wave signals, a large amount of data needs to be processed and multiple tasks need to be managed, which also requires the single-chip microcomputer to have a higher clock frequency; thirdly, the single-chip microcomputer must also support multiple interrupt sources to meet the needs of functional expansion; the microprocessor circuit uses the STM32F103RCT6 single-chip microcomputer as the single-chip microcomputer, which is used to communicate with the time difference calculation circuit based on CPLD, write the output data to the wireless communication system, and control the wireless communication system to send data to the host computer to control the display part; the STM32F103RCT6 single-chip microcomputer has 51 general-purpose I / 0 ports, each port has an input / output direction register, an input register The STM32F103RCT6 processor is a high-performance, low-power 32-bit microcontroller. It includes a high-performance RISC core running at 72MHz, high-speed embedded memory, enhanced input and output with enhanced range, and external connection to two APB buses. The STM32F103RCT6 has a 12-bit analog-to-digital converter, timers, PWM timers, standard and advanced communication interfaces, and the power-saving mode of the STM32F103RCT6 allows designers to design low-power applications. The STM32F103RCT6 also provides 256KB of on-chip SRAM for storing code or other data. The STM32F103RCT6 also integrates a rich set of peripheral function modules, which can be widely used in various low-power systems.

[0094] In step 3, the clock cycle of the data sorting module must be strictly three times greater than the clock cycle of the data format arrangement module so that the microcontroller can correctly read the time difference data output by the CPLD.

[0095] In step 3, a high-speed data acquisition and processing system needs to have extremely high real-time performance; however, the interrupt handling mechanism cannot meet the real-time requirements because it requires interrupt response scheduling; the microprocessor circuit uses a single-chip microcomputer for data processing; the interrupt service process used by the single-chip microcomputer combines DMA transmission and interrupt processing: N interrupts = N DMA accesses + 1 interrupt, and an interrupt is requested after N DMA accesses, instead of interrupting each time data is sampled; in order to achieve real-time data processing, the single-chip microcomputer uses DMA access for data storage: a double buffer is set in the RAM area, one buffer is used for data storage, and the other buffer is used for data processing and transmission; the size of each buffer is the size of N DMA transfer data; step 3 also uses the two buffers alternately as data storage area and data processing area at different time periods; such as Figure 11 As shown in the figure, DMA access transfers data from peripherals to memory. After the microcontroller initializes this transfer action, the DMA controller detaches from the microcontroller and completes subsequent transfer work. After completing N transfers, the DMA sends an interrupt request to the microcontroller, and the microcontroller begins to process the data in the Buf0 area. At the same time, when DMA transfers data to the Buf0 area, the microcontroller needs to reinitialize the DMA transfer action due to the change of the destination address, and the operation is repeated alternately. For image sensors, image acquisition is continuous and uninterrupted. Due to the problem of bus control transfer in DMA initialization, there must be interrupt delay and response time, which will cause image data loss during the response time period.

[0096] Optimize DMA access: If DMA transfers do not require re-initialization, there will be no issues with bus control transfer and interrupt delays. In other words, ensuring that the destination address is the same for each DMA transfer can avoid this problem. Open a circular memory area inside the ARM processor (microcontroller) for data storage. For continuous data streams, enable DMA's circular access mode. Set the counter module to 16-bit data and increment it for each DMA transfer. Dividing the counter by 10 will yield the result, which represents the frame number of the current data, and the remainder represents the block number of the frame in which the current data is located. This not only solves the problem of data loss, but also stores the data to be processed in the CPU's internal RAM, saving time in reading computing data and improving the CPU's computing speed. A comparison of the optimized DMA access performance is shown in Table 1 below:

[0097] In step 2.3, the calculation method of the trajectory direction in different situations is as follows:

[0098] The shock wave signals captured by the shock wave sensors are filtered, amplified, and shaped, and the resulting multi-channel digital pulse signals are used to determine the edges of the sensor array parallel to the Mach wave front. For example, suppose the sonic time differences of sensors A, B, and C are T AB=0.1s,T AC =0.2s,T BC =0.13s, indicating that edge AB is relatively parallel to the Mach wave front. Based on the sonic arrival times of sensors A, B, and C, we can determine whether sensor C arrives before or after AB. This allows us to determine whether the sensor array is deflected clockwise or counterclockwise in practice, calculate the angle of deflection, and ultimately derive the trajectory direction under different circumstances:

[0099] Get the sound arrival time T of the three sensors A, B, and C a 、T b 、T c , compare and get the time difference of arrival T of sensors A, B, and C AB 、T BC、 T AC The smaller value of the absolute value of , the distance between the sensors associated with the smaller value and the offset angle of the two sensor arrays are obtained;

[0100] If |T AB | minimum, and T b <T a <T c , add α to the trajectory direction and return the trajectory direction in this case; if T AB Minimum, and T a <T c , T a <T b , subtract the offset angle α from the trajectory direction and return the trajectory direction in this case; if T AB Minimum, and T c <T a , T b <T a , add the offset angle α to the trajectory direction and return the trajectory direction in this case; if T AB Minimum, and T c <T a , T a <T b , subtract the offset angle α from the trajectory direction;

[0101] If |T BC | minimum, and T c <T b <T a , add β to the trajectory direction and return the trajectory direction in this case; if |T BC | minimum, and T b <T a， T b <T c， Then subtract the offset angle β from the trajectory direction and return the trajectory direction in this case; if |T BC | minimum, and Ta <T b， T c <T b , then add β to the trajectory direction and return the trajectory direction in this case; if |T BC | minimum, and T a <T b <T c， Then subtract the offset angle β from the trajectory direction to return the trajectory direction in this case;

[0102] If |T AC | minimum, and T c <T a <T b , then add the offset angle γ to the trajectory direction and return the trajectory direction in this case; if |T AC | minimum, and T b <T a， T c <T a， Then subtract the offset angle γ from the trajectory direction and return the trajectory direction in this case; if |T AC | minimum, and T c <T a <T b , then add the offset angle γ to the trajectory direction and return the trajectory direction in this case.

[0103] The power supply circuit provides power for the data processing part. An interface circuit for communication is provided between the microcontroller of the microprocessor circuit and the host computer control and display part. The data interfaces of the interface circuit include UART interface, I2C interface and wireless interface, etc. The microcontroller (STM32F103RCT6 chip) has three SPI interfaces, two I2C interfaces, five USART interfaces, one USB interface, one SDIO interface and one CAN interface built in. It provides convenience for realizing Ethernet communication. Only the appropriate PHY (physical layer) needs to be selected and connected to the chip to realize the communication function. The microprocessor circuit adopts 5V DC power input externally, and the internal chip uses 3.3V power supply. The power supply circuit is used to convert the 5V DC voltage into 3.3V voltage to power each chip.

Claims

1. A method for locating the impact point and trajectory direction of a bullet based on a shock wave signal processing circuit, characterized in that: The shock wave signal processing circuit is composed of a power supply circuit, a clock system circuit, a pre-signal amplification circuit, an amplification factor adjustment circuit, a threshold comparison circuit, a signal latch circuit, a time difference calculation circuit based on CPLD and a microprocessor circuit. It is also provided with a wireless communication system and a host computer control and display part that cooperate with the shock wave signal processing circuit. The positioning method specifically includes the following steps: Step 1: Initialization: Initialize each I / O port; initialize the wireless communication system; power on the CPLD and globally clear all modules inside the CPLD; denoise, filter, amplify and shape the shock wave signal captured by the shock wave sensor; Step 2: The rising edge of the first pulse of each signal of the shaping circuit is used as the trigger signal of the corresponding channel of the time difference calculation circuit based on the CPLD in the subsequent stage. The level signal is latched by the latch circuit and sent to the time difference calculation circuit based on the CPLD. After receiving the level signal sent by the threshold comparison circuit, the time difference calculation circuit based on the CPLD extracts the time difference of the level signal, sorts and formats the extracted time difference data, and stores it, records the arrival time of the shock wave, and sends an interrupt enable signal of data preparation to the microprocessor circuit; calculates the offset angle and obtains the trajectory direction under different circumstances; the time difference calculation circuit based on the CPLD includes multiple groups of pulse sorting modules, a counter control module, a counter module, multiple groups of register modules, a data sorting module and a data format sorting module; Step 3: After the single-chip microcomputer of the microprocessor circuit receives the data ready signal from the CPLD, it enters the interrupt service process, and the single-chip microcomputer reads the data output by the data format arrangement module: if the single-channel data has been read and the data of all channels have been read, the data is written to the sending buffer; if the single-channel data has not been read, the single-chip microcomputer continues to send a clock pulse to the data sorting module in the CPLD and continues to read data until the single-channel data has been read; if the single-channel data has been read but the data of all channels has not been read, the single-chip microcomputer re-sends clock signals to the data sorting module and the data format arrangement module in the CPLD respectively and continues to read data until the data of all channels has been read; Step 4: The sending buffer sends data to the wireless communication system to calculate the bullet point position; Step 5: After the data is read into the receiving buffer of the wireless communication system, the microprocessor circuit transmits the data to the upper computer display control part through the wireless communication system; when the data is sent, the single chip microcomputer detects the DR high level signal output by the wireless communication system, and the single chip microcomputer sends a global clear signal to the CPLD. After the interrupt flag is reset, the test of the first bullet is completed, and the process returns to step 2 to step 4, waiting for the data ready signal of the second bullet to arrive; Step 6: Display the calculated bullet point position and hit rate on the host computer control display part.

2. The method for locating the bullet impact point and trajectory direction based on a shock wave signal processing circuit according to claim 1, characterized in that: Step 1 specifically includes the following steps: Step 1.1, denoising and filtering: Input the noisy shock wave signal detected by the shock wave sensor, extract the shock wave signal features, and continue to filter the shock wave signal after feature extraction using wavelet packet analysis. Combine the filtering result with the extracted shock wave signal features, and reconstruct the denoised filtered signal using wavelet denoising. The decomposition in wavelet packet analysis has the following relationship: A=AAA3+DAA3+ADA3+DDA3+AAD3+DAD3+ADD3+DDD3 In the above formula, A represents low frequency, D represents high frequency, and the sequence number at the end represents the number of layers of wavelet packet analysis; Step 1.2, amplification: The denoised filtered signal is amplified by a pre-signal amplification circuit. When the pre-signal amplification circuit amplifies the shock wave signal, the amplification factor adjustment circuit adjusts the amplification factor of the shock wave according to the actual situation. The amplified shock wave signal is compared with a preset threshold signal strength by a threshold comparison circuit. If the amplified shock wave signal is higher than the preset threshold signal strength, the threshold comparison circuit outputs a high level. If the amplified shock wave signal is equal to or lower than the preset threshold signal strength, the threshold comparison circuit outputs a low level. The threshold comparison circuit converts the shock wave signal into a level signal. Step 1.3, shaping: The shaping circuit transforms the denoised square filter signal into a digital pulse signal.

3. The method for locating the bullet impact point and trajectory direction based on a shock wave signal processing circuit according to claim 2, characterized in that: Step 2 specifically includes the following steps: Step 2.1: The threshold comparison circuit outputs square wave signals with different pulse widths to multiple pulse sorting modules. The pulse sorting modules integrate the multiple square wave signals with different pulse widths into a high-level signal with a constant rising edge time, and output the high-level signal with a constant rising edge time to the counter control module. The pulse sorting module also outputs the high-level signal with a constant rising edge time to the register module as an enable signal for the register module. The register module stores the current value of the counter module. Step 2.2: When the input signal of any pulse sorting module reaches the counter control module, the counter control module generates a counter enable signal to start the counter module. The counter module starts when the first counter enable signal arrives and waits until the last counter enable signal arrives. After that, the counter module stops working and stores the current value of the counter. Step 2.3: Subtract the values ​​in the two registers in the CPLD-based time difference calculation circuit to obtain the time difference values ​​corresponding to the two channels; calculate the offset angle, and ultimately determine the trajectory direction under different circumstances; Step 2.4: After extracting the count values ​​of the counter modules, the data sorting module is used to sort the data according to their corresponding channels. The data sorting module sorts the data in the following manner: the microcontroller provides a clock signal to the data sorting module and the data format arrangement module in the CPLD. Under the control of the rising edge of the clock signal, the count value of each counter module is output in sequence at each rising edge. If there is a reset signal, the data sorting module outputs a low-level signal. Step 2.5, the data sorting module outputs the data sorting result to the data formatting module, and the data formatting module formats the data sorting result; until the input signal of the last pulse sorting module reaches the counter control module, the CPLD-based time difference calculation circuit counter control module sends a data ready interrupt enable signal to the microprocessor circuit.

4. The method for locating the bullet impact point and trajectory direction based on a shock wave signal processing circuit according to claim 3, characterized in that: Step 4 specifically includes the following steps: Step 4.1, the microprocessor circuit controls the working state of the wireless communication system: initialize the pins connected to the single-chip microcomputer in the wireless communication system; configure the output registers of the single-chip microcomputer to match the settings of the output registers with the input registers of the single-chip microcomputer; Step 4.2: Set the working state of the wireless communication system. The microprocessor circuit reads the data received by the wireless communication system through the UART serial port. After the data is read, the data is read byte by byte into the microcontroller receiving buffer. Step 4.3: After obtaining the time or angle information, the wireless communication system obtains a nonlinear equation group about the measurement value; the wireless communication system uses the TDOA algorithm to solve the nonlinear equation group; and uses the information of the three base stations for positioning to obtain the bullet point position.

5. The method for locating the bullet impact point and trajectory direction based on a shock wave signal processing circuit according to claim 1, characterized in that: In step 2: The EPM570T100C5N chip is selected in the time difference calculation circuit based on CPLD; The time difference calculation circuit based on CPLD connects the control signal output port of the single chip microcomputer control display system to the dedicated global clock pin and global clear pin of the CPLD chip; The signal input end of the multiple-group pulse sorting module is connected to the threshold comparison circuit, the signal output end of the multiple-group pulse sorting module is connected to the signal input end of the counter control module, the signal output end of the counter control module is electrically connected to the signal input end of the counter module, the signal output end of the counter module is electrically connected to the signal input end of the multiple-group register module, the signal output end of the multiple-group register module is electrically connected to the signal input end of the data sorting module, the signal output end of the data sorting module is electrically connected to the data input end of the data format sorting module, and the data output end of the data format sorting module is electrically connected to the microprocessor circuit; the signal output end of the multiple-group pulse sorting module is also electrically connected to the signal input end of the multiple-group register module.

6. The method for locating the bullet impact point and trajectory direction based on a shock wave signal processing circuit according to claim 1, characterized in that: In step 3: the microprocessor circuit selects the STM32F103RCT6 single-chip microcomputer as the single-chip microcomputer. The STM32F103RCT6 single-chip microcomputer is used to communicate with the time difference calculation circuit based on CPLD, to write the output data into the wireless communication system, and to control the wireless communication system to send data to the host computer control display part.

7. The method for locating the bullet impact point and trajectory direction based on a shock wave signal processing circuit according to claim 1, characterized in that: In step 3: the clock cycle of the data sorting module is strictly 3 times greater than the clock cycle of the data format arrangement module.

8. The method for locating the bullet impact point and trajectory direction based on a shock wave signal processing circuit according to claim 1, characterized in that: In step 3, the microprocessor circuit uses a single-chip microcomputer for data processing; the interrupt service process used by the single-chip microcomputer combines DMA transmission and interrupt processing: N interrupts = N DMA accesses + 1 interrupt, and an interrupt is requested after N DMA accesses, instead of interrupting each time data is sampled; the data storage method of the single-chip microcomputer using DMA access is: a double buffer is set up in the RAM area, one buffer is used for data storage, and the other buffer is used for data processing and transmission; the size of each buffer is the size of N DMA transfer data; step 3 also performs DMA access optimization: a circular memory area is opened up inside the ARM processor for data storage; for continuous data streams, the DMA circular access mode is turned on.

9. The method for locating the bullet impact point and trajectory direction based on a shock wave signal processing circuit according to claim 3, characterized in that: In step 2.3, the calculation method of the trajectory direction in different situations is as follows: Based on the arrival times of sensors A, B, and C, we can determine whether sensor C arrives before or after sensor AB, determine whether the sensor array is offset clockwise or counterclockwise, and calculate the offset angle. Ultimately, we can derive the trajectory direction under different circumstances: Get the sound arrival time T of the three sensors A, B, and C a 、T b 、T c , compare and get the time difference of arrival T of sensors A, B, and C AB 、T BC、 T AC The smaller value of the absolute value of , the distance between the sensors associated with the smaller value and the offset angle of the two sensor arrays are obtained; If |T AB | minimum, and T b <T a <T c , add α to the trajectory direction and return the trajectory direction in this case; if T AB Minimum, and T a <T c , T a <T b , subtract the offset angle α from the trajectory direction and return the trajectory direction in this case; if T AB Minimum, and T c <T a , T b <T a , add the offset angle α to the trajectory direction and return the trajectory direction in this case; if T AB Minimum, and T c <T a , T a <T b , subtract the offset angle α from the trajectory direction; If |T BC | minimum, and T c <T b <T a , add β to the trajectory direction and return the trajectory direction in this case; if |T BC | minimum, and T b <T a， T b <T c， Then subtract the offset angle β from the trajectory direction and return the trajectory direction in this case; if |T BC | minimum, and T a <T b， T c <T b , then add β to the trajectory direction and return the trajectory direction in this case; if |T BC | minimum, and T a <T b <T c， Then subtract the offset angle β from the trajectory direction to return the trajectory direction in this case; If |T AC | minimum, and T c <T a <T b , then add the offset angle γ to the trajectory direction and return the trajectory direction in this case; if |T AC | minimum, and T b <T a， T c <T a， Then subtract the offset angle γ from the trajectory direction and return the trajectory direction in this case; if |T AC | minimum, and T c <T a <T b , then add the offset angle γ to the trajectory direction and return the trajectory direction in this case.

10. The method for locating the bullet impact point and trajectory direction based on a shock wave signal processing circuit according to claim 1, characterized in that: The power supply circuit supplies power to the data processing part. An interface circuit for communication is provided between the microcontroller of the microprocessor circuit and the host computer control and display part. The microprocessor circuit uses a 5V DC power input externally and a 3.3V power supply for the internal chip. The power supply circuit is used to convert the 5V DC voltage into a 3.3V voltage to power each chip.

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