Heat dissipation patch and flip chip packaging structure

Abstract

The present application provides a heat dissipation patch for a flexible circuit carrier, comprising an insulating protective layer, a heat dissipation metal layer, a first adhesive layer, a second adhesive layer, and at least one alignment mark. The heat dissipation metal layer has a first side and a second side opposite to each other. The first adhesive layer is arranged between the insulating protective layer and the first side of the heat dissipation metal layer, and the heat dissipation metal layer is attached to the insulating protective layer through the first adhesive layer. The second adhesive layer is arranged on the second side of the heat dissipation metal layer. At least one first alignment mark is arranged on at least one of the insulating protective layer and the heat dissipation metal layer, and corresponds to at least one corner of the heat dissipation metal layer. A thin film flip chip package structure is also provided.

Description

Technical Field

[0001] This invention relates to a patch and a packaging structure, and more particularly to a heat dissipation patch and a thin-film flip-chip packaging structure using the heat dissipation patch. Background Technology

[0002] Current chip-on-film (COF) packaging utilizes thermal pads on the surface of the COF structure to enhance heat dissipation, particularly around the chip where the main heat source is located. This increases the heat dissipation area and achieves better cooling. Typically, a pre-defined area for the thermal pad is established on the COF structure. The thermal placement machine locates the edge of the thermal pad by analyzing image grayscale differences, aligns it, and then attaches the thermal pad to the pre-defined area on the COF structure. However, this alignment method based on image grayscale differences can be susceptible to errors due to uncertainties such as light source adjustment, light source decay cycles, and the reflectivity of the product surface. This can lead to misalignment of the thermal pad, potentially reducing the contact area between the main heat source and the thermal pad, thus affecting the heat dissipation efficiency of the COF structure. Furthermore, during the subsequent process of bonding the thin-film flip-chip package structure onto the panel or circuit board, the edge of the chip may be used as a reference for alignment. When the chip is covered by a heat sink, the edge of the chip cannot be clearly seen, making it difficult to align the thin-film flip-chip package structure during the board mounting process. Summary of the Invention

[0003] This invention provides a heat dissipation patch that facilitates alignment identification during the application of the heat dissipation patch.

[0004] The present invention also provides a thin-film flip-chip packaging structure, which includes the above-mentioned heat dissipation patch, which can effectively reduce the probability of heat dissipation patch attachment misalignment, thereby ensuring better heat dissipation effect.

[0005] The present invention discloses a heat dissipation patch for placement on a flexible circuit board. The flexible circuit board has opposing first and second surfaces and a chip mounting area. The heat dissipation patch is disposed on at least one of the first and second surfaces of the flexible circuit board and corresponds to the chip mounting area. It includes an insulating protective layer, a heat dissipation metal layer, a first adhesive layer, a second adhesive layer, and at least one alignment mark. The heat dissipation metal layer has opposing first and second side surfaces. The first adhesive layer is disposed between the insulating protective layer and the first side surface of the heat dissipation metal layer, and the heat dissipation metal layer is attached to the insulating protective layer through the first adhesive layer. The second adhesive layer is disposed on the second side surface of the heat dissipation metal layer. At least one first alignment mark is disposed on at least one of the insulating protective layer and the heat dissipation metal layer, and corresponds to at least one corner of the heat dissipation metal layer.

[0006] The thin-film flip-chip packaging structure of the present invention includes a flexible circuit board, a chip, and a heat sink. The flexible circuit board has opposing first and second surfaces and a chip mounting area defined on the first surface. The chip is disposed within the chip mounting area and electrically connected to the flexible circuit board. The heat sink is disposed on the first or second surface of the flexible circuit board and corresponds to the chip mounting area. The heat sink includes an insulating protective layer, a heat-dissipating metal layer, a first adhesive layer, a second adhesive layer, and at least one pair of alignment marks. The heat-dissipating metal layer has opposing first and second side surfaces. The first adhesive layer is disposed between the insulating protective layer and the first side surface of the heat-dissipating metal layer, and the heat-dissipating metal layer is attached to the insulating protective layer via the first adhesive layer. The second adhesive layer is disposed on the second side surface of the heat-dissipating metal layer, and the heat sink is attached to the first surface of the flexible circuit board and the chip or the second surface of the flexible circuit board via the second adhesive layer. At least one first alignment mark is disposed on at least one of the insulating protective layer and the heat-dissipating metal layer, and corresponds to at least one corner of the heat-dissipating metal layer.

[0007] Based on the above, the thin-film flip-chip packaging structure of the present invention includes a heat dissipation patch, wherein the heat dissipation patch has at least one first alignment mark disposed on at least one of the insulating protective layer and the heat dissipation metal layer and corresponding to at least one corner of the heat dissipation metal layer. When the heat dissipation patch is attached to the thin-film flip-chip packaging structure, the machine tool can directly capture an image of the first alignment mark with a three-dimensional or planar pattern as the basis for attachment alignment, replacing the edge-finding method which is prone to image recognition errors. This allows the heat dissipation patch to be accurately aligned with the predetermined setting area, effectively reducing the probability of misalignment when the heat dissipation patch is attached to the thin-film flip-chip packaging structure, avoiding a reduction in the contact area between the heat source and the heat dissipation patch, thereby giving the thin-film flip-chip packaging structure a better heat dissipation effect, making the overall thin-film flip-chip packaging structure perform stably and extending its service life. In addition, the heat dissipation patch may also have at least two second alignment marks disposed on at least one of the insulating protective layer and the heat dissipation metal layer and adjacent to opposite sides or opposite corners of the chip setting area, as alignment references when subsequently bonding the thin-film flip-chip packaging structure to a panel or circuit board, making the board mounting operation of the thin-film flip-chip packaging structure more convenient.

[0008] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0009] Figure 1 This is a top view schematic diagram of a heat dissipation patch according to an embodiment of the present invention;

[0010] Figure 2 yes Figure 1 A cross-sectional view of the heat sink;

[0011] Figure 3This is a top view schematic diagram of a heat dissipation patch according to another embodiment of the present invention;

[0012] Figure 4 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to an embodiment of the present invention;

[0013] Figure 5 yes Figure 4 A cross-sectional schematic diagram of a thin-film flip-chip packaging structure;

[0014] Figure 6 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to another embodiment of the present invention;

[0015] Figure 7 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to another embodiment of the present invention;

[0016] Figure 8 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to another embodiment of the present invention.

[0017] Explanation of reference numerals in the attached figures

[0018] 10, 20, 30, 40: Thin-film flip-chip packaging structure

[0019] 100, 100A, 100B, 100C, 100D, 100E: Heatsinks

[0020] 110: Insulation protective layer

[0021] 120: Heat dissipation metal layer

[0022] 121: First side view

[0023] 122: Second side view

[0024] 130: First adhesive layer

[0025] 140: Second adhesive layer

[0026] 150, 150', 150a, 150b, 150c, 150d: First alignment markers

[0027] 160, 160', 160”, 160a, 160b, 160a', 160b', 160a”, 160b”: Second alignment marker

[0028] 200: Flexible Circuit Board

[0029] 201: First Surface

[0030] 201a: Chip Setup Area

[0031] 202: Second Surface

[0032] 210: Flexible substrate

[0033] 211, 212: Surface

[0034] 220: Pin

[0035] 230: Solder resist layer

[0036] 300: Chip

[0037] 310: Filler adhesive layer

[0038] C, C': Corner Detailed Implementation

[0039] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same component reference numerals are used in the drawings and description to denote the same or similar parts.

[0040] The invention is illustrated more fully with reference to the accompanying drawings of this embodiment. However, the invention may be embodied in various different forms and should not be limited to the embodiments described herein. The thickness, dimensions, or size of layers or regions in the drawings are enlarged for clarity.

[0041] It should be noted that the thin-film flip-chip package structure in the following figures is operated by tape-and-reel transport. Although the heat sink in the following figures only schematically shows one device area applied to the tape forming the thin-film flip-chip package structure, the present invention is not limited thereto. The heat sink in the following figures can be applied to multiple device areas on the tape simultaneously.

[0042] Figure 1 This is a top view schematic diagram of a heat dissipation patch according to an embodiment of the present invention. Figure 2 yes Figure 1 A cross-sectional view of the heatsink. For clarity, Figure 1 Some components are omitted from the diagram; only the insulating protective layer 110, the heat-dissipating metal layer 120, and the first alignment mark 150 are schematically shown.

[0043] Please also refer to Figure 1 and Figure 2In this embodiment, the heat dissipation patch 100A includes an insulating protective layer 110, a heat dissipation metal layer 120, a first adhesive layer 130, a second adhesive layer 140, and at least one first alignment mark 150. The insulating protective layer 110 is made of a flexible material such as polyimide (PI) to protect the heat dissipation metal layer 120 from scratches and damage. The heat dissipation metal layer 120 has a first side surface 121 and a second side surface 122 facing each other. The material of the heat dissipation metal layer 120 may include metal foil or a graphite film, and the metal foil may be, for example, aluminum foil or copper foil, but the invention is not limited thereto. The first adhesive layer 130 is disposed between the insulating protective layer 110 and the first side surface 121 of the heat dissipation metal layer 120, and the heat dissipation metal layer 120 is attached to the insulating protective layer 110 through the first adhesive layer 130. The second adhesive layer 140 is disposed on the second side surface 122 of the heat dissipation metal layer 120, which facilitates subsequent attachment of the heat dissipation metal layer 120 to a heat-generating component (such as a chip). At least one first alignment mark 150 is disposed on at least one of the insulating protective layer 110 and the heat dissipation metal layer 120, and corresponds to at least one corner C of the heat dissipation metal layer 120. For example, in this embodiment, the first alignment mark 150 includes two first alignment marks 150a and 150b, disposed on the heat dissipation metal layer 120, and the positions of the first alignment marks 150a and 150b respectively correspond to two corners C on a diagonal of the heat dissipation metal layer 120, but the present invention is not limited thereto. In another embodiment, the first alignment marks 150a and 150b may also be disposed on the insulating protective layer 110, and the positions of the first alignment marks 150a and 150b may respectively correspond to two corners C on a diagonal of the heat dissipation metal layer 120.

[0044] It should be understood that this embodiment only shows two first alignment marks 150a and 150b as an example, but is not intended to limit the present invention. The number of first alignment marks 150 can be adjusted according to actual needs.

[0045] In one embodiment, the first alignment mark 150 can be a three-dimensional or two-dimensional pattern, and the shape of the first alignment mark 150 can be rectangular, circular, cross-shaped, L-shaped, raised, concave, etc. The present invention is not limited thereto, as long as the first alignment mark 150 can be recognized by the machine. For example, the first alignment mark 150 can be a two-dimensional pattern formed on the heat dissipation metal layer 120 by printing, or the first alignment mark 150 can be a three-dimensional pattern set on the heat dissipation metal layer 120 by laser engraving, embossing, or hollowing.

[0046] In this embodiment, the first alignment mark 150 is a hollowed-out pattern formed on the heat dissipation metal layer 120 in a hollowed-out manner. The insulating protective layer 110 can cover the hollowed-out pattern of the heat dissipation metal layer 120, but the present invention is not limited thereto. In other embodiments, the first alignment mark 150 can be hollowed out and simultaneously disposed on the insulating protective layer 110 and the heat dissipation metal layer 120. That is, the insulating protective layer 110 and the heat dissipation metal layer 120 each include hollowed-out patterns of the same shape, and the hollowed-out patterns of the insulating protective layer 110 and the heat dissipation metal layer 120 correspond to each other. In this case, when the heat dissipation patch 100A is attached to the thin-film flip-chip package structure in a subsequent process, the light source can also be projected upward from the bottom surface of the heat dissipation patch 100A (i.e., the surface of the second adhesive layer 140), forming a light and shadow pattern through the corresponding hollowed-out patterns on the insulating protective layer 110 and the heat dissipation metal layer 120 as an alignment mark.

[0047] In one embodiment, the first alignment mark 150 may be printed or laser-engraved on the insulating protective layer 110, rather than on the heat dissipation metal layer 120.

[0048] When there are two or more first alignment markers 150, the shape of each first alignment marker 150 may be the same or different. For example, in this embodiment, the first alignment markers 150a and 150b have different shapes, but the present invention is not limited thereto. In other embodiments, the shapes of the first alignment markers 150a and 150b may be the same.

[0049] In one embodiment, the size of the insulating protective layer 110 is larger than the size of the heat dissipation metal layer 120, and the insulating protective layer 110 completely covers the heat dissipation metal layer 120 to ensure the protection of the heat dissipation metal layer 120, but the present invention is not limited thereto.

[0050] Since the heat sink 100A has a first alignment mark 150 disposed on at least one of the insulating protective layer 110 and the heat dissipation metal layer 120 and corresponding to at least one corner C of the heat dissipation metal layer 120, when the heat sink 100A is attached to the thin film flip-chip package structure in subsequent processes, the machine can directly capture an image of the first alignment mark 150 with a three-dimensional or planar pattern as the basis for attachment alignment, replacing the edge-finding method which is prone to image recognition errors. This allows the heat sink 100A to be accurately aligned to the predetermined setting area, thereby effectively reducing the probability of misalignment when the heat sink 100A is attached to the thin film flip-chip package structure.

[0051] It must be noted that the following embodiments use the component symbols and some content of the above embodiments, wherein the same or similar symbols are used to represent the same or similar components, and the description of the same technical content is omitted. For the description of the omitted parts, please refer to the foregoing embodiments. The following embodiments will not repeat the description.

[0052] Figure 3 This is a top view schematic diagram of a heat dissipation patch according to another embodiment of the present invention. Please also refer to... Figure 1 and Figure 3 The heat dissipation patch 100B of this embodiment is similar to the heat dissipation patch 100A described above. The difference lies in that the first alignment mark 150' of the heat dissipation patch 100B in this embodiment includes four first alignment marks 150a, 150b, 150c, and 150d, which are respectively set at the four corners C of the heat dissipation metal layer 120. The shapes of the first alignment marks 150a, 150b, 150c, and 150d are the same, but the present invention is not limited thereto. Since the heat dissipation patch 100B has the first alignment marks 150a, 150b, 150c, and 150d set at the four corners C of the heat dissipation metal layer 120, it can help the alignment of the heat dissipation patch 100B in subsequent processes. For example, when the heat dissipation patch 100B is applied to a thin-film flip-chip packaging structure, the probability of misalignment when the heat dissipation patch 100B is attached to the predetermined setting area can be reduced.

[0053] Figure 4 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to an embodiment of the present invention. Figure 5 yes Figure 4 A cross-sectional schematic diagram of a thin-film flip-chip packaging structure. For clarity, Figure 4 Some components are omitted from the diagram; please refer to the references for the omitted parts. Figure 5 To understand this, refer to the cross-sectional diagram.

[0054] Please also refer to Figure 1 , Figure 4 and Figure 5 The thin-film flip-chip packaging structure 10 of this embodiment includes, for example, the heat dissipation patch 100A, the flexible circuit carrier 200, and the chip 300 described above. The flexible circuit carrier 200 has a first surface 201 and a second surface 202 facing each other, and a chip placement area 201a defined on the first surface 201. The chip 300 may be disposed in the chip placement area 201a and electrically connected to the flexible circuit carrier 200 by flip-chip method. The heat dissipation patch 100A is disposed on the first surface 201 of the flexible circuit carrier 200 and corresponds to the chip placement area 201a, wherein the heat dissipation patch 100A can be attached to the first surface 201 of the flexible circuit carrier 200 and cover the chip 300 by a second adhesive layer 140. In other embodiments, the heat dissipation patch 100A may also be disposed on the second surface 202 of the flexible circuit carrier 200 and correspond to the chip setting area 201a. The heat dissipation patch 100A can be attached to the second surface 202 of the flexible circuit carrier 200 through the second adhesive layer 140. This is still within the scope of protection of the present invention.

[0055] The flexible circuit board 200 may include a flexible substrate 210, a plurality of pins 220, and a solder resist layer 230. The flexible substrate 210 may be made of materials such as polyethylene terephthalate (PET), polyimide (PI), polyethersulfone (PES), polycarbonate (PC), or other suitable flexible materials. The flexible substrate 210 has surfaces 211 and 212 facing each other, and the pins 220 are disposed on surface 211 of the flexible substrate 210. The solder resist layer 230 is disposed on surface 211 of the flexible substrate 210, located outside the chip placement area 201a, and partially covers the plurality of pins 220 to prevent oxidation or short circuits caused by foreign matter contamination of the pins 220. The portion of the pins 220 exposed by the solder resist layer 230 can be used for electrical connection to the chip 300 or external components. The material of the solder resist layer 230 is, for example, green paint, and is not limited thereto. In this embodiment, the first surface 201 of the flexible circuit board 200 may be formed by the surface of the solder resist layer 230 away from the flexible substrate 210, while the second surface 202 of the flexible circuit board 200 may be formed by the surface 212 of the flexible substrate 210.

[0056] In one embodiment, the thin-film flip-chip packaging structure 10 further includes a filler layer 310, which can be filled between the flexible substrate 210 and the chip 300 to prevent moisture or foreign matter from intruding and causing damage to electrical contacts or electrical abnormalities. The material of the filler layer 310 is, for example, epoxy molding compound (EMC), but is not limited thereto.

[0057] Since the heat dissipation patch 100A of the thin-film flip-chip package structure 10 in this embodiment has at least one first alignment mark 150 disposed on at least one of the insulating protective layer 110 and the heat dissipation metal layer 120, when the heat dissipation patch 100A is attached to the thin-film flip-chip package structure 10, the machine tool can directly capture the image of the first alignment mark 150 with a three-dimensional or planar pattern as the basis for attachment alignment, so that the heat dissipation patch 100A can be accurately aligned with the predetermined setting area, thereby reducing the probability of the heat dissipation patch 100A being attached to the thin-film flip-chip package structure 10, avoiding the reduction of the contact area between the heat source and the heat dissipation patch 100A, and thus enabling the thin-film flip-chip package structure 10 to have a better heat dissipation effect.

[0058] Figure 6 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to another embodiment of the present invention. Figure 6 The top-view diagram is roughly similar to Figure 4The diagram is a top view; therefore, the same components described in both embodiments can be referred to the foregoing, and the same configurations in both embodiments will not be repeated here. Figure 6 A cross-sectional view of the thin-film flip-chip packaging structure can be found in the reference. Figure 5 To understand this, for clarity, Figure 6 Some components are omitted from the diagram; please refer to the references for the omitted parts. Figure 5 To understand this, refer to the cross-sectional diagram.

[0059] Please also refer to Figure 6 and Figure 4 The thin-film flip-chip package structure 20 of this embodiment is similar to the thin-film flip-chip package structure 10 described above. The difference is that the heat dissipation patch 100C of the thin-film flip-chip package structure 20 of this embodiment further includes at least two second alignment marks 160, which are disposed on at least one of the insulating protective layer 110 and the heat dissipation metal layer 120, and are correspondingly disposed outside the chip setting area 201a and adjacent to the opposite sides of the chip setting area 201a. For example, the second alignment marks 160 in this embodiment include two second alignment marks 160a and 160b, which are disposed on the heat dissipation metal layer 120, and the positions of the second alignment marks 160a and 160b are respectively adjacent to the opposite two short sides of the chip setting area 201a, but the present invention is not limited thereto. In another embodiment, the second alignment marks 160a and 160b may also be disposed on the insulating protective layer 110.

[0060] It should be understood that this embodiment only shows two second alignment marks 160a and 160b by way of example, but is not intended to limit the present invention. The number of second alignment marks 160 can be adjusted according to actual needs.

[0061] In one embodiment, the second alignment mark 160 can be a three-dimensional or two-dimensional pattern, and its shape can be rectangular, circular, cross-shaped, L-shaped, raised, concave, etc. This invention is not limited in these respects, as long as the second alignment mark 160 can be recognized by the machine. For example, the second alignment mark 160 can be a two-dimensional pattern formed on the heat dissipation metal layer 120 by printing, or it can be a three-dimensional pattern set on the heat dissipation metal layer 120 by laser engraving, embossing, or hollowing out. This invention is not limited thereto. In other embodiments, the second alignment mark 160 can also be hollowed out and simultaneously set on the insulating protective layer 110 and the heat dissipation metal layer 120. Alternatively, the second alignment mark 160 can be printed or laser engraved on the insulating protective layer 110, but not on the heat dissipation metal layer 120. This invention is not limited in these respects.

[0062] Furthermore, when there are two or more second alignment markers 160, the shape of each second alignment marker 160 may be the same or different. For example, in this embodiment, the second alignment markers 160a and 160b have the same shape, but the invention is not limited thereto. In other embodiments, the shapes of the first alignment markers 160a and 160b may be different.

[0063] In one embodiment, the first alignment mark 150 and the second alignment mark 160 can be formed using the same manufacturing process, but this invention is not limited thereto. In other embodiments, the first alignment mark 150 and the second alignment mark 160 can be formed using different manufacturing processes. For example, the first alignment mark 150 can be formed into a perforated pattern on the heat-dissipating metal layer 120, and the second alignment mark 160 can be formed into a planar pattern on the heat-dissipating metal layer 120 by printing. Furthermore, the shapes of the first alignment mark 150 and the second alignment mark 160 can be the same or different, and this invention is not limited thereto.

[0064] Since the heat dissipation patch 100C of the thin-film flip-chip package structure 20 in this embodiment has at least one first alignment mark 150 and at least two second alignment marks 160 disposed on at least one of the insulating protective layer 110 and the heat dissipation metal layer 120, when the heat dissipation patch 100C is attached to the thin-film flip-chip package structure 20, the machine tool can directly capture the image of the first alignment mark 150 with a three-dimensional or planar pattern as the basis for attachment alignment, so that the heat dissipation patch 100C can be accurately aligned with the predetermined setting area, thereby reducing the probability of the heat dissipation patch 100C being attached to the thin-film flip-chip package structure 20, avoiding the reduction of the contact area between the heat source and the heat dissipation patch 100C, thereby giving the thin-film flip-chip package structure 20 a better heat dissipation effect, and the second alignment mark 160 adjacent to the edge of the chip 300 can be captured as the alignment reference for subsequent bonding of the thin-film flip-chip package structure 20 to the panel or circuit board, making the board mounting operation of the thin-film flip-chip package structure 20 more convenient.

[0065] Figure 7 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to another embodiment of the present invention. Figure 7 The top-view diagram is roughly similar to Figure 6 The diagram is a top view; therefore, the same components described in both embodiments can be referred to the foregoing, and the same configurations in both embodiments will not be repeated here. Figure 7 A cross-sectional view of the thin-film flip-chip packaging structure can be found in the reference. Figure 5 To understand this, for clarity, Figure 7 Some components are omitted from the diagram; please refer to the references for the omitted parts. Figure 5 To understand this, refer to the cross-sectional diagram.

[0066] Please refer to Figure 7and Figure 6 The thin-film flip-chip package structure 30 of this embodiment is similar to the thin-film flip-chip package structure 20 described above. The difference lies in that: the at least two second alignment marks 160' of the heat sink 100D of the thin-film flip-chip package structure 30 of this embodiment include two second alignment marks 160a' and 160b', which are disposed on the insulating protective layer 110, and the positions of the second alignment marks 160a' and 160b' can be adjacent to the two opposite short sides of the chip placement area 201a, respectively. In short, the second alignment marks 160a' and 160b' disposed adjacent to the two opposite sides of the chip placement area 201a can serve as a reference for the machine to identify the edge of the chip 300 for alignment when subsequently bonding the thin-film flip-chip package structure 30 to the panel or circuit board, thereby making the board mounting operation of the thin-film flip-chip package structure 30 more convenient.

[0067] Figure 8 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to another embodiment of the present invention. Figure 8 The top-view diagram is roughly similar to Figure 7 The diagram is a top view; therefore, the same components described in both embodiments can be referred to the foregoing, and the same configurations in both embodiments will not be repeated here. Figure 8 A cross-sectional view of the thin-film flip-chip packaging structure can be found in the reference. Figure 5 To understand this, for clarity, Figure 8 Some components are omitted from the diagram; please refer to the references for the omitted parts. Figure 5 To understand this, refer to the cross-sectional diagram.

[0068] Please refer to Figure 8 and Figure 7 The thin-film flip-chip package structure 40 of this embodiment is similar to the thin-film flip-chip package structure 30 described above. The difference is that the at least two second alignment marks 160” of the heat sink 100E of the thin-film flip-chip package structure 40 of this embodiment include two second alignment marks 160a” and 160b”, which are disposed on the insulating protective layer 110, and the positions of the second alignment marks 160a” and 160b” can be adjacent to the two opposite corners C' on the diagonal of the chip setting area 201a, respectively. In other embodiments, the first The positions of the two alignment marks 160a” and 160b” can be adjacent to the two opposite corners C' on a long side of the chip setting area 201a, but the present invention is not limited thereto. In short, the second alignment marks 160a” and 160b” set adjacent to the two opposite corners C' of the chip setting area 201a can also serve as a reference for the machine to identify the edge of the chip 300 for alignment when subsequently bonding the thin-film flip-chip package structure 40 to the panel or circuit board, thereby making the board mounting operation of the thin-film flip-chip package structure 40 more convenient.

[0069] In summary, the thin-film flip-chip package structure of the present invention includes a heat dissipation patch, wherein the heat dissipation patch has at least one first alignment mark disposed on at least one of the insulating protective layer and the heat dissipation metal layer and corresponding to at least one corner of the heat dissipation metal layer. When the heat dissipation patch is attached to the thin-film flip-chip package structure, the machine tool can directly capture an image of the first alignment mark with a three-dimensional or planar pattern as the basis for attachment alignment, replacing the edge-finding method which is prone to image recognition errors. This allows the heat dissipation patch to be accurately aligned with the predetermined setting area, effectively reducing the probability of offset when the heat dissipation patch is attached to the thin-film flip-chip package structure, avoiding a reduction in the contact area between the heat source and the heat dissipation patch, thereby giving the thin-film flip-chip package structure a better heat dissipation effect, making the overall thin-film flip-chip package structure perform stably and extending its service life. In addition, the heat dissipation patch may also have at least two second alignment marks disposed on at least one of the insulating protective layer and the heat dissipation metal layer and adjacent to opposite sides or opposite corners of the chip setting area, as alignment references when subsequently bonding the thin-film flip-chip package structure to the panel or circuit board, making the board mounting operation of the thin-film flip-chip package structure more convenient.

[0070] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A heat dissipation patch, characterized in that, The heat sink is disposed on a flexible circuit board, the flexible circuit board having opposing first and second surfaces and a chip mounting area, the heat sink being disposed on at least one of the first and second surfaces of the flexible circuit board and corresponding to the chip mounting area, the heat sink comprising: Insulating protective layer; A heat-dissipating metal layer having a first side and a second side facing each other; A first adhesive layer is disposed between the insulating protective layer and the first side of the heat dissipation metal layer, and the heat dissipation metal layer is attached to the insulating protective layer through the first adhesive layer; A second adhesive layer is disposed on the second side surface of the heat-dissipating metal layer; and At least one first alignment mark is disposed on at least one of the insulating protective layer and the heat dissipation metal layer, and corresponds to at least one corner of the heat dissipation metal layer.

2. The heat dissipation patch according to claim 1, characterized in that, It also includes at least two second alignment marks, which are disposed on at least one of the insulating protective layer and the heat dissipation metal layer. The at least two second alignment marks are respectively disposed outside the chip setting area and adjacent to the opposite sides or opposite corners of the chip setting area.

3. The heat dissipation patch according to claim 2, characterized in that, The at least one first alignment mark and at least one of the at least two second alignment marks are disposed on the insulating protective layer by means of printing or laser engraving.

4. The heat dissipation patch according to claim 2, characterized in that, The at least one first alignment mark and at least one of the at least two second alignment marks are disposed on the heat dissipation metal layer by means of printing, laser engraving, embossing or hollowing.

5. The heat dissipation patch according to claim 2, characterized in that, The at least one first alignment mark and at least one of the at least two second alignment marks are disposed in a hollow manner on the insulating protective layer and the heat dissipation metal layer.

6. The heat dissipation patch according to claim 1, characterized in that, The at least one first alignment mark is two first alignment marks, which are respectively set at two corners on a diagonal line of the heat dissipation metal layer.

7. The heat dissipation patch according to claim 1, characterized in that, The at least one first alignment mark is four first alignment marks, which are respectively set at the four corners of the heat dissipation metal layer.

8. A thin-film flip-chip packaging structure, characterized in that, include: A flexible circuit board has opposing first and second surfaces and a chip placement area defined on the first surface; A chip is disposed within the chip setting area and electrically connected to the flexible circuit carrier board; as well as A heat sink is disposed on the first or second surface of the flexible circuit board and corresponds to the chip mounting area. The heat sink includes: Insulating protective layer; A heat-dissipating metal layer having a first side and a second side facing each other; A first adhesive layer is disposed between the insulating protective layer and the first side of the heat dissipation metal layer, and the heat dissipation metal layer is attached to the insulating protective layer through the first adhesive layer; A second adhesive layer is disposed on the second side of the heat dissipation metal layer, wherein the heat dissipation patch is attached to the first surface of the flexible circuit board and the chip or the second surface of the flexible circuit board via the second adhesive layer; and At least one first alignment mark is disposed on at least one of the insulating protective layer and the heat dissipation metal layer, and corresponds to at least one corner of the heat dissipation metal layer.

9. The thin-film flip-chip packaging structure according to claim 8, characterized in that, The heat dissipation patch further includes at least two second alignment marks, which are disposed on at least one of the insulating protective layer and the heat dissipation metal layer. The at least two second alignment marks are respectively disposed outside the chip setting area and adjacent to the opposite sides or opposite corners of the chip setting area.

10. The thin-film flip-chip packaging structure according to claim 9, characterized in that, The at least one first alignment mark and at least one of the at least two second alignment marks are disposed on the insulating protective layer by means of printing or laser engraving.

11. The thin-film flip-chip packaging structure according to claim 9, characterized in that, The at least one first alignment mark and at least one of the at least two second alignment marks are disposed on the heat dissipation metal layer by means of printing, laser engraving, embossing or hollowing.

12. The thin-film flip-chip packaging structure according to claim 9, characterized in that, The at least one first alignment mark and at least one of the at least two second alignment marks are disposed on the insulating protective layer and the heat dissipation metal layer in a hollowed-out manner.

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