A turn-off thyristor having a PN stack voltage sustaining layer structure

Abstract

The present application belongs to the technical field of power semiconductor, and particularly relates to a gate turn-off thyristor (GTO) with low turn-off loss and high turn-off current. Compared with the traditional gate turn-off thyristor, the present application adopts a PN stacked voltage resistance layer structure, which is located above the N-type electric field cutoff layer and below the P-type base region, and is composed of a low-doped P-type drift region and a low-doped N-type drift region. During turn-off, the electric field peak of the present application is located at the junction of the P-type drift region and the N-type drift region, and the electric field extends in the anode direction and the cathode direction, respectively, so that the electric field is established faster and the turn-off loss is lower. At the same time, the change of the electric field peak position reduces the maximum electric field, thereby increasing the maximum turn-off current. The beneficial results of the present application are: improving the electric field distribution during turn-off, significantly reducing the turn-off loss during turn-off, and significantly improving the maximum turn-off current.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of power semiconductor, in particular to a gate turn-off thyristor (GTO) with low turn-off loss. BACKGROUND

[0002] Gate turn-off thyristor (GTO) is widely used in high-power switching applications, and its thyristor structure can have very low on-state voltage drop when turned on, and can block very high voltage. Unlike conventional thyristors, gate turn-off thyristors can be turned off by applying a reverse current to the gate, but because the gate turn-off thyristor stores a large number of carriers in the drift region when turned on, it will generate very high turn-off loss E off In addition, the maximum turn-off current of the gate turn-off thyristor is affected by the dynamic avalanche effect, so its use in higher current scenarios is limited. SUMMARY

[0003] The purpose of the present application is to address the above problems, and to provide a gate turn-off thyristor with a PN stacked voltage blocking layer structure that can significantly reduce its loss E off during turn-off, while increasing its maximum turn-off current.

[0004] The technical solution of the present application is a gate turn-off thyristor with a PN stacked voltage blocking layer structure, which includes an anode structure, an electric field cutoff layer structure, a composite voltage blocking layer structure, a base region structure, and a gate structure, as well as the uppermost cathode structure. The composite voltage blocking layer structure is located between the electric field cutoff layer structure and the base region structure, and contains first and second types of doping charges, respectively. The cathode structure is located above the base region structure.

[0005] The anode structure includes an anode metal 1 and a P+ anode region 2. The P+ anode region 2 is located on the upper surface of the anode metal 1. The anode metal 1 has an anode lead.

[0006] The electric field cutoff layer structure includes a high-concentration N-type electric field cutoff layer 3. The N-type electric field cutoff layer 3 is located on the upper surface of the P+ anode region 2.

[0007] The composite voltage blocking layer structure includes an N-type drift region 4 and a P-type drift region 5. The P-type drift region 5 has an opposite doping charge to the N-type drift region 4, and the P-type drift region 5 has the same doping concentration as the N-type drift region 4. The doping concentration of the N-type drift region 4 is much lower than that of the N-type electric field cutoff layer 3 or the P-type base region 6. The P-type drift region 5 is located on the upper surface of the N-type drift region 4, and the N-type drift region 4 is located on the upper surface of the N-type electric field cutoff layer 3.

[0008] The base region structure and gate structure include a P-type base region 6, a high-concentration P-type gate region 10, and a gate metal 9; the P-type base region 6 is located on the upper surface of the P-type drift region 5, the P-type gate region 10 is located on the upper layer of one end of the P-type base region 6, and the gate metal 9 is located on the upper surface of the P-type gate region 10; the lead-out terminal of the gate metal 9 is the gate.

[0009] The cathode structure includes a cathode metal 8 and an N+ cathode region 7; the N+ cathode region 7 is located on the upper surface of the other end of the P-type base region 6, and both the N+ cathode region 7 and the gate metal 9 are located on the upper surface of the P-type base region 6 with a gap between them; the cathode metal 8 is located on the upper surface of the N+ cathode region 7; the cathode is located at the lead-out end of the cathode metal 8.

[0010] Compared with the traditional structure, a PN stacked voltage withstand layer structure is adopted. The PN stacked voltage withstand layer structure consists of an N-type drift region 4 and a P-type drift region 5. The N-type drift region 4 and the P-type drift region 5 use the same or similar doping concentration, which is much lower than the doping concentration of the N-type electric field cutoff layer 3 or the P-type base region 6.

[0011] The beneficial effects of the present invention are that the turn-off thyristor of the present invention with low turn-off loss greatly reduces turn-off loss and increases its maximum turn-off current. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the turn-off thyristor of the present invention;

[0013] Figure 2 This is a schematic diagram of a conventional turn-off thyristor;

[0014] Figure 3 This is a schematic diagram of the electric field distribution when a conventional turn-off thyristor is turned off.

[0015] Figure 4 This is a schematic diagram of the electric field distribution when the turn-off thyristor of the present invention is turned off; Detailed Implementation

[0016] The present invention will now be described in detail with reference to the accompanying drawings.

[0017] like Figure 1 As shown, this is a turn-off thyristor with a PN stacked voltage-resistant layer structure according to the present invention. Figure 2 This is a conventional turn-off thyristor. The voltage withstand layer structure of a conventional turn-off thyristor only includes an N-type drift region 4, while the turn-off thyristor of this invention adopts a PN stacked voltage withstand layer structure, including an N-type drift region 4 and a P-type drift region 5. The doping concentrations of the N-type drift region 4 and the P-type drift region 5 are close, and are much lower than the doping concentration of the P-type base region 6.

[0018] Its working principle is as follows:

[0019] When the gate turn-off thyristor (GTO) is turned off, the anode is connected to a high potential, the cathode is connected to a low potential, and the gate is connected to a reverse current through an external drive circuit. The carriers stored in the drift region, holes flow out from the gate and cathode, and electrons flow out from the anode, and an electric field is established inside the drift region. The peak electric field of the conventional gate turn-off thyristor appears at the junction of the P-type base region 5 and the N-type drift region 4, and the electric field gradually expands towards the anode, which generates a large amount of energy loss in this stage. At the same time, the peak electric field is concentrated at the junction of the P-type base region 5 and the N-type drift region 4, which will cause the peak electric field to reach the critical breakdown field in advance when a large current is turned off, resulting in turn-off failure; the gate turn-off thyristor with a PN stacked voltage layer structure of the present application has a peak electric field at the junction of the P-type drift region 4 and the N-type drift region 5, and the electric field expands towards the anode and the cathode respectively, so the electric field is established faster and the turn-off loss is lower. In addition, the electric field of the gate turn-off thyristor of the present application is established inside the P-type drift region 4 and the N-type drift region 5, the electric field distribution is more uniform, and the peak electric field is lower, so a larger current can be turned off.

[0020] Figure 3 The electric field distribution of the conventional gate turn-off thyristor when turned off is shown in the figure, it can be seen that the peak electric field of the conventional gate turn-off thyristor is close to the cathode, which will cause the electric field to be mainly established towards the anode, resulting in a very slow speed of electric field establishment, and a high peak electric field, resulting in a large turn-off loss and a lower turn-off current.

[0021] Figure 4 The electric field distribution of the gate turn-off thyristor of the present application when turned off is shown in the figure, compared with the conventional gate turn-off thyristor, the peak electric field of the gate turn-off thyristor of the present application is established in the middle of the P-type drift region 4 and the N-type drift region 5, so the electric field expands towards the anode and the cathode at the same time, and the peak electric field is reduced, so the turn-off loss can be significantly reduced and the maximum turn-off current can be increased.

Claims

1. A turn-off thyristor with a PN stacked withstand voltage layer structure, wherein its semi-cell comprises an anode structure, an electric field cutoff layer structure, a composite withstand voltage layer structure, a base region structure, a gate structure, and a cathode structure; characterized in that, The anode structure includes an anode metal (1) and a P+ anode region (2); the P+ anode region (2) is located on the upper surface of the anode metal (1); The anode metal (1) leads out at the anode; The electric field blocking layer structure includes a high-concentration N-type electric field blocking layer (3); the N-type electric field blocking layer (3) is located on the upper surface of the P+ anode region (2); The composite withstand voltage layer structure includes an N-type drift region (4) and a P-type drift region (5); the P-type drift region (5) adopts the opposite doping charge to the N-type drift region (4), and the P-type drift region (5) adopts the same doping concentration as the N-type drift region (4), and the doping concentration of the N-type drift region (4) is much lower than that of the N-type electric field cutoff layer (3) or the P-type base region (6); the P-type drift region (5) is located on the upper surface of the N-type drift region (4), and the N-type drift region (4) is located on the upper surface of the N-type electric field cutoff layer (3); The base region structure and gate structure include a P-type base region (6), a high-concentration P-type gate region (10), and a gate metal (9); the P-type base region (6) is located on the upper surface of the P-type drift region (5), the P-type gate region (10) is located on the upper layer of one end of the P-type base region (6), and the gate metal (9) is located on the upper surface of the P-type gate region (10); the gate metal (9) has a lead-out terminal that is a gate. The cathode structure includes a cathode metal (8) and an N+ cathode region (7); the N+ cathode region (7) is located on the upper surface of the other end of the P-type base region (6), and the N+ cathode region (7) and the gate metal (9) are both located on the upper surface of the P-type base region (6) with a gap between them; the cathode metal (8) is located on the upper surface of the N+ cathode region (7); the cathode is located at the lead-out end of the cathode metal (8).

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