An epitaxial structure and a method for preparing the same

Abstract

The present invention discloses an epitaxial structure and a preparation method thereof, which comprises a first barrier layer and a low-temperature preparation layer; the first barrier layer comprises a plurality of stacked barrier composite structures, the barrier composite structures comprising a stacked N-GaN barrier layer and an N-BGaN barrier layer, wherein the B component gradually decreases along the stacking direction; the low-temperature preparation layer comprises a plurality of stacked preparation composite structures, the preparation composite structures comprising a stacked N-GaN preparation layer, an N-BGaN preparation layer, and an N-InGaN preparation layer, wherein the In component gradually increases along the stacking direction. By providing the first barrier layer and the low-temperature preparation layer, the present invention reduces lattice mismatch, releases stress, and reduces defect formation; the first barrier layer effectively blocks the extension and expansion of defects, and the low-temperature preparation layer optimizes the density and size of defects, thereby increasing the reliability of the epitaxial structure and subsequently improving the reverse voltage leakage yield of the epitaxial structure.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an epitaxial structure and a preparation method thereof. Background Art

[0002] The epitaxial structure is the light-emitting core of the LED chip, including the N-type GaN layer, MQW multi-quantum well layer and P-type GaN layer stacked in sequence, which has a significant impact on the optoelectronic performance of the LED chip. However, various defects are inevitably generated during the formation of the epitaxial structure, mainly dislocations, V-shaped pits and other defects. These defects are caused by lattice mismatch of the underlying layer, stress from film growth, extension of underlying defects, etc. If these defects are too many and too large, it is easy to cause reverse voltage leakage in the epitaxial structure. In severe cases, it will cause the epitaxial structure to be broken down, causing device failure. Summary of the Invention

[0003] The purpose of the present invention is to overcome the shortcomings of the prior art. The present invention provides an epitaxial structure and a preparation method thereof. By arranging a first barrier layer and a low-temperature preparation layer between the N-type GaN layer and the MQW multi-quantum well layer, the lattice mismatch is reduced, the stress in the epitaxial structure is released, and the formation of defects is reduced; the first barrier layer effectively blocks the extension and expansion of defects, and the low-temperature preparation layer optimizes the density and size of defects, thereby increasing the reliability of the epitaxial structure and subsequently improving the reverse voltage leakage yield of the epitaxial structure.

[0004] The present invention provides an epitaxial structure, comprising an N-type GaN layer, an MQW multi-quantum well layer, and a P-type GaN layer stacked in sequence on a patterned sapphire substrate, wherein a first barrier layer and a low-temperature preparation layer are stacked in sequence between the N-type GaN layer and the MQW multi-quantum well layer;

[0005] The first barrier layer includes a plurality of stacked barrier composite structures, any of which includes an N-GaN barrier layer and an N-BGaN barrier layer stacked in sequence, and the B component in the first barrier layer gradually decreases along the stacking direction of the epitaxial structure;

[0006] The low-temperature preparation layer includes several stacked preparation composite structures, any of which includes an N-GaN preparation layer, an N-BGaN preparation layer and an N-InGaN preparation layer stacked in sequence, and the In component in the low-temperature preparation layer gradually increases along the stacking direction of the epitaxial structure.

[0007] Specifically, the first barrier layer includes several first NB(a)Ga(1-a)N barrier layers, several second NB(b)Ga(1-b)N barrier layers and several third NB(c)Ga(1-c)N barrier layers, the value range of a is 0.1~0.3, the value range of b is 0.05~0.15, the value range of c is 0.01~0.1, and a>b>c.

[0008] Specifically, the number of layers of the first NB(a)Ga(1-a)N barrier layer, the second NB(b)Ga(1-b)N barrier layer and the third NB(c)Ga(1-c)N barrier layer are all 3 to 10.

[0009] Specifically, the low-temperature preparation layer includes several first N-In(x)Ga(1-x)N preparation layers, several second N-In(y)Ga(1-y)N preparation layers and several third N-In(z)Ga(1-z)N preparation layers, the value range of x is 0.005~0.01, the value range of y is 0.01~0.05, the value range of z is 0.05~0.1, and x<y<z.

[0010] Specifically, the number of layers of the first N-In(x)Ga(1-x)N preparation layer, the second N-In(y)Ga(1-y)N preparation layer and the third N-In(z)Ga(1-z)N preparation layer are all 3 to 10.

[0011] Specifically, the ratio of the B component in the N-BGaN preparation layer is 0.01 to 0.1.

[0012] Specifically, the thickness of the N-GaN barrier layer is 5 to 15 nm, and the thickness of the N-BGaN barrier layer is 1 to 5 nm;

[0013] The thickness of the N-GaN preparation layer is 5 to 15 nm, the thickness of the N-BGaN preparation layer is 1 to 5 nm, and the thickness of the N-InGaN preparation layer is 1 to 3 nm.

[0014] Specifically, the concentration range of the N element in the first barrier layer is 10 19 ~5×10 19 atoms / cm 3 The concentration range of N element in the low temperature preparation layer is 10 18 ~5×10 18 atoms / cm 3 .

[0015] The present invention also provides a method for preparing an epitaxial structure, comprising the following steps:

[0016] A patterned sapphire substrate is provided, and an N-type GaN layer, a first barrier layer, a low-temperature preparation layer, an MQW multi-quantum well layer, and a P-type GaN layer are sequentially grown on the patterned sapphire substrate to form an epitaxial structure; wherein,

[0017] Growing the first barrier layer includes cyclically stacking and growing N-GaN barrier layers and N-BGaN barrier layers to form a plurality of barrier composite structures under a growth pressure of 150 to 300 Torr and an operating speed of 700 to 1000 r / min, wherein the B component gradually decreases along the growth direction;

[0018] Growing the low-temperature preparation layer includes cyclically stacking and growing N-GaN preparation layers, N-BGaN preparation layers and N-InGaN preparation layers to form several preparation composite structures under a growth pressure of 100 to 300 Torr and a working speed of 700 to 1000 r / min, with the In component gradually increasing along the growth direction.

[0019] Specifically, the growth temperature range of the N-GaN barrier layer and the N-BGaN barrier layer is 880-980° C.;

[0020] The growth temperature ranges of the N-GaN preparation layer and the N-BGaN preparation layer are both 800-900°C, and the growth temperature range of the N-InGaN preparation layer is 750-850°C.

[0021] Compared with the prior art, the present invention has the following beneficial effects:

[0022] The first barrier layer is a composite structure with a gradually decreasing B component stacked up, and the low-temperature preparation layer is a composite structure with a gradually increasing In component stacked up. This can effectively reduce the lattice mismatch between film layers and release stress in the epitaxial structure, thereby reducing the generation of defects in the epitaxial structure, improving the quality of the epitaxial structure, and increasing the reverse voltage leakage yield of the epitaxial structure.

[0023] The first barrier layer utilizes the small spacing between B atoms, the small lattice mismatch between BGaN and GaN, and the high potential barrier of BGaN to stack N-GaN barrier layers and N-BGaN barrier layers. This can effectively block the extension and expansion of defects in the underlying film layer, thereby improving the quality of the epitaxial structure and the reverse voltage leakage yield of the epitaxial structure;

[0024] The low-temperature preparation layer utilizes a stacked N-GaN preparation layer, an N-BGaN preparation layer, and an N-InGaN preparation layer. The In component gradually increases along the stacking direction of the epitaxial structure, further reducing the lattice mismatch between the film layers, further releasing the stress in the epitaxial structure, and optimizing the density and size of defects, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0026] Figure 1 is a schematic diagram of an epitaxial structure in an embodiment of the present invention;

[0027] Figure 2 It is the volt-ampere characteristic curve in the implementation of the present invention.

[0028] In the accompanying drawings, 100, N-type GaN layer; 200, first barrier layer; 210, barrier composite structure; 211, N-GaN barrier layer; 212, N-BGaN barrier layer; 300, low-temperature preparation layer; 310, preparation composite structure; 311, N-GaN preparation layer; 312, N-BGaN preparation layer; 313, N-InGaN preparation layer; 400, MQW multi-quantum well layer; 500, P-type GaN layer. DETAILED DESCRIPTION

[0029] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0030] Figure 1 A schematic diagram of an epitaxial structure in an embodiment of the present invention is shown, wherein the epitaxial structure includes an N-type GaN layer 100, an MQW multi-quantum well layer 400, and a P-type GaN layer 500 sequentially stacked on a patterned sapphire substrate, and a first barrier layer 200 and a low-temperature preparation layer 300 are sequentially stacked between the N-type GaN layer 100 and the MQW multi-quantum well layer 400.

[0031] In some specific embodiments, the first barrier layer 200 includes a plurality of stacked barrier composite structures 210, any of the barrier composite structures 210 includes an N-GaN barrier layer 211 and an N-BGaN barrier layer 212 stacked in sequence, and the B component in the first barrier layer 200 gradually decreases along the stacking direction of the epitaxial structure.

[0032] The first barrier layer 200 is a composite structure with a stacked arrangement in which the B component gradually decreases, which can effectively reduce the lattice mismatch between film layers and release the stress in the epitaxial structure, thereby reducing the generation of defects in the epitaxial structure, improving the quality of the epitaxial structure, and improving the reverse voltage leakage yield of the epitaxial structure.

[0033] The first barrier layer 200 utilizes the small distance between B atoms, the smaller lattice mismatch between BGaN and GaN, and the higher potential barrier of BGaN to stack the N-GaN barrier layer 211 and the N-BGaN barrier layer 212, which can effectively block the extension and expansion of defects in the underlying film layer, prevent the defects from increasing and becoming larger, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0034] Furthermore, the plurality of stacked barrier composite structures 210 include a plurality of first barrier composite structures, a plurality of second barrier composite structures, and a plurality of third barrier composite structures. The plurality of second barrier composite structures are stacked on the plurality of first barrier composite structures, and the plurality of third barrier composite structures are stacked on the plurality of second barrier composite structures. Preferably, the number of first barrier composite structures, second barrier composite structures, and third barrier composite structures is 3 to 10. Specifically, three layers of the first barrier composite structure can be stacked first, followed by three layers of the second barrier composite structure, and then three layers of the third barrier composite structure, to form the first barrier layer 200.

[0035] The first barrier layer 200 of the multi-layer stacked structure is beneficial to releasing stress in the epitaxial structure and can reduce the formation of defects in the epitaxial structure, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0036] Specifically, the first barrier composite structure includes a first N-GaN barrier layer and a first N-BGaN barrier layer stacked on the first N-GaN barrier layer, the second barrier composite structure includes a second N-GaN barrier layer and a second N-BGaN barrier layer stacked on the second N-GaN barrier layer, and the third barrier composite structure includes a third N-GaN barrier layer and a third N-BGaN barrier layer stacked on the third N-GaN barrier layer; and in the first barrier layer 200, the B component in the N-BGaN barrier layer 212 gradually decreases along the stacking direction of the epitaxial structure.

[0037] More specifically, the plurality of stacked barrier composite structures 210, i.e., the first barrier layer 200, include a plurality of first NB(a)Ga(1-a)N barrier layers, a plurality of second NB(b)Ga(1-b)N barrier layers, and a plurality of third NB(c)Ga(1-c)N barrier layers, wherein the value range of a is 0.1 to 0.3, the value range of b is 0.05 to 0.15, the value range of c is 0.01 to 0.1, and a>b>c; the number of layers of the first NB(a)Ga(1-a)N barrier layer, the second NB(b)Ga(1-b)N barrier layer, and the third NB(c)Ga(1-c)N barrier layer are all 3 to 10 layers.

[0038] The multi-layered structure and the appropriate B component ratio can enable the multiple N-BGaN barrier layers 212 to form a good gradient transition in the first barrier layer 200, effectively reducing the lattice mismatch between the film layers and releasing the stress in the epitaxial structure, thereby reducing the generation of defects in the epitaxial structure; and can also make full use of the small distance between B atoms, the smaller lattice mismatch between BGaN and GaN, and the high potential barrier characteristics of BGaN to block the extension and expansion of defects in the underlying film layer, prevent the defects from increasing and becoming larger, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0039] In addition, BGaN has a higher potential barrier, which can reduce the speed of electron injection into the MQW multi-quantum well layer 400; in the first barrier layer 200, there are multiple layers of N-BGaN barrier layers 212 and the B component gradually decreases along the stacking direction of the epitaxial structure, forming an efficient barrier wall, which effectively reduces the speed of electron injection into the MQW multi-quantum well layer 400, improves the recombination efficiency of electrons and holes in the MQW multi-quantum well layer 400, and thus improves the luminous efficiency of the LED.

[0040] In some specific embodiments, the low-temperature preparation layer 300 includes several stacked preparation composite structures 310, any of which includes an N-GaN preparation layer 311, an N-BGaN preparation layer 312, and an N-InGaN preparation layer 313 stacked in sequence, and the In component in the low-temperature preparation layer 300 gradually increases along the stacking direction of the epitaxial structure.

[0041] The low-temperature preparation layer 300 is a composite structure with a stacked arrangement of gradually increasing In components, which can effectively reduce the lattice mismatch between film layers and release the stress in the epitaxial structure, thereby reducing the generation of defects in the epitaxial structure, improving the quality of the epitaxial structure, and improving the reverse voltage leakage yield of the epitaxial structure.

[0042] The low-temperature preparation layer 300 utilizes a stacked N-GaN preparation layer 311, an N-BGaN preparation layer 312, and an N-InGaN preparation layer 313. The In component gradually increases along the stacking direction of the epitaxial structure, further reducing the lattice mismatch between the film layers, further releasing the stress in the epitaxial structure, and optimizing the density and size of defects, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0043] Furthermore, the plurality of stacked preparation composite structures 310 include a plurality of first preparation composite structures, a plurality of second preparation composite structures, and a plurality of third preparation composite structures, wherein the plurality of second preparation composite structures are stacked on the plurality of first preparation composite structures, and the plurality of third preparation composite structures are stacked on the plurality of second preparation composite structures. Preferably, the number of first preparation composite structures, the second preparation composite structures, and the third preparation composite structures is 3 to 10 layers. Specifically, three layers of the first preparation composite structure can be stacked first, followed by three layers of the second preparation composite structure, and then three layers of the third preparation composite structure, to form the low-temperature preparation layer 300.

[0044] The low-temperature preparation layer 300 of the multi-layer stacked structure is beneficial to releasing stress in the epitaxial structure and can reduce the formation of defects in the epitaxial structure, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0045] Specifically, the first prepared composite structure includes a first N-GaN prepared layer, a first N-BGaN prepared layer stacked on the first N-GaN prepared layer, and a first N-InGaN prepared layer stacked on the first N-BGaN prepared layer; the second prepared composite structure includes a second N-GaN prepared layer, a second N-BGaN prepared layer stacked on the second N-GaN prepared layer, and a second N-InGaN prepared layer stacked on the second N-BGaN prepared layer; the third prepared composite structure includes a third N-GaN prepared layer, a third N-BGaN prepared layer stacked on the third N-GaN prepared layer, and a third N-InGaN prepared layer stacked on the third N-BGaN prepared layer; and in the low-temperature prepared layer 300, the In component in the N-InGaN prepared layer 313 gradually increases along the stacking direction of the epitaxial structure.

[0046] More specifically, the plurality of stacked prepared composite structures 310, i.e., the low-temperature preparation layer 300, include a plurality of first N-In(x)Ga(1-x)N preparation layers, a plurality of second N-In(y)Ga(1-y)N preparation layers, and a plurality of third N-In(z)Ga(1-z)N preparation layers, wherein the value range of x is 0.005 to 0.01, the value range of y is 0.01 to 0.05, the value range of z is 0.05 to 0.1, and x<y<z; the number of layers of the first N-In(x)Ga(1-x)N preparation layer, the second N-In(y)Ga(1-y)N preparation layer, and the third N-In(z)Ga(1-z)N preparation layer are all 3 to 10 layers.

[0047] The proportion of the B component in the N-BGaN preparation layer 312 is 0.01 to 0.1, which adopts the B component proportion of the last barrier composite structure 210 in the first barrier layer 200, thereby increasing the potential barrier of the low-temperature preparation layer 300, further reducing the speed of electron injection into the MQW multi-quantum well layer 400, and improving the recombination efficiency of electrons and holes in the MQW multi-quantum well layer 400.

[0048] The multi-layered structure can release stress in the epitaxial structure and reduce the generation of defects in the epitaxial structure; the gradual increase in the proportion of the In component can avoid the concentrated incorporation of In leading to excessive lattice mismatch, reduce the stress between the film layers, and also reduce the generation of defects in the epitaxial structure; and the insertion of an N-BGaN preparation layer 312 with a B component ratio of 0.01 to 0.1 between the N-GaN preparation layer 311 and the N-InGaN preparation layer 313 can further reduce the lattice mismatch between the N-GaN preparation layer 311 and the N-InGaN preparation layer 313, reduce the stress between the film layers, and reduce the generation of defects in the epitaxial structure, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0049] In some specific embodiments, the thickness of the N-GaN barrier layer 211 is 5 to 15 nm, and the thickness of the N-BGaN barrier layer 212 is 1 to 5 nm. The cyclically staggered stacking of the N-GaN barrier layer 211 and the N-BGaN barrier layer 212 of appropriate thickness can effectively reduce the lattice mismatch between the film layers, release the stress in the epitaxial structure, and reduce the generation of defects in the epitaxial structure. It can also enhance the barrier ability of the first barrier layer 200 against defects, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0050] In some specific embodiments, the thickness of the N-GaN preparation layer 311 is 5 to 15 nm, the thickness of the N-BGaN preparation layer 312 is 1 to 5 nm, and the thickness of the N-InGaN preparation layer 313 is 1 to 3 nm. The cyclical and staggered stacking of the N-GaN preparation layer 311, N-BGaN preparation layer 312, and N-InGaN preparation layer 313 of appropriate thickness can effectively reduce the lattice mismatch between the film layers, release stress in the epitaxial structure, and reduce the generation of defects in the epitaxial structure. Furthermore, it can also reduce the density and size of defects, especially the density and size of V-pit defects, thereby improving the quality of the epitaxial structure and increasing the reverse voltage leakage yield of the epitaxial structure.

[0051] The thickness of the N-BGaN barrier layer 212 and the N-BGaN preparation layer 312 are both 1 to 5 nm. Since the potential barrier of BGaN is relatively high, the N-BGaN barrier layer 212 and the N-BGaN preparation layer 312 cannot be too thick, otherwise it will excessively hinder the electron crossing, resulting in too few electrons injected into the MQW multi-quantum well layer 400, reducing the recombination efficiency of electrons and holes in the MQW multi-quantum well layer 400.

[0052] In some specific embodiments, the concentration of N element in the first barrier layer 200 is in the range of 10 19 ~5×10 19 atoms / cm 3 The first barrier layer 200 is doped with Si element. Reasonable control of the number of atoms of the main element N element per cubic centimeter in the first barrier layer 200, that is, controlling the content of the doping element Si element, is conducive to reducing the formation of defects; in the first barrier layer 200, increasing the content of the N element, that is, reducing the content of the doped Si element, can effectively reduce the formation of defects, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0053] In some specific embodiments, the concentration of N element in the low temperature preparation layer 300 is in the range of 10 18 ~5×10 18 atoms / cm 3 The low-temperature preparation layer 300 is also doped with Si. Reasonable control of the number of atoms of the main element N per cubic centimeter in the low-temperature preparation layer 300, that is, controlling the content of the doping element Si, is conducive to optimizing the density and size of defects. In the low-temperature preparation layer 300, increasing the content of the N element, that is, reducing the content of the doped Si element, can reduce the density and size of defects, especially the density and size of V-pit defects, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0054] The present invention also provides a method for preparing an epitaxial structure, comprising the following steps:

[0055] A patterned sapphire substrate is provided, and an N-type GaN layer 100, a first barrier layer 200, a low-temperature preparation layer 300, an MQW multi-quantum well layer 400 and a P-type GaN layer 500 are sequentially grown on the patterned sapphire substrate to form an epitaxial structure; wherein,

[0056] Growing the first barrier layer 200 includes cyclically stacking and growing an N-GaN barrier layer 211 and an N-BGaN barrier layer 212 to form a plurality of barrier composite structures 210 under a growth pressure of 150 to 300 Torr and a working speed of 700 to 1000 r / min, wherein the B component gradually decreases along the growth direction;

[0057] Growing the low-temperature preparation layer 300 includes cyclically stacking and growing an N-GaN preparation layer 311, an N-BGaN preparation layer 312, and an N-InGaN preparation layer 313 under a growth pressure of 100 to 300 Torr and a working speed of 700 to 1000 r / min to form a plurality of preparation composite structures 310, wherein the In component gradually increases along the growth direction.

[0058] The first barrier layer 200 and the low-temperature preparation layer 300 are formed by MOCVD (metal organic chemical vapor deposition). The growth pressure of the film layer and the operating speed of the MOCVD furnace during film growth will affect the quality of the film layer. Appropriate growth pressure and operating speed can improve the uniformity, stability and density of the film layer, reduce the probability of defect formation in the first barrier layer 200 and the low-temperature preparation layer 300, and enable multiple superimposed film layers to be tightly bonded, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0059] Furthermore, the growth temperature of the film layer has an important influence on the quality of the film layer. Generally speaking, a relatively high temperature must be applied to the epitaxial structure to obtain a high-quality film layer structure. Because the bond energy of GaN is large, a high growth temperature is required to enable the reactant atoms to migrate and diffuse on the growth surface. However, high temperature can easily lead to the breakage of In-N bonds in InGaN and the precipitation of In. Therefore, when growing InGaN films, relatively low temperature growth is required, and when growing BGaN and GaN films, relatively high temperature growth is required.

[0060] Specifically, the growth temperature range of the N-GaN barrier layer 211 and the N-BGaN barrier layer 212 is 880-980°C; the growth temperature range of the N-GaN preparation layer 311 and the N-BGaN preparation layer 312 is 800-900°C; and the growth temperature range of the N-InGaN preparation layer 313 is 750-850°C. A suitable growth temperature can promote the migration and diffusion of reactant atoms on the growth surface, facilitate the adsorption and lateral diffusion of the film layer, reduce thermal stress and lattice mismatch between film layers, reduce film defects, form high-quality film layers, and optimize the distribution density and size of defects, thereby improving the quality of the epitaxial structure and increasing the reverse voltage leakage yield of the epitaxial structure.

[0061] In particular, in the low-temperature preparation layer 300, the N-GaN preparation layer 311 and the N-BGaN preparation layer 312 are grown at relatively high temperature, and the N-InGaN preparation layer 313 is grown at relatively low temperature. The alternation of high and low temperatures can effectively release the stress in the epitaxial structure, and improve the migration and diffusion capabilities of the reactant atoms on the growth surface, so that the distribution density and size of defects in the epitaxial structure (especially V-pit defects) are optimized, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0062] The first barrier layer 200 in the present invention is a composite structure of a stacked arrangement with a gradually decreasing B component, and the low-temperature preparation layer 300 is a composite structure of a stacked arrangement with a gradually increasing In component, which can effectively reduce the lattice mismatch between film layers and release the stress in the epitaxial structure, thereby reducing the generation of defects in the epitaxial structure, improving the quality of the epitaxial structure, and improving the reverse voltage leakage yield of the epitaxial structure.

[0063] The first barrier layer 200 utilizes the small distance between B atoms, the smaller lattice mismatch between BGaN and GaN, and the higher potential barrier of BGaN to stack the N-GaN barrier layer 211 and the N-BGaN barrier layer 212, which can effectively block the extension and expansion of defects in the underlying film layer, prevent the defects from increasing and becoming larger, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0064] The low-temperature preparation layer 300 utilizes a stacked N-GaN preparation layer 311, an N-BGaN preparation layer 312, and an N-InGaN preparation layer 313. The In component gradually increases along the stacking direction of the epitaxial structure, further reducing the lattice mismatch between the film layers, further releasing the stress in the epitaxial structure, and optimizing the density and size of defects, thereby improving the quality of the epitaxial structure and improving the reverse voltage leakage yield of the epitaxial structure.

[0065] The present invention also reduces the generation of defects in the epitaxial structure by adjusting the thickness, growth temperature, and Si doping concentration of the first barrier layer 200 and the low-temperature preparation layer 300, and regulates the density and size of defects in the epitaxial structure, thereby improving the quality of the epitaxial structure and increasing the reverse voltage leakage yield of the epitaxial structure. Furthermore, appropriate growth pressure and operating speed can improve the uniformity, stability, and density of the first barrier layer 200 and the low-temperature preparation layer 300, reduce the probability of defect formation in the film layers, and ensure close adhesion between multiple superimposed film layers, thereby improving the quality of the epitaxial structure and increasing the reverse voltage leakage yield of the epitaxial structure.

[0066] The reverse voltage leakage yield of the epitaxial structure of the present invention is improved from the original 89% to 90% to 96% to 97%. The reverse voltage leakage yield of the epitaxial structure is reflected by testing the reverse current of the core particles of the entire wafer under reverse bias. The reverse voltage leakage yield is the proportion of the area where the reverse current is less than 0.1μA. Figure 2 ,Compared to before optimization, the proportion of the area with reverse current less than 0.1μA of the optimized ,chip is significantly improved.

[0067] The above is a detailed introduction to an epitaxial structure and a preparation method thereof provided in an embodiment of the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. An epitaxial structure comprising an N-type GaN layer, an MQW multi-quantum well layer, and a P-type GaN layer sequentially stacked on a patterned sapphire substrate, characterized in that: A first barrier layer and a low-temperature preparation layer are sequentially stacked between the N-type GaN layer and the MQW multi-quantum well layer; The first barrier layer includes a plurality of stacked barrier composite structures, any of which includes an N-GaN barrier layer and an N-BGaN barrier layer stacked in sequence, and the B component in the first barrier layer gradually decreases along the stacking direction of the epitaxial structure; The first barrier layer includes a plurality of first NB a Ga 1-a N blocking layer, several second NB b Ga 1-b N barrier layer and several third NB c Ga 1-c N barrier layer, the value range of a is 0.1 to 0.3, the value range of b is 0.05 to 0.15, the value range of c is 0.01 to 0.1, and a>b>c; The low-temperature preparation layer includes a plurality of stacked preparation composite structures, wherein any of the stacked preparation composite structures includes an N-GaN preparation layer, an N-BGaN preparation layer, and an N-InGaN preparation layer, wherein the In component in the low-temperature preparation layer gradually increases along the stacking direction of the epitaxial structure; The low temperature preparation layer includes a plurality of first N-In x Ga 1-x N preparation layer, several second N-In y Ga 1-y N preparation layer and several third N-In z Ga 1-z N preparation layer, the value range of x is 0.005-0.01, the value range of y is 0.01-0.05, the value range of z is 0.05-0.1, and x<y<z.

2. The epitaxial structure according to claim 1, wherein: The first NB a Ga 1-a N blocking layer, second NB b Ga 1-b N barrier layer and third NB c Ga 1-c The number of N barrier layers is 3 to 10.

3. The epitaxial structure according to claim 1, wherein: The first N-In x Ga 1-x N preparation layer, the second N-In y Ga 1-y N preparation layer and the third N-In z Ga 1-z The number of N preparation layers is 3 to 10.

4. The epitaxial structure according to claim 1, wherein: The ratio of the B component in the N-BGaN preparation layer is 0.01 to 0.

1.

5. The epitaxial structure according to claim 1, wherein: The thickness of the N-GaN barrier layer is 5 to 15 nm, and the thickness of the N-BGaN barrier layer is 1 to 5 nm; The thickness of the N-GaN preparation layer is 5 to 15 nm, the thickness of the N-BGaN preparation layer is 1 to 5 nm, and the thickness of the N-InGaN preparation layer is 1 to 3 nm.

6. The epitaxial structure according to claim 1, wherein: The concentration range of N element in the first barrier layer is 10 19 ~5×10 19 atoms / cm 3 The concentration range of N element in the low temperature preparation layer is 10 18 ~5×10 18 atoms / cm 3 .

7. A method for preparing the epitaxial structure according to any one of claims 1 to 6, characterized in that: The following steps are involved: A patterned sapphire substrate is provided, and an N-type GaN layer, a first barrier layer, a low-temperature preparation layer, an MQW multi-quantum well layer, and a P-type GaN layer are sequentially grown on the patterned sapphire substrate to form an epitaxial structure; wherein, Growing the first barrier layer includes cyclically stacking and growing N-GaN barrier layers and N-BGaN barrier layers to form a plurality of barrier composite structures under a growth pressure of 150 to 300 Torr and an operating speed of 700 to 1000 r / min, wherein the B component gradually decreases along the growth direction; Growing the low-temperature preparation layer includes cyclically stacking and growing N-GaN preparation layers, N-BGaN preparation layers and N-InGaN preparation layers to form several preparation composite structures under a growth pressure of 100 to 300 Torr and a working speed of 700 to 1000 r / min, with the In component gradually increasing along the growth direction.

8. The method according to claim 7, wherein The growth temperature range of the N-GaN barrier layer and the N-BGaN barrier layer is 880-980° C.; The growth temperature ranges of the N-GaN preparation layer and the N-BGaN preparation layer are both 800-900°C, and the growth temperature range of the N-InGaN preparation layer is 750-850°C.

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