Safe photovoltaic device controlled by dual-mode ASIC chip

Abstract

The application discloses a photovoltaic device based on dual working mode ASIC chip control safety. The power optimizer in the photovoltaic system has two working modes of MPPT maximum power tracking and safety. In the MPPT maximum power tracking working mode of the ASIC chip, the output voltage and current of a photovoltaic module are collected, then the output power of the photovoltaic module is calculated through an analog multiplier, and a maximum power tracking unit adjusts the duty cycle to realize the tracking of the maximum power of the photovoltaic module. Meanwhile, the ASIC chip mode control circuit realizes that when an emergency fault such as a short circuit between photovoltaic strings in the power generation system or a short circuit of the bus of the photovoltaic inverter to which the photovoltaic strings are connected occurs, all the power optimizers in the power generation system in front of the short circuit fault are switched to the safety working mode, all the photovoltaic power generation units connected to the power optimizers stop outputting voltage and power, and the system safety is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaic equipment protection, and in particular to a photovoltaic device based on dual-working mode ASIC chip control safety. Background Art

[0002] Due to the widespread distribution of photovoltaic systems, especially distributed photovoltaic systems, and their DC power supply, the system voltage is typically 1000V, sometimes even reaching 1500V. Furthermore, the probability of DC arc faults (series arcs and parallel arcs) increases due to factors such as contact loss, component aging, insulation cracking, salt damage, and poor grounding. These DC arc faults can cause photovoltaic fires, not only damaging photovoltaic system equipment but also threatening the safety of residential buildings, industrial and commercial facilities, and public infrastructure.

[0003] Many string-type PV inverter manufacturers currently have introduced PV inverters with built-in AFCI (Arc-Fault Circuit-Interrupter) functionality. PV inverters with built-in AFCI arc detection identify DC arc faults by detecting arc noise, disconnecting the DC circuit and eliminating the arc. An AFCI, or arc fault interrupter, is a protective device that detects the characteristic arc fault signal in the circuit and disconnects the power circuit before the arc fault develops into a fire or a short circuit. However, it is worth noting that the AFCI in a PV inverter can typically detect and extinguish series arcs; parallel arcs (short-circuit faults) cannot be detected or eliminated by the current AFCI function. Although component-level rapid shutdown technology can disconnect each component in a PV system, thereby eliminating DC high voltage and series and parallel arc faults (short-circuit faults) in the PV system array, the AFCI function of current PV inverters cannot detect parallel arcs (short-circuit faults). Therefore, current component-level rapid shutdown technology cannot quickly eliminate parallel arcs. The destructive power of parallel arcs is often 10 times that of series arcs, posing a greater safety hazard. Summary of the Invention

[0004] To address these technical issues, the present invention provides a safe power generation device controlled by a dual-mode ASIC chip. This ASIC chip, acting as a mode control unit, enables maximum power tracking of photovoltaic modules, increasing their power generation while cost-effectively mitigating the risk of short-circuit faults (parallel arcing) in the photovoltaic system.

[0005] To achieve this object, the present invention adopts the following technical solutions:

[0006] On the one hand, a photovoltaic device with dual-mode ASIC chip control safety is provided. The photovoltaic device is composed of a plurality of photovoltaic strings connected in series or parallel to the busbar of a photovoltaic inverter. A plurality of photovoltaic modules are connected in series or parallel to form the photovoltaic strings. Each photovoltaic module includes a power optimizer and a photovoltaic power generation unit connected to the power optimizer. The power optimizer internally includes an ASIC chip, as well as a maximum power tracking circuit, a mode control circuit, a reference operating voltage generation circuit, and a drive control circuit provided in the ASIC chip.

[0007] The chip sets a mode control terminal, and the ASIC chip determines whether the input voltage of the mode control terminal is lower than a preset mode control voltage threshold. If so, the ASIC chip controls the power optimizer to switch to a safe working mode or maintain it in a safe working mode; if not, the power optimizer is kept running in an MPPT maximum power tracking working mode;

[0008] The mode control terminal is the MODE pin of the ASIC chip.

[0009] Preferably, when a short circuit occurs between photovoltaic strings of a photovoltaic device or a short circuit occurs in a busbar connected to a photovoltaic inverter of each photovoltaic string, the power optimizer in the power generation system executes an automatic protection process, specifically, the method is as follows:

[0010] The ASIC chip in the power optimizer detects whether the input voltage of its Mode pin is lower than the preset mode control voltage threshold.

[0011] If yes, the ASIC chip controls the power optimizer to switch to a safe working mode, or maintain operation in a safe working mode;

[0012] If not, the power optimizer is restored or maintained to operate in the MPPT maximum power tracking working mode;

[0013] When the ASIC chip detects that the input voltage value of its Mode pin is lower than the preset mode control voltage threshold, it drives the first switch in the power optimizer to turn off and drives the second switch to turn on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby switching the operating state of the power optimizer to the safe working mode.

[0014] Preferably, the mode control circuit is connected to a mode control circuit outside the ASIC chip through the MODE pin of the ASIC chip. The mode control circuit is composed of a first resistor, a second resistor, a grounding capacitor, and a low-voltage protection diode, wherein the first end of the first resistor is connected to the MODE pin of the ASIC chip, the second end of the first resistor is connected to the first end of the second resistor, the first end of the grounding capacitor, and the anode of the low-voltage protection diode; the second end of the grounding capacitor is connected to the ground pin of the ASIC chip; the cathode of the low-voltage protection diode is connected to the Vo pin of the ASIC chip, and the Vo pin provides the power optimizer output voltage information to the ASIC chip; the second end of the second resistor is connected to the VDD pin of the ASIC chip, and the VDD pin provides the internal reference operating voltage of the ASIC chip.

[0015] Preferably, when the output voltage of the power optimizer is higher than the internal reference operating voltage of the ASIC chip, the low-voltage protection diode of the mode control circuit is in a cut-off state, and the voltage of the MODE pin of the ASIC chip is provided by the VDD pin of the ASIC chip, which is the internal reference operating voltage of the ASIC chip;

[0016] When the output voltage value of the power optimizer is lower than the internal reference operating voltage value of the ASIC chip, the low-voltage protection diode of the mode control circuit will be in the on state, and the output voltage value of the power optimizer is introduced into the MODE pin of the ASIC chip by the mode control circuit, and its value is the sum of the output voltage value of the power optimizer and the voltage drop of the low-voltage protection diode.

[0017] Preferably, when the input voltage value of the MODE pin of the ASIC chip is higher than a preset mode control voltage threshold, the ASIC chip operates in the MPPT maximum power tracking working mode; when the input voltage value of the MODE pin of the ASIC chip is lower than a preset mode control voltage threshold, the ASIC chip operates in a safe mode, and the preset mode control voltage threshold is lower than the internal reference operating voltage value of the ASIC chip.

[0018] Preferably, when a short circuit occurs in the photovoltaic device circuit,

[0019] The power optimizer automatically enters the safe working mode:

[0020] When the ASIC chip detects that the input voltage value of the Mode pin is lower than the preset mode control voltage threshold, the ASIC chip drives the first switch in the power optimizer to be off and the second switch to be on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby realizing switching of the running state of the power optimizer to the safe working mode.

[0021] Preferably, the method for controlling the power optimizer to enter the non-working mode is that:

[0022] When the power optimizer is switched into the safe working mode for a set duration, the ASIC chip controls the power optimizer to enter the non-working mode, and the non-working mode drives the first switch in the power optimizer to be off and the second switch to be off.

[0023] Preferably, when a short-circuit fault occurs between photovoltaic strings of a photovoltaic device or the short-circuit fault between the photovoltaic strings is removed, the power optimizer executes an MPPT maximum power tracking mode recovery process, and the specific method is that:

[0024] After the short-circuit fault is removed, the ASIC chip in the power optimizer detects whether the input voltage of the Mode pin is higher than or equal to the preset mode control voltage threshold,

[0025] If yes, the ASIC chip controls the power optimizer to recover from the non-working mode to the MPPT maximum power tracking mode;

[0026] If no, the power optimizer keeps running in the non-working mode.

[0027] Preferably, a power optimizer is provided, and a photovoltaic power generation unit connected to the power optimizer forms an independent photovoltaic assembly. The power optimizer comprises an ASIC chip, and the ASIC chip comprises a voltage and current detection unit, a multiplier and a maximum power tracking unit. The first input end I1, the second input end I2, the third input end I3 and the fourth input end I4 of the voltage and current detection unit are connected to the Switch-H pin, the Switch-L pin, the Vo pin and the AGND pin of the ASIC chip respectively. The sampling current signal output end Iout and the sampling voltage signal output end Vout of the voltage and current detection unit are connected to the first input end and the second input end of the multiplier respectively. The power output end Pout of the multiplier is connected to the power signal input end of the maximum power tracking processing unit.

[0028] The voltage and current detection unit is configured to collect the output voltage and the output current of the photovoltaic power generation unit.

[0029] The multiplier is configured to multiply the output voltage and the output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit.

[0030] The maximum power tracking unit is configured to track the maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier.

[0031] In another aspect, the application provides a safe power generation system controlled by a dual-mode ASIC chip, which is composed of a plurality of photovoltaic module strings connected in series or in parallel to a bus of a photovoltaic inverter, and a plurality of photovoltaic modules connected in series or in parallel to form the photovoltaic module string. Each photovoltaic module comprises a power optimizer and a photovoltaic power generation unit connected to the power optimizer. The power optimizer comprises an ASIC chip, which comprises a voltage and current detection unit, a multiplier and a maximum power tracking unit. The voltage and current detection unit is configured to collect the output voltage and the output current of the photovoltaic power generation unit. The multiplier is configured to multiply the output voltage and the output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit. The maximum power tracking unit is configured to track the maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier.

[0032] Preferably, the power optimizer further comprises a first switch, a second switch, an input capacitor Cin, an output capacitor Cout and an energy storage inductor L. The first switch and the second switch are MOS tubes. The gate of the first switch is connected to the HD-driver pin of the ASIC chip. The gate of the second switch is connected to the LD-driver pin of the ASIC chip. One end of the energy storage inductor L is connected to the source of the first switch, and the other end is connected to one end of the output capacitor Cout. The other end of the output capacitor Cout is connected to the source of the second switch. The input capacitor Cin is connected between the positive output end and the negative output end of the photovoltaic power generation unit.

[0033] When a short circuit occurs between the photovoltaic module strings of the power generation system or between each photovoltaic module string and the bus of the photovoltaic inverter, the power optimizer in the power generation system executes an automatic protection process, which comprises the following steps:

[0034] The ASIC chip in the power optimizer determines whether the input voltage of the Mode pin is lower than a preset mode control voltage threshold value due to the short circuit,

[0035] If yes, the ASIC chip controls the power optimizer to switch to a safe working mode.

[0036] If not, keep the power optimizer running in the MPPT maximum power tracking working mode;

[0037] The method for the power optimizer to enter the safe working mode under control is:

[0038] When the ASIC chip detects that the input voltage of its Mode pin is lower than the preset mode control voltage threshold, it drives the first switch in the power optimizer to turn off and drives the second switch to turn on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby switching the operating state of the power optimizer to the safe working mode.

[0039] Preferably, the ASIC chip includes a maximum power tracking circuit, a reference voltage generating circuit, a mode control circuit, a drive control circuit and an internal chip power supply circuit.

[0040] The maximum power tracking circuit includes a voltage and current detection unit, a multiplier and a maximum power tracking processing unit, wherein the voltage and current detection unit is used to collect the output voltage and output current of the connected photovoltaic power generation unit;

[0041] The multiplier is used to multiply the output voltage and the output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit;

[0042] The input end of the maximum power tracking processing unit is connected to the output end of the multiplier, and is used to track the maximum power point of the photovoltaic power generation unit;

[0043] The reference voltage generating circuit is used to provide a reference voltage for determining a duty cycle signal to the maximum power tracking processing unit and to provide a reference voltage for mode control to the mode control circuit using the power supply of the internal power supply circuit of the chip. When the power optimizer operates in the MPPT maximum power tracking working mode, the ASIC chip controls the on and off of the first switch and the second switch according to the duty cycle signal to achieve maximum power tracking of the connected photovoltaic power generation unit;

[0044] The signal output end of the mode control circuit is connected to the Mode pin of the ASIC chip. When the input voltage of the Mode pin of the ASIC chip is lower than the preset mode control voltage threshold, the ASIC chip controls the power optimizer to operate in the safe working mode. When the input voltage of the Mode pin of the ASIC chip reaches the reference voltage, the ASIC chip restores the power optimizer to operate in the MPPT maximum power tracking working mode.

[0045] The drive control circuit comprises a logic control unit, a first drive unit and a second drive unit, a first input end of the logic control unit is connected with the signal output end of the mode control circuit, a second input end is connected with the signal output end of the maximum power tracking unit, a first output end and a second output end are connected with the signal input ends of the first drive unit and the second drive unit respectively, and the signal output ends of the first drive unit and the second drive unit are connected with the HD-driver pin and the LD-driver pin of the ASIC chip respectively, and the drive control circuit is used for controlling the on-off of the first switch and the second switch according to a preset control logic.

[0046] The power optimizer provided by the application adopts the sampling circuit (voltage and current detection unit) of the ASIC chip to collect the output voltage and output current of the photovoltaic module, and then calculates the output power of the photovoltaic module through an analog multiplier, and the maximum power tracking unit adjusts the duty cycle to realize the MPPT maximum power tracking of the photovoltaic module, thereby avoiding the problems of the prior art, such as the complex internal device structure of the power optimizer, the high production and use cost of the power optimizer, and the like, caused by the need for analog-digital conversion and the like in the maximum power point tracking using the MCU and other digital chips. BRIEF DESCRIPTION OF DRAWINGS

[0047] In order to more clearly illustrate the technical solutions of the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments of the application. Obviously, the drawings described below are only some of the embodiments of the application, and other drawings can also be obtained according to these drawings without creative labor for those skilled in the art.

[0048] Figure 1 is a structural schematic diagram of a power generation system based on a dual-working-mode ASIC chip control safety provided by an embodiment of the application;

[0049] Figure 2 is a structural schematic diagram of a power generation system based on a dual-working-mode ASIC chip control safety when a photovoltaic module string occurs a short circuit and executes an active protection process;

[0050] Figure 3 is a structural schematic diagram of a power generation system based on a dual-working-mode ASIC chip control safety when a short circuit environment is created and an passive protection process is executed;

[0051] Figure 4 is a structural schematic diagram of an internal circuit of an ASIC chip;

[0052] Figure 5 is a structural schematic diagram of a power optimizer working in an MPPT maximum power tracking mode;

[0053] Figure 6 It is a structural diagram of the power optimization device working in a safe working mode;

[0054] Figure 7 It is a structural diagram of the power optimization device working in the non-working mode. DETAILED DESCRIPTION

[0055] The technical solution of the present invention will be further described below with reference to the accompanying drawings and through specific implementation methods.

[0056] Among them, the drawings are only used for illustrative purposes and represent only schematic diagrams rather than actual pictures, and should not be understood as limiting this patent; in order to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of the actual product; for those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted.

[0057] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if the terms "upper", "lower", "left", "right", "inside", "outside" and the like indicate an orientation or position relationship based on the orientation or position relationship shown in the drawings, it is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, the terms describing the position relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting this patent. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0058] In the description of the present invention, unless otherwise expressly specified or limited, when the term "connection" or the like appears to indicate a connection relationship between components, such term should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be internal communication between two components or an interaction between two components. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood in specific circumstances.

[0059] An embodiment of the present invention provides a photovoltaic device based on a dual-working mode ASIC chip to control safety, such as Figure 1 and Figure 2As shown, the photovoltaic device is composed of a plurality of photovoltaic strings connected in series or parallel to the busbar of the photovoltaic inverter. A plurality of photovoltaic modules are connected in series or in parallel to form the photovoltaic strings. Each photovoltaic module includes a power optimizer and a photovoltaic power generation unit connected to the power optimizer. The power optimizer internally includes an ASIC chip 10, as well as a maximum power tracking circuit, a mode control circuit, a reference operating voltage generating circuit, and a drive control circuit provided in the ASIC chip 10.

[0060] The ASIC chip 10 is provided with a mode control terminal. The ASIC chip 10 determines whether the input voltage of the mode control terminal is lower than a preset mode control voltage threshold. If so, the ASIC chip controls the power optimizer to switch to a safe working mode or maintain the safe working mode; if not, the power optimizer is kept running in the MPPT maximum power tracking working mode.

[0061] The mode control terminal is the MODE pin of the ASIC chip 10 .

[0062] When a short circuit occurs between photovoltaic strings of a photovoltaic device or a short circuit occurs in the busbars of the photovoltaic inverter to which each photovoltaic string is connected, the power optimizer in the power generation system executes an automatic protection process, specifically:

[0063] The ASIC chip 10 in the power optimizer detects whether the input voltage of its Mode pin is lower than the preset mode control voltage threshold.

[0064] If yes, the ASIC chip 10 controls the power optimizer to switch to a safe working mode, or to maintain operation in a safe working mode;

[0065] If not, the power optimizer is restored or maintained to operate in the MPPT maximum power tracking working mode;

[0066] When the ASIC chip 10 detects that the input voltage value of its Mode pin is lower than the preset mode control voltage threshold, it drives the first switch 20 in the power optimizer to be disconnected and drives the second switch 30 to be turned on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby switching the operating state of the power optimizer to the safe working mode.

[0067] The mode control circuit is connected to a mode control circuit outside the ASIC chip 10 via the MODE pin of the ASIC chip 10. The mode control circuit is composed of a first resistor, a second resistor, a grounding capacitor, and a low-voltage protection diode. The first end of the first resistor is connected to the MODE pin of the ASIC chip 10, and the second end of the first resistor is connected to the first end of the second resistor, the first end of the grounding capacitor, and the anode of the low-voltage protection diode. The second end of the grounding capacitor is connected to the ground pin of the ASIC chip 10. The cathode of the low-voltage protection diode is connected to the Vo pin of the ASIC chip 10, which provides the ASIC chip 10 with the power optimizer output voltage information. The second end of the second resistor is connected to the VDD pin of the ASIC chip 10, which provides the internal reference operating voltage of the ASIC chip 10.

[0068] When the output voltage of the power optimizer is higher than the internal reference operating voltage of the ASIC chip 10, the low-voltage protection diode of the mode control circuit will be in a cut-off state, and the voltage of the MODE pin of the ASIC chip 10 is provided by the VDD pin of the ASIC chip 10, which is the internal reference operating voltage of the ASIC chip 10;

[0069] When the output voltage value of the power optimizer is lower than the internal reference operating voltage value of the ASIC chip 10, the low-voltage protection diode of the mode control circuit will be in the on state, and the output voltage value of the power optimizer is introduced into the MODE pin of the ASIC chip 10 by the mode control circuit, and its value is the sum of the output voltage value of the power optimizer and the voltage drop of the low-voltage protection diode.

[0070] When the input voltage value of the MODE pin of the ASIC chip 10 is higher than the preset mode control voltage threshold, the ASIC chip 10 operates in the MPPT maximum power tracking working mode. When the input voltage value of the MODE pin of the ASIC chip 10 is lower than the preset mode control voltage threshold, the ASIC chip 10 operates in the safe mode. The preset mode control voltage threshold is lower than the internal reference operating voltage value of the ASIC chip 10.

[0071] When a short circuit occurs in the photovoltaic device circuit,

[0072] The power optimizer automatically enters the safe working mode:

[0073] When the ASIC chip 10 detects that the input voltage value of its Mode pin is lower than the reference voltage and reaches the preset mode control voltage threshold, it drives the first switch 20 in the power optimizer to be disconnected and drives the second switch 30 to be turned on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby switching the operating state of the power optimizer to the safe working mode.

[0074] The method for the power optimizer to be controlled to enter the non-working mode is:

[0075] When the power optimizer is switched into the safe working mode for a set duration, the ASIC chip 10 controls the power optimizer to enter the non-working mode, and the non-working mode drives the first switch 20 in the power optimizer to disconnect and drives the second switch 30 to disconnect.

[0076] When a short circuit fault occurs between photovoltaic strings of the photovoltaic device or a short circuit fault occurs on the busbar of the photovoltaic inverter connected to each photovoltaic string, the power optimizer executes the MPPT maximum power tracking working mode recovery process. The specific method is as follows:

[0077] After the short circuit fault is removed, the ASIC chip 10 in the power optimizer detects whether the input voltage of its Mode pin is higher than or equal to the preset mode control voltage threshold.

[0078] If yes, the ASIC chip controls the power optimizer to recover from the non-operating mode to the MPPT maximum power tracking operating mode;

[0079] If not, the power optimizer is kept running in the non-operating mode.

[0080] Another embodiment of the present invention provides a power generation system based on a dual-mode ASIC chip to control safety, such as Figure 1 As shown, the power generation system is composed of a plurality of photovoltaic strings 300 connected in series or in parallel to the busbar of the photovoltaic inverter 4. A plurality of photovoltaic modules are connected in series or in parallel to form the photovoltaic string 300. Each photovoltaic module includes a power optimizer 1 and a photovoltaic power generation unit 5 connected to the power optimizer. The power optimizer is internally configured as shown in FIG. Figures 5-7 As shown, the ASIC chip 10 includes the following components: Figure 4As shown, it includes a voltage and current detection unit, a multiplier and a maximum power tracking unit. The voltage and current detection unit is used to collect the output voltage and output current of the photovoltaic power generation unit. The multiplier is used to multiply the output voltage and output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit. The maximum power tracking processing unit is used to track the maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier.

[0081] In order to track the maximum power point of the photovoltaic power generation unit, Figure 4 As shown, in addition to the voltage and current detection unit, the multiplier and the maximum power tracking processing unit, the ASIC chip 10 also includes a reference voltage generation circuit, a mode control circuit, a drive control circuit, a communication interface circuit and an internal power supply circuit of the chip.

[0082] The reference voltage generation circuit is used to use the power supply of the internal power supply circuit of the chip to provide a reference voltage for determining the duty cycle signal to the maximum power tracking processing unit and to provide a reference voltage for mode control to the mode control circuit. When the power optimizer operates in the MPPT maximum power point tracking working mode, the ASIC chip 10 controls the on and off of the first switch 20 and the second switch 30 according to the duty cycle signal to achieve maximum power point tracking of the connected photovoltaic power generation unit;

[0083] The signal output end of the mode control circuit is connected to the Mode pin of the ASIC chip. When the input voltage of the Mode pin of the ASIC chip 10 is lower than the preset mode control voltage threshold, the ASIC chip 10 controls the power optimizer to operate in the safe working mode. When the input voltage of the Mode pin of the ASIC chip 10 reaches the preset mode control voltage threshold, the ASIC chip 10 restores the power optimizer to operate in the MPPT maximum power point tracking working mode.

[0084] The drive control circuit includes a logic control unit, a first drive unit, and a second drive unit. The first input terminal of the logic control unit is connected to the signal output terminal of the mode control circuit, the second input terminal is connected to the signal output terminal of the maximum power tracking unit, the first output terminal and the second output terminal are respectively connected to the signal input terminals of the first drive unit and the second drive unit, and the signal output terminals of the first drive unit and the second drive unit are respectively connected to the HD-driver pin and the LD-driver pin of the ASIC chip 10. The drive control circuit is used to control the on and off of the first switch 20 and the second switch 30 according to a preset control logic.

[0085] The communication interface circuit is used to provide a communication interface for external devices to connect to the ASIC chip 10 .

[0086] In summary, the present invention uses the sampling circuit (voltage and current detection unit) of the ASIC chip to collect the output voltage and output current of the photovoltaic module, and then calculates the output power of the photovoltaic module through an analog multiplier. The maximum power tracking unit adjusts the duty cycle to achieve MPPT maximum power tracking of the photovoltaic module, avoiding the problems of the existing solution using digital chips such as MCU for maximum power point tracking, such as the need for analog-to-digital conversion, which results in a complex internal device structure of the power optimizer and high production and use costs of the power optimizer.

[0087] In view of the principle of using ASIC chips to perform MPPT maximum power point tracking on photovoltaic modules provided above, the present invention also provides a power generation system based on dual-mode ASIC chip control security, including a power optimizer to perform MPPT maximum power point tracking on connected photovoltaic power generation units. The process specifically includes the following steps:

[0088] S1, the voltage and current detection unit in the ASIC chip 10 inside the power optimizer collects the output voltage and output current of the photovoltaic power generation unit;

[0089] S2, the multiplier in the ASIC chip multiplies the output voltage and output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit;

[0090] S3, the maximum power tracking unit in the ASIC chip is used to track the maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier.

[0091] When a short circuit such as a parallel arc occurs between photovoltaic strings, in order to actively realize a rapid shutdown of the photovoltaic module level, preferably, the power optimizer provided in this embodiment also includes Figures 5-7 The peripheral circuit of the ASIC chip 10 shown in the figure includes a first switch 20, a second switch 30, an input capacitor Cin, an output capacitor Cout, and an energy storage inductor L. The first switch 20 and the second switch 30 are MOS transistors. The gate of the first switch 20 is connected to the HD-driver pin of the ASIC chip; the gate of the second switch 30 is connected to the LD-driver pin of the ASIC chip; one end of the energy storage inductor L is connected to the source of the first switch 20, and the other end is connected to one end of the output capacitor Cout. The other end of the output capacitor Cout is connected to the source of the second switch 30; the input capacitor Cin is connected in parallel between the positive output terminal and the negative output terminal of the photovoltaic power generation unit;

[0092] When a short circuit occurs between PV strings in a power generation system or a short circuit occurs on the busbars connecting PV strings to the PV inverter, the power optimizer in the power generation system executes an active protection process. The specific method is as follows:

[0093] The ASIC chip 10 in the power optimizer determines whether the input voltage of its Mode pin is lower than the preset mode control voltage threshold due to a short circuit.

[0094] If yes, then the ASIC chip 10 controls the power optimizer to switch to Figure 6 In the safe working mode shown;

[0095] If not, keep the power optimizer running at Figure 5 The MPPT maximum power tracking working mode shown;

[0096] The method for the power optimizer to enter the safe working mode under control is:

[0097] When the ASIC chip 10 detects that the input voltage of its Mode pin is lower than the preset mode control voltage threshold, it drives the first switch 20 in the power optimizer to disconnect and drives the second switch 30 to turn on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby switching the operating state of the power optimizer to a safe working mode.

[0098] The following example illustrates how the ASIC chip actively controls the power optimizer to switch to a safe operating mode when a short circuit, such as a parallel arc, occurs between PV strings:

[0099] Assumptions Figure 2 The outgoing line of the photovoltaic string 300 shown in FIG is short-circuited due to a parallel arc. The parallel arc voltage at the short-circuit fault point is about 0V-40V. At this time, the output voltage of the power optimizer before the short-circuit fault point is reduced to about 0-1.05V. Figures 5-6 The diode VD in the peripheral circuit of the power optimizer shown in FIG is turned on, and the voltage of the Mode pin of the ASIC chip 10 is pulled down to 0.5-1.55V, which is lower than the preset safety voltage threshold of 2.5V for the Mode pin. Based on this condition, the ASIC chip 10 switches the power optimizer to a safe operating mode. The switching method is as follows: the internal drive control circuit drives the first switch 20 of the power optimizer to be turned off and the second switch 30 to be turned on. The photovoltaic power generation unit connected to the power optimizer stops outputting photovoltaic power (i.e., switches to a safe operating mode). This can effectively avoid the arcing fire hazard that may be caused by a short circuit fault in the photovoltaic string. The above-mentioned process of switching to the safe operating mode does not require additional triggering actions. The parallel arc fault in the power generation system does not require expensive arc signal detection equipment to detect. Instead, the ASIC chip can promptly detect the short circuit fault based on the fluctuation characteristics of the output voltage and output current of the photovoltaic module. After the short circuit fault is detected, it can quickly shut down the corresponding photovoltaic string, ensuring the safe operation of the power generation system.

[0100] In order to ensure that other photovoltaic strings that have not experienced short-circuit faults can continue to generate electricity normally, preferably, each photovoltaic string connected to the busbar of the photovoltaic inverter is connected by a Figure 1 The anti-reverse diode 400 shown in FIG is isolated.

[0101] In view of the principle of the power optimizer in the power generation system provided above actively performing component-level rapid shutdown, the present invention correspondingly provides a power generation system based on a dual-working mode ASIC chip. When a short circuit occurs between photovoltaic strings in the power generation system or a short circuit occurs in the busbars connected to the photovoltaic inverter of each photovoltaic string, the power optimizer in the power generation system executes an active protection process. The specific method is as follows:

[0102] The ASIC chip 10 in the power optimizer determines whether the input voltage of its Mode pin is lower than the preset mode control voltage threshold due to a short circuit.

[0103] If yes, the ASIC chip 10 controls the power optimizer to switch to a safe working mode;

[0104] If not, keep the power optimizer running in MPPT maximum power tracking mode;

[0105] The method for the power optimizer to enter the safe working mode under control is:

[0106] When the ASIC chip 10 detects that the input voltage of its Mode pin is lower than the preset mode control voltage threshold, it drives the first switch 20 in the power optimizer to disconnect and drives the second switch 30 to turn on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby switching the operating state of the power optimizer to a safe working mode.

[0107] When a fire occurs in a building where a power generation system is installed and the power generation system needs to be shut down urgently, in order to passively realize rapid shutdown of the photovoltaic module level, preferably, the power generation system also includes the following Figures 1-3 The third switch s3 and the auxiliary power supply 3 shown in FIG are connected between the positive input terminal and the negative input terminal of the DC terminal of the photovoltaic inverter 4, the electrical input terminal of the auxiliary power supply 3 is connected to the AC terminal of the photovoltaic inverter, and the electrical output terminal of the auxiliary power supply 3 is connected to the third switch s3 to supply power to the third switch s3. When an emergency fault occurs in the power generation system, the short-circuit environment required for the power optimizer in the power generation system to execute the passive protection process is created, so that the power optimizer executes the passive protection process. The specific method is as follows:

[0108] When the grid-connected switch of the AC inverter grid-connected point or the household switch between the residence and the grid is manually cut off, the normally closed third switch s3, which draws power from the AC end of the photovoltaic inverter through the auxiliary power supply, is closed due to the loss of auxiliary power supply, and the photovoltaic strings in the power generation system are short-circuited. When the input voltage of the Mode pin of the ASIC chip in each power optimizer is lower than the reference voltage and reaches the preset mode control voltage threshold, the ASIC chip controls the corresponding power optimizer to switch from the MPPT maximum power tracking working mode to the Figure 6 Safe operating mode shown or Figure 7 Non-operating mode shown;

[0109] When the fault is eliminated and the grid-connected switch or the household switch is closed, the normally closed third switch s3, which draws power from the AC end of the photovoltaic inverter through the auxiliary power supply, is opened due to the restoration of the auxiliary power supply, and the short-circuit environment is eliminated. When the ASIC chip 10 determines that the input voltage of its Mode pin has returned to the reference voltage, it controls the corresponding power optimizer to return to the Figure 5 The MPPT maximum power tracking working mode is shown.

[0110] The method by which the ASIC chip 10 controls the power optimizer to switch to the safe working mode has been described in the above-mentioned active safety protection process and will not be repeated here. Figure 7 In the non-operating mode shown, the drive control circuit controls the first switch 20 and the third switch 30 to be turned off together, and the photovoltaic string stops sending photovoltaic power.

[0111] The following is an example of how the ASIC chip 10 passively controls the power optimizer to switch to a safe working mode after an emergency shutdown of the power generation system:

[0112] Assuming that an emergency such as a building fire occurs and the output voltage of the PV string needs to be reduced to a safe voltage, the short-circuit environment required for the ASIC chip to execute the passive protection process is first created (the creation method has been specifically described in the above content and will not be repeated here). In the short-circuit environment, the output voltage of the power optimizer is close to 0V. At this time, Figures 5-6The diode VD in the peripheral circuit of the power optimizer shown in the figure is turned on, and the voltage of the Mode pin potential of the ASIC chip drops to close to 0V, which is lower than the preset safety voltage threshold of the Mode pin (i.e., the preset mode control voltage threshold). Based on this condition, the ASIC chip switches the power optimizer to a safe working mode. The switching method is: controlling the internal drive control circuit to drive the first switch 20 of the power optimizer to be disconnected and drive the second switch 30 to be turned on, so that the photovoltaic power generation unit connected to the power optimizer stops outputting photovoltaic power (i.e., switches to a safe working mode). The above passive safety protection process can achieve rapid shutdown at the component level in the event of an emergency such as a building fire, reducing the output voltage of all photovoltaic strings to 0V, avoiding the high requirement of continuous and reliable heartbeat signal acquisition for conventional use of watchdogs for rapid shutdown, and eliminating the need to continuously send heartbeat communication signals through a power carrier communication (PLC) circuit (in existing solutions, the US patent number US8933321B2 applied for by TigoEnergy discloses a system and method for disconnecting solar panels based on watchdog technology, which includes: a watchdog unit of a local controller coupled between a solar module and a power bus, the power bus being configured to connect multiple solar modules to an inverter. The watchdog unit has: a local controller configured to monitor signals from Communication with a central controller away from the solar module, and determining whether the communication has been interrupted for a time period exceeding a predetermined allowed number of jumps; and at least one switch configured to disconnect the solar module from the power bus in response to a determination by the position controller that the communication from the central controller has been interrupted for a time period exceeding a predetermined allowed number of jumps; wherein the watchdog unit is configured to connect the solar module to the power bus when the communication is not interrupted. However, this solution is based on watchdog technology and places high demands on the reliability of communication. Power carrier communication (PLC) with high reliability is usually used as the communication method. However, power carrier communication also has the problem of transmission attenuation, which limits the number and string length of photovoltaic strings that can be acted on by each set of fast shutdown devices, and requires the configuration of a local receiving unit for remote PLC transmission).

[0113] In view of the principle of passively executing component-level rapid shutdown by the power optimizer in the power generation system provided above, the present invention correspondingly provides a power generation system based on dual-working mode ASIC chip control safety. When an emergency failure occurs in the power generation system, the short-circuit environment required for the power optimizer in the power generation system to execute the passive protection process is created, so that the power optimizer executes the passive protection process. Specifically, the steps include:

[0114] L1: The grid-connected switch on the grid-connected side of the PV inverter connected to the PV strings or the household switch connecting the house to the grid is manually disconnected. The normally closed third switch s3, which draws power from the AC terminal of the PV inverter via the auxiliary power supply, is closed due to the loss of auxiliary power. The third switch s3 is connected between the positive and negative input terminals on the DC side of the PV inverter. After the third switch s3 is closed, the PV strings connected to the DC bus of the PV inverter are short-circuited.

[0115] L2, the ASIC chip 10 in the power optimizer determines whether the input voltage of its Mode pin is lower than the preset mode control voltage threshold due to a short circuit.

[0116] If so, the ASIC chip controls the power optimizer to switch to a safe working mode or a non-working mode;

[0117] If not, the power optimizer is kept running in the MPPT maximum power point tracking mode.

[0118] When the short-circuit condition is removed, the power optimizer executes the MPPT maximum power tracking mode recovery process. The specific method is as follows:

[0119] After the short-circuit environment is released, the ASIC chip in the power optimizer determines whether the input voltage of its Mode pin is lower than the preset mode control voltage threshold.

[0120] If so, the ASIC chip controls the power optimizer to recover from the safe working mode or non-working mode to the MPPT maximum power tracking working mode;

[0121] If not, keep the power optimizer running in the safe working mode or non-working mode;

[0122] The method to restore the power optimizer to MPPT maximum power tracking mode is as follows:

[0123] When the ASIC chip detects that the input voltage of its Mode pin is lower than the preset mode control voltage threshold, it drives Figure 5 The first switch 20 in the power optimizer shown in the figure is closed and drives the second switch 30 to be opened, so as to control the photovoltaic power generation unit connected to the power optimizer to resume outputting photovoltaic power, thereby restoring the operating state of the power optimizer to the MPPT maximum power tracking working mode.

[0124] The method to release the short-circuit environment created is:

[0125] After closing the grid-connected switch at the AC inverter's grid-connected point or the switch connecting the residence to the grid, the normally closed third switch s3, which draws power from the AC end of the photovoltaic inverter via the auxiliary power supply, is opened due to the restoration of the auxiliary power supply. The third switch s3 is connected between the positive input terminal and the negative input terminal of the DC side of the photovoltaic inverter. After the third switch s3 is opened, the short-circuit condition is released.

[0126] It should be noted that the above-described specific embodiments are merely preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will appreciate that various modifications, equivalent substitutions, and variations may be made to the present invention. However, as long as these modifications do not depart from the spirit of the present invention, they are intended to be within the scope of protection of the present invention. Furthermore, certain terms used in the specification and claims of this application are not intended to be limiting and are provided solely for ease of description.

Claims

1. A photovoltaic device with dual-mode ASIC chip control safety, characterized in that: The photovoltaic device is composed of a plurality of photovoltaic strings connected in series or in parallel on the busbar of the photovoltaic inverter, a plurality of photovoltaic modules connected in series or in parallel to form the photovoltaic strings, each photovoltaic module includes a power optimizer and a photovoltaic power generation unit connected to the power optimizer, the power optimizer internally includes an ASIC chip (10), and a maximum power tracking circuit, a mode control circuit, a reference operating voltage generating circuit, and a drive control circuit arranged in the ASIC chip (10); The ASIC chip (10) is provided with a mode control terminal, and the ASIC chip (10) determines whether an input voltage of the mode control terminal is lower than a preset mode control voltage threshold value. If so, the ASIC chip (10) controls the power optimizer to switch to a safe working mode or maintain the safe working mode; if not, the power optimizer is kept running in an MPPT maximum power tracking working mode; The mode control terminal is a MODE pin of the ASIC chip (10); The mode control circuit is connected to a mode control circuit (40) outside the ASIC chip (10) via the MODE pin of the ASIC chip (10); When the output voltage value of the power optimizer is higher than the internal reference operating voltage value of the ASIC chip (10), the low voltage protection diode of the mode control circuit will be in a cut-off state, and the voltage of the MODE pin of the ASIC chip (10) is provided by the VDD pin of the ASIC chip (10), and its value is the internal reference operating voltage value of the ASIC chip (10); When the output voltage value of the power optimizer is lower than the internal reference operating voltage value of the ASIC chip (10), the low voltage protection diode of the mode control circuit will be in a conducting state, and the output voltage value of the power optimizer is introduced into the MODE pin of the ASIC chip (10) by the mode control circuit, and its value is the sum of the output voltage value of the power optimizer and the voltage drop of the low voltage protection diode; The power generation system equipped with the power optimizer includes a third switch (s3) and an auxiliary power supply (3), wherein the third switch (s3) is connected between the positive input terminal and the negative input terminal of the DC terminal of the photovoltaic inverter (4), the electrical input terminal of the auxiliary power supply (3) is connected to the AC terminal of the photovoltaic inverter, and the electrical output terminal of the auxiliary power supply (3) is connected to the third switch (s3) to supply power to the third switch (s3). When an emergency fault occurs in the power generation system, a short-circuit environment required for the power optimizer in the power generation system to execute a passive protection process is created, so that the power optimizer executes the passive protection process. The specific method is as follows: The grid-connected switch of the AC inverter grid-connected point or the household switch between the residence and the grid is manually cut off, and the normally closed third switch (s3) that draws power from the AC end of the photovoltaic inverter through the auxiliary power supply (3) is closed due to the loss of power from the auxiliary power supply, and the photovoltaic strings in the power generation system are short-circuited. When the input voltage of the Mode pin of the ASIC chip (10) in each power optimizer is lower than the reference voltage and reaches the preset mode control voltage threshold, the ASIC chip (10) controls the corresponding power optimizer to switch from the MPPT maximum power tracking working mode to the safe working mode or non-working mode; When the fault is eliminated and the grid-connected switch or the household switch is closed, the normally closed third switch (s3) that draws power from the AC end of the photovoltaic inverter through the auxiliary power supply (3) is disconnected due to the restoration of the auxiliary power supply, and the short-circuit environment is released. When the ASIC chip (10) determines that the input voltage of its Mode pin has returned to the reference voltage, it controls the corresponding power optimizer to return to the MPPT maximum power tracking working mode.

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