A method and system for multi-field co-design of a TSV array

Abstract

The application relates to the field of three-dimensional integrated circuits, and specifically provides a multi-field synergistic design method and system for a TSV array. The method comprises the following steps: S1, obtaining parameters of the TSV array; S2, constructing a neural network model and training the neural network model; S3, constructing a design criterion; and S4, optimizing the design parameters by using an optimization algorithm. Step S1 comprises the following steps: S11, obtaining design parameters of the TSV array, wherein the design parameters comprise a through-silicon via radius, a through-silicon via pitch, an offset angle and an oxide layer thickness; and S12, obtaining performance parameters of the TSV array, wherein the performance parameters comprise electrical performance, temperature, stress and area. The application further provides a multi-field synergistic design system for a TSV array, which comprises an obtaining module, a first calculation module, a second calculation module and a third calculation module. The design method and system have the advantages of short design time, strong synergistic effect between multi-field performance and regions and high comprehensive performance of the TSV array.

Description

Technical Field

[0001] This application relates to the field of three-dimensional integrated circuits, and more specifically, to a multi-field collaborative design method and system for TSV arrays. Background Technology

[0002] As system-on-a-chip (SoC) scales up, power density increases, especially in 3D integrated circuits where thermal issues and electrothermal coupling effects become increasingly significant. 3D integration technology effectively reduces the horizontal PCB area occupied by microsystems, while also reducing interconnect lengths and signal delay, resulting in systems with advantages such as small size, high performance, and low power consumption. Through-silicon vias (TSVs) are a critical component in 3D integrated circuits, and their performance determines the overall performance of the 3D integrated circuit. The design parameters of the TSV array have a significant impact on its signal transmission characteristics, heat conduction, noise coupling, stress, and area. Therefore, researching collaborative optimization design strategies for TSV arrays is of great importance for improving the overall performance of 3D integrated circuits.

[0003] The article titled "Multi-physics Coupling Analysis and Structural Optimization of TSV Microsystems" discloses a method for optimizing the performance of TSV arrays based on the finite element method. Specifically, the method involves solving the individual physics fields of the TSV array separately, and then iteratively solving the multiple physics fields by combining coupling factors. It also requires joint simulation with multiple software programs and multiple iterations of the single-field performance results of multiple software programs. This results in long design time, low design efficiency, and poor overall performance of the TSV array.

[0004] Complex trade-offs exist among various performance metrics of TSV arrays. Existing solutions primarily focus on establishing accurate models to characterize the electrothermal properties of TSVs, heavily relying on statistical methods and expert experience for performance trade-offs, resulting in poor accuracy and reliability. For example, the design method disclosed in the paper titled "Crosstalk evaluation, suppression and modeling in 3D through-strata-via (TSV) network" proposes an effective layout to reduce crosstalk noise between TSVs. However, the TSV array layout is based on empirical placement, which, while reducing the electrothermal coupling effect between TSVs to some extent, does not achieve a good balance between area and the TSV electrothermal coupling effect. This leads to poor multi-field performance and poor inter-regional synergy, resulting in poor overall performance of the TSV array.

[0005] In summary, existing design methods result in poor overall performance of TSV arrays due to long design time, poor multi-field performance, and poor inter-regional synergy. Summary of the Invention

[0006] The purpose of this invention is to address the shortcomings of the prior art by providing a multi-field collaborative design method and system for TSV arrays, thereby solving the problem that the overall performance of TSV arrays is poor due to long design time, poor multi-field performance, and poor inter-regional synergy in the prior art.

[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0008] This application provides a multi-field collaborative design method for TSV arrays, which includes the following steps: S1, obtaining the parameters of the TSV array; S2, constructing a neural network model and training the neural network model; S3, constructing design criteria; S4, optimizing the design parameters using an optimization algorithm. Step S1 includes the following steps: S11, obtaining the design parameters of the TSV array, including the radius of the through-silicon via (TSV), the spacing between TSVs, the offset angle, and the oxide layer thickness; S12, obtaining the performance parameters of the TSV array, including electrical performance, temperature, stress, and area.

[0009] Furthermore, the neural network model in step S2 is an ANN neural network model, which includes an input layer, a hidden layer, and an output layer.

[0010] Furthermore, the ANN neural network model in step S2 is represented by the following equation:

[0011]

[0012] Where U is the input of the ANN neural network model, W1 and W2 represent the weight matrices of the input hidden layer and the output hidden layer, respectively, and b1 and b2 represent the bias values ​​of the input hidden layer and the output hidden layer, respectively. Electrical / Thermal / Stress / area represent the input and output of the output layer, respectively; g is the activation function, e represents the natural logarithm, and x represents the independent variable.

[0013] Furthermore, step S2 establishes a mapping relationship between the design parameters and performance parameters of the TSV array during the training process of the ANN neural network model.

[0014] Furthermore, step S3 establishes design criteria for the TSV array based on the mapping relationship and constraints.

[0015] Furthermore, the optimization algorithm in step S4 is one of the following: PSO-LDIW algorithm, genetic algorithm, simulated annealing algorithm, and tabu algorithm.

[0016] Furthermore, in step S4, the optimized design parameters are obtained using the PSO-LDIW algorithm based on the trained ANN neural network model and design criteria.

[0017] Furthermore, step S4 includes the following steps:

[0018] S41, Initialize the parameters of the PSO-LDIW algorithm;

[0019] S42, Based on the expected performance parameters of the TSV array, the design parameters of the TSV array are predicted using the constructed ANN neural network model;

[0020] S43, Based on the design criteria of the constructed TSV array, the design parameters of the TSV array are optimized using the PSO-LDIW algorithm;

[0021] S44. Determine whether the optimal TSV array design parameters have been obtained. If yes, complete the multi-field collaborative optimization design of the TSV array. Otherwise, return to step S42 until the optimal TSV array design parameters are obtained.

[0022] This application also provides a multi-field collaborative design system for TSV arrays, which includes an acquisition module, a first calculation module, a second calculation module, and a third calculation module.

[0023] Furthermore, the acquisition module is used to acquire the design parameters of the TSV array and the performance parameters calculated based on finite element simulation; the first calculation module is used to construct a neural network model and train the neural network model to obtain the mapping relationship between the design parameters and the performance parameters; the second calculation module is used to establish a multi-field collaborative optimization design criterion for the TSV array based on the mapping relationship between the design parameters and the performance parameters, and to add constraints to the design parameters and performance parameters; the third calculation module is used to calculate the optimal design parameters of the TSV array using the PSO-LDIW algorithm based on the trained neural network model and the multi-field collaborative optimization design criterion for the TSV array.

[0024] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0025] This application's design method utilizes data obtained from multi-physics co-simulation to train a backpropagation neural network model, then uses the neural network model to obtain mapping relationships. These mapping relationships, along with constraints, yield design criteria, and finally, an optimization algorithm obtains the optimal design parameters. The method considers the electrical, thermal, mechanical, and area costs of the TSV array, effectively and comprehensively improving the electrical transport characteristics within a finite region, reducing the system's peak temperature and peak stress. Temperature and stress are key performance indicators with significant weight in the evaluation; therefore, reducing peak temperature and peak stress improves the overall performance of the TSV array. Simultaneously, the trained neural network model enables the proposed TSV array multi-field collaborative design method to efficiently and accurately calculate the TSV array's design parameters according to different performance requirements, and evaluate the overall performance of the TSV array through a collaborative optimization design strategy. The established multi-field collaborative design criteria overcome software barriers, and the collaborative optimization design strategy for evaluating the overall performance of the TSV array shortens the design time and improves the efficiency of multi-domain collaborative design of TSV arrays. Therefore, this application's design method and system design offer short design time, strong multi-field performance and inter-regional synergy, and high overall performance of the TSV array. Attached Figure Description

[0026] Figure 1 A schematic diagram illustrating a multi-field collaborative design method for TSV arrays provided by the present invention;

[0027] Figure 2 A schematic diagram of a multi-field collaborative design method for TSV arrays and an ANN neural network model in the system provided by the present invention;

[0028] Figure 3 This is the pseudocode for the intelligent multi-field collaborative design method for TSV arrays in this application;

[0029] Figure 4 A schematic diagram of an electronic device with a multi-field cooperative design of a TSV array provided in this application.

[0030] Icons: 11-Memory; 12-Processor; 13-Network module. Detailed Implementation

[0031] To make the implementation process of this invention clearer, a detailed description will be provided below in conjunction with the accompanying drawings.

[0032] This invention provides a multi-field cooperative design method for TSV arrays, which includes the following steps:

[0033] S1, obtain the parameters of the TSV array;

[0034] This includes obtaining the design and performance parameters of the TSV array.

[0035] S11, Obtain the design parameters of the TSV array;

[0036] The Latin Hypercube Sampling (LHS) design method was employed to obtain the design parameter combinations for the TSV array. Multi-field coupling design parameters for the TSV array were obtained, specifically including via radius, via spacing, offset angle, and oxide thickness. The range of these parameters is shown in Table 1. The LHS method offers efficient sampling capabilities, achieving relatively high computational accuracy with fewer samples, and avoids re-sampling of existing points, ensuring global representativeness. Different TSV array design parameters result in varying TSV performance parameters in the 3D integrated circuit. Specifically, the via radius, via spacing, offset angle, and oxide thickness of the TSV array affect its electrical performance, temperature, stress, and area. The influence between these four design parameters and the four performance parameters is complex and intertwined; each performance parameter is influenced by the combined effects of all four design parameters. Changes in the via radius, via spacing, offset angle, and oxide thickness of the TSV array can cause complex variations in its performance parameters. The higher the accuracy of the obtained parameters such as silicon via radius, silicon via spacing, offset angle, and oxide layer thickness, the higher the prediction accuracy of the neural network model that obtains the correspondence between the TSV array performance parameters and the design parameters.

[0037] S12, obtain the performance parameters of the TSV array;

[0038] The performance parameters of the TSV array are calculated using the design parameters obtained in step S11. This embodiment utilizes the EM electromagnetic simulation software ANSYS HFSS and the multiphysics coupling simulation software COMSOL to obtain the performance parameters of the TSV array through multi-field coupling joint simulation. The specific simulation process involves finite element simulation calculations, which can be referred to in the literature entitled "Modeling of Crosstalkin Through Silicon Vias". Through the above finite element simulation experiments, a database of TSV array design parameters and performance parameters is obtained. This application considers the electrical, thermal, mechanical properties, and area cost of the TSV array, effectively and comprehensively improving the electrical transport characteristics within a finite region, reducing the peak temperature and peak stress of the system, exhibiting strong multi-field performance and inter-regional synergy, and improving the overall performance of the TSV array. For example, the expression for electrothermal coupling is: ,in, The resistivity is at temperature T. Let be the resistivity at temperature T0 (300K), and α be the temperature coefficient, typically 0.004; the expression for thermo-coupling is: Where S is stress, T is the coefficient of thermal expansion, and T is the temperature of the TSV array. ref The temperature is set to room temperature. In other words, this application designs multiple physical fields simultaneously, including electric, thermal, and force fields. These fields are coupled and influence each other. Therefore, compared to iterative designs using a single physical field, the design method and system in this application exhibit stronger synergy, higher design efficiency, and higher accuracy, thus improving the overall performance of the TSV array. Some design parameters of the TSV array are shown in Table 1.

[0039] Table 1:

[0040]

[0041] S2, Construct a neural network model and train the neural network model;

[0042] Construct a neural network model. Train the neural network model using the design parameters and performance parameters from step S1. The trained neural network model is used to replace the simulation calculation process in step S12. Input the design parameters and output the performance parameters. At the same time, obtain the mapping relationship between the TSV array design parameters and performance parameters.

[0043] S21, Construct a neural network model;

[0044] This application uses a backpropagation neural network model to describe the mapping relationship between TSV array design parameters and performance parameters. Specifically, the neural network model can be a backpropagation neural network model based on a genetic algorithm (ANN neural network model), a recurrent neural network, or a convolutional neural network, etc. This embodiment uses an ANN neural network model, such as... Figure 2 As shown, the ANN neural network model consists of an input layer, hidden layers, and an output layer. The input layer takes parameters including oxide thickness, via radius, via spacing, and offset angle. There are nine hidden layers. The output layer outputs electrical properties, thermal properties, stress, and area. The weight matrices and bias terms from the hidden layers to the output layer in this ANN neural network model are known quantities and are not specifically limited here. Specifically, the input is the design parameters, and the output is the performance parameters coupled through multiple fields. The inherent coupling relationship is represented by the ANN neural network model, which can be expressed by the following equation:

[0045]

[0046] Where U is the input of the neural network, W1 and W2 represent the weight matrices of the input hidden layer and the output hidden layer, respectively, and b1 and b2 represent the bias values ​​of the input hidden layer and the output hidden layer, respectively. Electrical / Thermal / Stress / area represent the input and output of the output layer, respectively. g is the activation function, represented by equation (3), where e represents the natural logarithm and x represents the independent variable:

[0047]

[0048] S22, Training the neural network model;

[0049] Using the design parameters obtained in step S11 and the corresponding performance parameters obtained in step S12, the neural network model constructed in step S21 is trained using the database obtained in step S12. During the training process, a mapping relationship between the TSV array design parameters and performance parameters is established, forming a mapping relationship database. This database is the same as the database of TSV array design parameters and performance parameters obtained in step S12 through the aforementioned finite element simulation experiment. The data in the database all represent the correspondence between the TSV array design parameters and performance parameters.

[0050] The mean absolute relative error (AARE) of the performance parameters obtained through training reaches 10E. -4 Or 10E -6 This indicates that the ANN neural network model has been trained and can replace finite element simulation calculations. The trained ANN neural network model replaces the simulation calculations in step S12. Design parameters are input to the ANN neural network model, and the model outputs performance parameters. The trained neural network model enables the proposed TSV array multi-field collaborative design method to efficiently and accurately calculate the design parameters of the TSV array according to different performance requirements, and to evaluate the overall performance of the TSV array through a collaborative optimization design strategy.

[0051] S3, establishing design principles;

[0052] Based on the mapping relationship between the design parameters and performance parameters of the TSV array established by the ANN neural network model, a multi-field collaborative optimization design criterion for the TSV array is established, and constraints on the design parameters and performance parameters are added. The specific constraints are related to the design purpose.

[0053] Specifically, the objective function of the multi-field collaborative optimization design criterion for the TSV array is determined by equation (4). To avoid the influence of different orders of magnitude of performance parameters, the electrical signal transmission performance, heat dissipation performance, stress performance, and array area are normalized respectively. In this embodiment, linear normalization is used for normalization, for example, This is a normalized expression for the electrical performance. It contains six parts. The first four terms are the weighted sum of the electrical signal transmission performance (electrical performance), heat dissipation performance (temperature), mechanical performance (stress), and the area occupied by the TSV array (area). Specifically, the first four terms are obtained based on the mapping relationship in the database. The last two terms represent the shape constraint and the performance constraint. The shape constraint is represented by formulas (5), (6), and (7), and the performance constraint is represented by formulas (8), (9), and (10). The penalty factor of the penalty term is at least two orders of magnitude higher than that of other terms. This allows for the rapid elimination of design parameters that do not meet the constraints through a higher penalty factor, thereby improving the design speed and shortening the design time. Therefore, the design method of this application has a faster design speed and higher design efficiency.

[0054]

[0055] in, i , , , These are the weights for electrical signal transmission performance E, heat dissipation performance T, stress performance St, and array area, respectively. and These are the penalty factors for shape constraints and performance constraints, respectively. Indicates the expected performance parameters, This represents the maximum value of the corresponding parameter. S11_77 represents the minimum value of the corresponding parameter; S21_77 represents the return loss of TSV7; S11_107 represents the near-end crosstalk between TSV10 and TSV7; S21_107 represents the far-end crosstalk between TSV10 and TSV7; S11_712 represents the near-end crosstalk between TSV7 and TSV12; S12_712 represents the far-end crosstalk between TSV7 and TSV12; S1 1_510 represents the near-end crosstalk between TSV5 and TSV10; S12_510 represents the far-end crosstalk between TSV5 and TSV10; S11_1010 represents the return loss of TSV10; S21_1010 represents the insertion loss of TSV10; TSV5, TSV7, TSV10, and TSV12 represent different through-silicon vias (TSVs), R represents the radius of the TSV, P represents the spacing between TSVs, O represents the offset angle of the TSV, and t... ox This represents the thickness of the oxide layer. The result is optimal when the value of formula (4) approaches 0.

[0056]

[0057] Where w is the standard weight; p i and p gThis is the previous optimal position for the i-th particle and the global particle. c1 and c2 are respectively p i and p g The weights; r1 and r2 are random numbers; iter is the current iteration number of the algorithm; iter max w is the maximum number of iterations. max and w min These are the maximum and minimum values ​​of the inertia weight, respectively; V i (t) represents the velocity of the i-th particle at time t, V i (t+1) represents the velocity of the i-th particle at time t+1; X i (t) represents the position of the i-th particle at time t, X i (t+1) represents the position of the i-th particle at time t+1. The parameters of the TSV array multi-field collaborative optimization design criterion are shown in Table 2, where the meaning of the parameters is the same as that in formula (5). The multi-field collaborative design criterion established in this application overcomes the barriers between software, evaluates the comprehensive performance of the TSV array through a collaborative optimization design strategy, shortens the design time, and improves the efficiency of multi-field collaborative design of the TSV array. Therefore, the design method and system design of this application require short time, strong multi-field performance and inter-regional synergy, and the comprehensive performance of the TSV array is high.

[0058] Table 2:

[0059]

[0060] S4 uses optimization algorithms to optimize the design parameters.

[0061] The design parameters are optimized using one of the following algorithms: Particle Swarm Optimization (PSO), Genetic Algorithm, Simulated Annealing, and Tabu Algorithm. In this embodiment, an improved PSO-LDIW algorithm with linearly decreasing inertia weights is used for optimization. Based on the trained ANN neural network model and the TSV array multi-field collaborative optimization design criteria, the improved PSO optimization algorithm is used to determine and optimize the design parameters, yielding the optimal result.

[0062] Specifically, the improved inertia-weighted linearly decreasing particle swarm optimization (PSO-LDIW) algorithm in this application proceeds as follows: First, the parameters of the ANN neural network model, the optimization criteria, and the PSO algorithm (the algorithm before improvement) are determined. During the iteration process, the particle velocity and position are updated. Then, the performance parameters and fitness are calculated using the ANN neural network model and the optimization criteria, respectively. As the iteration step size increases, the inertia weight decreases. The magnitude of the weight affects the particle velocity; therefore, the particle velocity is smaller in the next step, the search process is more refined, and the optimization result is more accurate. Finally, the optimal design parameters of the TSV array are determined. Specifically, the improved inertia-weighted linearly decreasing particle swarm optimization algorithm has a larger weight and a larger particle velocity in the early stages of optimization, which facilitates a rapid search for the region where the optimal value is located. As the number of iterations increases, the weight decreases, the particle velocity slows down, and the search process becomes more refined, allowing for a more precise search within the region where the optimal value is located, thus finding the accurate optimization result. In this way, accurate results can be found, and design time can be saved, resulting in higher design efficiency.

[0063] More specifically, the process of optimizing the design parameters of the TSV array in a 3D integrated circuit is as follows (the following steps all use an improved inertial weight linear decreasing particle swarm algorithm):

[0064] S41, Initialize the parameters of the particle swarm optimization algorithm (PSO-LDIW algorithm);

[0065] Specifically, the velocity v and position x of the particles are randomly generated; this removes residual parameters from the particle swarm optimization algorithm and prevents residual parameters from affecting the optimization process.

[0066] S42, Based on the expected performance parameters of the TSV array, the design parameters of the TSV array are predicted using the constructed ANN neural network model;

[0067] Based on the mapping database and the expected performance parameters, the corresponding design parameters are obtained. Specifically, in the mapping relationship, the TSV array performance parameters, including electrical performance, temperature, stress, and area, are input, and the corresponding TSV array design parameters are output, including via radius, via spacing, offset angle, and oxide thickness.

[0068] S43, based on the constructed TSV array multi-field collaborative optimization design criteria, the TSV array design parameters are optimized using the particle swarm optimization algorithm; that is, the design parameters obtained in step S42 through the mapping relationship database are further optimized.

[0069] S44, determine whether the optimal TSV array design parameters have been obtained. If yes, complete the multi-field collaborative optimization design of the TSV array; otherwise, return to step S402 to update the particle position, velocity, and weight until the number of iterations reaches the maximum, or the objective function of the design criterion is less than or equal to 1×10⁻⁶. -6 To obtain the optimal design parameters for the TSV array.

[0070] Figure 3 This is the pseudocode for the intelligent multi-field collaborative design method for TSV arrays in this application. This optimization method is used to optimize the radius of silicon vias, the spacing between silicon vias, the offset angle, and the oxide layer thickness. The parameters of the proposed optimization method are shown in Table 3. Among them, S21_77 (insertion loss of TSV7) and S21_1010 (insertion loss of TSV10), stress (corresponding subscript St), temperature (corresponding subscript T), and area (corresponding subscript area) are the main performance indicators, and the weight coefficient of these parameters is 0.1. Compared with the above parameters, the importance of the other parameters is relatively small, therefore, the weight coefficient of these parameters is 0.05. The specific meaning of the subscripts is the same as that in formula (5).

[0071] In this way, by setting weights according to the importance of parameters, the objective function of the design criterion is more sensitive to terms with larger weights. This prioritizes satisfying terms with larger weights, resulting in more accurate design results and shorter design time. The PSO algorithm has a maximum of 100 iterations and a population size of 30; this ensures convergence and improves the stability of the output results.

[0072] Table 3:

[0073]

[0074] The design process using the method of this application is as follows: During use, the expected performance parameters are input into the design criteria to obtain the calculated design parameters. Based on steps S1, S2, S3, and S4, a multi-field collaborative optimization design criterion for the TSV array is established using the via radius, via spacing, offset angle, and oxide thickness. The expected performance parameters, including electrical performance, temperature, stress, and area, are input to calculate the TSV array design parameters, including the via radius, via spacing, offset angle, and oxide thickness. The TSV array design parameters calculated using the performance parameters are placed in a database containing a mapping relationship between the TSV array performance parameters and the TSV array design parameters. That is, in this mapping relationship, inputting the TSV array performance parameters, including electrical performance, temperature, stress, and area, will output the corresponding TSV array design parameters, including the via radius, via spacing, offset angle, and oxide thickness. A trained ANN neural network model is then used to optimize the calculated design parameters, and finally, an optimization algorithm is used for further optimization to obtain the optimal design parameters.

[0075] This invention also provides a multi-field collaborative design system for TSV arrays, comprising an acquisition module, a first calculation module, a second calculation module, and a third calculation module. The acquisition module acquires parameters of the TSV array, including design parameters such as via radius, via spacing, offset angle, and oxide thickness, and performance parameters such as electrical properties, temperature, stress, and area obtained through finite element simulation calculations. The first calculation module constructs and trains a neural network model to obtain the mapping relationship between the design parameters and performance parameters. The second calculation module establishes multi-field collaborative optimization design criteria for the TSV array based on the mapping relationship between the design parameters and performance parameters, and incorporates constraints on both design and performance parameters. The third calculation module calculates the optimal design parameters of the TSV array using an improved particle swarm optimization algorithm based on the trained neural network model and the multi-field collaborative optimization design criteria.

[0076] In the acquisition module, the Latin Hypercube Sampling (LHS) design method is used to obtain the design parameter combination of the TSV array. The multi-field coupling design parameters of the TSV array are obtained, specifically including the via radius, via spacing, offset angle, and oxide thickness. The range of design parameters is shown in Table 1. The LHS method has efficient sampling capabilities, achieving relatively high computational accuracy with fewer samples, avoiding repeated sampling of existing points to ensure global representativeness. Different TSV array design parameters result in different performance parameters of the TSV in the 3D integrated circuit. Specifically, the via radius, via spacing, offset angle, and oxide thickness of the TSV array affect the electrical performance, temperature, stress, and area performance parameters of the TSV. The influence between the four design parameters and the four performance parameters is complex and intertwined; each performance parameter is affected by the combined influence of the four design parameters. Changes in the via radius, via spacing, offset angle, and oxide thickness of the TSV array can cause complex changes in the TSV array performance parameters. The higher the accuracy of the obtained parameters such as silicon via radius, silicon via spacing, offset angle, and oxide layer thickness, the higher the prediction accuracy of the neural network model that obtains the correspondence between the TSV array performance parameters and the design parameters.

[0077] The performance parameters of the TSV array are calculated using the design parameters obtained in step S11. This embodiment utilizes the EM electromagnetic simulation software ANSYS HFSS and the multiphysics coupling simulation software COMSOL to obtain the performance parameters of the TSV array through multi-field coupling joint simulation. The specific simulation process involves finite element simulation calculations, which can be referred to in the literature entitled "Modeling of Crosstalkin Through Silicon Vias". Through the above finite element simulation experiments, a database of TSV array design parameters and performance parameters is obtained. This application considers the electrical, thermal, mechanical properties, and area cost of the TSV array, effectively and comprehensively improving the electrical transport characteristics within a finite region, reducing the peak temperature and peak stress of the system, exhibiting strong multi-field performance and inter-regional synergy, and improving the overall performance of the TSV array. For example, the expression for electrothermal coupling is: ,in, The resistivity is at temperature T. Let be the resistivity at temperature T0 (300K), and α be the temperature coefficient, typically 0.004; the expression for thermo-coupling is: Where S is stress, T is the coefficient of thermal expansion, and T is the temperature of the TSV array. refThe temperature is room temperature. In other words, this application designs multiple physical fields, including electric field, thermal field, and force field, simultaneously. These multiple physical fields are coupled and influence each other. Therefore, compared with the iterative design of a single physical field, the design system of this application has a stronger synergistic effect, higher design efficiency, and higher accuracy, thus improving the overall performance of the TSV array.

[0078] In the first calculation module, a neural network model is constructed. The neural network model is trained using the design parameters and performance parameters from the acquisition module. The trained neural network model is then used to replace the simulation calculations in the acquisition module. Inputting design parameters, it can output performance parameters, and simultaneously obtain the mapping relationship between the TSV array design parameters and performance parameters.

[0079] This application uses a backpropagation neural network model to describe the mapping relationship between TSV array design parameters and performance parameters. Specifically, the neural network model can be a backpropagation neural network model based on a genetic algorithm (ANN neural network model), a recurrent neural network, or a convolutional neural network, etc. This embodiment uses an ANN neural network model, such as... Figure 2 As shown, the ANN neural network model consists of an input layer, a hidden layer, and an output layer. The parameters input to the input layer are oxide layer thickness, silicon via radius, silicon via spacing, and offset angle. There are 9 hidden layers. The output parameters of the output layer are electrical performance, thermal performance, stress, and area. The weight matrix and bias terms from the hidden layer to the output layer in this ANN neural network model are known quantities and are not specifically limited here. Specifically, the input design parameters output multi-field coupled performance parameters. The inherent coupling relationship is represented by the ANN neural network model, which can be represented by formulas (1)-(3).

[0080] The design parameters and corresponding performance parameters obtained by the acquisition module are used to train the constructed neural network model, specifically using the database obtained from the acquisition module. During training, a mapping relationship between the TSV array design parameters and performance parameters is established, forming a mapping relationship database. This database is the same as the database of TSV array design parameters and performance parameters obtained from the aforementioned finite element simulation experiments in the acquisition module. The data in these databases all represent the correspondence between the TSV array design parameters and performance parameters.

[0081] The mean absolute relative error (AARE) of the performance parameters obtained through training reaches 10E. -4 Or 10E -6This indicates that the ANN neural network model has been trained and can replace finite element simulation calculations. The trained ANN neural network model replaces the simulation calculations in the acquisition module; design parameters are input to the ANN neural network model, and the model outputs performance parameters. The trained neural network model enables the proposed TSV array multi-field collaborative design system to efficiently and accurately collaboratively calculate the design parameters of the TSV array according to different performance requirements, and to evaluate the overall performance of the TSV array through a collaborative optimization design strategy.

[0082] In the second calculation module, based on the mapping relationship between the design parameters and performance parameters of the TSV array established by the ANN neural network model, a multi-field collaborative optimization design criterion for the TSV array is established, and constraints on the design parameters and performance parameters are added. The specific constraints are related to the design purpose.

[0083] Specifically, the objective function of the multi-field collaborative optimization design criterion for the TSV array is determined by equation (4). To avoid the influence of different orders of magnitude of performance parameters, the electrical signal transmission performance, heat dissipation performance, stress performance, and array area are normalized respectively. In this embodiment, linear normalization is used for normalization, for example, This is a normalized expression for the electrical performance. It contains six parts. The first four terms are the weighted sum of the electrical signal transmission performance (electrical performance), heat dissipation performance (temperature), mechanical performance (stress), and the area occupied by the TSV array (area). Specifically, the first four terms are obtained based on the mapping relationship in the database, and the last two terms represent the shape constraint and the performance constraint. The shape constraint is represented by formulas (5), (6), and (7), and the performance constraint is represented by formulas (8), (9), and (10). The penalty factor of the penalty term is at least two orders of magnitude higher than that of other terms. This allows for the rapid elimination of design parameters that do not meet the constraints through a higher penalty factor, thereby improving the design speed and shortening the design time. Therefore, the design system of this application has a faster design speed and higher design efficiency. When the value of formula (4) approaches 0, the result is optimal. The multi-field collaborative design criterion established in this application breaks through the barriers between software and evaluates the comprehensive performance of the TSV array through a collaborative optimization design strategy, thereby shortening the design time and improving the efficiency of multi-field collaborative design of the TSV array. Therefore, the system design in this application requires short time, strong multi-field performance and inter-regional synergy, and high overall performance of the TSV array.

[0084] The third calculation module employs one of the following algorithms to optimize the design parameters: particle swarm optimization, genetic algorithm, simulated annealing, or tabu algorithm. In this embodiment, an improved particle swarm optimization algorithm with linearly decreasing inertial weights (PSO-LDIW) is used for optimization. Based on the trained ANN neural network model and the multi-field collaborative optimization design criteria for the TSV array, the improved particle swarm optimization algorithm is used to determine and optimize the design parameters, obtaining the optimal result.

[0085] Specifically, the improved inertia-weighted linearly decreasing particle swarm optimization (PSO-LDIW) algorithm in this application proceeds as follows: First, the parameters of the ANN neural network model, the optimization criteria, and the PSO algorithm (the algorithm before improvement) are determined. During iteration, the particle velocity and position are updated. Then, the performance parameters and fitness are calculated using the ANN neural network model and the optimization criteria, respectively. As the iteration step size increases, the inertia weight decreases. The magnitude of the weight affects the particle velocity; therefore, the particle velocity is smaller in the next step, making the search process more refined and the optimization result more accurate. Finally, the optimal design parameters for the TSV array are determined. Specifically, the improved inertia-weighted linearly decreasing particle swarm optimization algorithm has a larger weight and a larger particle velocity in the early stages of optimization, which facilitates a rapid search for the region where the optimal value is located. As the number of iterations increases, the weight decreases, the particle velocity slows down, and the search process becomes more refined, allowing for a more precise search within the region where the optimal value is located, thus finding the accurate optimization result. In this way, accurate results can be found, and design time can be saved, resulting in higher design efficiency.

[0086] Figure 3 This is the pseudocode for the intelligent multi-field collaborative design of TSV arrays in this application. It is used to optimize the radius of silicon vias, the spacing of silicon vias, the offset angle, and the oxide layer thickness. The corresponding parameters are shown in Table 3. Among them, S21_77 (insertion loss of TSV7) and S21_1010 (insertion loss of TSV10), stress (corresponding subscript St), temperature (corresponding subscript T), and area (corresponding subscript area) are the main performance indicators, and the weight coefficient of these parameters is 0.1. Compared with the above parameters, the importance of the other parameters is relatively small. Therefore, the weight coefficient of these parameters is 0.05. The specific meaning of the subscript is the same as that in formula (5). In this way, the weight is set according to the importance of the parameters. The objective function of the design criterion is more sensitive to the terms with larger weights. This can prioritize the terms with larger weights, thereby making the design results more accurate and the design time shorter. The maximum number of iterations of the PSO algorithm is 100, and the population size is 30. This can ensure convergence and improve the stability of the output results.

[0087] In practice, the expected performance parameters are input into the design criteria to obtain the calculated design parameters. Based on the acquisition module, the first calculation module, the second calculation module, and the third calculation module, a multi-field collaborative optimization design criterion for the TSV array is established using via radius, via spacing, offset angle, and oxide thickness. Expected performance parameters, including electrical performance, temperature, stress, and area, are input to calculate the TSV array design parameters, including via radius, via spacing, offset angle, and oxide thickness. The TSV array design parameters calculated from each performance parameter are placed in a database containing a mapping relationship between the TSV array performance parameters and the TSV array design parameters. That is, within this mapping, inputting the TSV array performance parameters, including electrical performance, temperature, stress, and area, will output the corresponding TSV array design parameters, including via radius, via spacing, offset angle, and oxide thickness. A trained ANN neural network model is then used to optimize the calculated design parameters, and finally, an optimization algorithm is used for further optimization to obtain the optimal design parameters.

[0088] This application also provides an electronic device with a multi-field cooperative design of TSV arrays, such as Figure 4 As shown, it includes a memory 11, a processor 12, and a network module 13. The memory 11 stores a computer program that can run on the processor 12. When the processor 12 executes the computer program, it implements the TSV array multi-field collaborative design system of this application. Figure 4 The structure shown is for illustrative purposes only; electronic devices may also include components that are more advanced than those shown in the diagram. Figure 4 The more or fewer components shown, or having the same Figure 4 The different configurations shown. Figure 4 The components shown can be implemented using hardware, software, or a combination thereof. Network module 13 is used to establish a communication connection between the electronic device and an external communication terminal via a network, enabling the transmission and reception of network signals and data. Network signals may include wireless or wired signals. Memory 11, processor 12, and network module 13 are electrically connected directly or indirectly to achieve data transmission or interaction. Memory 11 stores programs, and processor 12 executes the computer program after receiving execution instructions. Processor 12 has data processing capabilities and can be an integrated circuit chip, a general-purpose processor, a central processing unit (CPU), a network processor (NP), etc., and can also implement or execute the methods, steps, and logic block diagrams in this application. The general-purpose processor can be a microprocessor or any conventional processor.

[0089] This application also includes a computer-readable storage medium for multi-field co-design of TSV arrays. The computer-readable storage medium includes a computer program. When the computer program runs, it controls the electronic device where the computer-readable storage medium is located to execute the calculation method of multi-field co-design of TSV arrays of this application.

[0090] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A multi-field cooperative design method for TSV arrays, characterized in that, The method includes the following steps: S1, Obtain the parameters of the TSV array; S2, Construct a neural network model and train it; S3, Establish design criteria; S4, Optimize the design parameters using optimization algorithms; Step S1 includes the following steps: S11, obtaining the design parameters of the TSV array, including the through-silicon via radius, through-silicon via spacing, offset angle, and oxide layer thickness; S12, obtaining the performance parameters of the TSV array, including electrical performance, temperature, stress, and area. The neural network model in step S2 is an ANN neural network model, which includes an input layer, a hidden layer, and an output layer. The ANN neural network model in step S2 is represented by the following formula: Where U is the input of the ANN neural network model, W1 and W2 represent the weight matrices of the input and output hidden layers, respectively, and b1 and b2 represent the bias values ​​of the input and output hidden layers, respectively. Electrical / Thermal / Stress / area represent the input and output of the output layer, respectively; g is the activation function, e represents the natural logarithm, and x represents the independent variable. In step S2, during the training of the ANN neural network model, a mapping relationship is established between the design parameters and the performance parameters of the TSV array. Step S3 establishes the design criteria for the TSV array based on the mapping relationship and constraints. The design criteria are determined by the following expression, where the value of the expression approaches 0 for optimal results: in, , =1,2,3,4,5 The meanings of the letters are as follows: i , , , These are the weights for electrical signal transmission performance E, heat dissipation performance T, stress performance St, and array area, respectively. and These are the penalty factors for shape constraints and performance constraints, respectively. Indicates the expected performance parameters, This indicates the maximum value of the corresponding parameter. S11_77 represents the minimum value of the corresponding parameter; S21_77 represents the return loss of TSV7; S11_107 represents the near-end crosstalk between TSV10 and TSV7; S21_107 represents the far-end crosstalk between TSV10 and TSV7; S11_712 represents the near-end crosstalk between TSV7 and TSV12; S12_712 represents the far-end crosstalk between TSV7 and TSV12; S1 1_510 represents the near-end crosstalk between TSV5 and TSV10; S12_510 represents the far-end crosstalk between TSV5 and TSV10; S11_1010 represents the return loss of TSV10; S21_1010 represents the insertion loss of TSV10; TSV5, TSV7, TSV10, and TSV12 represent different through-silicon vias (TSVs), R represents the radius of the TSV, P represents the spacing between TSVs, O represents the offset angle of the TSV, and t... ox This indicates the thickness of the oxide layer.

2. The multi-field cooperative design method for TSV arrays according to claim 1, characterized in that, The optimization algorithm in step S4 is one of the following: PSO-LDIW algorithm, genetic algorithm, simulated annealing algorithm, and tabu algorithm.

3. The multi-field cooperative design method for TSV arrays according to claim 2, characterized in that, Step S4 uses the PSO-LDIW algorithm to obtain the optimized design parameters based on the trained ANN neural network model and the design criteria.

4. The multi-field cooperative design method for TSV arrays according to claim 3, characterized in that, Step S4 includes the following steps: S41, Initialize the parameters of the PSO-LDIW algorithm; S42, Based on the expected performance parameters of the TSV array, predict the design parameters of the TSV array using the constructed ANN neural network model; S43, Based on the design criteria of the constructed TSV array, optimize the design parameters of the TSV array using the PSO-LDIW algorithm; S44. Determine whether the optimal TSV array design parameters have been obtained. If yes, complete the multi-field collaborative optimization design of the TSV array. Otherwise, return to step S42 until the optimal TSV array design parameters are obtained.

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