Power amplifier

Abstract

A power amplifier includes a signal adjusting circuit, a power output stage circuit, and a boost unit circuit. The signal adjusting circuit adjusts an input signal to an adjusted signal. The power output stage circuit is coupled to the signal adjusting circuit and receives a power voltage to amplify the adjusted signal to generate an output signal. The boost unit circuit selectively controls the magnitude of the power voltage. The signal adjusting circuit includes a compensation unit coupled to the boost unit circuit to dynamically adjust a gain of the compensation unit in response to a change in the power voltage and to adjust the input signal to the adjusted signal based on the gain.

Description

TECHNICAL FIELD

[0001] The present application relates to an amplifier, and more particularly to a power amplifier. BACKGROUND

[0002] Currently, some power output stage circuits of power amplifiers adopt adaptive boost technology, which can boost the output power when needed, and maintain low voltage at other times to save power.

[0003] However, adaptive boost can cause voltage fluctuation, thereby affecting the signal. SUMMARY

[0004] Therefore, one embodiment of the present application provides a power amplifier, which includes a signal adjustment circuit, a power output stage circuit and a boost unit circuit. The signal adjustment circuit adjusts an input signal to an adjusted signal. The power output stage circuit is coupled to the signal adjustment circuit and receives a power voltage to gain the adjusted signal to generate an output signal. The boost unit circuit selectively controls the size of the power voltage. The signal adjustment circuit includes a compensation unit coupled to the boost unit circuit to dynamically adjust the gain of the compensation unit corresponding to the change of the power voltage, and adjust the input signal to the adjusted signal according to the gain.

[0005] In summary, the compensation circuit of the power amplifier according to some embodiments of the present application can improve the influence of adaptive boost on inconsistent signal gain. BRIEF DESCRIPTION OF DRAWINGS

[0006] Figure 1 A schematic diagram of a power amplifier according to one embodiment of the present application.

[0007] Figure 2 A schematic diagram of a compensation unit according to one embodiment of the present application.

[0008] Figure 3 A detailed schematic diagram of a power amplifier according to one embodiment of the present application.

[0009] Figure 4 A detailed schematic diagram of a power amplifier according to another embodiment of the present application.

[0010] Figure 5 A mathematical model of a power amplifier according to one embodiment of the present application. Figure 4

[0011] Explanation of reference signs:

[0012] 1 - signal adjustment circuit 11 - compensation unit 112 - voltage detection circuit

[0013] ​114 - control circuit 116 - compensation circuit 12 - negative feedback unit

[0014] 13 - filter unit 14 - noise shaping unit 15 - modulation unit

[0015] 2 - power output stage circuit 3 - boost unit circuit 4 - forward path

[0016] 5 - negative feedback loop 6 - low pass filter 7 - analog to digital converter

[0017] PVDD - power voltage A - low pass filter C - compensation circuit

[0018] H - filter unit Gl, G2 - gain Nl ~ N4 - noise

[0019] Sl, S2 - noise shaping Sc - control signal Sd - detection signal

[0020] Se - error signal Sq - shaped signal X - input signal

[0021] Y - adjustment signal Z - output signal DETAILED DESCRIPTION

[0022] Figure 1 A schematic diagram of a power amplifier is shown in an embodiment of the present application. The power amplifier includes a signal adjustment circuit 1, a power output stage circuit 2, and a boost unit circuit 3. The signal adjustment circuit 1 adjusts an input signal X into an adjustment signal Y. The power output stage circuit 2 is coupled to the signal adjustment circuit 1 and receives a power voltage PVDD to amplify the adjustment signal Y into an output signal Z. The boost unit circuit 3 uses an adaptive boost technique to selectively control the size of the power voltage PVDD to increase the power voltage PVDD when processing a large signal to increase the output power, and to use a lower power voltage PVDD when processing a small signal to save power. The signal adjustment circuit 1 includes a compensation unit 11 coupled to the boost unit circuit 3 to dynamically adjust the gain of the compensation unit 11 in response to the change of the power voltage PVDD, and to adjust the input signal X into the adjustment signal Y according to the gain. In this way, the gain of the input signal X is maintained consistent by the compensation unit 11 to dynamically adjust the gain in response to the change of the power voltage PVDD, and the gain of the input signal X is not inconsistent due to the adaptive boost.

[0023] In an embodiment, the boost unit circuit 3 uses a battery voltage as a source and selectively boosts the battery voltage to vary the output power voltage PVDD between the battery voltage and a boosted voltage.

[0024] Figure 2A schematic diagram of the compensation unit 11 is shown in an embodiment of the present application. The compensation unit 11 comprises a voltage detection circuit 112, a control circuit 114 and a compensation circuit 116. The voltage detection circuit 112 is coupled between the boost unit circuit 3 and the control circuit 114 to detect the power voltage PVDD and output a detection signal Sd to the control circuit 114. The control circuit 114 is coupled between the voltage detection circuit 112 and the compensation circuit 116 to output a control signal Sc to the compensation circuit 116 according to the detection signal Sd. The compensation circuit 116 adjusts its own gain according to the control signal Sc. For example, the detection signal Sd is a voltage value or a value associated with a voltage value, and the control signal Sc is a control parameter, and there is a mapping relationship (e.g. a mapping table) between the detection signal Sd and the control signal Sc. Through this mapping relationship, the control circuit 114 can output the control signal Sc corresponding to the detection signal Sd to the compensation circuit 116, so that the compensation circuit 116 can be adjusted to the gain that meets the current power voltage PVDD.

[0025] Figure 3 A detailed schematic diagram of the power amplifier is shown in an embodiment of the present application. The power amplifier is a negative feedback architecture, and the signal adjustment circuit 1 and the power output stage circuit 2 are located in a forward path 4, and the output signal Z is fed back to the signal adjustment circuit 1 through a negative feedback loop 5.

[0026] The signal adjustment circuit 1 further comprises a negative feedback unit 12, a filter unit 13, a noise shaping unit 14 and a modulation unit 15. The negative feedback unit 12 generates an error signal Se according to the input signal X and the output signal Z. Specifically, the negative feedback unit 12 is a subtraction unit, and the error signal Se is the difference between the input signal X and the output signal Z. The filter unit 13 is coupled between the negative feedback unit 12 and the compensation unit 11, and is used to suppress the noise on the forward path 4, more precisely, to suppress the noise generated between the output of the filter unit 13 and the output signal Z of the power output stage circuit 2, thereby improving the total harmonic distortion plus noise (THD+N) performance of the output end. The filter unit 13 can be a loop filter, but the present application is not limited thereto. The noise shaping unit 14 is coupled to the compensation unit 11 to perform noise shaping processing on the error signal Se to generate a shaped signal Sq. The noise shaping unit 14 can be a Sigma Delta Modulator, but the present application is not limited thereto. The modulation unit 15 is coupled to the noise shaping unit 14 to generate an adjustment signal Y according to the shaped signal Sq. The modulation unit 15 can be a Pulse Width Modulation, but the present application is not limited thereto.

[0027] Figure 4 A detailed schematic diagram of the power amplifier is shown in another embodiment of the present application. Compared with the previous embodiment, the power amplifier is a positive feedback architecture, and the signal adjustment circuit 1 and the power output stage circuit 2 are located in a forward path 4, and the output signal Z is fed back to the signal adjustment circuit 1 through a positive feedback loop 6.Figure 3 In this embodiment, the negative feedback loop 5 also includes a low-pass filter 6 and an analog-to-digital converter 7. The low-pass filter 6 performs low-pass filtering on the feedback output signal Z to eliminate noise. The analog-to-digital converter 7 is coupled to the low-pass filter 6 to convert the filtered output signal Z into a digital signal and input it to the negative feedback unit 12. Here, the input signal X is also a digital signal.

[0028] Figure 5 for Figure 4 The mathematical model of the power amplifier is given. This mathematical model can be derived from Equations 1 and 2. X is the input signal, and Z is the output signal. H is the filter unit 13. C is the compensation circuit 116. N1 is the noise from the quantization error of the noise shaping unit 14. N2 is the noise generated by the modulation unit 15. N3 is the noise of the power output stage circuit 2. N4 is the noise of the analog-to-digital converter 7. S1 is the noise shaping generated by the noise shaping unit 14. S2 is the noise shaping generated by the analog-to-digital converter 7. A is the low-pass filter 6. G1 is the gain of the boost voltage on the signal. G2 is the gain of the buck voltage before feedback. G1 changes with adaptive boost, and its value is between the battery voltage and the boost voltage (V). boost Between ) . G2 is the reciprocal of the boost voltage (1 / V) boost ).

[0029]

[0030] L=HCG1G2A (Equation 2)

[0031] When the power voltage PVDD is the boost voltage, G1 is V. boost Equations 1 and 2 can be rewritten as Equations 3 and 4.

[0032]

[0033] L1 = HCA (Equation 4)

[0034] As can be seen from Equations 3 and 4, when the power voltage PVDD changes with the magnitude of the input signal X, it will produce different gains on the input signal X, affecting the output signal Z. Therefore, in order to keep this gain consistent, the gain of the compensation circuit 116 needs to be controlled so that the gain of the compensation circuit 116 changes with the power voltage PVDD. The way to change it is to make G1·G2·C=1, where C is the gain of the compensation circuit 116 (compensation unit 11). Thus, Equation 5 can be obtained. As can be seen from Equation 5, the coefficient of the input signal X is a fixed value. In addition, the gain C of the compensation circuit 116 can also suppress the influence of noise N1~N3 on the output.

[0035]

[0036] In some embodiments, the compensation circuit 116 is a DC gain circuit. In other embodiments, the compensation circuit 116 is a shelving filter.

[0037] In summary, the power amplifier according to some embodiments of the present application can improve the effect of adaptive boosting on signal gain inconsistency. In some embodiments, the compensation circuit 116 can also suppress the effect of noise in the circuit on the output. In some embodiments, the use of adaptive boosting can achieve the effect of power saving. In some embodiments, the use of negative feedback architecture can effectively suppress noise.

Claims

1. A power amplifier, comprising: a signal adjusting circuit, for adjusting an input signal to an adjusted signal; a power output stage circuit, coupled to the signal adjusting circuit and receiving a power voltage, for amplifying the adjusted signal to generate an output signal; and a boost unit circuit, for selectively controlling a magnitude of the power voltage; wherein the signal adjusting circuit comprises a compensation unit, coupled to the boost unit circuit, for dynamically adjusting a gain of the compensation unit in response to a variation of the power voltage, and adjusting the input signal to the adjusted signal according to the gain; wherein the compensation unit comprises: a voltage detecting circuit, coupled to the boost unit circuit, for detecting the power voltage and outputting a detection signal; a control circuit, coupled to the voltage detecting circuit, for outputting a control signal according to the detection signal; and a compensation circuit, coupled to the control circuit, for adjusting the gain according to the control signal. The power amplifier is a negative feedback architecture, the signal adjusting circuit and the power output stage circuit are located in a forward path, and the output signal is fed back to the signal adjusting circuit through a negative feedback loop.

2. The power amplifier of claim 1, wherein, The dynamically adjusting the gain of the compensation unit is in accordance with G1 · G2 · C = 1, wherein C is the gain of the compensation unit, G1 is a boost-to-signal gain, and G2 is a pre-feedback step-down gain.

3. The power amplifier of claim 2, wherein, The signal adjusting circuit comprises:

4. The power amplifier of claim 2, wherein, a negative feedback unit, for generating an error signal according to the input signal and the output signal; a filter unit, coupled between the negative feedback unit and the compensation unit, for suppressing noise in the forward path; a noise shaping unit, coupled to the compensation unit, for performing a noise shaping process on the error signal to generate a shaped signal; and a modulation unit, coupled to the noise shaping unit, for generating the adjusted signal according to the shaped signal. The filter unit is a loop filter.

5. The power amplifier of claim 4, wherein, The noise shaping unit is a delta-sigma modulator.

6. The power amplifier of claim 4, wherein, The modulation unit is a pulse width modulation.

7. The power amplifier of claim 4, wherein, Further comprising a low pass filter located in the negative feedback loop.

8. The power amplifier of claim 4, wherein, Further comprising an analog-to-digital converter located in the negative feedback loop and coupled to the low pass filter, for converting the output signal to a digital signal and inputting the digital signal to the negative feedback unit.

9. The power amplifier of claim 8, wherein, ​

Images