Method for manufacturing micro-resistor layer and method for manufacturing micro-resistor

Abstract

A micro-resistor layer manufacturing method and a micro-resistor manufacturing method. The micro-resistor layer manufacturing method comprises: providing a substrate; forming a first resistor layer on the substrate by a screen printing process or a sputtering process, wherein the first resistor layer covers a plurality of product areas of the substrate; cutting the first resistor layer into a plurality of second resistor layers, wherein each product area comprises one second resistor layer, and an area of each second resistor layer is less than 0.4*0.2 square millimeters; and trimming a pattern of each second resistor layer according to a preset resistance value, so that the pattern of each second resistor layer corresponds to the preset resistance value. The micro-resistor manufacturing method applies the above micro-resistor layer manufacturing method to manufacture a micro-resistor. Thus, a micro-resistor layer and a micro-resistor can be provided.

Description

Technical Field

[0001] This invention relates to a method for manufacturing a micro-resistive layer and a method for manufacturing a micro-resistor. Background Technology

[0002] With the rapid development of the economy and technology, various electronic products, such as smartphones, tablets, and laptops, need to offer more functions to meet user needs. For example, smartphones need to provide camera and image processing functions to meet users' demands for photo quality. Therefore, electronic products need to use smaller electronic components to integrate more electronic components into the product to meet user needs.

[0003] Resistors are essential electronic components in the manufacture of electronic products. To meet the requirements of small size, various miniature resistors, such as the 01005 and 0075 type miniature resistors, have been developed. However, current miniature resistor manufacturing methods are costly and time-consuming, thus necessitating a more efficient and cost-effective method. Summary of the Invention

[0004] To address the aforementioned problems, embodiments of the present invention provide a method for manufacturing a micro-resistive layer and a method for manufacturing a micro-resistor, which can significantly reduce the manufacturing time and cost of the micro-resistor.

[0005] According to an embodiment of the present invention, the method for manufacturing the above-mentioned micro-resistive layer includes: providing a substrate, wherein the substrate is defined with a plurality of product regions, each product region having an area of ​​0.4*0.2 square millimeters (mm²). 2 The following steps are performed: A first resistive layer is formed on a substrate using screen printing or sputtering processes, wherein the first resistive layer covers the product area; the first resistive layer is then cut into a plurality of second resistive layers, wherein each product area includes one of the second resistive layers, and the area of ​​each second resistive layer is less than 0.4 * 0.2 square millimeters (mm²). 2 ); and adjust the pattern of each second resistor layer according to the preset resistance value so that the pattern of each second resistor layer corresponds to the preset resistance value.

[0006] In some embodiments, the screen printing process uses a fully open screen.

[0007] According to an embodiment of the present invention, the method for manufacturing the above-mentioned micro-resistor includes: providing a substrate having opposing first and second surfaces, wherein the substrate is defined with a plurality of resistor regions, each resistor region having an area of ​​0.4 * 0.2 square millimeters (mm²). 2The following steps are performed: forming a plurality of first internal electrode pairs on a first surface of a substrate, wherein each resistor region includes one of the first internal electrode pairs; forming a plurality of second internal electrode pairs on a second surface of the substrate, wherein each resistor region includes one of the second internal electrode pairs; forming a first resistive layer on the first surface of the substrate using a screen printing process or a sputtering process to cover the resistor region; cutting the first resistive layer into a plurality of second resistive layers, wherein each resistor region includes one of the second resistive layers, and the area of ​​each second resistive layer is less than 0.4 * 0.2 square millimeters (mm²). 2 The pattern of the second resistive layer in each resistor region is adjusted according to a preset resistance value so that the pattern of the second resistive layer in each resistor region corresponds to the preset resistance value; the substrate is cut into a plurality of strip substrates according to the resistor region; an outer electrode layer is formed on each strip substrate, wherein the outer electrode layer includes a side electrode layer and is electrically connected to the first inner electrode pair, the second inner electrode pair and the second resistive layer of each resistor region; and each strip substrate is cut according to the resistor region to obtain an area of ​​0.4*0.2 square millimeters (mm²). 2 The following are multiple miniature resistors.

[0008] In some embodiments, the step of cutting the first resistive layer into the second resistive layer is performed using a laser.

[0009] In some embodiments, the step of modifying the pattern of the second resistive layer in each resistor region according to a preset resistance value is performed using a laser.

[0010] In some embodiments, the screen printing process uses a fully open screen.

[0011] In some embodiments, the resistor regions are arranged in a matrix, having a plurality of resistor rows and a plurality of resistor columns.

[0012] In some embodiments, a fully open mesh includes a plurality of openings, the area of ​​which is determined by the area of ​​each resistor row of the matrix.

[0013] According to an embodiment of the present invention, the method for manufacturing the above-mentioned micro-resistor includes: providing a substrate having opposing first and second surfaces, wherein the substrate is defined with a plurality of resistor regions, each resistor region having an area of ​​0.4 * 0.2 square millimeters (mm²). 2The following steps are performed: A plurality of first internal electrode pairs are formed on a first surface of a substrate, wherein each resistor region includes one of the first internal electrode pairs; a plurality of second internal electrode pairs are formed on a second surface of the substrate, wherein each resistor region includes one of the second internal electrode pairs; a first resistive layer is formed on the first surface of the substrate using a screen printing process or a sputtering process to cover the resistor regions; the first resistive layer is cut into a plurality of second resistive layers, wherein each resistor region includes one of the second resistive layers, and the area of ​​each second resistive layer is less than 0.4 * 0.2 square millimeters (mm²). 2 The pattern of the second resistive layer in each resistor region is adjusted according to a preset resistance value so that the pattern of the second resistive layer in each resistor region corresponds to the preset resistance value; an external electrode forming step is performed to form an external electrode layer in each of the resistor regions, wherein the external electrode layer includes a side electrode layer and is electrically connected to the first inner electrode pair, the second inner electrode pair, and the second resistive layer of each resistor region; and the substrate is cut according to the resistor region to obtain an area of ​​0.4*0.2 square millimeters (mm²). 2 The following are multiple miniature resistors.

[0014] In some embodiments, the step of cutting the first resistive layer into the second resistive layer is performed using a laser.

[0015] In some embodiments, the step of modifying the pattern of the second resistive layer in each resistor region according to the preset resistance value is performed using a laser.

[0016] In some embodiments, the resistor regions are arranged in a matrix, having a plurality of resistor rows and a plurality of resistor columns.

[0017] In some embodiments, the screen printing process uses a fully open screen.

[0018] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0019] Figure 1 A schematic flowchart illustrating a method for manufacturing a micro-resistive layer according to an embodiment of the present invention is provided.

[0020] Figure 2A A schematic diagram illustrating the substrate according to an embodiment of the present invention.

[0021] Figure 2B A schematic diagram illustrating the first resistive layer according to an embodiment of the present invention is provided.

[0022] Figure 2C A schematic diagram illustrating the second resistive layer according to an embodiment of the present invention is provided.

[0023] Figure 2D This is a schematic diagram illustrating the pattern trimming of the second resistive layer according to an embodiment of the present invention.

[0024] Figure 3A This is a schematic diagram illustrating a fully open screen printing plate according to an embodiment of the present invention.

[0025] Figure 3B This is a schematic diagram illustrating a fully open screen printing plate according to an embodiment of the present invention.

[0026] Figure 4 A schematic flowchart illustrating a method for manufacturing a miniature resistor according to an embodiment of the present invention is provided.

[0027] Figure 5A A schematic diagram illustrating the substrate according to an embodiment of the present invention.

[0028] Figure 5B A schematic diagram illustrating the first electrode pair according to an embodiment of the present invention is provided.

[0029] Figure 5C A schematic diagram illustrating the second electrode pair according to an embodiment of the present invention is provided.

[0030] Figure 5D A schematic diagram illustrating the first resistive layer according to an embodiment of the present invention is provided.

[0031] Figure 5E A schematic diagram illustrating the second resistive layer according to an embodiment of the present invention is provided.

[0032] Figure 5F This is a schematic diagram illustrating the pattern trimming of the second resistive layer according to an embodiment of the present invention.

[0033] Figure 5G A schematic diagram illustrating a miniature resistor having a second resistive layer according to an embodiment of the present invention is provided.

[0034] Figure 6 A schematic flowchart illustrating a method for manufacturing a micro-resistive layer according to an embodiment of the present invention is provided.

[0035] Figure 7A A schematic diagram illustrating the substrate according to an embodiment of the present invention.

[0036] Figure 7B A schematic diagram illustrating the first resistive layer according to an embodiment of the present invention is provided.

[0037] Figure 7C A schematic diagram illustrating the second resistive layer according to an embodiment of the present invention is provided.

[0038] Figure 7D This is a schematic diagram illustrating the pattern trimming of the second resistive layer according to an embodiment of the present invention.

[0039] Figure 8 A schematic flowchart illustrating a method for manufacturing a miniature resistor according to an embodiment of the present invention is provided.

[0040] Figure 9A A schematic diagram illustrating the substrate according to an embodiment of the present invention.

[0041] Figure 9B A schematic diagram illustrating the first resistive layer according to an embodiment of the present invention is provided.

[0042] Figure 9C A schematic diagram illustrating the second resistive layer according to an embodiment of the present invention is provided.

[0043] Figure 9D This is a schematic diagram illustrating the pattern trimming of the second resistive layer according to an embodiment of the present invention.

[0044] Figure 9E A schematic diagram illustrating the first electrode pair according to an embodiment of the present invention is provided.

[0045] Figure 9F A schematic diagram illustrating the second electrode pair according to an embodiment of the present invention is provided.

[0046] Figure 9G A schematic diagram illustrating a miniature resistor having a second resistive layer according to an embodiment of the present invention is provided. Detailed Implementation

[0047] The following is a detailed description of the embodiments in conjunction with the accompanying drawings. However, the embodiments provided are not intended to limit the scope of the invention, and the description of the structural operation is not intended to limit the order of execution. Any structure resulting from the recombination of elements and producing a device with equivalent functionality is within the scope of the invention. Furthermore, the accompanying drawings are for illustrative purposes only and are not drawn to their original dimensions.

[0048] The terms "first," "second," etc., used in this article do not specifically refer to order or sequence; they are merely used to distinguish elements or operations described using the same technical terms.

[0049] Please refer to Figure 1 This is a schematic flowchart illustrating a method 100 for manufacturing a micro-resistive layer according to an embodiment of the present invention. The method 100 for manufacturing a micro-resistive layer is suitable for manufacturing layers with an area of ​​0.4 x 0.2 square millimeters (mm²). 2 The following are micro-resistive layers. In the method 100 for manufacturing the micro-resistive layer, step 110 is first performed to provide a substrate 210, such as... Figure 2AAs shown. The substrate 210 may be formed of an insulating material, such as glass fiber, aluminum nitride, silicon-based material, or ceramic material, but embodiments of the present invention are not limited thereto. The substrate 210 defines a plurality of product regions 212, which are defined by a plurality of virtual cut lines CL. The product regions 212 are predefined to form products containing resistive layers, such as resistors or other various components containing resistive layers. In this embodiment, the product regions 212 have a substantial area of ​​0.4 * 0.2 square millimeters (mm). 2 The product area 212 is an area of ​​approximately 0.3 x 0.15 square millimeters (mm²) and arranged in a matrix, having a plurality of product rows PC and a plurality of product columns PR. In some embodiments, the product area 212 has a substantial area of ​​0.3 x 0.15 square millimeters (mm²). 2 The area of ​​).

[0050] Then, step 120 is performed to form a first resistive layer 220 on the substrate 210 using a screen printing process, such as... Figure 2B As shown. In this embodiment, the screen printing process in step 120 is performed using a fully open screen to form a first resistive layer 220 on the substrate 210. The first resistive layer 220 includes a plurality of sub-resistive layers 222, which are formed correspondingly on product rows PC. For example, in this embodiment, the sub-resistive layers 222 are formed corresponding to product rows PC and span multiple product columns PR. However, embodiments of the present invention are not limited thereto.

[0051] Next, steps 130 and 140 are performed to cut the first resistive layer 220 according to the product area 212 to form the second resistive layer 222a, and to trim the resistance of the second resistive layer 222a. In step 130, each sub-resistive layer 222 of the first resistive layer 220 is cut into a plurality of second resistive layers 222a, such as... Figure 2C As shown. For example, each sub-resistive layer 222 is cut into a plurality of second resistive layers 222a according to multiple product columns PR, such that each product region 212 contains one second resistive layer 222a. In this embodiment, since the product region 212 has an area of ​​less than 0.4*0.2 square millimeters, the area of ​​the second resistive layer 222a in each product region 212 is less than 0.4*0.2 square millimeters. In step 140, the pattern of the second resistive layer 222a in each product region 212 is trimmed according to a preset resistance value (e.g., cutting out a long strip opening OP) so that the pattern of the second resistive layer 222a corresponds to the preset resistance value, such as... Figure 2D As shown. In this embodiment, the cutting of the first resistive layer 220 and the pattern trimming of the second resistive layer 222a are accomplished using a laser; however, the embodiments of the present invention are not limited thereto.

[0052] Additionally, in some embodiments, step 120 described above may include a mask forming step to pre-form a mask (not shown) on the substrate 210. This mask has a plurality of openings to expose portions of the substrate 210. Then, a first resistive layer 220 covering the substrate 210 and the mask is formed using a fully open screen 310, wherein the fully open screen 310 has no mesh or knots, and the size of its openings 312 is substantially equal to the size of the array of product areas 212, such as... Figure 3A As shown. Thus, a first resistive layer 220 covering the array of product areas 212 can be formed, with a portion of the first resistive layer 220 formed on the exposed substrate 210 portion. Then, by removing the mask and the first resistive layer 220 on the mask, the desired result can be obtained. Figure 2B The first resistive layer 220 is shown.

[0053] In some embodiments, the fully open screen 320 used in step 120 above does not have meshes and knots, and has a plurality of openings 322, such as Figure 3B As shown. In order to form as Figure 2B The area of ​​each opening 322 in the first resistive layer 220 shown is determined by the product row PC. For example, the length of the opening 322 is substantially equal to the length of the product row PC, while the width of the opening 322 is slightly smaller than the width of the product row PC.

[0054] As described above, the method 100 for manufacturing a micro-resistive layer according to this embodiment of the invention utilizes a screen printing process to manufacture a small-sized micro-resistive layer, wherein the screen printing process uses a fully open screen to form the micro-resistive layer. Because the method 100 uses a fully open screen to form the micro-resistive layer, defects caused by screen knots and mesh size can be avoided, such as incomplete printed layer shape, insufficient printed layer thickness, or pinholes in the printed layer. Furthermore, using a screen printing process to manufacture the micro-resistive layer can significantly reduce the manufacturing time and cost of the micro-resistive layer.

[0055] Please refer to Figure 4 This is a schematic flowchart illustrating a method 400 for manufacturing a microresistor according to an embodiment of the present invention. The method 400 for manufacturing a microresistor utilizes the aforementioned method 100 for manufacturing a microresistive layer to manufacture a microresistor, such as a 01005-type microresistor, a 0075-type microresistor, or a smaller microresistor. In the method 400 for manufacturing a microresistor, step 410 is first performed to provide a substrate 510, such as... Figure 5AAs shown. The substrate 510 may be formed of an insulating material, such as glass fiber, aluminum nitride, silicon-based material, or ceramic material, but embodiments of the present invention are not limited thereto. The substrate 510 defines a plurality of resistor regions 512, which are defined by a plurality of virtual cut lines CL. The resistor regions 512 are predefined to form miniature resistors. In this embodiment, the resistor regions 512 have a substantial area of ​​0.4 * 0.2 square millimeters (mm). 2 The resistor region 512 has an area of ​​approximately 0.3 x 0.15 square millimeters (mm²) and is arranged in a matrix, having a plurality of resistor rows RC and a plurality of resistor columns RR. In some embodiments, the resistor region 512 has a substantial area of ​​0.3 x 0.15 square millimeters (mm²). 2 The area of ​​).

[0056] Then, steps 420 and 430 are performed to form a plurality of first electrode pairs FE and second electrode pairs BE on the first surface 510a and the second surface 510b of the substrate 510, respectively, as follows: Figure 5B and 5C As shown. In this embodiment, the first surface 510a is the front side of the substrate 510, and the second surface 510b is the back side of the substrate 510. The front side of each resistor region 512 includes a first electrode pair FE, and each first electrode pair FE includes two electrodes FE1 and FE2. The back side of each resistor region 512 includes a second electrode pair BE, and each second electrode pair BE includes two electrodes BE1 and BE2.

[0057] Then, step 440 is performed to form a first resistive layer 520 on the first surface 510a of the substrate 510 using a screen printing process, such as... Figure 5D As shown. In this embodiment, the screen printing process in step 430 is performed using a fully open screen to form a first resistive layer 520 on the first surface 510a of the substrate 510. The first resistive layer 520 includes a plurality of sub-resistive layers 522, which are formed correspondingly on resistor rows RC. For example, in this embodiment, the sub-resistive layers 522 are formed corresponding to resistor rows RC and span multiple resistor columns RR. However, embodiments of the present invention are not limited thereto.

[0058] In some embodiments of the present invention, the order of steps 410-430 can be changed according to user requirements. For example, the first resistive layer 520 can be formed first, followed by the formation of the first electrode pair FE.

[0059] Next, steps 450 and 460 are performed to cut the first resistive layer 520 according to the resistor region 512 to form the second resistive layer 522a, and to trim the resistance of the second resistive layer 522a. In step 430, each sub-resistive layer 522 of the first resistive layer 520 is cut into a plurality of second resistive layers 522a, such as... Figure 5EAs shown. For example, each sub-resistor layer 522 is cut into a plurality of second resistor layers 522a according to multiple resistor columns RR, such that each resistor region 512 contains one second resistor layer 522a. In this embodiment, since the resistor region 512 has an area of ​​less than 0.4*0.2 square millimeters, the area of ​​the second resistor layer 522a in each resistor region 512 is less than 0.4*0.2 square millimeters. In step 440, the pattern of the second resistor layer 522a in each resistor region 512 is adjusted according to a preset resistance value so that the pattern of the second resistor layer 522a corresponds to the preset resistance value, such as... Figure 5F As shown. In this embodiment, the cutting of the first resistive layer 520 and the pattern trimming of the second resistive layer 522a are accomplished using a laser; however, the embodiments of the present invention are not limited thereto.

[0060] As can be seen from steps 410 to 460, the manufacturing method 400 of the micro resistor adopts the manufacturing method 100 of the micro resistor layer, so the manufacturing method 400 of the micro resistor can form a micro resistor pattern on each resistor region 512.

[0061] Next, steps 470 and 480 are performed to form an outer electrode layer 530 on each resistor region 512, and the resistor region 512 is cut to obtain an area of ​​0.4*0.2 square millimeters (mm²). 2 The following are multiple miniature resistors 540, such as Figure 5G As shown. In Figure 5G In this configuration, the outer electrode layer 530 covers both ends of the micro resistor 540 and is electrically connected to the first electrode pair FE, the second electrode pair BE, and the second resistive layer 522a. For example, the outer electrode layer 530 includes a side electrode layer that extends along the sidewalls of both ends of the micro resistor 540 to the back of the micro resistor, so that the first electrode pair FE and the second electrode pair BE are electrically connected.

[0062] In some embodiments, step 470 involves cutting the substrate 510 into a plurality of elongated substrates according to the resistor row RC, and then forming an outer electrode layer 530 on the elongated substrates. Then, step 480 involves cutting the elongated substrates according to the resistor column RR to obtain a micro resistor 540.

[0063] In some embodiments, step 470 does not cut the substrate 510, but instead forms an outer electrode layer 530 in each resistor region 512. Then, step 480 cuts the elongated substrate according to the resistor column RR to obtain the micro resistor 540.

[0064] As can be seen from the above description, the micro resistor manufacturing method 400 of the present invention adopts the micro resistor layer manufacturing method 100. Thus, the micro resistor pattern of the micro resistor 540 manufactured by the micro resistor manufacturing method 400 will have fewer defects, and the manufacturing cost and time of the micro resistor 540 can be greatly reduced.

[0065] In some embodiments of the present invention, the method 100 for manufacturing a micro-resistor layer / resistor may employ a sputtering process instead of a screen printing process to form the resistive layer. This results in a resistive layer / resistor with a lower resistance value (<1Ω).

[0066] Please refer to Figure 6 This is a schematic flowchart illustrating a method 600 for manufacturing a micro-resistive layer according to an embodiment of the present invention. The method 600 for manufacturing a micro-resistive layer is suitable for manufacturing layers with an area of ​​0.4 x 0.2 square millimeters (mm²). 2 The following are micro-resistive layers. In the manufacturing method 600 of the micro-resistive layer, step 610 is first performed to provide a substrate 710, such as... Figure 7A As shown. The substrate 710 may be formed of an insulating material, such as glass fiber, aluminum nitride, silicon-based material, or ceramic material, but embodiments of the present invention are not limited thereto. The substrate 710 defines a plurality of product regions 712, which are defined by a plurality of virtual cut lines CL. The product regions 712 are predefined to form products containing resistive layers, such as resistors or other various components containing resistive layers. In this embodiment, the product regions 712 have a substantial area of ​​0.4 * 0.2 square millimeters (mm). 2 The product area 712 is an area of ​​approximately 0.3 x 0.15 square millimeters (mm²) and arranged in a matrix, having a plurality of product rows PC and a plurality of product columns PR. In some embodiments, the product area 712 has a substantial area of ​​0.3 x 0.15 square millimeters (mm²). 2 The area of ​​).

[0067] Then, step 620 is performed to form a first resistive layer 720 on the substrate 710 using a sputtering process, such as... Figure 7B As shown. In this embodiment, a sputtering process forms and covers the entire surface of the substrate 710 with a first resistive layer 720.

[0068] Next, steps 630 and 640 are performed to cut the first resistive layer 720 according to the product area 712 to provide the second resistive layer 722a, and to trim the resistance of the second resistive layer 722a. In step 630, the first resistive layer 220 is cut into a plurality of strip resistive layers 722 along the length direction of the product area 712, such as... Figure 7CAs shown. Each sub-resistive layer 722 spans multiple product rows PC, therefore each sub-resistive layer 722 can be defined with a plurality of second resistive layers 722a according to the multiple product rows PC, such that each product region 712 contains one second resistive layer 722a. In this embodiment, since the product region 712 has an area of ​​less than 0.4*0.2 square millimeters, the area of ​​the second resistive layer 722a in each product region 712 is less than 0.4*0.2 square millimeters. In step 640, the pattern of the second resistive layer 722a in each product region 712 is trimmed according to a preset resistance value (e.g., cutting out a long strip opening OP) so that the pattern of the second resistive layer 722a corresponds to the preset resistance value, such as... Figure 7D As shown. In this embodiment, the cutting of the first resistive layer 720 and the pattern trimming of the second resistive layer 722a are accomplished using a laser; however, the embodiments of the present invention are not limited thereto.

[0069] Please refer to Figure 8 This is a schematic flowchart illustrating a method 800 for manufacturing a microresistor according to an embodiment of the present invention. The method 800 for manufacturing a microresistor utilizes the aforementioned method 600 for manufacturing a microresistive layer to manufacture a microresistor, such as a 01005 type microresistor, a 0075 type microresistor, or a smaller microresistor. In the method 800 for manufacturing a microresistor, step 810 is first performed to provide a substrate 910, such as... Figure 9A As shown. The substrate 910 may be formed of an insulating material, such as glass fiber, aluminum nitride, silicon-based material, or ceramic material, but embodiments of the present invention are not limited thereto. The substrate 910 defines a plurality of resistor regions 912, which are defined by a plurality of virtual cut lines CL. The resistor regions 912 are predefined to form miniature resistors. In this embodiment, the resistor regions 912 have a substantial size of 0.4 * 0.2 square millimeters (mm). 2 The resistor region 912 has an area of ​​approximately 0.3 x 0.15 square millimeters (mm²) and is arranged in a matrix, having a plurality of resistor rows RC and a plurality of resistor columns RR. In some embodiments, the resistor region 912 has a substantial area of ​​0.3 x 0.15 square millimeters (mm²). 2 The area of ​​).

[0070] Then, step 820 is performed to form a first resistive layer 920 on the substrate 910 using a sputtering process, such as... Figure 9B As shown. In this embodiment, the sputtering process forms and covers the entire surface of the substrate 910 (e.g., the front side of the substrate 910) with a first resistive layer 920.

[0071] Next, steps 830 and 840 are performed to cut the first resistive layer 920 according to the resistor region 912 to form the second resistive layer 922a, and to modify the resistance of the second resistive layer 922a. In step 830, the first resistive layer 920 is cut into a plurality of sub-resistive layers 922 along the length direction of the resistor region 912, such as... Figure 9C As shown. Each sub-resistor layer 922 spans multiple resistor rows RC, therefore each sub-resistor layer 922 can be defined with a plurality of second resistor layers 922a according to the multiple resistor rows RC, such that each product region 912 contains one second resistor layer 922a. In this embodiment, since the product region 912 has an area of ​​less than 0.4*0.2 square millimeters, the area of ​​the second resistor layer 922a in each product region 912 is less than 0.4*0.2 square millimeters. In step 840, the pattern of the second resistor layer 922a in each product region 912 is modified according to a preset resistance value (e.g., by cutting out a long strip opening OP) so that the pattern of the second resistor layer 922a corresponds to the preset resistance value, such as... Figure 9D As shown. In this embodiment, the cutting of the first resistive layer 920 and the pattern trimming of the second resistive layer 922a are accomplished using a laser; however, the embodiments of the present invention are not limited thereto.

[0072] Then, steps 850 and 860 are performed to form a plurality of first electrode pairs FE and second electrode pairs BE on the front and back sides of the substrate 910, respectively, as follows: Figure 9E and 9F As shown. In this embodiment, the first electrode pair FE includes two electrodes FE1 and FE2, which are formed on the second resistive layer 922a on the front side of the substrate 910 and cover the opposite ends of the second resistive layer 922a, as shown. Figure 9E As shown. The second electrode pair BE comprises two electrodes BE1 and BE2, which are formed on the back side of the substrate 910 corresponding to two electrodes FE1 and FE2, as shown. Figure 9F As shown.

[0073] Next, steps 870 and 880 are performed to form an outer electrode layer 930 on each resistor region 912, and the resistor region 912 is cut to obtain an area of ​​0.4*0.2 square millimeters (mm²). 2 The following are multiple miniature resistors 940, such as Figure 9G As shown. In Figure 9G In this embodiment, the outer electrode layer 930 covers both ends of the micro resistor 940 and is electrically connected to the first electrode pair FE, the second electrode pair BE, and the second resistive layer 922a. For example, the outer electrode layer 930 includes a side electrode layer that extends along the sidewalls of both ends of the micro resistor 940 to the back of the micro resistor, so that the first electrode pair FE and the second electrode pair BE are electrically connected.

[0074] In some embodiments, step 870 involves cutting the substrate 910 into a plurality of elongated substrates according to the resistor row RC, and then forming an outer electrode layer 930 on the elongated substrates. Then, step 880 involves cutting the elongated substrates according to the resistor column RR to obtain a micro resistor 940.

[0075] In some embodiments, step 870 does not cut the substrate 910, but instead forms an outer electrode layer 930 in each resistor region 912. Then, step 880 cuts the elongated substrate according to the resistor column RR to obtain a miniature resistor 940.

[0076] Although the present invention has been disclosed above with reference to embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the claims.

[0077] [Symbol Explanation]

[0078] 100: Fabrication method of micro-resistive layer

[0079] 110~140: Steps

[0080] 210: Substrate

[0081] 212: Product Area

[0082] 220: First resistive layer

[0083] 222: Sub-resistor layer

[0084] 222a: Second resistive layer

[0085] 310: Fully Open Screen Version

[0086] 312: Opening

[0087] 320: Fully Open Screen Version

[0088] 322: Opening

[0089] 400: Manufacturing Methods of Miniature Resistors

[0090] 410~480: Steps

[0091] 510: Substrate

[0092] 510a: First surface

[0093] 510b: Second surface

[0094] 520: First resistive layer

[0095] 522: Sub-resistor layer

[0096] 522a: Second resistive layer

[0097] 530: External electrode layer

[0098] 540: Miniature Resistor

[0099] 600: Fabrication method of micro-resistive layer

[0100] 610~640: Steps

[0101] 710: Substrate

[0102] 712: Product Area

[0103] 720: First resistive layer

[0104] 722: Sub-resistor layer

[0105] 722a: Second resistive layer

[0106] 800: Manufacturing Method of Miniature Resistors

[0107] 810~880: Steps

[0108] 910: Substrate

[0109] 920: First resistive layer

[0110] 922: Sub-resistor layer

[0111] 922a: Second resistive layer

[0112] 930: External electrode layer

[0113] 940: Miniature Resistor

[0114] CL: Cutting line

[0115] OP: Open

[0116] PR: Product List

[0117] PC: Product Line

[0118] RC: Resistor

[0119] RR: Resistor Series

[0120] FE: First electrode pair

[0121] FE1: Electrode

[0122] FE2: Electrode

[0123] BE: Second electrode pair

[0124] BE1: Electrode

[0125] BE2: Electrode.

Claims

1. A method for manufacturing a micro-resistive layer, characterized in that... Include: A substrate is provided, wherein the substrate is defined with a plurality of product areas, each of which has an area of ​​0.4 x 0.2 square millimeters (mm²). 2 )the following; A first resistive layer is formed on the substrate using a screen printing process or a sputtering process, wherein the first resistive layer covers the product areas; The first resistive layer is cut into a plurality of second resistive layers, wherein each of the product regions contains one of the second resistive layers, and the area of ​​each of the second resistive layers is less than 0.4 * 0.2 square millimeters (mm). 2 );as well as The pattern of each of the second resistive layers is adjusted according to a preset resistance value so that the pattern of each of the second resistive layers corresponds to the preset resistance value; The step of cutting the first resistive layer into a plurality of second resistive layers is performed using a laser.

2. The method for manufacturing a micro-resistive layer according to claim 1, characterized in that... This screen printing process uses a fully open screen.

3. A method for manufacturing a miniature resistor, characterized in that... Include: A substrate is provided, wherein the substrate has opposing first and second surfaces, and the substrate is defined with a plurality of resistor regions, each of the resistor regions having an area of ​​0.4 x 0.2 square millimeters (mm²). 2 )the following; A plurality of first internal electrode pairs are formed on the first surface of the substrate, wherein each of the resistor regions includes one of the first internal electrode pairs; A plurality of second internal electrode pairs are formed on the second surface of the substrate, wherein each of the resistor regions includes one of the second internal electrode pairs; A first resistive layer is formed on the first surface of the substrate using a screen printing process or a sputtering process to cover the resistor areas; The first resistive layer is cut into a plurality of second resistive layers, wherein each of the resistive regions comprises one of the second resistive layers, and the area of ​​each of the second resistive layers is less than 0.4 * 0.2 square millimeters (mm²). 2 ); The pattern of the second resistive layer in each of the resistor regions is adjusted according to a preset resistance value so that the pattern of the second resistive layer in each of the resistor regions corresponds to the preset resistance value. The substrate is cut into multiple strips based on the resistor regions; An external electrode layer is formed on each of the elongated substrates, wherein the external electrode layer includes a side electrode layer and is electrically connected to the first inner electrode pair, the second inner electrode pair, and the second resistive layer of each of the resistor regions; and Each of these strips of substrate is cut according to the resistor regions to obtain an area of ​​0.4*0.2 square millimeters (mm²). 2 The following are multiple miniature resistors; The step of cutting the first resistive layer into the second resistive layers is performed using a laser.

4. The method for manufacturing a miniature resistor according to claim 3, characterized in that... The step of modifying the pattern of the second resistive layer in each of the resistor regions according to the preset resistance value is performed using a laser.

5. The method for manufacturing a miniature resistor according to claim 3, characterized in that... This screen printing process uses a fully open screen.

6. The method for manufacturing a miniature resistor according to claim 5, characterized in that... These resistor regions are arranged in a matrix, with a plurality of resistor rows and a plurality of resistor columns.

7. The method for manufacturing a miniature resistor according to claim 6, characterized in that... The fully open mesh contains a plurality of openings, the area of ​​which is determined by the area of ​​each of the resistor rows in the matrix.

8. A method for manufacturing a miniature resistor, characterized in that... Include: A substrate is provided, wherein the substrate has opposing first and second surfaces, and the substrate is defined with a plurality of resistor regions, each of the resistor regions having an area of ​​0.4 x 0.2 square millimeters (mm²). 2 )the following; A plurality of first internal electrode pairs are formed on the first surface of the substrate, wherein each of the resistor regions includes one of the first internal electrode pairs; A plurality of second internal electrode pairs are formed on the second surface of the substrate, wherein each of the resistor regions includes one of the second internal electrode pairs; A first resistive layer is formed on the first surface of the substrate using a screen printing process or a sputtering process to cover the resistor areas; The first resistive layer is cut into a plurality of second resistive layers, wherein each of the resistive regions comprises one of the second resistive layers, and the area of ​​each of the second resistive layers is less than 0.4 * 0.2 square millimeters (mm²). 2 ); The pattern of the second resistive layer in each of the resistor regions is adjusted according to a preset resistance value so that the pattern of the second resistive layer in each of the resistor regions corresponds to the preset resistance value. An external electrode forming step is performed to form an external electrode layer in each of the resistor regions, wherein the external electrode layer includes a side electrode layer and is electrically connected to the first inner electrode pair, the second inner electrode pair, and the second resistive layer in each of the resistor regions; and The substrate is cut according to the resistor regions to obtain an area of ​​0.4 x 0.2 square millimeters (mm²). 2 The following are multiple miniature resistors; The step of cutting the first resistive layer into the second resistive layers is performed using a laser.

9. The method for manufacturing a miniature resistor according to claim 8, characterized in that... The step of modifying the pattern of the second resistive layer in each of the resistor regions according to the preset resistance value is performed using a laser.

10. The method for manufacturing a miniature resistor according to claim 8, characterized in that... These resistor regions are arranged in a matrix, with a plurality of resistor rows and a plurality of resistor columns.

11. The method for manufacturing a miniature resistor according to claim 8, characterized in that... This screen printing process uses a fully open screen.

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