Analog-digital compatible acquisition circuit and calibration system for single-line communication signals

Abstract

The application provides an analog-digital compatible acquisition circuit of single-wire communication signals and a calibration system, the analog-digital compatible acquisition circuit comprises a combination control module, a signal acquisition communication module, a signal following output module, a first gating output module and a second gating output module, the signal acquisition communication module is used for controlling the acquisition on-off of the single-wire communication signals, the signal following output module and the first gating output module are used for acquiring the analog signals in the single-wire communication signals, and the second gating output module is used for acquiring the digital signals in the single-wire communication signals, so that the compatibility of analog acquisition and digital acquisition of the single-wire communication signals can be realized, the signal acquisition cost of the analog voltage output type sensor is reduced, and the signal acquisition efficiency of the analog voltage output type sensor is improved; the principle structure of the analog-digital compatible acquisition circuit is simple, the specification requirement of components is not high, the circuit function can be realized by using ordinary chips, the circuit cost is low, and the usability is high.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of signal acquisition, in particular to an analog-digital compatible acquisition circuit of one-wire communication signals and a calibration and demarcation system. BACKGROUND

[0002] Traditional automobile-level sensors are mostly analog voltage output types, and in production, most of them choose to use one-wire communication (OWI) to calibrate and demarcate sensors. However, since the circuit cannot synchronously detect the analog output voltage signal on the OWI line when communicating, most enterprises need to build two separate systems (OWI communication system and analog voltage output detection system) for the calibration and compensation system of the analog voltage output type sensor. In this way, the analog voltage output type sensor needs to frequently switch systems in production, and the efficiency of signal acquisition and output demarcation is low, which greatly increases the off-line cycle of the sensor.

[0003] Therefore, there is an urgent need for a signal acquisition technical solution that can simultaneously acquire analog signals and digital signals in one-wire communication signals emitted by analog voltage output type sensors. SUMMARY

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide an analog-digital compatible acquisition technical solution of one-wire communication signals, which can acquire both analog signals and digital signals in one-wire communication signals emitted by analog voltage output type sensors through one acquisition circuit, realize the compatibility of analog acquisition and digital acquisition of one-wire communication signals, reduce the calibration and demarcation cost of analog voltage output type sensors, improve the signal acquisition efficiency and output demarcation efficiency, and save the off-line cycle of products.

[0005] To achieve the above-mentioned purposes and other related purposes, the technical solution provided by the present application is as follows.

[0006] An analog-digital compatible acquisition circuit of one-wire communication signals, comprising:

[0007] a control module;

[0008] a signal acquisition communication module, which receives N one-wire communication signals emitted by an analog voltage output type sensor and a communication control signal emitted by the control module, and outputs N one-wire communication signals to the rear stage under the control of the communication control signal;

[0009] a signal following output module, which receives N one-wire communication signals output by the signal acquisition communication module and respectively performs following output on N one-wire communication signals to obtain corresponding N one-wire analog signals.

[0010] a first gating output module, receiving the N single-line analog signals output by the signal following output module, and receiving a first selection signal and a first enable signal sent by the control module, under the control of the first selection signal and the first enable signal, selecting one of the N single-line analog signals as an analog signal to output to the next stage;

[0011] a second gating output module, receiving the N single-line communication signals output by the signal acquisition communication module, and receiving a second selection signal and a second enable signal sent by the control module, under the control of the second selection signal and the second enable signal, selecting one of the N single-line communication signals as a first digital signal to output to the next stage;

[0012] wherein N is an integer greater than or equal to 2.

[0013] Optionally, the control module comprises at least a single-chip microcomputer and a digital signal processor.

[0014] Optionally, the signal acquisition communication module comprises a single-line communication chip and a single-line communication power control unit, N single-line communication interfaces of the single-line communication chip are connected with a plurality of the analog voltage output type sensors, the N single-line communication interfaces of the single-line communication chip are also connected with the signal following output module and the second gating output module respectively, the single-line communication interfaces of the single-line communication chip are used for single-line bidirectional communication; a power supply end of the single-line communication chip is connected with an analog working power supply, a ground end of the single-line communication chip is connected with an output end of the single-line communication power control unit, and an input end of the single-line communication power control unit is connected with the communication control signal.

[0015] Optionally, the single-line communication power control unit comprises an NMOS transistor, a first resistor, a second resistor and a third resistor, a drain of the NMOS transistor is connected with the analog working power supply through the series-connected first resistor, a gate of the NMOS transistor is connected with the communication control signal through the series-connected second resistor, a source of the NMOS transistor is grounded, and the source of the NMOS transistor is also connected with the communication control signal through the series-connected third resistor.

[0016] Optionally, N is 8, the signal following output module comprises two signal following output units, one of the signal following output units respectively follows and outputs 4 single-line communication signals to obtain 4 single-line analog signals, and the other of the signal following output units respectively follows and outputs another 4 single-line communication signals to obtain another 4 single-line analog signals.

[0017] Optionally, the signal following output unit comprises a four-channel operational amplifier chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fourth resistor, a fifth resistor, a sixth resistor and a seventh resistor; a positive power supply end of the four-channel operational amplifier chip is connected with a digital working power supply, and a negative power supply end of the four-channel operational amplifier chip is connected with the ground; a first channel non-inverting input end of the four-channel operational amplifier chip is connected with a first single-wire communication signal, a first channel inverting input end of the four-channel operational amplifier chip is connected with the first channel output end of the four-channel operational amplifier chip through the fourth resistor in series connection, one end of the first capacitor is connected with the first channel output end of the four-channel operational amplifier chip, and the other end of the first capacitor is connected with the ground, and the first channel output end of the four-channel operational amplifier chip outputs a first single-wire analog signal; a second channel non-inverting input end of the four-channel operational amplifier chip is connected with a second single-wire communication signal, a second channel inverting input end of the four-channel operational amplifier chip is connected with the second channel output end of the four-channel operational amplifier chip through the fifth resistor in series connection, one end of the second capacitor is connected with the second channel output end of the four-channel operational amplifier chip, and the other end of the second capacitor is connected with the ground, and the second channel output end of the four-channel operational amplifier chip outputs a second single-wire analog signal; a third channel non-inverting input end of the four-channel operational amplifier chip is connected with a third single-wire communication signal, a third channel inverting input end of the four-channel operational amplifier chip is connected with the third channel output end of the four-channel operational amplifier chip through the sixth resistor in series connection, one end of the third capacitor is connected with the third channel output end of the four-channel operational amplifier chip, and the other end of the third capacitor is connected with the ground, and the third channel output end of the four-channel operational amplifier chip outputs a third single-wire analog signal; and a fourth channel non-inverting input end of the four-channel operational amplifier chip is connected with a fourth single-wire communication signal, a fourth channel inverting input end of the four-channel operational amplifier chip is connected with the fourth channel output end of the four-channel operational amplifier chip through the seventh resistor in series connection, one end of the fourth capacitor is connected with the fourth channel output end of the four-channel operational amplifier chip, and the other end of the fourth capacitor is connected with the ground, and the fourth channel output end of the four-channel operational amplifier chip outputs a fourth single-wire analog signal.

[0018] Optionally, the first gating output module comprises a first 8-to-1 switch chip, a fifth capacitor, a sixth capacitor, an eighth resistor and a ninth resistor, a positive power supply end of the first 8-to-1 switch chip is connected to the digital working power supply, a negative power supply end and a ground end of the first 8-to-1 switch chip are respectively grounded, an inhibit input end of the first 8-to-1 switch chip is connected to the first enable signal, three address selection ends of the first 8-to-1 switch chip are respectively connected to three first selection signals in one-to-one correspondence, eight input ends of the first 8-to-1 switch chip are respectively connected to eight single-wire analog signals in one-to-one correspondence, an output end of the first 8-to-1 switch chip is grounded through the eighth resistor and the ninth resistor connected in series, and a common end of the eighth resistor and the ninth resistor outputs the analog signal to a next stage, one end of the fifth capacitor is connected to the positive power supply end of the first 8-to-1 switch chip, and the other end of the fifth capacitor is grounded, and the sixth capacitor is connected to the ninth resistor in parallel.

[0019] Optionally, the second gating output module comprises a second 8-to-1 switch chip and a seventh capacitor, a positive power supply end of the second 8-to-1 switch chip is connected to the digital working power supply, a negative power supply end and a ground end of the second 8-to-1 switch chip are respectively grounded, an inhibit input end of the second 8-to-1 switch chip is connected to the second enable signal, three address selection ends of the second 8-to-1 switch chip are respectively connected to three second selection signals in one-to-one correspondence, eight input ends of the second 8-to-1 switch chip are respectively connected to eight single-wire communication signals in one-to-one correspondence, and an output end of the second 8-to-1 switch chip outputs the first digital signal to a next stage, one end of the seventh capacitor is connected to the positive power supply end of the second 8-to-1 switch chip, and the other end of the seventh capacitor is grounded.

[0020] Optionally, the analog-digital compatible acquisition circuit of the single-wire communication signal further comprises an analog-digital conversion module, the analog-digital conversion module is connected to the first gating output module and the control module, the analog-digital conversion module receives the analog signal and performs analog-digital conversion processing on the analog signal to obtain a second digital signal and output the second digital signal to the control module.

[0021] A calibration system comprises the analog-digital compatible acquisition circuit of the single-wire communication signal according to any one of the above, and the analog-digital compatible acquisition circuit of the single-wire communication signal is connected to a plurality of analog voltage output type sensors to be calibrated to acquire analog signals and digital signals in the single-wire communication signals emitted by the analog voltage output type sensors.

[0022] As described above, the analog-digital compatible acquisition circuit of the single-wire communication signal and the calibration system provided by the present application have at least the following beneficial effects:

[0023] The analog-digital compatible acquisition circuit of single-wire communication signal is designed in combination with the control module, the signal acquisition communication module, the signal following output module, the first gating output module and the second gating output module. The acquisition on-off of the single-wire communication signal is controlled through the signal acquisition communication module. The analog signal in the single-wire communication signal is acquired through the signal following output module and the first gating output module. The digital signal in the single-wire communication signal is acquired through the second gating output module. The analog signal in the single-wire communication signal emitted by the analog voltage output type sensor and the digital signal in the single-wire communication signal emitted by the analog voltage output type sensor can be acquired. The compatibility of analog acquisition and digital acquisition of the single-wire communication signal is realized. Two sets of acquisition systems are not needed to separately perform analog acquisition and digital acquisition of the single-wire communication signal. The principle structure of the analog-digital compatible acquisition circuit is simple. The analog-digital compatible acquisition circuit can be realized based on ordinary electronic components and chips. The signal acquisition cost of the analog voltage output type sensor is reduced. The signal acquisition efficiency of the analog voltage output type sensor is improved. When the analog-digital compatible acquisition circuit is applied to the calibration and standardization system of the analog voltage output type sensor, the calibration and standardization cost of the analog voltage output type sensor is reduced. The output standardization efficiency of the analog voltage output type sensor is improved. The offline cycle of the product is saved. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 A structural block diagram of the analog-digital compatible acquisition circuit of single-wire communication signal in the application is shown.

[0025] Figure 2 A circuit diagram of the signal acquisition communication module in an optional embodiment of the application is shown.

[0026] Figure 3 A circuit diagram of the first signal following output unit in the signal following output module in an optional embodiment of the application is shown.

[0027] Figure 4 A circuit diagram of the second signal following output unit in the signal following output module in an optional embodiment of the application is shown.

[0028] Figure 5 A circuit diagram of the first gating output module in an optional embodiment of the application is shown.

[0029] Figure 6 A circuit diagram of the second gating output module in an optional embodiment of the application is shown. DETAILED DESCRIPTION

[0030] Following, the advantages and effects of the present application can be easily understood by those skilled in the art from the contents disclosed in the present specification. The present application can also be implemented or applied by other different specific embodiments, and the details in the present specification can be modified or changed based on different views and applications without departing from the spirit of the present application.

[0031] Please refer to Figures 1-6 It is to be noted that the diagrams provided in the present embodiment only schematically illustrate the basic concept of the present application, and thus only the components related to the present application are shown in the diagrams, rather than being drawn according to the number, shape and size of the components in actual implementation. The shape, number and proportion of the components in actual implementation can be arbitrarily changed, and the layout pattern of the components can be more complicated. The structure, proportion, size, etc. shown in the diagrams attached to the present specification are only used to understand and read the contents disclosed in the present specification by those skilled in the art, and do not define the limited conditions for implementing the present application, and thus do not have technical substantial meaning. Any modification of the structure, change of the proportional relationship or adjustment of the size, without affecting the effects and purposes that can be achieved by the present application, should still fall within the scope of the technical contents disclosed in the present application.

[0032] As described in the background section, the inventors have found that, for conventional automotive sensors, which are mostly analog voltage output type sensors, three-wire single-line communication is mostly selected for sensor calibration and calibration during production. However, since the circuit cannot synchronously detect the analog output voltage signal on the OWI line during communication, most enterprises need to build two separate systems, i.e. an OWI communication system and an analog voltage output detection system, for the calibration and compensation system of the analog voltage output type sensor. In this way, the analog voltage output type sensor needs to frequently switch systems during production, and the efficiency of signal acquisition and output calibration is low, which greatly increases the off-line period of the sensor and the calibration and calibration cost.

[0033] Based on this, the application provides a technical scheme of analog-digital compatible collection of single-wire communication signals: an analog-digital compatible collection circuit of single-wire communication signals is designed by combining a control module, a signal collection communication module, a signal following output module, a first gating output module and a second gating output module, the collection of single-wire communication signals is controlled by the signal collection communication module, the analog signals in the single-wire communication signals are collected by the signal following output module and the first gating output module, and the digital signals in the single-wire communication signals are collected by the second gating output module, so as to realize the compatibility of analog collection and digital collection of single-wire communication signals, reduce the signal collection cost of the analog voltage output type sensor, and improve the signal collection efficiency of the analog voltage output type sensor; the analog-digital compatible collection circuit is applied to a calibration and standardization system of the analog voltage output type sensor, so as to reduce the calibration and standardization cost of the analog voltage output type sensor, improve the output standardization efficiency of the analog voltage output type sensor, and save the offline period of the analog voltage output type sensor.

[0034] As shown in Figure 1 The application provides an analog-digital compatible collection circuit of single-wire communication signals, which at least comprises:

[0035] a control module;

[0036] a signal collection communication module, which receives N single-wire communication signals OWI_1-OWI_N sent by an analog voltage output type sensor and a communication control signal Vc1 sent by the control module, and outputs the N single-wire communication signals OWI_1-OWI_N to the next stage under the control of the communication control signal Vc1;

[0037] a signal following output module, which receives the N single-wire communication signals OWI_1-OWI_N output by the signal collection communication module, and respectively performs following output on the N single-wire communication signals OWI_1-OWI_N to obtain corresponding N single-wire analog signals IC_OWI1-IC_OWIN;

[0038] a first gating output module, which receives the N single-wire analog signals IC_OWI1-IC_OWIN output by the signal following output module, and also receives first selection signals D0-Dn-1 and a first enable signal EN1 sent by the control module, and selects one of the N single-wire analog signals IC_OWI1-IC_OWIN as an analog signal A to output to the next stage under the control of the first selection signals D0-Dn-1 and the first enable signal E1;

[0039] The second gating output module receives the N single-wire communication signals OWI_1-OWI_N output by the signal acquisition communication module, and also receives the second selection signals Dn-D2n-1 and the second enable signal EN2 sent by the control module, and selects one of the N single-wire communication signals OWI_1-OWI_N as the first digital signal D01 to output to the next stage under the control of the second selection signals Dn-D2n-1 and the second enable signal EN2.

[0040] Wherein, N is an integer greater than or equal to 2.

[0041] In detail, the control module at least includes one of a variety of processors such as a single-chip microcomputer (MCU) and a digital signal processor (DSP), which can be flexibly selected according to design requirements, and is not limited herein; it sends the communication control signal Vc1, the first selection signals D0-Dn-1, the first enable signal EN1, the second selection signals Dn-D2n-1 and the second enable signal EN2, and receives the first digital signal D01 output by the second gating output module and the second digital signal D02 converted from the analog signal A by the subsequent analog-digital conversion module; N=2 n , n is an integer greater than or equal to 1.

[0042] In detail, in an optional embodiment of the present application, as shown in Figure 2 , N is 8, n is 3, the signal acquisition communication module includes a single-wire communication chip U2 and a single-wire communication power control unit, the 8 single-wire communication interfaces of the single-wire communication chip U2 are connected with a plurality of analog voltage output type sensors, the 8 single-wire communication interfaces of the single-wire communication chip U2 are also connected with the signal following output module and the second gating output module respectively, the single-wire communication interfaces of the single-wire communication chip U2 are used for single-wire bidirectional communication and bidirectional transmission of the single-wire communication signals OWI_1-OW_8; the power supply end of the single-wire communication chip U2 is connected with the analog working power supply AVDD, the ground end of the single-wire communication chip U2 is connected with the output end of the single-wire communication power control unit, and the input end of the single-wire communication power control unit is connected with the communication control signal Vc1 output by the control module U1.

[0043] More specifically, as shown in Figure 2 , the single-wire communication power control unit includes an NMOS transistor N1, a first resistor R1, a second resistor R2 and a third resistor R3, the drain of the NMOS transistor N1 is connected with the analog working power supply AVDD through the series-connected first resistor R1, the gate of the NMOS transistor N1 is connected with the communication control signal Vc1 through the series-connected second resistor R2, the source of the NMOS transistor N1 is connected with the ground GND, and the source of the NMOS transistor N1 is also connected with the communication control signal Vc1 through the series-connected third resistor R3.

[0044] In detail, in an optional embodiment of the present application, as shown in Figures 3-4As shown, the signal following output module includes two signal following output units, one signal following output unit respectively carries out following output on the 4 single line communication signals OWI_1~OWI_4, and 4 single line analog signals IC_OWI1~IC_OWI4 are obtained, and the other signal following output unit respectively carries out following output on the other 4 single line communication signals OWI_5~OWI_8, and the other 4 single line analog signals IC_OWI5~IC_OWI8 are obtained.

[0045] In more detail, as Figure 3As shown, the first signal following output unit includes four-channel operational amplifier chip U3, first capacitor C1, second capacitor C2, third capacitor C3, fourth capacitor C4, fourth resistor R4, fifth resistor R5, sixth resistor R6 and seventh resistor R7; the positive power supply end +Vs of the four-channel operational amplifier chip U3 is connected with the digital working power supply DVDD, and the negative power supply end -Vs of the four-channel operational amplifier chip U3 is connected with the ground GND; the first-channel in-phase input end +INA of the four-channel operational amplifier chip U3 is connected with the first one-wire communication signal OWI_1, and the first-channel inverse input end -INA of the four-channel operational amplifier chip U3 is connected with the first-channel output end OUTA of the four-channel operational amplifier chip U3 after passing through the fourth resistor R4 in series connection; one end of the first capacitor C1 is connected with the first-channel output end OUTA of the four-channel operational amplifier chip U3, and the other end of the first capacitor C1 is connected with the ground GND, and the first-channel output end OUTA of the four-channel operational amplifier chip U3 outputs the first one-wire analog signal IC_OWI1; the second-channel in-phase input end +INB of the four-channel operational amplifier chip U3 is connected with the second one-wire communication signal OWI_2, and the second-channel inverse input end -INB of the four-channel operational amplifier chip U3 is connected with the second-channel output end OUTB of the four-channel operational amplifier chip U3 after passing through the fifth resistor R5 in series connection; one end of the second capacitor C2 is connected with the second-channel output end OUTB of the four-channel operational amplifier chip U3, and the other end of the second capacitor C2 is connected with the ground GND, and the second-channel output end OUTB of the four-channel operational amplifier chip U3 outputs the second one-wire analog signal IC_OWI2; the third-channel in-phase input end +INC of the four-channel operational amplifier chip U3 is connected with the third one-wire communication signal OWI_3, and the third-channel inverse input end -INC of the four-channel operational amplifier chip U3 is connected with the third-channel output end OUTC of the four-channel operational amplifier chip U3 after passing through the sixth resistor R6 in series connection; one end of the third capacitor C3 is connected with the third-channel output end OUTC of the four-channel operational amplifier chip U3, and the other end of the third capacitor C3 is connected with the ground GND, and the third-channel output end OUTC of the four-channel operational amplifier chip U3 outputs the third one-wire analog signal IC_OWI3; the fourth-channel in-phase input end +IND of the four-channel operational amplifier chip U3 is connected with the fourth one-wire communication signal OWI_4, and the fourth-channel inverse input end -IND of the four-channel operational amplifier chip U3 is connected with the fourth-channel output end OUTD of the four-channel operational amplifier chip U3 after passing through the seventh resistor R7 in series connection; one end of the fourth capacitor C4 is connected with the fourth-channel output end OUTD of the four-channel operational amplifier chip U3, and the other end of the fourth capacitor C4 is connected with the ground GND, and the fourth-channel output end OUTD of the four-channel operational amplifier chip U3 outputs the fourth one-wire analog signal IC_OWI4.

[0046] In more detail, as Figure 4As shown, the second signal following output unit comprises a four-channel operational amplifier chip U4, a first capacitor C5, a second capacitor C6, a third capacitor C7, a fourth capacitor C8, a fourth resistor R8, a fifth resistor R9, a sixth resistor R10 and a seventh resistor R11; the single-wire communication signal OWI_5 is followed and output through the first channel of the four-channel operational amplifier chip U4 to obtain a single-wire analog signal IC_OWI5; the single-wire communication signal OWI_6 is followed and output through the second channel of the four-channel operational amplifier chip U4 to obtain a single-wire analog signal IC_OWI6; the single-wire communication signal OWI_7 is followed and output through the third channel of the four-channel operational amplifier chip U4 to obtain a single-wire analog signal IC_OWI7; and the single-wire communication signal OWI_8 is followed and output through the fourth channel of the four-channel operational amplifier chip U4 to obtain a single-wire analog signal IC_OWI8; the specific structure of the second signal following output unit is the same as that of the second signal following output unit shown in the figure, which will not be described here again. Figure 3 The specific structure of the second signal following output unit is the same as that of the second signal following output unit shown in the figure, which will not be described here again.

[0047] In detail, in an optional embodiment of the present application, as shown in the figure, Figure 5 As shown, the first gating output module comprises a first eight-to-one switch chip U5, a fifth capacitor C9, a sixth capacitor C10, an eighth resistor R12 and a ninth resistor R13; the positive power supply end VDD of the first eight-to-one switch chip U5 is connected with a digital working power supply DVDD; the negative power supply end VEE and the ground end VSS of the first eight-to-one switch chip U5 are respectively connected with a ground GND; the inhibit input end INH of the first eight-to-one switch chip U5 is connected with a first enable signal EN1; the three address selection ends A-C of the first eight-to-one switch chip U5 are respectively connected with three first selection signals D0-D2 in one-to-one correspondence; the eight input ends CH0-CH7 of the first eight-to-one switch chip U5 are respectively connected with eight single-wire analog signals IC_OWI1-IC_OWI8 in one-to-one correspondence; the output end COM of the first eight-to-one switch chip U5 is connected with the ground GND through the eighth resistor R12 and the ninth resistor R13 connected in series; the common end of the eighth resistor R12 and the ninth resistor R13 outputs an analog signal A to the next stage; one end of the fifth capacitor C9 is connected with the positive power supply end VDD of the first eight-to-one switch chip U5; the other end of the fifth capacitor C9 is connected with the ground GND; and the sixth capacitor C10 is connected with the ninth resistor R13 in parallel.

[0048] In detail, in an optional embodiment of the present application, as shown in the figure, Figure 5As shown, the second selection output module includes a second 8-to-1 switch chip U6 and a seventh capacitor C11. The positive power supply terminal VDD of the second 8-to-1 switch chip U6 is connected to the digital operating power supply DVDD. The negative power supply terminal VEE and the ground terminal VSS of the second 8-to-1 switch chip U6 are respectively grounded to GND. The inhibit input terminal INH of the second 8-to-1 switch chip U6 is connected to the second enable signal EN2. The three address selection terminals A to B of the second 8-to-1 switch chip U6 are respectively connected to the three second selection signals D3 to D5. The eight input terminals CH0 to CH7 of the second 8-to-1 switch chip U6 are respectively connected to the eight single-wire communication signals OWI_1 to OWI_8. The output terminal COM of the second 8-to-1 switch chip U6 outputs the first digital signal D01 to the next stage. One end of the seventh capacitor C11 is connected to the positive power supply terminal VDD of the second 8-to-1 switch chip U6, and the other end of the seventh capacitor C11 is grounded to GND.

[0049] In detail, such as Figure 1 As shown, the analog-to-digital compatible acquisition circuit for single-line communication signals also includes an analog-to-digital conversion module. The analog-to-digital conversion module is connected to the first gating output module and the control module respectively. The analog-to-digital conversion module receives the analog signal A and performs analog-to-digital conversion processing on the analog signal A to obtain and output the second digital signal D02 to the control module.

[0050] More in detail, such as Figures 1-6 The working principle of the analog-digital compatible acquisition circuit for the single-wire communication signal shown is as follows:

[0051] 1) When the control module U1 needs to communicate with the analog voltage output sensor in a single line, the communication control signal Vc1 sent by the control module U1 is at a high level, the NMOS transistor N1 is turned on, the ground terminal of the single-line communication chip U2 is pulled down to ground GND by the single-line communication power control unit, the single-line communication chip U2 is powered normally, the single-line communication chip U2 is started and used for single-line bidirectional communication, receiving the single-line communication signals OWI_1~OW_8 sent by the analog voltage output sensor, and outputting the single-line communication signals OWI_1~OW_8 to the four-channel operational amplifier chips U3~U4 in the signal follower output module and the second octet switch chip U6 in the second gating output module;

[0052] 2) The four-channel operational amplifier chip U3 in the signal follower output module performs follower output on the single-line communication signals OWI_1 to OWI_4 respectively, to obtain single-line analog signals IC_OWI1 to IC_OWI4. The four-channel operational amplifier chip U4 in the signal follower output module performs follower output on the single-line communication signals OWI_5 to OWI_8 respectively, to obtain single-line analog signals IC_OWI5 to IC_OWI8. In the signal follower output module, the operational amplifier follower output circuit is used to synchronously and losslessly transmit the single-line communication signals OWI_1 to OWI_8 to the subsequent circuit to obtain the corresponding single-line analog signals IC_OWI1 to IC_OWI8.

[0053] 3) In the first strobe output module, under the control of the first selection signal D0~D2 and the first enable signal EN1 issued by the control module U1, the first octet switch chip U5 selects one of the single-wire analog signals IC_OWI1~IC_OWI8 as the analog signal A to be output to the subsequent analog-to-digital conversion module. The first octet switch chip U5 is effective when the first enable signal EN1 is low. At this time, the first selection signal D0~D2 controls the selection of one of the single-wire analog signals IC_OWI1~IC_OWI8 as the analog signal A to be output to the subsequent analog-to-digital conversion module.

[0054] 4) In the second strobe output module, under the control of the second selection signal D3~D5 and the second enable signal EN2 issued by the control module, the second octet switch chip U6 selects one of the eight single-wire communication signals OWI_1~OWI_8 as the first digital signal D01 and outputs it to the control module U1. The second octet switch chip U6 is effective when the second enable signal EN2 is low. At this time, the second selection signal D3~D5 controls the selection of one of the single-wire communication signals OWI_1~OWI_8 as the first digital signal D01 and outputs it to the control module U1.

[0055] 5) The analog-to-digital conversion module receives analog signal A and performs analog-to-digital conversion on analog signal A, and then outputs the second digital signal D02 to the control module U1;

[0056] 6) In this way, it is possible to pass through such Figures 1-6 The analog-digital compatible acquisition circuit for single-wire communication signals shown can simultaneously acquire analog and digital single-wire communication signals emitted by analog voltage output sensors. Based on the timing adjustment control of the first selection signals D0~D2, the second selection signals D3~D5, the first enable signal EN1 and the second enable signal EN2 emitted by the control module, the analog acquisition and digital acquisition of single-wire communication signals can be synchronized or asynchronous.

[0057] 7), when the control module U1 does not need to communicate with the analog voltage output sensor, the communication control signal Vc1 sent by the control module U1 is low, the NMOS tube N1 is cut off, the ground end of the single-wire communication chip U2 is pulled up to the analog working power supply AVDD by the single-wire communication power supply control unit, the single-wire communication chip U2 is powered abnormally, the single-wire communication chip U2 stops working, and is no longer used for single-wire bidirectional communication, cannot receive the single-wire communication signals OWI_1-OW_8 sent by the analog voltage output sensor, and cannot output the single-wire communication signals OWI_1-OW_8 to the four-channel operational amplifier chip U3-U4 in the signal following output module and the second eight-to-one switch chip U6 in the second gating output module, and the signal acquisition process stops.

[0058] It should be noted that N is not limited to Figures 2-6 8, n is not limited to Figures 2-6 3, N=2 n , n is an integer greater than or equal to 1, N can also be 2, 4, 16, etc., n can also be 1, 2, 4, etc., which can be flexibly selected according to design requirements, and is not limited herein; the principle structure of the single-wire communication signal analog-digital compatible acquisition circuit is simple, and the specification requirements of all components are not required to be too high, ordinary chips can realize the circuit function, the circuit cost is low, and the usability is high; the single-wire communication signal analog-digital compatible acquisition circuit can simultaneously acquire multiple single-wire communication signals, and then can realize parallel acquisition of multiple analog voltage output sensors, and the number of parallel connections depends on the maximum load PIN pin at the control module U1.

[0059] Based on the single-wire communication signal analog-digital compatible acquisition circuit, the application further provides a calibration system, which comprises the single-wire communication signal analog-digital compatible acquisition circuit, and the single-wire communication signal analog-digital compatible acquisition circuit is connected with multiple analog voltage output sensors to be calibrated to acquire analog signals and digital signals in the single-wire communication signals sent by the analog voltage output sensors; when the analog-digital compatible acquisition circuit is applied to the calibration system of the analog voltage output sensor, two sets of acquisition systems, namely an independent digital acquisition system and an analog acquisition system, are not needed, but a single acquisition circuit simultaneously realizes analog acquisition and digital acquisition of the single-wire communication signal, which can effectively reduce the signal acquisition cost and calibration cost of the analog voltage output sensor, improve the signal acquisition efficiency and output calibration efficiency of the analog voltage output sensor, and save the offline period of the analog voltage output sensor.

[0060] In summary, in the analog-digital compatible acquisition circuit of single-wire communication signal and calibration system provided by the application, the analog-digital compatible acquisition circuit of single-wire communication signal is designed in combination with the control module, the signal acquisition communication module, the signal following output module, the first gating output module and the second gating output module, the acquisition of single-wire communication signal is controlled through the signal acquisition communication module, the analog signal in the single-wire communication signal is acquired through the signal following output module and the first gating output module, and the digital signal in the single-wire communication signal is acquired through the second gating output module, so that the compatibility of analog acquisition and digital acquisition of single-wire communication signal can be realized, the signal acquisition cost of the analog voltage output type sensor is reduced, and the signal acquisition efficiency of the analog voltage output type sensor is improved; the principle structure of the analog-digital compatible acquisition circuit of single-wire communication signal is simple, the specification requirements of all components are not too high, and the circuit function can be realized by using ordinary chips, so that the circuit cost is low and the usability is high; when the analog-digital compatible acquisition circuit is applied to the calibration system of the analog voltage output type sensor, the calibration cost of the analog voltage output type sensor can be reduced, the output calibration efficiency of the analog voltage output type sensor can be improved, and the offline cycle of the analog voltage output type sensor can be saved; the analog-digital compatible acquisition circuit of single-wire communication signal can acquire multiple single-wire communication signals at the same time, so that the parallel acquisition of multiple analog voltage output type sensors can be realized, and the output calibration efficiency of the analog voltage output type sensor is further improved, and the offline cycle of the analog voltage output type sensor is saved.

[0061] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes completed by those skilled in the art without departing from the spirit and technical thought disclosed by the present application should be covered by the claims of the present application.

Claims

1. An analog-to-digital compatible acquisition circuit for single-wire communication signals, characterized in that, include: Control module; The signal acquisition and communication module receives N single-wire communication signals from the analog voltage output sensor and a communication control signal from the control module. Under the control of the communication control signal, it outputs N single-wire communication signals to the next stage. The signal follower output module receives N single-line communication signals output by the signal acquisition and communication module, and performs follower output on each of the N single-line communication signals to obtain the corresponding N single-line analog signals; The first gating output module receives N single-wire analog signals output by the signal follower output module, and also receives a first selection signal and a first enable signal issued by the control module. Under the control of the first selection signal and the first enable signal, it selects one of the N single-wire analog signals as an analog signal to be output to the next stage. The second gating output module receives N single-line communication signals output by the signal acquisition and communication module, and also receives a second selection signal and a second enable signal issued by the control module. Under the control of the second selection signal and the second enable signal, it selects one of the N single-line communication signals as a first digital signal to output to the next stage. Where N is an integer greater than or equal to 2.

2. The analog-digital compatible acquisition circuit for single-wire communication signals according to claim 1, characterized in that, The control module includes at least a microcontroller and a digital signal processor.

3. The analog-digital compatible acquisition circuit for single-wire communication signals according to claim 1, characterized in that, The signal acquisition and communication module includes a single-wire communication chip and a single-wire communication power control unit. The N single-wire communication interfaces of the single-wire communication chip are connected to multiple analog voltage output sensors. The N single-wire communication interfaces of the single-wire communication chip are also connected to the signal follower output module and the second gating output module, respectively. The single-wire communication interface of the single-wire communication chip is used for single-wire bidirectional communication. The power supply terminal of the single-wire communication chip is connected to an analog working power supply. The ground terminal of the single-wire communication chip is connected to the output terminal of the single-wire communication power control unit. The input terminal of the single-wire communication power control unit is connected to the communication control signal.

4. The analog-digital compatible acquisition circuit for single-wire communication signals according to claim 3, characterized in that, The single-wire communication power control unit includes an NMOS transistor, a first resistor, a second resistor, and a third resistor. The drain of the NMOS transistor is connected to the analog power supply after passing through the first resistor in series. The gate of the NMOS transistor is connected to the communication control signal after passing through the second resistor in series. The source of the NMOS transistor is grounded. The source of the NMOS transistor is also connected to the communication control signal after passing through the third resistor in series.

5. The analog-digital compatible acquisition circuit for single-wire communication signals according to claim 1, characterized in that, N is 8. The signal following output module includes two signal following output units. One signal following output unit performs follow output on the four single-line communication signals respectively to obtain four single-line analog signals. The other signal following output unit performs follow output on the other four single-line communication signals respectively to obtain the other four single-line analog signals.

6. The analog-digital compatible acquisition circuit for single-wire communication signals according to claim 5, characterized in that, The signal follower output unit includes a four-channel operational amplifier chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor. The positive power supply terminal of the four-channel operational amplifier chip is connected to a digital power supply, and the negative power supply terminal is grounded. The first channel non-inverting input terminal of the four-channel operational amplifier chip is connected to the first single-wire communication signal. The first channel inverting input terminal of the four-channel operational amplifier chip is connected to the first channel output terminal after passing through the fourth resistor in series. One end of the first capacitor is connected to the first channel output terminal of the four-channel operational amplifier chip, and the other end of the first capacitor is grounded. The first channel output terminal of the four-channel operational amplifier chip outputs the first single-wire analog signal. The second channel non-inverting input terminal of the four-channel operational amplifier chip is connected to the second single-wire communication signal. The second channel inverting input terminal of the four-channel operational amplifier chip is connected to the second channel output terminal after passing through the fifth resistor in series. One end of the second capacitor is connected to the first single-wire analog signal of the four-channel operational amplifier chip. The second output terminal of the four-channel operational amplifier chip outputs the second single-wire analog signal, with the other end of the second capacitor grounded. The third non-inverting input terminal of the four-channel operational amplifier chip is connected to the third single-wire communication signal. The third inverting input terminal of the four-channel operational amplifier chip is connected to the third output terminal of the four-channel operational amplifier chip after passing through the sixth resistor in series. One end of the third capacitor is connected to the third output terminal of the four-channel operational amplifier chip, and the other end of the third capacitor is grounded. The third output terminal of the four-channel operational amplifier chip outputs the third single-wire analog signal. The fourth non-inverting input terminal of the four-channel operational amplifier chip is connected to the fourth single-wire communication signal. The fourth inverting input terminal of the four-channel operational amplifier chip is connected to the fourth output terminal of the four-channel operational amplifier chip after passing through the seventh resistor in series. One end of the fourth capacitor is connected to the fourth output terminal of the four-channel operational amplifier chip, and the other end of the fourth capacitor is grounded. The fourth output terminal of the four-channel operational amplifier chip outputs the fourth single-wire analog signal.

7. The analog-digital compatible acquisition circuit for single-wire communication signals according to claim 6, characterized in that, The first selection output module includes a first 8-to-1 switch chip, a fifth capacitor, a sixth capacitor, an eighth resistor, and a ninth resistor. The positive power supply terminal of the first 8-to-1 switch chip is connected to the digital operating power supply. The negative power supply terminal and the ground terminal of the first 8-to-1 switch chip are respectively grounded. The inhibit input terminal of the first 8-to-1 switch chip is connected to the first enable signal. The three address selection terminals of the first 8-to-1 switch chip are respectively connected to the three first selection signals. The eight input terminals of the first 8-to-1 switch chip are respectively connected to the eight single-wire analog signals. The output terminal of the first 8-to-1 switch chip is grounded after passing through the eighth resistor and the ninth resistor connected in series. The common terminal of the eighth resistor and the ninth resistor outputs the analog signal to the next stage. One end of the fifth capacitor is connected to the positive power supply terminal of the first 8-to-1 switch chip, and the other end of the fifth capacitor is grounded. The sixth capacitor and the ninth resistor are connected in parallel.

8. The analog-digital compatible acquisition circuit for single-wire communication signals according to claim 6, characterized in that, The second selection output module includes a second 8-to-1 switch chip and a seventh capacitor. The positive power supply terminal of the second 8-to-1 switch chip is connected to the digital operating power supply. The negative power supply terminal and the ground terminal of the second 8-to-1 switch chip are respectively grounded. The inhibit input terminal of the second 8-to-1 switch chip is connected to the second enable signal. The three address selection terminals of the second 8-to-1 switch chip are respectively connected to the three second selection signals. The eight input terminals of the second 8-to-1 switch chip are respectively connected to the eight single-wire communication signals. The output terminal of the second 8-to-1 switch chip outputs the first digital signal to the subsequent stage. One end of the seventh capacitor is connected to the positive power supply terminal of the second 8-to-1 switch chip, and the other end of the seventh capacitor is grounded.

9. The analog-digital compatible acquisition circuit for single-wire communication signals according to claim 7, characterized in that, The analog-to-digital compatible acquisition circuit for the single-line communication signal further includes an analog-to-digital conversion module. The analog-to-digital conversion module is connected to the first gating output module and the control module respectively. The analog-to-digital conversion module receives the analog signal and performs analog-to-digital conversion on the analog signal to obtain and output a second digital signal to the control module.

10. A calibration system, characterized in that, The system includes an analog-digital compatible acquisition circuit for a single-wire communication signal as described in any one of claims 1-9, wherein the analog-digital compatible acquisition circuit for the single-wire communication signal is connected to a plurality of analog voltage output type sensors to be calibrated, so as to acquire the analog signal and digital signal in the single-wire communication signal emitted by the analog voltage output sensor.

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