A high-speed multi-level quantum phase driving circuit based on radio frequency triode

Abstract

The present invention provides a high-speed multi-level quantum phase drive circuit based on radio frequency transistors, comprising a random signal generator, a plurality of high-speed level converters respectively connected to the output ends of the random signal generator, and a plurality of radio frequency transistors and their resistor network units respectively connected to the output ends of the high-speed level converters; the random signal generator generates a random coding signal according to random coding logic, the random coding signal is transmitted to the high-speed level converter, and the high-speed level converter converts the random coding signal into a low-voltage positive emitter coupled logic level. The low-voltage positive emitter coupled logic level drives the corresponding radio frequency transistor to conduct, and the radio frequency transistor outputs a level of corresponding amplitude. At any time, only one radio frequency transistor is conducted. The advantages of the present invention are: the power amplification of the level signal is achieved by using the parallel connection of radio frequency transistors instead of a broadband power amplifier, which simplifies the design difficulty of the quantum phase drive circuit and greatly reduces the cost.

Description

Technical Field

[0001] The present invention relates to the field of quantum laser phase modulation, and in particular to a high-speed multi-level quantum phase driving circuit. Background Art

[0002] Quantum communication technology is gaining increasing attention and recognition due to its unconditional security and superiority. The non-cloning and uncertainty of quantum states make quantum key distribution (QKD) a key research area within the field. Therefore, the quality of quantum state preparation impacts the efficiency of QKD. In QKD systems, encoding and decoding are typically performed by modifying the polarization state of photons. Therefore, obtaining high-quality quantum states that meet the requirements of QKD is crucial.

[0003] In the prior art, patent document No. 201710466774.7 discloses a high-speed four-level quantum phase modulation drive system, such as Figure 7 As shown, this solution includes a random signal generator, a first voltage-controlled gain amplifier VGA1, a second voltage-controlled gain amplifier VGA2, a first voltage control circuit, a second voltage control circuit, a broadband resistor network, a power amplifier PA, a Bais-Tee circuit, and an optical phase modulator PM. The first and second voltage-controlled gain amplifiers VGA1 and VGA2 amplify the coded signal generated by the random signal generator. The gains of VGA1 and VGA2 are adjustable to adjust the voltage output to the modulator. The broadband resistor network combines the two signals for output, and the subsequent power amplifier PA amplifies them to the four-level drive signal required to drive the optical phase modulator PM. The Bais-Tee circuit enables the power supply to the broadband power amplifier while suppressing interference from RF signals. The modulator receives the RF signal and modulates the passing optical signal. It can be a phase modulator or an intensity modulator, for example.

[0004] The low-frequency side is close to DC (direct current), while the high-frequency side is several times the system frequency. To amplify the signal without distortion, the driving solution must address both low- and high-frequency requirements. In practical applications, achieving the high-frequency side is easier, while achieving the low-frequency side is more difficult. The presence of broadband coupling capacitors and Bais-Tee circuits suppresses low-frequency signals. Furthermore, the low-frequency edge of the driving circuit's bandwidth is far from DC (e.g., tens of kHz), which can cause distortion and poor signal quality after random signal amplification.

[0005] At the same time, the single device value of the broadband power amplifier is relatively high, and the power amplifier follows a strict power-on sequence and prevents no-load. Unreasonable power-on sequence and output no-load may damage the power amplifier, which requires the addition of circuits such as power-on sequence control and standing wave detection around the power amplifier.

[0006] In addition, due to reasons related to materials and manufacturing processes, the gain of the power amplifier has inherent temperature drift. The output signal amplitude drift caused by the temperature drift of the power amplifier gain at high and low temperatures can reach the order of hundreds of mV, which will directly affect the accuracy of quantum state preparation. Summary of the Invention

[0007] The technical problem to be solved by the present invention is how to improve the preparation quality of quantum states while reducing investment costs.

[0008] The present invention solves the above technical problems through the following technical means: a high-speed multi-level quantum phase driving circuit based on radio frequency transistors, the driving circuit comprising a random signal generator, a plurality of high-speed level converters respectively connected to the output ends of the random signal generator, and a plurality of radio frequency transistors and their resistor network units respectively connected to the output ends of the high-speed level converters;

[0009] The random signal generator generates a random coding signal based on random coding logic. The random coding signal is transmitted to the high-speed level converter. The high-speed level converter converts the random coding signal into a low-voltage positive emitter-coupled logic level. The low-voltage positive emitter-coupled logic level drives the corresponding radio frequency transistor to turn on. The radio frequency transistor outputs a level of corresponding amplitude. At any time, at most one radio frequency transistor is turned on.

[0010] As a further optimized technical solution, a high-speed level converter and a corresponding radio frequency transistor and a resistor network unit thereof are regarded as a basic unit, and there are n (n≥3) basic units.

[0011] As a further optimized technical solution, the 1st to n-1th radio frequency transistors and their resistance network units include a radio frequency transistor, a first resistor, a second resistor, and a third resistor, and the nth radio frequency transistor and its resistance network unit include a radio frequency transistor, a first resistor, and a second resistor;

[0012] The bases of all RF transistors are connected to the emitters of the RF transistors through the first resistor, the collectors of all RF transistors are converged to the same output node N through the second resistor, the collectors of the 1st to n-1st RF transistors are connected to the power supply VDD through the third resistor, one end of the phase modulator equivalent impedance RL is connected to the output node N, and the other end is connected to the power supply VDD, and the emitters of all RF transistors are connected to the power supply VE.

[0013] As a further optimized technical solution, the radio frequency transistor is based on SiGe technology, and the cut-off frequency ft is greater than 37 GHz.

[0014] As a further optimized technical solution, a negative temperature compensation coefficient is introduced into the power supply VDD.

[0015] As a further optimized technical solution, the negative temperature compensation coefficient is realized by a low voltage dropout linear regulator LDO containing an NTC resistor that is negatively correlated with temperature. The power supply Vin is connected to the power input terminal Vin of the low voltage dropout linear regulator LDO, and the power input terminal Vin is grounded through a capacitor Cin. The output terminal Vo of the low voltage dropout linear regulator LDO is connected to the power supply VDD, and the output terminal Vo is grounded through a capacitor Co. An impedance network composed of multiple resistors is connected between the output terminal Vo and the power supply VDD. The impedance network includes a resistor R M , resistor Ro, resistor NTC, resistor R N The resistor Ro and the resistor NTC are connected in series and then connected to the resistor R M In parallel, one end of the network is connected to the power supply VDD, and the other end is connected to the internal reference voltage terminal FB of the low voltage difference linear regulator LDO and the resistor R N Connect in series and then ground.

[0016] As a further optimized technical solution, the stable voltage provided by the low-dropout linear regulator LDO to the power supply VDD is:

[0017] V DD ={1+[R M / / (R O +R NTC )] / R N}*V FB

[0018] Among them, R M The resistor R M The resistance value, R O is the resistance value of the resistor Ro, R NTC is the resistance of the NTC resistor, R N The resistor R N The resistance value, V FB The internal reference voltage of the low-dropout linear regulator LDO is selected by selecting a suitable NTC resistor and configuring the appropriate resistor Ro, the resistor R M and the resistor R N The required negative temperature compensation coefficient is obtained by adjusting the resistance value.

[0019] As a further optimized technical solution, there are three basic units, and at any time only one path of the randomly coded signal is converted into the low-voltage positive emitter-coupled logic level through the high-speed level converter, driving any one of the three RF transistors Q1, Q2, and Q3 to turn on and output a level of corresponding amplitude. If the three RF transistors Q1, Q2, and Q3 are all cut off, the final output level amplitude is 0, and the resistance value of the resistor network of the three RF transistors Q1, Q2, and Q3 is set so that the final output amplitude ratio is 0:1:2:3 for the four quantum state levels.

[0020] As a further optimized technical solution, the method for setting the resistance value of the resistor network is as follows:

[0021] When the RF transistor Q1 is turned on, the RF transistors Q2 and Q3 are both turned off and regarded as open circuit. The RF transistor Q1 and its resistor network need to output a level with an amplitude of Vπ / 2 at node N for preparing the quantum state. According to the required level amplitude and the connection relationship of the resistor network, the first equation is listed:

[0022] V1=[V DD -V E -V CE1 (sat)]*Rx / (Rx+R6);

[0023] Where Rx is the equivalent resistance of the phase modulator equivalent impedance RL and the two series resistors R5 and R7 of the collector of the RF transistor Q2 in parallel, and the expression is: Rx = (R5 + R7) / / R L , V CE1 (sat) is the saturation conduction voltage drop of the RF transistor Q1;

[0024] When the RF transistor Q2 is turned on, the RF transistors Q1 and Q3 are both turned off and regarded as open circuit. The RF transistor Q2 and its resistor network need to output a level with an amplitude of Vπ at node N for preparing the quantum state. According to the required level amplitude and the connection relationship of the resistor network, the second equation is listed:

[0025] V2=[V DD -V E -V CE2 (sat)]*Ry / (Ry+R7);

[0026] Wherein, Ry is the equivalent resistance of the phase modulator equivalent impedance RL and the two series resistors R4 and R6 of the collector of the RF transistor Q1 in parallel, and the expression is: Ry=(R4+R6) / / R L . V CE2 (sat) is the saturation conduction voltage drop of the RF transistor Q2;

[0027] When the RF transistor Q3 is turned on, the RF transistors Q1 and Q2 are both turned off and regarded as open circuits. The RF transistor Q3 and its resistor network need to output a level with an amplitude of V3π / 2 at node N for preparing a quantum state. According to the required level amplitude and the connection relationship of the resistor network, the third equation is listed:

[0028] V3=[V DD -V E -V CE3 (sat)]*Rz / (Rz+R8);

[0029] Wherein, Rz is the equivalent resistance of the phase modulator equivalent impedance RL connected in parallel with the two series resistors R4 and R6 of the collector of the RF transistor Q1, and then connected in parallel with the two series resistors R5 and R7 of the collector of the RF transistor Q2, and the expression is: Rz=(R4+R6) / / (R5+R7) / / R L . V CE3 (sat) is the saturation conduction voltage drop of the RF transistor Q3;

[0030] The fourth equation is: V1:V2:V3=1:2:3;

[0031] The equivalent impedance R L The resistance values ​​of the resistors R4 and R5 are set to be constant between 50 and 100 ohms, and the first, second, third, and fourth equations are solved simultaneously to obtain the resistance values ​​of the resistors R6, R7, and R8.

[0032] As a further optimized technical solution, the saturation conduction voltage drop V CE1 (sat), V CE2 (sat), V CE3 (sat) equal.

[0033] The advantages of the present invention are:

[0034] 1. The present invention uses parallel connection of radio frequency transistors instead of broadband power amplifiers to achieve power amplification of level signals, eliminating the need for additional circuits such as power-on timing control and standing wave detection, thereby simplifying the design difficulty of the quantum phase drive circuit. In addition, the low price of transistors greatly reduces costs, thus offering a good cost advantage.

[0035] 2. Use RF transistors based on SiGe technology with a cut-off frequency greater than 37GHz, which better retains the high and low frequency components of the output signal and reduces the signal amplification distortion.

[0036] 3. Negative temperature compensation is introduced into the power supply of the RF triode to compensate for the temperature drift of the phase modulator at high and low temperatures, making the quality of the prepared quantum state higher and the amplitude ratio of each quantum state more accurate.

[0037] 4. The extended arbitrary-path driving circuit can produce any amplitude ratio and any number of different quantum states, and has a wider applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 An embodiment of the present invention provides a high-speed four-level quantum driving circuit based on radio frequency triodes.

[0039] Figure 2 This is an equivalent circuit diagram of the radio frequency transistor Q1 provided in an embodiment of the present invention when it is turned on.

[0040] Figure 3 This is an equivalent circuit diagram of the radio frequency transistor Q2 provided in an embodiment of the present invention when it is turned on.

[0041] Figure 4 This is an equivalent circuit diagram of the radio frequency transistor Q3 provided in an embodiment of the present invention when it is turned on.

[0042] Figure 5 A circuit for realizing a negative temperature compensation coefficient of a power supply VDD provided by an embodiment of the present invention.

[0043] Figure 6 An arbitrary multi-channel high-speed level quantum driving circuit based on radio frequency triodes provided in an embodiment of the present invention.

[0044] Figure 7 This is a schematic diagram of an existing high-speed four-level quantum phase modulation driving circuit. DETAILED DESCRIPTION

[0045] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0046] Example 1

[0047] This embodiment provides a high-speed four-level quantum driving circuit based on radio frequency triodes.

[0048] like Figure 1As shown, a high-speed four-level quantum driving circuit based on radio frequency transistors includes a random signal generator, three high-speed level converters 1, 2 and 3, three radio frequency transistors Q1, Q2, Q3 and their resistor networks.

[0049] The output end of the random signal generator is connected to the input ends of the three high-speed level converters 1, 2 and 3. The random signal generator generates three random code signals PV1, PV2 and PV3, and the three random code signals PV1, PV2 and PV3 are respectively transmitted to the three high-speed level converters 1, 2 and 3 through signal channels.

[0050] The output ends of the high-speed level converters 1, 2, and 3 are connected to the bases B of the radio frequency transistors Q1, Q2, and Q3, respectively. The power supply for the three high-speed level converters 1, 2, and 3 is VCC. The three high-speed level converters 1, 2, and 3 convert the three random code signals PV1, PV2, and PV3 into three LVPECL (Low Voltage Positive Emitter-Couple Logic) levels, respectively driving the three radio frequency transistors Q1, Q2, and Q3 and their resistor networks, to generate four levels for quantum state preparation.

[0051] The resistance network of the radio frequency transistor Q1 includes resistors R1, R4, and R6. The resistance network of the radio frequency transistor Q2 includes resistors R2, R5, and R7. The resistance network of the radio frequency transistor Q3 includes resistors R3 and R8. The bases B of the three radio frequency transistors Q1, Q2, and Q3 are connected to their respective emitters E through resistors R1, R2, and R3, respectively. The emitters E of the three radio frequency transistors Q1, Q2, and Q3 are connected to the power supply VE, respectively. The collectors C of the radio frequency transistors Q1 and Q2 are connected to the power supply VDD through resistors R4 and R5, respectively. The collectors C of the three radio frequency transistors Q1, Q2, and Q3 are then converged to the same output node N through resistors R6, R7, and R8, respectively. The output node N serves as the level output node of the entire drive circuit. Figure 1 Here, RL is the equivalent impedance of the phase modulator. One end of the equivalent impedance RL of the phase modulator is connected to the output node N, and the other end is connected to the power supply VDD.

[0052] In order to avoid signal distortion caused by using a broadband power amplifier to amplify signal power in traditional solutions, an embodiment of the present invention uses the three RF transistors Q1, Q2, Q3 and their resistance network in parallel to achieve signal amplification. The three RF transistors Q1, Q2, Q3 are based on SiGe technology, and the cutoff frequency ft is greater than 37 GHz, which can retain more spectral characteristics of the random code signal and improve the quality of subsequent quantum state preparation.

[0053] The following is a more detailed introduction to the working principles of RF transistors and resistor networks.

[0054] In this embodiment, the resistance values ​​of the resistors R1, R2, and R3 connected between the base B and the emitter E of the three RF transistors Q1, Q2, and Q3 are all set to 50 ohms, and the equivalent impedance RL of the phase modulator is 50 ohms. The emitter potential V E =(Vcc-2)v, where Vcc is the supply voltage of the power supply VCC of the high-speed level converter. This parameter setting is a standard match of the output stage of the LVPECL level, so that the three RF transistors Q1, Q2, and Q3 operate in a switching state.

[0055] Based on the random coding logic, at any time, at most only one of the random coding signals is converted into the LVPECL level by the high-speed level converter, thereby driving any one of the three RF transistors Q1, Q2, and Q3 to turn on and output a level of corresponding amplitude. If the three RF transistors Q1, Q2, and Q3 are all turned off, the final output level amplitude is 0.

[0056] In the field of quantum communication, the amplitude ratio of the four levels of the four quantum states required for the BB84 protocol is 0:1:2:3. In this embodiment, when the radio frequency transistor Q1 is turned on, it outputs a Vπ / 2 level; when the Q2 tube is turned on, it outputs a Vπ level; when the Q3 tube is turned on, it outputs a 3Vπ / 2 level; when Q1, Q2, and Q3 are all cut off, they output a V0 level. The level amplitude refers to the negative pulse of the power supply VDD. The voltage of the power supply VDD can be adjusted according to different quantum state preparation requirements to control the maximum value of the level amplitude. According to the level amplitude ratio, the resistance value of the resistor network of the three radio frequency transistors Q1, Q2, and Q3 needs to be set. The specific resistance value calculation method of the resistor network is as follows:

[0057] When the RF transistor Q1 is turned on, the RF transistors Q2 and Q3 are both turned off and can be regarded as open circuits. The RF transistor Q1 and its resistor network need to output a level with an amplitude of Vπ / 2 at node N for preparing the quantum state. The equivalent circuit diagram of the resistor network of the RF transistor Q1 is as follows: Figure 2 As shown, according to the required level amplitude and the connection relationship of the resistor network, the first equation is listed:

[0058] V 1=[V DD -V E -V CE1 (sat)]*Rx / (Rx+R6);

[0059] Wherein, Rx is the equivalent resistance of the phase modulator equivalent impedance RL and the two series resistors R5 and R7 of the collector of the RF transistor Q2 in parallel, and the expression is: Rx=(R5+R7) / / R L , “ / / ” indicates parallel connection. V CE1 (sat) is the saturation conduction voltage drop of the RF transistor Q1.

[0060] When the RF transistor Q2 is turned on, the RF transistors Q1 and Q3 are both turned off and can be regarded as open circuits. The RF transistor Q2 and its resistance network need to output a level with an amplitude of Vπ at node N for preparing a quantum state. The equivalent circuit diagram of the resistance network of the RF transistor Q2 is as follows: Figure 3 As shown, according to the required level amplitude and the connection relationship of the resistor network, the second equation is listed:

[0061] V2=[V DD -V E -V CE2 (sat)]*Ry / (Ry+R7);

[0062] Wherein, Ry is the equivalent resistance of the phase modulator equivalent impedance RL and the two series resistors R4 and R6 of the collector of the RF transistor Q1 in parallel, and the expression is: Ry=(R4+R6) / / R L . V CE2 (sat) is the saturation conduction voltage drop of the RF transistor Q2.

[0063] When the RF transistor Q3 is turned on, the RF transistors Q1 and Q2 are both turned off and can be regarded as open circuits. The RF transistor Q3 and its resistor network need to output a level with an amplitude of V3π / 2 at node N for preparing a quantum state. The equivalent circuit diagram of the resistor network of the RF transistor Q3 is as follows: Figure 4 As shown, according to the required level amplitude and the connection relationship of the resistor network, the third equation is listed:

[0064] V3=[V DD -V E -V CE3 (sat)]*Rz / (Rz+R8);

[0065] Wherein, Rz is the equivalent resistance of the phase modulator equivalent impedance RL connected in parallel with the two series resistors R4 and R6 of the collector of the RF transistor Q1, and then connected in parallel with the two series resistors R5 and R7 of the collector of the RF transistor Q2, and the expression is: Rz=(R4+R6) / / (R5+R7) / / R L . V CE3 (sat) is the saturation conduction voltage drop of the RF transistor Q3.

[0066] By configuring the resistor network parameters, the ratio of the three output levels is 1:2:3, that is, the fourth equation below: V1:V2:V3=1:2:3. The resistance value of the equivalent impedance of the phase modulator in this embodiment is R L It is 50 ohms, so in the high-speed four-level quantum phase driving circuit based on radio frequency transistors, the resistance values ​​R4, R5, R6, R7 and R8 of the resistors R4, R5, R6, R7 and R8 need to be set. Since there are parasitic capacitance Cs and pull-up resistor Rp in the collector when the transistor is turned off, the voltage of the collector will rise exponentially, and the rise time is determined by t=Rp*Cs. In order to reduce the charging time and increase the signal rising edge of the RF transistor Q1 and the RF transistor Q2 when they are turned on, the resistance values ​​of the resistor R4 and the resistor R5 should not be too large or too small. If the resistance value is too large, the charging RC constant will be directly increased; if the resistance value is too small, the rated power required by the resistor increases, and the package of the resistor also increases accordingly. The large package resistance will increase the parasitic capacitance and the charging RC constant will also increase. Therefore, the optimal selection range of the resistance value of the resistor R4 and the resistor R5 is between 50 and 100 ohms. In this embodiment, the appropriate resistance values ​​of the resistor R4 and the resistor R5 are given respectively, and the first equation, the second equation, the third equation and the fourth equation are solved simultaneously. In particular, the saturation conduction voltage drop V of the three RF transistors Q1, Q2, and Q3 CE1 (sat), V CE2 (sat), V CE3 (sat) is fixed and known, and the conduction voltage drop parameters of the RF transistors produced in the same batch are very different. Therefore, for the convenience of calculation, the saturation conduction voltage drop V CE1 (sat), V CE2 (sat), V CE3 (sat) are approximately equal and unified into VCE(sat) for ease of calculation. The above formula is further simplified:

[0067] V1=[VDD-VE-VCE(sat)]*k

[0068] V2=[VDD-VE-VCE(sat)]*2k;

[0069] V3=[VDD-VE-VCE(sat)]*3k;

[0070] The resistance values ​​of the resistor R6, the resistor R7, and the resistor R8 can be obtained.

[0071] The quality of the quantum state preparation is determined by the amplitude accuracy of the driving voltage and the high and low temperature stability of the half-wave voltage of the phase modulator. CE1 (sat), V CE2 (sat), V CE3 (sat) is minimally affected by ambient temperature variations in different environments and has little impact on the amplitude ratio of the output levels. However, the half-wave voltage of the phase modulator varies significantly at high and low temperatures, causing deviations in the amplitude of the output levels used for quantum state preparation, thereby affecting the amplitude ratio of each output level and, in turn, reducing the quality of quantum state preparation. According to literature reports and data provided by phase modulator suppliers, the typical temperature drift coefficient of the half-wave voltage of a lithium niobate (LiNbO3) crystal-based phase modulator is approximately -2mV / °C. Therefore, the impact of temperature changes on the half-wave voltage of the phase modulator must also be fully considered. To compensate for the voltage difference generated by the phase modulator at high and low temperatures, a negative temperature compensation coefficient equal to the temperature drift coefficient is introduced into the power supply VDD. This ensures the accuracy of the output level amplitude ratio at high and low temperatures, thereby enhancing the accuracy of quantum state preparation at both high and low temperatures.

[0072] For example, at 25°C, the modulator half-wave voltage Vπ=4V, so the four voltage levels (V0, Vπ / 2, Vπ, V3π / 2) required to prepare the four quantum states are: 0V, 2V, 4V, and 6V respectively.

[0073] Then we adjust the VDD voltage so that V1 = 2V, V2 = 4V, and V3 = 6V, so that we can prepare the accurate quantum state.

[0074] Assuming that the temperature drift coefficient of the modulator half-wave voltage is -20mV / ℃, when the temperature changes to 45℃ (the temperature changes by 20℃), the modulator half-wave voltage changes accordingly to Vπ'=4V-20mV / ℃*20℃=3.6V. Then the four voltage levels required to prepare the four quantum states (V0, Vπ / 2, Vπ, V3π / 2) are: 0V, 1.8V, 3.6V, 5.4V respectively. If our circuit output is still V1=2V, V2=4V, V3=6V, the prepared quantum state will deviate.

[0075] If we introduce a negative temperature coefficient -KmV / ℃ to the power supply voltage, the voltage VDD'=VDD-KmV / ℃*20℃ at 45℃

[0076] Circuit output

[0077] V1'=[VDD'-VE-VCE(sat)]*k

[0078] V2'=[VDD'-VE-VCE(sat)]*2k;

[0079] V3'=[VDD'-VE-VCE(sat)]*3k;

[0080] If the compensation coefficient of VDD is introduced appropriately, V1' = 1.8V, V2' = 3.6V, and V3' = 5.4V can be set, and the accuracy of quantum state preparation can still be guaranteed.

[0081] The negative temperature compensation coefficient of the power supply VDD is realized by a low dropout linear regulator LDO containing an NTC resistor (or RTD resistor) that is negatively correlated with temperature. Figure 5 As shown, the power supply Vin is connected to the power input terminal Vin of the low voltage difference linear regulator LDO, and the power input terminal Vin is grounded through the capacitor Cin. The output terminal Vo of the low voltage difference linear regulator LDO is connected to the power supply VDD, and the output terminal Vo is grounded through the capacitor Co. An impedance network composed of multiple resistors is connected between the output terminal Vo and the power supply VDD. The impedance network includes a resistor R M , resistor Ro, resistor NTC, resistor R N The resistor Ro and the resistor NTC are connected in series and then connected to the resistor R M In parallel, one end of the network is connected to the power supply VDD, and the other end is connected to the internal reference voltage terminal FB of the low voltage difference linear regulator LDO and the resistor R N Connect in series and then ground.

[0082] The stable voltage provided by the low-dropout linear regulator LDO to the power supply VDD is:

[0083] V DD ={1+[R M / / (R O +R NTC )] / R N}*V FB

[0084] Among them, R M The resistor R M The resistance value, R O is the resistance value of the resistor Ro, R NTCis the resistance of the NTC resistor, R N The resistor R N The resistance value, V FB The internal reference voltage of the low-dropout linear regulator LDO is selected by selecting a suitable NTC resistor and configuring the appropriate resistor Ro, the resistor R M and the resistor R N By changing the resistance value, the required negative temperature compensation coefficient can be obtained to compensate for the voltage deviation of the phase modulator caused by high and low temperatures, thereby obtaining the required level and preparing a high-quality quantum state.

[0085] Example 2

[0086] like Figure 6 As shown, the difference between this embodiment and embodiment 1 is that the number of high-speed level converters and radio frequency transistors and their resistor networks is not limited. A high-speed level converter and a corresponding radio frequency transistor and its resistor network are regarded as a basic unit. In embodiment 1, there are three such basic units, and the number of basic units can be extended to n (n≥4). Accordingly, there are n high-speed level converters and n radio frequency transistors. The bases of the n radio frequency transistors are connected to the emitters of the radio frequency transistors through resistors R1, R4, ..., R(3n-5), and R(3n-2), respectively. The collectors of the 1st to n-1st radio frequency transistors are connected to the power supply VDD through resistors R2, R5, ..., R(3n-4), respectively. The collectors of the n radio frequency transistors are converged to the same output node N through resistors R3, R6, ..., R(3n-3), and R(3n-1), respectively. One end of the phase modulator equivalent impedance RL is connected to the output node N, and the other end is connected to the power supply VDD. A phase drive circuit containing n basic units can generate n levels with different amplitudes. The number of the basic units and the voltage and resistance values ​​of the radio frequency transistor and its resistance network can be flexibly adjusted according to the preparation requirements of different quantum states to obtain any multiple output levels that meet different amplitude ratios.

[0087] The specific working principle of the driving circuit of this embodiment is:

[0088] The random signal generator generates a random code signal PVi (i∈{1,2,…n}) based on random coding logic. The random code signal PVi is transmitted to the high-speed level converter i, which converts the random code signal PVi into the low-voltage positive emitter-coupled logic level. The low-voltage positive emitter-coupled logic level drives the RF transistor Qi to conduct. The RF transistor Qi outputs a level of corresponding amplitude to the phase modulator, which receives the level and performs phase modulation. The collector power supply VDD of the RF transistor Qi is provided by a low-dropout linear regulator. A suitable negative temperature coefficient is introduced into the output VDD of the low-dropout linear regulator through pre-compensation to offset the temperature drift of the half-wave voltage of the phase modulator. This embodiment has more flexible adjustability and wider applicability, and therefore has broad application prospects.

[0089] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A high-speed multi-level quantum phase drive circuit based on radio frequency triode, characterized by: The driving circuit includes a random signal generator, a plurality of high-speed level converters respectively connected to the output ends of the random signal generator, and a plurality of radio frequency transistors and resistor network units respectively connected to the output ends of the high-speed level converters; The random signal generator generates a random code signal according to the random code logic. The random code signal is transmitted to the high-speed level converter. The high-speed level converter converts the random code signal into a low-voltage positive emitter-coupled logic level. The low-voltage positive emitter-coupled logic level drives the corresponding radio frequency transistor to turn on. The radio frequency transistor outputs a level of corresponding amplitude. At any time, only one radio frequency transistor is turned on.

2. The high-speed multi-level quantum phase driving circuit based on radio frequency triode according to claim 1, characterized in that: A high-speed level converter and a corresponding radio frequency transistor and a resistor network unit thereof are regarded as a basic unit. There are n basic units, where n≥3.

3. The high-speed multi-level quantum phase driving circuit based on radio frequency triode according to claim 1, characterized in that: The 1st to n-1st radio frequency transistors and their resistor network units include a radio frequency transistor, a first resistor, a second resistor, and a third resistor, and the nth radio frequency transistor and its resistor network unit includes a radio frequency transistor, a first resistor, and a second resistor; The bases of all RF transistors are connected to the emitters of the RF transistors through the first resistor, the collectors of all RF transistors are converged to the same output node N through the second resistor, the collectors of the 1st to n-1st RF transistors are connected to the power supply VDD through the third resistor, one end of the phase modulator equivalent impedance RL is connected to the output node N, and the other end is connected to the power supply VDD, and the emitters of all RF transistors are connected to the power supply VE.

4. The high-speed multi-level quantum phase driving circuit based on radio frequency triode according to claim 1, characterized in that: The radio frequency transistor is based on SiGe technology, and the cut-off frequency ft is greater than 37 GHz.

5. The high-speed multi-level quantum phase driving circuit based on radio frequency triode according to claim 1, characterized in that: A negative temperature compensation coefficient is introduced into the power supply VDD.

6. The high-speed multi-level quantum phase driving circuit based on radio frequency triode according to claim 5, characterized in that: The negative temperature compensation coefficient is realized by a low voltage dropout linear regulator LDO containing an NTC resistor that is negatively correlated with temperature. The power supply Vin is connected to the power input terminal Vin of the low voltage dropout linear regulator LDO, and the power input terminal Vin is grounded through a capacitor Cin. The output terminal Vo of the low voltage dropout linear regulator LDO is connected to the power supply VDD, and the output terminal Vo is grounded through a capacitor Co. An impedance network composed of multiple resistors is connected between the output terminal Vo and the power supply VDD. The impedance network includes a resistor R M , resistor Ro, resistor NTC, resistor R N The resistor Ro and the resistor NTC are connected in series and then connected to the resistor R M In parallel, one end of the network is connected to the power supply VDD, and the other end is connected to the internal reference voltage terminal FB of the low voltage difference linear regulator LDO and the resistor R N Connect in series and then ground.

7. The high-speed multi-level quantum phase driving circuit based on radio frequency triode according to claim 6, characterized in that: The stable voltage provided by the low-dropout linear regulator LDO to the power supply VDD is: V DD ={1+[R M / / (R O +R NTC )] / R N }*V FB Among them, " / / " indicates parallel connection, R M The resistor R M The resistance value, R O is the resistance value of the resistor Ro, R NTC is the resistance of the NTC resistor, R N The resistor R N The resistance value, V FB The internal reference voltage of the low dropout linear regulator LDO is obtained by selecting a suitable NTC resistor and configuring the suitable resistors Ro and R. M and the resistor R N The required negative temperature compensation coefficient is obtained by adjusting the resistance value.

8. The high-speed multi-level quantum phase driving circuit based on radio frequency triode according to claim 2, characterized in that: There are three basic units, and at any time, only one of the randomly coded signals is converted into the low-voltage positive emitter-coupled logic level by the high-speed level converter, driving any one of the three RF transistors Q1, Q2, and Q3 to turn on and output a level of corresponding amplitude. If the three RF transistors Q1, Q2, and Q3 are all cut off, the final output level amplitude is 0. The resistance value of the resistor network of the three RF transistors Q1, Q2, and Q3 is set so that the final output amplitude ratio is 0:1:2:3 for the four quantum state levels.

9. The high-speed multi-level quantum phase driving circuit based on radio frequency triode according to claim 7, characterized in that: The method for setting the resistance value of the resistor network is as follows: When the RF transistor Q1 is turned on, the RF transistors Q2 and Q3 are both turned off and regarded as open circuit. The RF transistor Q1 and its resistor network need to output a level with an amplitude of Vπ / 2 at node N for preparing the quantum state. According to the required level amplitude and the connection relationship of the resistor network, the first equation is listed: V1=[V DD -V E -V CE1 (sat)]*Rx / (Rx+R6); Among them, Rx is the equivalent resistance of the phase modulator equivalent impedance RL and the two series resistors R5 and R7 of the collector of the RF transistor Q2 in parallel, and the expression is: Rx=(R5+R7) / / R L , V CE1 (sat) is the saturation conduction voltage drop of the RF transistor Q1; When the RF transistor Q2 is turned on, the RF transistors Q1 and Q3 are both turned off and regarded as open circuit. The RF transistor Q2 and its resistor network need to output a level with an amplitude of Vπ at node N for preparing the quantum state. According to the required level amplitude and the connection relationship of the resistor network, the second equation is listed: V2=[V DD -V E -V CE2 (sat)*Ry / (Ry+R7); Wherein, Ry is the equivalent resistance of the phase modulator equivalent impedance RL and the two series resistors R4 and R6 of the collector of the RF transistor Q1 in parallel, and the expression is: Ry=(R4+R6) / / R L , V CE2 (sat) is the saturation conduction voltage drop of the RF transistor Q2; When the RF transistor Q3 is turned on, the RF transistors Q1 and Q2 are both turned off and regarded as open circuits. The RF transistor Q3 and its resistor network need to output a level with an amplitude of V3π / 2 at node N for preparing a quantum state. According to the required level amplitude and the connection relationship of the resistor network, the third equation is listed: V3=[V DD -V E -V CE3 (sat)]*Rz / (Rz+R8); Wherein, Rz is the equivalent resistance of the phase modulator equivalent impedance RL connected in parallel with the two series resistors R4 and R6 of the collector of the RF transistor Q1, and then connected in parallel with the two series resistors R5 and R7 of the collector of the RF transistor Q2, and the expression is: Rz=(R4+R6) / / (R5+R7) / / R L , V CE3 (sat) is the saturation conduction voltage drop of the RF transistor Q3; The fourth equation is: V1:V2:V3 =1:2:3; The equivalent impedance R L The resistance values ​​of the resistors R4 and R5 are set to be constant between 50 and 100 ohms, and the first, second, third, and fourth equations are solved simultaneously to obtain the resistance values ​​of the resistors R6, R7, and R8.

10. The high-speed multi-level quantum phase driving circuit based on radio frequency triode according to claim 9, characterized in that: The saturation conduction voltage drop V of the three RF transistors Q1, Q2, and Q3 CE1 (sat), V CE2 (sat), V CE3 (sat) equal.

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